US20200266848A1 - Analog input module - Google Patents
Analog input module Download PDFInfo
- Publication number
- US20200266848A1 US20200266848A1 US16/791,037 US202016791037A US2020266848A1 US 20200266848 A1 US20200266848 A1 US 20200266848A1 US 202016791037 A US202016791037 A US 202016791037A US 2020266848 A1 US2020266848 A1 US 2020266848A1
- Authority
- US
- United States
- Prior art keywords
- analog
- input
- signal
- digital converter
- coupling element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008878 coupling Effects 0.000 claims abstract description 91
- 238000010168 coupling process Methods 0.000 claims abstract description 91
- 238000005859 coupling reaction Methods 0.000 claims abstract description 91
- 238000011156 evaluation Methods 0.000 claims abstract description 72
- 238000002955 isolation Methods 0.000 claims abstract description 12
- 238000012360 testing method Methods 0.000 claims description 59
- 230000001939 inductive effect Effects 0.000 claims description 6
- 238000001914 filtration Methods 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000002405 diagnostic procedure Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/054—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
- G05B19/058—Safety, monitoring
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D7/00—Indicating measured values
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
Definitions
- the present invention relates to a module of a programmable controller, where the module has a plurality of analog input channels each for an analog input signal, and where the module has a control and evaluation device and for each input channel, in each case independently of the other input channels, input terminals for supplying the respective analog input signal.
- Analog inputs modules are generally known. As a rule, they have a central analog-to-digital converter, which is connected in sequential succession via an analog multiplexer to the input terminals of the input channels. This leads to considerable hardware complexity, in particular because of the possible differences in potential of up to 120 V DC or 150 V AC between the various input terminals. Certification according to an Safety Integrity Level (SIL) level defined in International Electrotechnical Commission (IEC) 61508 is difficult.
- SIL Safety Integrity Level
- EP 2 090 945 A1 discloses an input group and an associated method for error detection.
- a module that has, for each input channel, in each case independently of the other input channels, a first and a second analog-to-digital converter, a first, a second, a third and a fourth coupling element and a switchover device, where the control and evaluation device for each input channel, in each case independently of the other input channels, includes an evaluation circuit, a test signal generator and a switching signal generator.
- An input side of the respective first analog-to-digital converter is connected directly or indirectly with the respective input terminals and an output side of the respective first analog-to-digital converter is connected via the respective first coupling element with the respective evaluation circuit.
- the respective switchover device has a first and a second signal input, where a signal output and a control input, where the first signal input of the respective switchover device is connected directly or indirectly with the respective input terminals, the second signal input of the respective switchover device is connected via the respective third coupling element with the respective test signal generator, the control input of the respective switchover device is connected via the respective fourth coupling element with the respective switching signal generator and the signal output of the respective switchover device is connected with an input side of the respective second analog-to-digital converter.
- an output side of the respective second analog-to-digital converter is connected via the respective second coupling element with the respective evaluation circuit and the respective first, the respective second, the respective third and the respective fourth coupling element are each formed as a coupling element which brings about electrical isolation.
- control and evaluation device is arranged in a Field Programmable Gate Array (FPGA).
- FPGA Field Programmable Gate Array
- the control and evaluation device preferably has a respective receiver for the respective input channel, which receiver is connected with an output side of the respective first or the respective second coupling element and filters a respective frequency-encoded receive signal from a digital signal transmitted via the respective first or the respective second coupling element. This makes it simply possible to produce a “HART” receiver.
- control and evaluation device has a respective transmitter for the respective input channel, the respective transmitter is connected via a respective fifth coupling element with the respective input terminals, the respective transmitter feeds a respective frequency-encoded transmit signal into the respective input signal and the respective fifth coupling element is embodied as a coupling element which brings about electrical isolation. This makes it simply possible to produce a “HART” transmitter.
- the module includes a first power supply device, which supplies the control and evaluation device with electrical energy, the first power supply device is connected via a sixth coupling element with a second power supply device, the second power supply device supplies the first and second analog-to-digital converters of at least one of the input channels with electrical energy and the sixth coupling element is formed as a coupling element which brings about electrical isolation. In this way, electrically isolated power supply of the individual elements of the respective input channel is simply possible.
- the respective evaluation circuit includes a respective first and a respective second filter device for determining a respective first and a respective second filtered signal based on a respective digital signal output by the respective first and the respective second analog-to-digital converter, includes a respective first comparator for comparing the respective first and the respective second filtered signal and includes a respective second comparator for comparing a respective test signal output by the respective test signal generator and the respective second filtered signal.
- a digital signal output by the respective first and the respective second analog-to-digital converter is generally within a respective predetermined range of values.
- the respective test signal generator is configured such that a respective test signal output by the respective test signal generator runs cyclically through the respective full predetermined range of values. In this way, the second analog-to-digital converter may also be tested over its full range of values.
- the respective test signal generator and the respective switching signal generator may be tuned to one another such that the respective test signal is initially fed via the respective second signal input of the respective switchover device directly or indirectly to the respective second analog-to-digital converter, the respective test signal then runs through the respective full predetermined range of values and only thereafter is the respective analog input signal again fed directly or indirectly to the respective second analog-to-digital converter. In this case, the second analog-to-digital converter is fully checked on each individual test phase.
- test phases corresponding to step b) are required for complete checking of the second analog-to-digital converter, but the individual test phases may consequently be selected to be shorter.
- the respective first analog-to-digital converter is formed as a delta-sigma modulator and the respective first coupling element has, in addition to a forward channel for transmitting a respective digital signal output by the respective first analog-to-digital converter, a backward channel for transmitting a respective clock signal from the respective evaluation circuit to the respective first analog-to-digital converter.
- a corresponding embodiment may also be provided for the respective second analog-to-digital converter and the associated respective second coupling element.
- the respective first and the respective second analog-to-digital converters are preferably diversely formed. In this way, systematic errors can be particularly reliably avoided.
- one of these two analog-to-digital converters to be formed as a delta-sigma modulator and the coupling element connected with this analog-to-digital converter to have not only a forward channel for transmitting a digital signal output by this analog-to-digital converter but also a backward channel for transmitting a clock signal from the respective evaluation circuit to this analog-to-digital converter.
- the other one of these two analog-to-digital converters to be formed as a Successive Approximation Register (SAR) analog-to-digital converter and the coupling element connected with this analog-to-digital converter to have not only a forward channel for transmitting a digital signal output by this analog-to-digital converter but also three backward channels for transmitting a clock signal, a configuration signal and a data frame signal from the respective evaluation circuit to this analog-to-digital converter.
- SAR Successive Approximation Register
- the one embodiment is selected for the one analog-to-digital converter and the other embodiment is selected for the other analog-to-digital converter, the diverse embodiment is produced wholly automatically.
- the one or the other embodiment is selected just for the one or just for the other analog-to-digital converter respectively, the respective analog-to-digital converter respectively still to be formed in a diverse manner can be formed in any other desired way.
- the respective first, the respective second, the respective third and the respective fourth coupling elements are preferably formed as inductive couplers. This embodiment is robust, inexpensive and reliable.
- FIG. 1 shows a schematic representation of a technical industrial process and a programmable controller in accordance with the invention
- FIG. 2 shows schematic representation of a module of a programmable controller in accordance with the invention
- FIG. 3 is a more detailed representation of the module of FIG. 2 .
- FIG. 4 shows a schematic representation of the analog side of an input channel in accordance with the invention
- FIG. 5 shows a values diagram
- FIG. 6 shows a graphical plot of a time diagram
- FIG. 7 shows a graphical plot of a further time diagram
- FIG. 8 shows one embodiment of the module of FIG. 3 ;
- FIG. 9 shows a further embodiment of the module of FIG. 3 ;
- FIG. 10 shows a plurality of parallel-connected input channels in accordance with the invention.
- a technical industrial process 1 is controlled by a programmable controller.
- the technical industrial process 1 may be of any desired nature. It may, for example, be a chemical plant, a filling apparatus, an injection molding machine, a conveying apparatus and another apparatus or plant.
- the programmable controller comprises a central processing unit 2 and peripheral modules 3 a, 3 b etc.
- the central processing unit 2 and the peripheral modules 3 a, 3 b etc. are connected together via a bus system 2 ′.
- the peripheral modules 3 a, 3 b etc. may be differently configured.
- the peripheral module 3 a may be a module via which digital control signals are output to the technical industrial process 1 .
- the peripheral module 3 b may be a module via which digital process signals are fed to the programmable controller.
- At least one of the peripheral modules 3 a, 3 b etc. (in the present case the peripheral module 3 c ) is a module via which the analog process signals are fed to the programmable controller.
- the peripheral module 3 c constitutes the subject matter of the present invention.
- the module 3 c has a plurality of analog input channels 4 a to 4 d.
- the number of input channels 4 a to 4 d may, however, also be greater than four. They may, for example, amount to eight or 16. Often the number of input channels 4 a to 4 d is a power of two.
- an analog input signal Ea to Ed may in each case be fed to the module 3 c.
- the respective analog input signal Ea to Ed may denote any desired physical variable, such as a temperature, a pressure or a filling level.
- the module 3 c has a control and evaluation device 5 .
- the control and evaluation device 5 is present once in the form of one unit for all input channels 4 a to 4 d.
- the control and evaluation device 5 has for each input channel 4 a to 4 d (in each case independently of the other input channels 4 a to 4 d ) an evaluation circuit 6 , a test signal generator 7 and a switching signal generator 8 .
- the evaluation circuit 6 , the test signal generator 7 and the switching signal generator 8 are thus independently and individually present for each individual input channel 4 a to 4 d.
- FIG. 2 shows the evaluation circuit 6 , the test signal generator 7 and the switching signal generator 8 for input channel 4 a alone.
- the control and evaluation device 5 may be arranged, according to the representation in FIG. 2 , for example, in an FPGA.
- FPGA field programmable gate array
- the term “FPGA” is generally familiar to skilled persons and refers to an electronic unit in which the hardware interconnection of the individual elements of the FPGA may be fixed by appropriate programming.
- the module 3 c additionally has input terminals 9 a to 9 d for each input channel 4 a to 4 d, in each case independently of the other input channels 4 a to 4 d.
- the respective analog input signal Ea to Ed may be fed to the respective input channel 4 a to 4 d via the input terminals 9 a to 9 d.
- the module 3 c has for each input channel 4 a to 4 d (in each case independently of the other input channels 4 a to 4 d ) a first and a second analog-to-digital converter 10 , 11 , a first, a second, a third and a fourth coupling element 12 to 15 and a switchover device 16 . This is shown in FIG. 3 just for the input channel 4 a.
- the analog input signal Ea may be a voltage signal. As a rule, however, it is a current signal.
- the current signal generally lies in the range from 4 to 20 mA. This is of secondary significance, however. It could also lie in another range, for example in the range from ⁇ 24 mA to +24 mA.
- an input side of the first analog-to-digital converter 10 is directly or indirectly connected with the input terminals 9 a.
- a direct connection is generally present if the analog input signal Ea is a voltage signal. If the analog input signal Ea, in contrast, is a current signal, then a current-to-voltage converter 17 is arranged between the input terminals 9 a and the first analog-to-digital converter 10 .
- the wording “directly or indirectly” should be understood as follows.
- An indirect connection is present if the respective signal is guided via a current-to-voltage converter 17 , 18 . If the respective signal is not guided via a current-to-voltage converter 17 , 18 , a direct connection is present.
- An output side of the first analog-to-digital converter 10 is connected with the evaluation circuit 6 via the first coupling element 12 .
- the analog input signal Ea generated via a sensor 19 is thereby digitized (optionally after current-to-voltage conversion) in the first analog-to-digital converter 10 .
- the associated digital signal Ea′ is fed to the evaluation circuit 6 via the first coupling element 12 .
- the first coupling element 12 is formed such that it brings about or causes electrical isolation.
- the first coupling element 12 may, for example, be formed as an optocoupler.
- the first coupling element 12 is formed as an inductive coupler.
- suitable inductive couplers sometimes also known as magnetic couplers
- the second to fourth coupling elements 13 to 15 (and also a subsequently introduced fifth coupling element 20 and a subsequently introduced sixth coupling element 21 ) have identical forms.
- an input side of the second analog-digital converter 11 is furthermore likewise connected with the input terminals 9 a.
- the switchover device 16 is, however, arranged between the input terminals 9 a and the second analog-to-digital converter 11 .
- the switchover device 16 in turn has a first signal input 22 , a second signal input 23 , a signal output 24 and a control input 25 .
- the first signal input 22 is directly or indirectly connected with the input terminals 9 a.
- a direct connection is generally present if the analog input signal Ea is a voltage signal. If the analog input signal Ea is a current signal, then a direct connection may likewise be present.
- the optionally necessary current-to-voltage converter 18 may be arranged between the switchover device 16 and the second analog-to-digital converter 11 .
- an indirect connection may be present, namely when, according to the representation in FIG. 3 , the current-to-voltage converter 18 is arranged between the input terminals 9 a and the switchover device 16 .
- the signal output 25 of the switchover device 16 is connected with an input side of the second analog-digital converter 11 .
- the connection may alternatively be direct or, if the current-to-voltage converter 18 is arranged between the switchover device 16 and the second analog-to-digital converter 11 , indirect.
- An output side of the second analog-to-digital converter 11 is connected with the evaluation circuit 6 via the second coupling element 13 .
- the first signal input 22 is connected with the signal output 24 , the analog input signal Ea generated via the sensor 19 is thereby digitized in the second analog-to-digital converter 11 , optionally after current-to-voltage conversion.
- the associated digital signal Ea′′ is fed to the evaluation circuit 6 via the second coupling element 13 .
- the second signal input 23 is connected with the test signal generator 7 via the third coupling element 14 .
- a first amplifier and conversion device 26 may optionally be arranged between the third coupling element 14 and the second signal input 23 .
- the second signal input 23 is connected with the signal output 24 , the test signal T generated via the test signal generator 7 is thereby digitized in the second analog-to-digital converter 11 , optionally after current-to-voltage conversion.
- the digital signal Ta′′ corresponding to the second coupling element 13 is fed via the second coupling element to the evaluation circuit 6 .
- the control input 25 is connected via the fourth coupling element 15 with the switching signal generator 8 .
- the switching signal generator 8 generates the corresponding control signal S, via which it is determined whether the first or second signal input 22 , 23 should be connected with the signal output 24 .
- the test signal T is thus not fed permanently to the second analog-to-digital converter 11 but rather only when, due to corresponding actuation of the switchover device 16 by the switching signal generator 8 , the second signal input 23 is switched through to the signal output 24 . This is only temporarily the case. There is thus constant alternation between switching through of the first signal input 22 to the signal output 24 and switching through of the second signal input 23 to the signal output 24 . As a rule, the slice of time during which the second signal input 23 is switched through to the signal output 24 is considerably smaller than the slice of time during which the first signal input 22 is switched through to the signal output 24 . This is of subordinate significance, however.
- the evaluation circuit 6 To evaluate the digital signals Ea′, Ea′′ Ta′′, the evaluation circuit 6 generally has a first and a second filter device 27 , 28 .
- the two filter devices 27 , 28 may, for example, be formed as low-pass filters.
- the evaluation circuit 6 determines respective filtered signals F′, F′′ on the basis of the digital signals Ea′, Ea′′, Ta′′.
- One of the filtered signals F′, F′′ (preferably the filtered signal F′) is transmitted via the bus system 2 ′ to the central processing unit 2 .
- the evaluation circuit 6 additionally generally has a first comparator 29 .
- the first comparator 29 is active when and while the second analog-to-digital converter 11 is outputting the digital signal Ea′′.
- the filtered signals F′, F′′ are fed to the first comparator 29 .
- the filtered signals F′, F′′ are compared with one another in the first comparator 29 . If there is an appreciable difference, then a corresponding alarm message A is transmitted via the bus system 2 ′ to the central processing unit 2 . Otherwise, the alarm message A is not output. Owing to the alarm message A being output only in the event of an appreciable difference, it is particularly possible to take into account slight differences in the digital signals Ea′, Ea′′ that may arise as a result of component tolerances or different sampling times.
- the evaluation circuit 6 additionally generally has a second comparator 30 .
- the second comparator 30 is active when and while the second analog-to-digital converter 11 is outputting the digital signal Ta′′.
- the filtered signal F′′ and the test signal T are fed to the second comparator 30 .
- the filtered signal F′′ and the test signal T are compared with one another in the second comparator 30 . If there is an appreciable difference, a corresponding alarm message A′ is transmitted via the bus system 2 ′ to the central processing unit 2 . Otherwise, the alarm message A′ is not output.
- unidirectional or bidirectional transmission of digital signals from the control and evaluation device 5 to the sensor 19 and/or back also occurs via the input terminals 9 a.
- This type of transmission is known to skilled persons by the acronym HART (Highway Addressable Remote Transducer).
- the control and evaluation device 5 for the input channel 4 a may have a receiver 31 .
- the receiver 31 is in this case connected with the output side of the first or second coupling element 12 , 13 .
- the receiver 31 may filter the frequency-encoded receive signal out of the corresponding digital signal Ea′, Ea′′ by suitable frequency filtering.
- the control and evaluation device 5 for the input channel 4 a has a transmitter 32 .
- the transmitter 32 is connected with the input terminals 9 a via the above-mentioned fifth coupling element 20 .
- the transmitter 32 thereby feeds a frequency-encoded transmit signal into the analog input signal Ea.
- a second amplifier and conversion device 33 may be arranged between the fifth coupling element 20 and the input terminals 9 a.
- the evaluation circuit 6 , the test signal generator 7 , the switching signal generator 8 , the receiver 31 and the transmitter 32 are arranged within a dashed frame.
- the elements arranged within this frame are present in the control and evaluation device 5 individually for the respective input channel 4 a to 4 d.
- the analog-to-digital converters 10 , 11 , the switchover device 16 and optionally the current-to-voltage converters 17 , 18 and the amplifier and conversion devices 26 , 33 are present individually for the respective input channel 4 a to 4 d.
- the module 3 c additionally has a first power supply device 34 .
- the first power supply device 34 supplies the control and evaluation device 5 with electrical energy.
- the first power supply device 34 is connected with a second power supply device 35 via the above-mentioned sixth coupling element 21 .
- the second power supply device 35 is thus supplied via the sixth coupling element 21 .
- the second power supply device 35 supplies the first and second analog-to-digital converters 10 , 11 at least of the input channel 4 a with electrical energy. Where necessary, the further elements of the respective input channel 9 a are also supplied with electrical energy via the second power supply device 35 .
- This relates in particular to the switchover device 16 and, where present, the current-to-voltage converters 17 , 18 and the amplifier and conversion devices 26 , 33 .
- the second power supply device 35 also supplies the corresponding elements of the other input channels 4 b to 4 d. Respective supply of the individual input channels 4 a to 4 d may proceed separately and with electrical isolation from input channel 4 a to 4 d to input channel 4 a to 4 d.
- FIG. 4 shows a possible embodiment of the analog side of the input channel 4 a, where the switchover device 16 is not shown for purposes of clarity. Similar explanations again apply for the other input channels 4 b to 4 d.
- the input signal Ea is a current signal.
- the second power supply device 35 provides a positive and a negative potential V+, V ⁇ and a reference potential (indicated by the ground symbol) for the input channel 4 a.
- the two current-to-voltage converters 17 , 18 are present and each consist of an input resistor 36 , 37 and a downstream operational amplifier 38 , 39 .
- One of the two operational amplifiers 38 , 39 is connected with snubber resistors 40 .
- the snubber resistors 40 are preferably (but not necessarily) identical in size.
- the digital signal Ea′ output by the first analog-to-digital converter 10 is proportional to the analog input signal Ea.
- the quantization of the digital signal Ea′ arising in the context of digitization may be ignored in this context.
- the digital signal Ea′ has an upper limit of a maximum value MAX and a lower limit of a minimum value MIN.
- the digital signal Ea′ output by the first analog-to-digital converter 10 therefore always lies in the range of values defined by the minimum value MIN and the maximum value MAX.
- the possible range of values of the digital signal Ea′ is therefore predetermined.
- similar explanations also apply for the digital signal Ea′′ output by the second analog-to-digital converter 11 .
- the test signal generator 7 is configured such that the test signal T runs cyclically through the full predetermined range of values as a function of the time t. In this way, the second analog-to-digital converter 11 is tested cyclically over its full admissible range of values.
- test signal generator 7 and the switching signal generator 8 are tuned to one another such that (after corresponding switching through of the second signal input 23 to the signal output 24 ) the test signal T is fed via the second signal input 23 to the second analog-to-digital converter 11 , then the test signal T runs through the full predetermined range of values and only thereafter (therefore once the test signal T has run through the full predetermined range of values) is the analog input signal Ea again fed to the second analog-to-digital converter 11 .
- This time sequence is shown in FIG. 6 .
- the corresponding switchover times are indicated in FIG. 6 by vertical dashed lines.
- test signal generator 7 and the switching signal generator 8 are tuned to one another such that, according to the representation in FIG. 7 , although the test signal T is initially fed to the second analog-to-digital converter 11 via the second signal input 23 , the test signal T then, however, runs through just part of the full predetermined range of values. After running through this part of the predetermined range of values, the switchover device 16 is again switched over and the analog input signal Ea is thereby again fed to the second analog-to-digital converter 11 .
- the analogue-to-digital converters 10 , 11 can be configured as required. As shown in FIG. 8 , it is possible, for example, for the respective first analog-to-digital converter 10 to be formed as a delta-sigma modulator. Delta-sigma modulation is familiar to a person skilled in the art. Reference may, for example, be made to the corresponding entries in the German- and English-language versions of Wikipedia.
- the first coupling element 12 has a forward channel 41 .
- the forward channel 41 serves to transmit the digital signal Ea′.
- the first coupling element 12 has a backward channel 42 .
- the backward channel 42 serves to transmit a clock signal CLK from the evaluation circuit 6 to the first analog-to-digital converter 10 .
- the embodiments explained above in conjunction with the first analog-to-digital converter 10 and the first coupling element 12 may also be similarly achieved with the second analog-to-digital converter 11 .
- the second coupling element 13 has not only a forward channel 43 , but additionally also a backward channel 44 .
- the first and second analog-to-digital converters 10 , 11 may be similarly formed. This is the case, for example, with the embodiment of FIG. 8 .
- the first and second analog-to-digital converters 10 , 11 may be diversely formed. A possible diverse embodiment is explained below in relation to FIG. 9 .
- one of the two analog-to-digital converters 10 , 11 (here the first analog-to-digital converter 10 ) is formed as a delta-sigma modulator.
- the above explanations in relation to FIG. 8 about the embodiment of the first analog-to-digital converter 10 and the first coupling element 12 are likewise applicable.
- the other one of the two analog-to-digital converters 10 , 11 (here the second analog-to-digital converter 11 ) is differently formed.
- the second analog-to-digital converter 11 may be formed as an SAR analog-to-digital converter.
- SAR Successive Approximation Register and has a fixed meaning for a person skilled in the art of analog-digital converters. Reference may, for example, be made to the entry entitled “Successive approximation ADC” in the English-language version of Wikipedia.
- the corresponding coupling element (here the coupling element 13 ) has the forward channel 43 .
- the forward channel 43 serves to transmit the digital signal Ea′′.
- the second coupling element 13 has the backward channel 44 .
- the backward channel 44 serves to transmit the clock signal CLK from the evaluation circuit 6 to the second analog-to-digital converter 11 .
- the second coupling element 13 has two further backward channels 45 , 46 . These two backward channels 45 , 46 serve to transmit a configuration signal CONFIG and a data frame signal FRAME from the evaluation circuit 6 to the second analog-to-digital converter 11 .
- analog-to-digital converters 10 , 11 are also possible. If one of the two analog-to-digital converters 10 , 11 is formed as a delta-sigma modulator, then the other one of the two analog-to-digital converters 10 , 11 does not necessarily have to be formed as an SAR analog-to-digital converter. Likewise, in the event of one of the two analog-to-digital converters 10 , 11 being configured as an SAR analog-to-digital converter, the other one of the two analog-to-digital converters 10 , 11 does not necessarily have to be embodied as a delta-sigma modulator. What is crucial is merely that the two analog-to-digital converters 10 , 11 are differently, i.e., diversely, formed.
- safety levels SIL 1 and SIL 2 as defined in IEC standard 61508.
- safety level SIL 3 as defined in IEC standard 61508, provision may be made, for example, in accordance with the representation in FIG. 10 , to feed the same analog input signal to a plurality of input channels 4 a to 4 d.
- the analog input signal Ea may, for example, be fed both to the input channel 4 a and also to an input channel 4 a ′ of a further module 3 c ′.
- circuits with Zener diodes 47 , 48 may be arranged on the input side of the input terminals 9 a, 9 a ′.
- the analog input signal Ea output by the sensor 19 is guided via the circuit with the Zener diodes 47 . If, on the other hand, the module 3 c is present, then the analog input signal Ea output by the sensor 19 is guided via the input terminals 9 a.
- the circuit with the Zener diodes 47 is in this case inactive. Similar explanations apply for the module 3 c ′, the input channel 4 a ′ thereof, the input terminals 9 a ′ thereof and the associated circuit with the Zener diodes 48 .
- the control and evaluation circuit of the module 3 c ′ is denoted with reference sign 5 ′.
- a module 3 c of a programmable controller has a plurality of analog input channels 4 a to 4 d for, in each case, one analog input signal Ea to Ed, a control and evaluation device 5 , and input terminals 9 a to 9 d for each input channel 4 a to 4 d for supplying the respective input signal Ea to Ed.
- the module 3 c has two analog-to-digital converters 10 , 11 , at least four coupling elements 12 to 15 and a switchover device 16 .
- the control and evaluation device 5 has an evaluation circuit 6 , a test signal generator 7 and a switching signal generator 8 .
- An input side of the one analog-to-digital converter 10 is directly or indirectly connected with the input terminals 9 a to 9 d, and an output side of this analog-to-digital converter 10 is connected with the evaluation circuit 6 via a coupling element 12 .
- the switchover device 16 has two signal inputs 22 , 23 , a signal output 24 and a control input 25 .
- One signal input 22 is directly or indirectly connected with the input terminals 9 a to 9 d, and the other signal input 23 is connected with the test signal generator 7 via a further coupling element 14 .
- the control input 25 is connected with the switching signal generator 8 via a further coupling element 15 .
- the signal output 24 is connected with an input side of the other analog-to-digital converter 11 .
- An output side of the other analog-to-digital converter 11 is connected with the evaluation circuit 6 via a further coupling element 13 .
- the coupling elements 12 to 15 each bring about or cause electrical isolation.
- the present invention has many advantages. In particular, simple, inexpensive and reliable implementation of the module 3 c is possible. Furthermore, despite the repeatedly occurring switching-through of the test signal T via the respective first analog-to-digital converter 10 , permanent acquisition of the analog input signal Ea to Ed is possible.
- the two different alarm messages A, A′ may, moreover, indicate which of the two analog-to-digital converters 10 , 11 may be defective. Implementation of HART communication is straightforwardly possible.
- the input channels 4 a to 4 d may be fully electrically isolated from one another and from the control and evaluation device 5 .
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Analogue/Digital Conversion (AREA)
- Programmable Controllers (AREA)
Abstract
Description
- The present invention relates to a module of a programmable controller, where the module has a plurality of analog input channels each for an analog input signal, and where the module has a control and evaluation device and for each input channel, in each case independently of the other input channels, input terminals for supplying the respective analog input signal.
- Analog inputs modules are generally known. As a rule, they have a central analog-to-digital converter, which is connected in sequential succession via an analog multiplexer to the input terminals of the input channels. This leads to considerable hardware complexity, in particular because of the possible differences in potential of up to 120 V DC or 150 V AC between the various input terminals. Certification according to an Safety Integrity Level (SIL) level defined in International Electrotechnical Commission (IEC) 61508 is difficult.
- DE 10 2004 009 612 A1 discloses a circuit arrangement for delay adjustment of time-offset analog-to-digital converters.
- DE 10 2013 111 888 A1 discloses a safety device for multichannel processing of an analog input signal.
-
DE 10 2015 102 581 A1 describes a diagnostic method for monolithic sensor systems. -
EP 2 090 945 A1 discloses an input group and an associated method for error detection. - It is an object of the present invention to provide a module of a programmable controller that simply and reliably allows certification in accordance with an SIL level defined in IEC 61508.
- This and other objects and advantages are achieved in accordance with the invention by a module that has, for each input channel, in each case independently of the other input channels, a first and a second analog-to-digital converter, a first, a second, a third and a fourth coupling element and a switchover device, where the control and evaluation device for each input channel, in each case independently of the other input channels, includes an evaluation circuit, a test signal generator and a switching signal generator. An input side of the respective first analog-to-digital converter is connected directly or indirectly with the respective input terminals and an output side of the respective first analog-to-digital converter is connected via the respective first coupling element with the respective evaluation circuit. The respective switchover device has a first and a second signal input, where a signal output and a control input, where the first signal input of the respective switchover device is connected directly or indirectly with the respective input terminals, the second signal input of the respective switchover device is connected via the respective third coupling element with the respective test signal generator, the control input of the respective switchover device is connected via the respective fourth coupling element with the respective switching signal generator and the signal output of the respective switchover device is connected with an input side of the respective second analog-to-digital converter. In addition, an output side of the respective second analog-to-digital converter is connected via the respective second coupling element with the respective evaluation circuit and the respective first, the respective second, the respective third and the respective fourth coupling element are each formed as a coupling element which brings about electrical isolation.
- Preferably, the control and evaluation device is arranged in a Field Programmable Gate Array (FPGA). In this way, the control and evaluation device can be produced inexpensively.
- The control and evaluation device preferably has a respective receiver for the respective input channel, which receiver is connected with an output side of the respective first or the respective second coupling element and filters a respective frequency-encoded receive signal from a digital signal transmitted via the respective first or the respective second coupling element. This makes it simply possible to produce a “HART” receiver.
- It is preferably also provided that the control and evaluation device has a respective transmitter for the respective input channel, the respective transmitter is connected via a respective fifth coupling element with the respective input terminals, the respective transmitter feeds a respective frequency-encoded transmit signal into the respective input signal and the respective fifth coupling element is embodied as a coupling element which brings about electrical isolation. This makes it simply possible to produce a “HART” transmitter.
- Preferably the module includes a first power supply device, which supplies the control and evaluation device with electrical energy, the first power supply device is connected via a sixth coupling element with a second power supply device, the second power supply device supplies the first and second analog-to-digital converters of at least one of the input channels with electrical energy and the sixth coupling element is formed as a coupling element which brings about electrical isolation. In this way, electrically isolated power supply of the individual elements of the respective input channel is simply possible.
- Preferably, the respective evaluation circuit includes a respective first and a respective second filter device for determining a respective first and a respective second filtered signal based on a respective digital signal output by the respective first and the respective second analog-to-digital converter, includes a respective first comparator for comparing the respective first and the respective second filtered signal and includes a respective second comparator for comparing a respective test signal output by the respective test signal generator and the respective second filtered signal.
- This enables both simple and reliable mutual monitoring as early as within the control and evaluation device of the digital signals output via the two respective analog-to-digital converters, and additionally also checking of the analog-to-digital converters.
- A digital signal output by the respective first and the respective second analog-to-digital converter is generally within a respective predetermined range of values. Preferably, the respective test signal generator is configured such that a respective test signal output by the respective test signal generator runs cyclically through the respective full predetermined range of values. In this way, the second analog-to-digital converter may also be tested over its full range of values.
- It is possible for the respective test signal generator and the respective switching signal generator to be tuned to one another such that the respective test signal is initially fed via the respective second signal input of the respective switchover device directly or indirectly to the respective second analog-to-digital converter, the respective test signal then runs through the respective full predetermined range of values and only thereafter is the respective analog input signal again fed directly or indirectly to the respective second analog-to-digital converter. In this case, the second analog-to-digital converter is fully checked on each individual test phase.
- Alternatively, it is possible for the respective test signal generator and the respective switching signal generator to be tuned to one another such that:
-
- a) the respective test signal is initially fed via the respective second signal input of the respective switchover device directly or indirectly to the respective second analog-to-digital converter,
- b) the respective test signal then runs through each part of the respective full predetermined range of values,
- c) thereafter the respective analog input signal is again fed directly or indirectly to the respective second analog-to-digital converter and
- d) steps a) to c) are performed repeatedly and when step b) is respectively performed the respective test signal runs through each different part of the respective full predetermined range of values, until the respective test signal has, as a result of repeating step b), run through the respective full predetermined range of values.
- In this case, a plurality of test phases corresponding to step b) is required for complete checking of the second analog-to-digital converter, but the individual test phases may consequently be selected to be shorter.
- Preferably, the respective first analog-to-digital converter is formed as a delta-sigma modulator and the respective first coupling element has, in addition to a forward channel for transmitting a respective digital signal output by the respective first analog-to-digital converter, a backward channel for transmitting a respective clock signal from the respective evaluation circuit to the respective first analog-to-digital converter. This constitutes a simple, reliable, inexpensive and robust embodiment for the respective first analog-to-digital converter. Alternatively or in addition, a corresponding embodiment may also be provided for the respective second analog-to-digital converter and the associated respective second coupling element.
- The respective first and the respective second analog-to-digital converters are preferably diversely formed. In this way, systematic errors can be particularly reliably avoided.
- To achieve a diverse embodiment, it is possible, based on the respective first and the respective second analog-to-digital converter, for one of these two analog-to-digital converters to be formed as a delta-sigma modulator and the coupling element connected with this analog-to-digital converter to have not only a forward channel for transmitting a digital signal output by this analog-to-digital converter but also a backward channel for transmitting a clock signal from the respective evaluation circuit to this analog-to-digital converter. Alternatively or in addition, it is possible, to achieve a diverse embodiment, for the other one of these two analog-to-digital converters to be formed as a Successive Approximation Register (SAR) analog-to-digital converter and the coupling element connected with this analog-to-digital converter to have not only a forward channel for transmitting a digital signal output by this analog-to-digital converter but also three backward channels for transmitting a clock signal, a configuration signal and a data frame signal from the respective evaluation circuit to this analog-to-digital converter.
- Provided the one embodiment is selected for the one analog-to-digital converter and the other embodiment is selected for the other analog-to-digital converter, the diverse embodiment is produced wholly automatically. Provided the one or the other embodiment is selected just for the one or just for the other analog-to-digital converter respectively, the respective analog-to-digital converter respectively still to be formed in a diverse manner can be formed in any other desired way.
- The respective first, the respective second, the respective third and the respective fourth coupling elements are preferably formed as inductive couplers. This embodiment is robust, inexpensive and reliable.
- Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
- The above-described characteristics, features and advantages of this invention and the manner in which these are achieved will become clearer and more distinctly comprehensible from the following description of the exemplary embodiments, which are explained in greater detail with reference to the drawings, in which:
-
FIG. 1 shows a schematic representation of a technical industrial process and a programmable controller in accordance with the invention; -
FIG. 2 shows schematic representation of a module of a programmable controller in accordance with the invention; -
FIG. 3 is a more detailed representation of the module ofFIG. 2 , -
FIG. 4 shows a schematic representation of the analog side of an input channel in accordance with the invention; -
FIG. 5 shows a values diagram; -
FIG. 6 shows a graphical plot of a time diagram; -
FIG. 7 shows a graphical plot of a further time diagram; -
FIG. 8 shows one embodiment of the module ofFIG. 3 ; -
FIG. 9 shows a further embodiment of the module ofFIG. 3 ; and -
FIG. 10 shows a plurality of parallel-connected input channels in accordance with the invention. - With reference to
FIG. 1 , a technicalindustrial process 1 is controlled by a programmable controller. The technicalindustrial process 1 may be of any desired nature. It may, for example, be a chemical plant, a filling apparatus, an injection molding machine, a conveying apparatus and another apparatus or plant. The programmable controller comprises acentral processing unit 2 andperipheral modules central processing unit 2 and theperipheral modules bus system 2′. Theperipheral modules peripheral module 3 a may be a module via which digital control signals are output to the technicalindustrial process 1. Likewise, theperipheral module 3 b may be a module via which digital process signals are fed to the programmable controller. At least one of theperipheral modules peripheral module 3 c) is a module via which the analog process signals are fed to the programmable controller. Theperipheral module 3 c constitutes the subject matter of the present invention. - With reference to
FIG. 2 , themodule 3 c has a plurality ofanalog input channels 4 a to 4 d. As a rule, according to the representation inFIG. 2 at least fourinput channels 4 a to 4 d are present. The number ofinput channels 4 a to 4 d may, however, also be greater than four. They may, for example, amount to eight or 16. Often the number ofinput channels 4 a to 4 d is a power of two. With each of theinput channels 4 a to 4 d, an analog input signal Ea to Ed may in each case be fed to themodule 3 c. The respective analog input signal Ea to Ed may denote any desired physical variable, such as a temperature, a pressure or a filling level. - The
module 3 c has a control andevaluation device 5. The control andevaluation device 5 is present once in the form of one unit for allinput channels 4 a to 4 d. The control andevaluation device 5 has for eachinput channel 4 a to 4 d (in each case independently of theother input channels 4 a to 4 d) anevaluation circuit 6, atest signal generator 7 and aswitching signal generator 8. Theevaluation circuit 6, thetest signal generator 7 and theswitching signal generator 8 are thus independently and individually present for eachindividual input channel 4 a to 4 d.FIG. 2 shows theevaluation circuit 6, thetest signal generator 7 and theswitching signal generator 8 forinput channel 4 a alone. - The control and
evaluation device 5 may be arranged, according to the representation inFIG. 2 , for example, in an FPGA. The term “FPGA” (field programmable gate array) is generally familiar to skilled persons and refers to an electronic unit in which the hardware interconnection of the individual elements of the FPGA may be fixed by appropriate programming. - According to the representation in
FIG. 2 , themodule 3 c additionally hasinput terminals 9 a to 9 d for eachinput channel 4 a to 4 d, in each case independently of theother input channels 4 a to 4 d. The respective analog input signal Ea to Ed may be fed to therespective input channel 4 a to 4 d via theinput terminals 9 a to 9 d. Furthermore, according to the representation inFIG. 3 , themodule 3 c has for eachinput channel 4 a to 4 d (in each case independently of theother input channels 4 a to 4 d) a first and a second analog-to-digital converter fourth coupling element 12 to 15 and aswitchover device 16. This is shown inFIG. 3 just for theinput channel 4 a. - The structure and mode of operation of
input channel 4 a alone are explained below in relation toFIG. 3 and also the further FIGs. Interaction with the control andevaluation device 5 is also explained just for theinput channel 4 a. The corresponding explanations also apply, however, mutatis mutandis for theother input channels 4 b to 4 d. - The analog input signal Ea may be a voltage signal. As a rule, however, it is a current signal. Here, the current signal generally lies in the range from 4 to 20 mA. This is of secondary significance, however. It could also lie in another range, for example in the range from −24 mA to +24 mA.
- According to the representation in
FIG. 3 , an input side of the first analog-to-digital converter 10 is directly or indirectly connected with theinput terminals 9 a. A direct connection is generally present if the analog input signal Ea is a voltage signal. If the analog input signal Ea, in contrast, is a current signal, then a current-to-voltage converter 17 is arranged between theinput terminals 9 a and the first analog-to-digital converter 10. For purposes of the present invention, the wording “directly or indirectly” should be understood as follows. An indirect connection is present if the respective signal is guided via a current-to-voltage converter voltage converter - An output side of the first analog-to-
digital converter 10 is connected with theevaluation circuit 6 via thefirst coupling element 12. The analog input signal Ea generated via asensor 19 is thereby digitized (optionally after current-to-voltage conversion) in the first analog-to-digital converter 10. The associated digital signal Ea′ is fed to theevaluation circuit 6 via thefirst coupling element 12. - The
first coupling element 12 is formed such that it brings about or causes electrical isolation. Thefirst coupling element 12 may, for example, be formed as an optocoupler. Preferably, however, thefirst coupling element 12 is formed as an inductive coupler. Examples of suitable inductive couplers (sometimes also known as magnetic couplers) are generally known to skilled persons. Solely by way of example, reference may be made to the inductive couplers type ADuM1201 and type ADuM1412 from Analog Devices. Inductive couplers have the advantage, in particular, that they allow a high transmission speed (bit rate) and high insulation voltages (often above 2 kV). The second tofourth coupling elements 13 to 15 (and also a subsequently introducedfifth coupling element 20 and a subsequently introduced sixth coupling element 21) have identical forms. - With reference to
FIG. 3 , an input side of the second analog-digital converter 11 is furthermore likewise connected with theinput terminals 9 a. Theswitchover device 16 is, however, arranged between theinput terminals 9 a and the second analog-to-digital converter 11. Theswitchover device 16 in turn has afirst signal input 22, asecond signal input 23, asignal output 24 and acontrol input 25. - The
first signal input 22 is directly or indirectly connected with theinput terminals 9 a. A direct connection is generally present if the analog input signal Ea is a voltage signal. If the analog input signal Ea is a current signal, then a direct connection may likewise be present. Here, the optionally necessary current-to-voltage converter 18 may be arranged between theswitchover device 16 and the second analog-to-digital converter 11. Alternatively, an indirect connection may be present, namely when, according to the representation inFIG. 3 , the current-to-voltage converter 18 is arranged between theinput terminals 9 a and theswitchover device 16. - The
signal output 25 of theswitchover device 16 is connected with an input side of the second analog-digital converter 11. As with the connection of thefirst signal input 22 with theinput terminals 9 a, the connection may alternatively be direct or, if the current-to-voltage converter 18 is arranged between theswitchover device 16 and the second analog-to-digital converter 11, indirect. - An output side of the second analog-to-
digital converter 11 is connected with theevaluation circuit 6 via thesecond coupling element 13. Provided that, within theswitchover device 16, thefirst signal input 22 is connected with thesignal output 24, the analog input signal Ea generated via thesensor 19 is thereby digitized in the second analog-to-digital converter 11, optionally after current-to-voltage conversion. The associated digital signal Ea″ is fed to theevaluation circuit 6 via thesecond coupling element 13. - The
second signal input 23 is connected with thetest signal generator 7 via thethird coupling element 14. A first amplifier andconversion device 26 may optionally be arranged between thethird coupling element 14 and thesecond signal input 23. Provided that, within theswitchover device 16, thesecond signal input 23 is connected with thesignal output 24, the test signal T generated via thetest signal generator 7 is thereby digitized in the second analog-to-digital converter 11, optionally after current-to-voltage conversion. In this case, the digital signal Ta″ corresponding to thesecond coupling element 13 is fed via the second coupling element to theevaluation circuit 6. - The
control input 25 is connected via thefourth coupling element 15 with theswitching signal generator 8. Theswitching signal generator 8 generates the corresponding control signal S, via which it is determined whether the first orsecond signal input signal output 24. - The test signal T is thus not fed permanently to the second analog-to-
digital converter 11 but rather only when, due to corresponding actuation of theswitchover device 16 by theswitching signal generator 8, thesecond signal input 23 is switched through to thesignal output 24. This is only temporarily the case. There is thus constant alternation between switching through of thefirst signal input 22 to thesignal output 24 and switching through of thesecond signal input 23 to thesignal output 24. As a rule, the slice of time during which thesecond signal input 23 is switched through to thesignal output 24 is considerably smaller than the slice of time during which thefirst signal input 22 is switched through to thesignal output 24. This is of subordinate significance, however. - To evaluate the digital signals Ea′, Ea″ Ta″, the
evaluation circuit 6 generally has a first and asecond filter device filter devices filter devices evaluation circuit 6 determines respective filtered signals F′, F″ on the basis of the digital signals Ea′, Ea″, Ta″. One of the filtered signals F′, F″ (preferably the filtered signal F′) is transmitted via thebus system 2′ to thecentral processing unit 2. - The
evaluation circuit 6 additionally generally has afirst comparator 29. Thefirst comparator 29 is active when and while the second analog-to-digital converter 11 is outputting the digital signal Ea″. The filtered signals F′, F″ are fed to thefirst comparator 29. The filtered signals F′, F″ are compared with one another in thefirst comparator 29. If there is an appreciable difference, then a corresponding alarm message A is transmitted via thebus system 2′ to thecentral processing unit 2. Otherwise, the alarm message A is not output. Owing to the alarm message A being output only in the event of an appreciable difference, it is particularly possible to take into account slight differences in the digital signals Ea′, Ea″ that may arise as a result of component tolerances or different sampling times. - The
evaluation circuit 6 additionally generally has asecond comparator 30. Thesecond comparator 30 is active when and while the second analog-to-digital converter 11 is outputting the digital signal Ta″. The filtered signal F″ and the test signal T are fed to thesecond comparator 30. The filtered signal F″ and the test signal T are compared with one another in thesecond comparator 30. If there is an appreciable difference, a corresponding alarm message A′ is transmitted via thebus system 2′ to thecentral processing unit 2. Otherwise, the alarm message A′ is not output. - In many cases, unidirectional or bidirectional transmission of digital signals from the control and
evaluation device 5 to thesensor 19 and/or back also occurs via theinput terminals 9 a. This type of transmission is known to skilled persons by the acronym HART (Highway Addressable Remote Transducer). In the context of HART, a logical zero is encoded with a first frequency, for example, with 1.2 kHz, and a logical one with a second frequency, for example, 2.2 kHz (so-called FSK=frequency shift keying). The unidirectional or bidirectional transmission of digital signals from the control andevaluation device 5 to thesensor 19 and/or back, for example, enables configuration and/or monitoring of thesensor 19. - To bring about transmission from the
sensor 19 to the control andevaluation device 5, the control andevaluation device 5 for theinput channel 4 a may have areceiver 31. Thereceiver 31 is in this case connected with the output side of the first orsecond coupling element receiver 31 may filter the frequency-encoded receive signal out of the corresponding digital signal Ea′, Ea″ by suitable frequency filtering. - To bring about transmission from the control and
evaluation device 5 to thesensor 19, the control andevaluation device 5 for theinput channel 4 a has atransmitter 32. Thetransmitter 32 is connected with theinput terminals 9 a via the above-mentionedfifth coupling element 20. Thetransmitter 32 thereby feeds a frequency-encoded transmit signal into the analog input signal Ea. Where necessary, a second amplifier andconversion device 33 may be arranged between thefifth coupling element 20 and theinput terminals 9 a. - The
evaluation circuit 6, thetest signal generator 7, theswitching signal generator 8, thereceiver 31 and thetransmitter 32 are arranged within a dashed frame. The elements arranged within this frame are present in the control andevaluation device 5 individually for therespective input channel 4 a to 4 d. Likewise, the analog-to-digital converters switchover device 16 and optionally the current-to-voltage converters conversion devices respective input channel 4 a to 4 d. The same is true of the first tofourth coupling element 12 to 15 and optionally also thefifth coupling element 20. - As a rule, the
module 3 c additionally has a firstpower supply device 34. The firstpower supply device 34 supplies the control andevaluation device 5 with electrical energy. The firstpower supply device 34 is connected with a secondpower supply device 35 via the above-mentionedsixth coupling element 21. The secondpower supply device 35 is thus supplied via thesixth coupling element 21. The secondpower supply device 35 supplies the first and second analog-to-digital converters input channel 4 a with electrical energy. Where necessary, the further elements of therespective input channel 9 a are also supplied with electrical energy via the secondpower supply device 35. This relates in particular to theswitchover device 16 and, where present, the current-to-voltage converters conversion devices - As a rule, the second
power supply device 35 also supplies the corresponding elements of theother input channels 4 b to 4 d. Respective supply of theindividual input channels 4 a to 4 d may proceed separately and with electrical isolation frominput channel 4 a to 4 d to inputchannel 4 a to 4 d. -
FIG. 4 shows a possible embodiment of the analog side of theinput channel 4 a, where theswitchover device 16 is not shown for purposes of clarity. Similar explanations again apply for theother input channels 4 b to 4 d. - In the context of the embodiment of
FIG. 4 , the input signal Ea is a current signal. As shown inFIG. 4 , the secondpower supply device 35 provides a positive and a negative potential V+, V− and a reference potential (indicated by the ground symbol) for theinput channel 4 a. The two current-to-voltage converters input resistor operational amplifier operational amplifiers snubber resistors 40. Thesnubber resistors 40 are preferably (but not necessarily) identical in size. - With reference to
FIG. 5 , the digital signal Ea′ output by the first analog-to-digital converter 10 is proportional to the analog input signal Ea. The quantization of the digital signal Ea′ arising in the context of digitization may be ignored in this context. The digital signal Ea′, however, has an upper limit of a maximum value MAX and a lower limit of a minimum value MIN. The digital signal Ea′ output by the first analog-to-digital converter 10 therefore always lies in the range of values defined by the minimum value MIN and the maximum value MAX. The possible range of values of the digital signal Ea′ is therefore predetermined. With further reference toFIG. 5 , similar explanations also apply for the digital signal Ea″ output by the second analog-to-digital converter 11. - With reference to
FIGS. 6 and 7 , thetest signal generator 7 is configured such that the test signal T runs cyclically through the full predetermined range of values as a function of the time t. In this way, the second analog-to-digital converter 11 is tested cyclically over its full admissible range of values. - It is possible for the
test signal generator 7 and theswitching signal generator 8 to be tuned to one another such that (after corresponding switching through of thesecond signal input 23 to the signal output 24) the test signal T is fed via thesecond signal input 23 to the second analog-to-digital converter 11, then the test signal T runs through the full predetermined range of values and only thereafter (therefore once the test signal T has run through the full predetermined range of values) is the analog input signal Ea again fed to the second analog-to-digital converter 11. This time sequence is shown inFIG. 6 . The corresponding switchover times are indicated inFIG. 6 by vertical dashed lines. - It is alternatively possible for the
test signal generator 7 and theswitching signal generator 8 to be tuned to one another such that, according to the representation inFIG. 7 , although the test signal T is initially fed to the second analog-to-digital converter 11 via thesecond signal input 23, the test signal T then, however, runs through just part of the full predetermined range of values. After running through this part of the predetermined range of values, theswitchover device 16 is again switched over and the analog input signal Ea is thereby again fed to the second analog-to-digital converter 11. - Switching through of the test signal T and the analog input signal Ea proceeds alternately, as already mentioned. With subsequent re-switching through of the test signal T, the test signal T thus again only runs through part of the full predetermined range of values. As shown in
FIG. 7 , the part of the full predetermined range of values now run through is, however, a different part from the part run through previously. It is thus possible, on respective switching-through of the test signal T, gradually to run sequentially through the full predetermined range of values. Also inFIG. 7 , as inFIG. 6 , the corresponding switchover times are indicated by vertical dashed lines. - The analogue-to-
digital converters FIG. 8 , it is possible, for example, for the respective first analog-to-digital converter 10 to be formed as a delta-sigma modulator. Delta-sigma modulation is familiar to a person skilled in the art. Reference may, for example, be made to the corresponding entries in the German- and English-language versions of Wikipedia. - In the case of delta-sigma modulation, the
first coupling element 12 has aforward channel 41. Theforward channel 41 serves to transmit the digital signal Ea′. Furthermore, thefirst coupling element 12 has a backward channel 42. The backward channel 42 serves to transmit a clock signal CLK from theevaluation circuit 6 to the first analog-to-digital converter 10. - The embodiments explained above in conjunction with the first analog-to-
digital converter 10 and thefirst coupling element 12 may also be similarly achieved with the second analog-to-digital converter 11. In this case, thesecond coupling element 13 has not only a forward channel 43, but additionally also a backward channel 44. - The first and second analog-to-
digital converters FIG. 8 . Alternatively, the first and second analog-to-digital converters FIG. 9 . - In the embodiment of
FIG. 9 , one of the two analog-to-digital converters 10, 11 (here the first analog-to-digital converter 10) is formed as a delta-sigma modulator. The above explanations in relation toFIG. 8 about the embodiment of the first analog-to-digital converter 10 and thefirst coupling element 12 are likewise applicable. - The other one of the two analog-to-
digital converters 10, 11 (here the second analog-to-digital converter 11) is differently formed. As shown inFIG. 9 , for example, the second analog-to-digital converter 11 may be formed as an SAR analog-to-digital converter. The term “SAR” stands for Successive Approximation Register and has a fixed meaning for a person skilled in the art of analog-digital converters. Reference may, for example, be made to the entry entitled “Successive approximation ADC” in the English-language version of Wikipedia. - In the corresponding embodiment, the corresponding coupling element (here the coupling element 13) has the forward channel 43. The forward channel 43 serves to transmit the digital signal Ea″. Furthermore, the
second coupling element 13 has the backward channel 44. The backward channel 44 serves to transmit the clock signal CLK from theevaluation circuit 6 to the second analog-to-digital converter 11. Furthermore, thesecond coupling element 13 has two further backward channels 45, 46. These two backward channels 45, 46 serve to transmit a configuration signal CONFIG and a data frame signal FRAME from theevaluation circuit 6 to the second analog-to-digital converter 11. - Other embodiments of the analog-to-
digital converters digital converters digital converters digital converters digital converters digital converters - With the previously described embodiments of the
input channels 4 a to 4 d and of the control andevaluation device 5, it is straightforwardly possible to achievesafety levels SIL 1 andSIL 2 as defined in IEC standard 61508. In order to also achieve safety level SIL 3 as defined in IEC standard 61508, provision may be made, for example, in accordance with the representation inFIG. 10 , to feed the same analog input signal to a plurality ofinput channels 4 a to 4 d. The analog input signal Ea may, for example, be fed both to theinput channel 4 a and also to aninput channel 4 a′ of afurther module 3 c′. In order, in such a case, for example, because one of themodules modules other module 3 c′, 3 c, circuits withZener diodes input terminals module 3 c, the analog input signal Ea output by thesensor 19 is guided via the circuit with theZener diodes 47. If, on the other hand, themodule 3 c is present, then the analog input signal Ea output by thesensor 19 is guided via theinput terminals 9 a. The circuit with theZener diodes 47 is in this case inactive. Similar explanations apply for themodule 3 c′, theinput channel 4 a′ thereof, theinput terminals 9 a′ thereof and the associated circuit with theZener diodes 48. The control and evaluation circuit of themodule 3 c′ is denoted withreference sign 5′. - The procedure explained above in relation to
FIG. 10 may be straightforwardly also extended to embodiments with more than twoinput channels - To summarize, the present invention thus relates to the following substantive matter:
- A
module 3 c of a programmable controller has a plurality ofanalog input channels 4 a to 4 d for, in each case, one analog input signal Ea to Ed, a control andevaluation device 5, andinput terminals 9 a to 9 d for eachinput channel 4 a to 4 d for supplying the respective input signal Ea to Ed. For eachinput channel 4 a to 4 d, themodule 3 c has two analog-to-digital converters coupling elements 12 to 15 and aswitchover device 16. For eachinput channel 4 a to 4 d, the control andevaluation device 5 has anevaluation circuit 6, atest signal generator 7 and aswitching signal generator 8. An input side of the one analog-to-digital converter 10 is directly or indirectly connected with theinput terminals 9 a to 9 d, and an output side of this analog-to-digital converter 10 is connected with theevaluation circuit 6 via acoupling element 12. Theswitchover device 16 has twosignal inputs signal output 24 and acontrol input 25. Onesignal input 22 is directly or indirectly connected with theinput terminals 9 a to 9 d, and theother signal input 23 is connected with thetest signal generator 7 via afurther coupling element 14. Thecontrol input 25 is connected with theswitching signal generator 8 via afurther coupling element 15. Thesignal output 24 is connected with an input side of the other analog-to-digital converter 11. An output side of the other analog-to-digital converter 11 is connected with theevaluation circuit 6 via afurther coupling element 13. Thecoupling elements 12 to 15 each bring about or cause electrical isolation. - The present invention has many advantages. In particular, simple, inexpensive and reliable implementation of the
module 3 c is possible. Furthermore, despite the repeatedly occurring switching-through of the test signal T via the respective first analog-to-digital converter 10, permanent acquisition of the analog input signal Ea to Ed is possible. The two different alarm messages A, A′ may, moreover, indicate which of the two analog-to-digital converters input channels 4 a to 4 d may be fully electrically isolated from one another and from the control andevaluation device 5. - Although the invention has been illustrated and described in detail with reference to the preferred exemplary embodiment, the invention is not restricted by the disclosed examples and other variations may be derived therefrom by a person skilled in the art without going beyond the scope of protection of the invention.
- Thus, while there have been shown, described and pointed out fundamental novel features of the invention as applied to a preferred embodiment thereof, it will be understood that various omissions and substitutions and changes in the form and details of the devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.
Claims (16)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19157518.2A EP3696625B1 (en) | 2019-02-15 | 2019-02-15 | Analog installation module |
EP19157518 | 2019-02-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
US10749563B1 US10749563B1 (en) | 2020-08-18 |
US20200266848A1 true US20200266848A1 (en) | 2020-08-20 |
Family
ID=65493826
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/791,037 Active US10749563B1 (en) | 2019-02-15 | 2020-02-14 | Analog input module |
Country Status (3)
Country | Link |
---|---|
US (1) | US10749563B1 (en) |
EP (1) | EP3696625B1 (en) |
CN (1) | CN111580451B (en) |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DK557884A (en) * | 1983-11-25 | 1985-05-26 | Mars Inc | AUTOMATIC TEST EQUIPMENT |
AUPR344501A0 (en) | 2001-03-01 | 2001-03-29 | Digislide International Pty Ltd | An apparatus and method for providing local geographical information |
US6928094B2 (en) * | 2002-12-16 | 2005-08-09 | Intel Corporation | Laser driver circuit and system |
US6831581B1 (en) * | 2003-05-23 | 2004-12-14 | Infineon Technologies, Ag | Digital-to-analog converter arrangement with an array of unary digital-to-analog converting elements usable for different signal types |
DE102004009612B4 (en) * | 2004-02-27 | 2010-11-18 | Infineon Technologies Ag | Method and circuit arrangement for delay adjustment of time-shifted analog-to-digital converters |
CA2577911A1 (en) * | 2004-08-31 | 2006-03-09 | Herman Miller, Inc. | Designation based protocol systems for reconfiguring control relationships among devices |
DE102005030276A1 (en) * | 2005-06-21 | 2006-12-28 | Pilz Gmbh & Co. Kg | Safety switching device for e.g. safe shutdown of consumer unit in automated installation has analog signal combiner, which is designed to superimpose analog test signal on analog input signal to form analog combination signal |
KR100699850B1 (en) * | 2005-06-23 | 2007-03-27 | 삼성전자주식회사 | CMOS image photographing device for correcting gain by itself and ramp signal generator comprised in the same |
US7495591B2 (en) * | 2006-06-30 | 2009-02-24 | Agilent Technologies, Inc. | Performing a signal analysis based on digital samples in conjunction with analog samples |
KR100765978B1 (en) * | 2007-02-08 | 2007-10-10 | 태인시스템주식회사 | Plc system simulation test board |
EP2090945B1 (en) * | 2008-02-14 | 2011-10-26 | Siemens Aktiengesellschaft | Input components and method for recognising errors |
CN101966620B (en) * | 2010-08-27 | 2012-09-05 | 南京理工大学 | High-speed yaw scanning control device for testing quality of electron beam current |
CN102436209B (en) * | 2011-12-16 | 2013-11-13 | 深圳市合信自动化技术有限公司 | Programmable logic controller (PLC) compatible with various input voltages |
JP5438803B2 (en) * | 2012-06-28 | 2014-03-12 | 株式会社アドバンテスト | Power supply apparatus and test apparatus using the same |
DE102013111888B4 (en) * | 2013-10-29 | 2018-06-14 | Phoenix Contact Gmbh & Co. Kg | Safety device for multi-channel processing of an analog input signal |
KR102178825B1 (en) * | 2013-11-15 | 2020-11-13 | 삼성전자 주식회사 | Apparatus for controlling pixel output level and image sensor adopting the same |
SE1351489A1 (en) * | 2013-12-12 | 2015-06-13 | Fingerprint Cards Ab | Fingerprint detection system and method |
US9638762B2 (en) | 2014-02-24 | 2017-05-02 | Infineon Technologies Ag | Highly efficient diagnostic methods for monolithic sensor systems |
DE102014203429A1 (en) * | 2014-02-26 | 2015-08-27 | Siemens Aktiengesellschaft | Redundant input circuit, input circuit unit with at least one input circuit and method for operating such an input circuit unit |
DE102014219667B3 (en) * | 2014-09-29 | 2016-03-03 | Siemens Aktiengesellschaft | Method for selecting a recording area and system for selecting a recording area |
DE102014219711A1 (en) * | 2014-09-29 | 2016-03-31 | Siemens Aktiengesellschaft | Method for power plant simulation |
AU2015414494B2 (en) * | 2015-11-13 | 2019-04-18 | Innomotics Gmbh | Medium voltage transformerless multilevel converter and method for controlling a medium voltage transformerless multilevel converter |
EP3300256B1 (en) * | 2016-09-27 | 2021-06-02 | Rohde & Schwarz GmbH & Co. KG | Method for controlling digital-to-analogue converters and rf transmit circuit arrangement |
US10330715B2 (en) * | 2016-12-11 | 2019-06-25 | Keysight Technologies, Inc. | Systems and methods for determining a self-discharge current characteristic of a storage cell |
CN207575173U (en) * | 2017-05-23 | 2018-07-06 | 北京康智乐思网络科技有限公司 | A kind of processor voltage signal for being used to measure saliva impedance |
-
2019
- 2019-02-15 EP EP19157518.2A patent/EP3696625B1/en active Active
-
2020
- 2020-02-14 US US16/791,037 patent/US10749563B1/en active Active
- 2020-02-14 CN CN202010093406.4A patent/CN111580451B/en active Active
Also Published As
Publication number | Publication date |
---|---|
US10749563B1 (en) | 2020-08-18 |
CN111580451B (en) | 2023-07-28 |
CN111580451A (en) | 2020-08-25 |
EP3696625A1 (en) | 2020-08-19 |
EP3696625B1 (en) | 2022-04-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7756650B2 (en) | Apparatus for detection and processing of a multiplicity of measured values in an HVDC transmission installation | |
EP1956717B1 (en) | Signal interface circuit | |
CA2626569C (en) | A sampling module and a method of sampling one or more analogue characteristics of a power transmission system | |
EP2085838B1 (en) | Input channel diagnostics | |
US9509332B1 (en) | Dual sigma-delta analog-to-digital converter | |
US20220100163A1 (en) | Configurable safety module for detecting digital or analog input or output signals | |
CN109752588A (en) | Electric machine controller DC bus-bar voltage signal sampling and monitoring circuit and method | |
WO2015086577A1 (en) | Transmission system for a nuclear power plant and associated method | |
EP1837991B1 (en) | Method and apparatus for output current control | |
US8766621B2 (en) | Analog input module for a programmable logic controller | |
CN101903748A (en) | Method for the secure acquisition of multiple analog input signals, analog input circuit, and measuring sensor and measuring transducer having an analog input circuit of this type | |
US10749563B1 (en) | Analog input module | |
CN108885573A (en) | Safety device | |
DE102011085877B4 (en) | Communication method and communication device for the process industry | |
EP2413300B1 (en) | Method and apparatus for sending and receiving hart communications transmission waveforms | |
Schmidt et al. | Mixed Critical Resolver-to-Digital Conversion for Safety-Related Servo Drive Applications | |
US11150106B2 (en) | Measuring device of measuring- and automation technology | |
CN114762301B (en) | Signal processing device, signal processing method, and signal processing program | |
CN111010179A (en) | Signal compensation calibration method and system | |
JP2015141678A (en) | Input loop check system, input loop check device, input module, output loop check system, output loop check device, and output module | |
JP2006211226A (en) | Line break/fault detection unit | |
DE102019134907A1 (en) | electronics | |
KR20170019219A (en) | Apparatus and Method for Controling of Safety System Equipment Using Logic Gate Component in Nuclear Power Plant | |
KR101629246B1 (en) | Temperature monitoring device of switchgear attached type combined FND | |
RU90228U1 (en) | DEVICE FOR FORMING CONTROLLING VOLTAGES OF WAGON CONSUMERS |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
AS | Assignment |
Owner name: SIEMENS AKTIENGESELLSCHAFT, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GRIESBAUM, WILHELM;LEHMANN, ULRICH;SIGNING DATES FROM 20200425 TO 20200429;REEL/FRAME:052830/0051 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |