US20200083132A1 - Semiconductor device package - Google Patents
Semiconductor device package Download PDFInfo
- Publication number
- US20200083132A1 US20200083132A1 US16/409,665 US201916409665A US2020083132A1 US 20200083132 A1 US20200083132 A1 US 20200083132A1 US 201916409665 A US201916409665 A US 201916409665A US 2020083132 A1 US2020083132 A1 US 2020083132A1
- Authority
- US
- United States
- Prior art keywords
- carrier
- encapsulant
- encapsulating material
- sacrificial layer
- removable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 56
- 239000008393 encapsulating agent Substances 0.000 claims abstract description 87
- 238000000034 method Methods 0.000 claims description 35
- 238000004519 manufacturing process Methods 0.000 claims description 29
- 239000000463 material Substances 0.000 description 195
- 239000003292 glue Substances 0.000 description 26
- 238000000465 moulding Methods 0.000 description 13
- 238000000053 physical method Methods 0.000 description 13
- 239000000126 substance Substances 0.000 description 13
- 238000005406 washing Methods 0.000 description 13
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 13
- 239000000758 substrate Substances 0.000 description 5
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012778 molding material Substances 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09045—Locally raised area or protrusion of insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09127—PCB or component having an integral separable or breakable part
Definitions
- the instant disclosure relates to, amongst other things, a semiconductor device package, and a semiconductor device package having an area or space devoid of an encapsulating material.
- a molding process is a packaging technology for a semiconductor package, which is used to protect a substrate and components on the substrate.
- the encapsulating material also referred to as a molding compound
- AoP antenna-on-package
- a semiconductor device package can have a non-molding area or space (an area or space devoid of the encapsulating material), and a user can readily adjust the impedance matching by adjusting surface mount technology (SMT) passive components after the molding process.
- SMT surface mount technology
- a semiconductor device package includes a carrier and an encapsulant disposed on the carrier. Further, at least one portion of the encapsulant is spaced from the carrier by a space.
- a semiconductor device package comprises a carrier comprising a first surface and a second surface adjacent to the first surface, and an encapsulant disposed on the first surface of the carrier. Further, a roughness of the second surface of the carrier is greater than a roughness of the first surface of the carrier.
- method of manufacturing a semiconductor device package includes: a) providing a carrier having a surface; b) forming a sacrificial layer on the surface of the carrier; c) encapsulating the carrier and the sacrificial layer by an encapsulant; d) removing a portion of the encapsulant to expose a portion of the sacrificial layer such that the encapsulant is divided into a first portion and a second portion, wherein the first portion of the encapsulant is attached to the carrier and the second portion of the encapsulant is attached to the sacrificial layer; and e) removing the sacrificial layer and the second portion of the encapsulant.
- FIG. 1 is a cross-sectional view of a semiconductor device package in accordance with an embodiment of the instant disclosure.
- FIG. 2A , FIG. 2B , FIG. 2C and FIG. 2D show a method of manufacturing a semiconductor device package in accordance with an embodiment of the instant disclosure.
- FIG. 3A , FIG. 3B , FIG. 3C , FIG. 3D and FIG. 3E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 4A , FIG. 4B , FIG. 4C , FIG. 4D and FIG. 4E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 5A , FIG. 5B , FIG. 5C , FIG. 5D and FIG. 5E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 6A , FIG. 6B , FIG. 6C , FIG. 6D and FIG. 6E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 7A , FIG. 7B , FIG. 7C , FIG. 7D and FIG. 7E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 8A , FIG. 8B , FIG. 8C , FIG. 8D and FIG. 8E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 9A , FIG. 9B , FIG. 9C , FIG. 9D and FIG. 9E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 10A , FIG. 10B , FIG. 10C , FIG. 10D and FIG. 10E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 11A , FIG. 11B , FIG. 11C , FIG. 11D and FIG. 11E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 12A , FIG. 12B , FIG. 12C , FIG. 12D , FIG. 12E and FIG. 12F show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 13A , FIG. 13B , FIG. 13C , FIG. 13D , FIG. 13E and FIG. 13F show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 14A , FIG. 14B , FIG. 14C , FIG. 14D and FIG. 14E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure.
- FIG. 1 shows a semiconductor device package 1 in accordance with an embodiment of the instant disclosure.
- the semiconductor device package 1 has two non-symmetrical non-molding areas 13 and 15 .
- the term “non-molding area” can refer to an area (e.g. an area of a substrate) or a space substantially devoid of molding material.
- the semiconductor device package 1 comprises a carrier 10 .
- the carrier 10 has an upper surface 11 and a lower surface 12 opposite to the upper surface 11 .
- An encapsulating material 20 is disposed on the upper surface 11 of the carrier 10 .
- a die 101 and components 102 , 103 are disposed on the disposed on the upper surface 11 of the carrier 10 and covered by the encapsulating material 20 .
- the encapsulating material 20 As shown in FIG. 1 , one or more regions of the upper surface 11 of the carrier 10 are exposed from the encapsulating material 20 (e.g., are substantially devoid of the encapsulating material 20 ).
- the upper surface 11 of the carrier 10 has a non-molding area 13 .
- the non-molding area 13 there is substantially no encapsulating material 20 disposed on the upper surface 11 of the carrier 10 , and the die 104 and the component 105 disposed on the upper surface 11 of the carrier 10 are not covered by the encapsulating material 20 and thus are exposed.
- an encapsulating material 21 is disposed on the lower surface 12 of the carrier 10 .
- Dies 106 and electrical contacts 107 are disposed on the lower surface 12 of the carrier 10 and covered by the encapsulating material 21 .
- a substrate 19 is disposed on the encapsulating material 21 . Further, one or more regions of the lower surface 12 of the carrier 10 are exposed from the encapsulating material 21 (e.g., are substantially devoid of the encapsulating material 21 ).
- the lower surface 12 of the carrier 10 has a non-molding area 15 .
- the non-molding area 15 there is substantially no encapsulating material 21 disposed on the lower surface 12 of the carrier 10 , and the components 108 and 109 disposed on the lower surface 12 of the carrier 10 are not covered by the encapsulating material 21 and thus are exposed.
- the non-molding areas 13 and 15 are different from each other and the positions of them do not correspond to each other (e.g. are not disposed opposite to each other).
- the non-molding area 13 on the upper surface 11 of the carrier 10 and the non-molding area 15 on the lower surface 12 of the carrier 10 are not symmetrical to each other.
- FIG. 2A , FIG. 2B , FIG. 2C and FIG. 2D show a method of manufacturing a semiconductor device package 110 in accordance with an embodiment of the instant disclosure.
- at least one electronic component 112 is disposed on an upper surface 1111 of a carrier 111 .
- a glue is dispensed on the upper surface 1111 of the carrier 111 so as to form a removable/sacrificial layer 1117 on the upper surface 1111 of the carrier 111 .
- the removable/sacrificial layer 1117 can include a tape adhered or taped on the upper surface 1111 of the carrier 111 or another removable binding material coated or printed on the upper surface 1111 of the carrier 111 .
- an encapsulating material 113 is disposed on the carrier 111 and encapsulates the at least one electronic component 112 and the removable/sacrificial layer 1117 .
- the encapsulating material 113 covers the at least one electronic component 112 , the upper surface 111 of the carrier 11 and the removable/sacrificial layer 1117 .
- a portion of the encapsulating material 113 is removed by a laser process and thus a portion of the removable/sacrificial layer 1117 is exposed.
- the encapsulating material 113 is divided into two portions 1130 and 1139 , wherein the portion of the encapsulating material 1130 is attached to the upper surface 1111 of the carrier 111 and the removable/sacrificial layer 1117 , and the portion of the encapsulating material 1139 is attached to the removable/sacrificial layer 1117 .
- the removable/sacrificial layer 1117 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1139 attached to the removable/sacrificial layer 1117 is removed too (e.g., is removed while removing the removable/sacrificial layer 1117 ). After removing the removable/sacrificial layer 1117 and the portion of the encapsulating material 1139 , the portion of the encapsulating material 1130 remains on the carrier 111 and a portion of the upper surface 1111 of the carrier 111 is exposed. The portion of the encapsulating material 1130 is disposed on the upper surface 1111 of the carrier.
- the portion of the encapsulating material 1130 has an upper surface 1131 and a lower surface 1132 which is opposite to the upper surface 1131 and attached to the upper surface 1111 of the carrier 111 .
- the portion of the encapsulating material 1130 further has a surface 1133 at a height between that of the upper surface 1131 and the lower surface 1132 , wherein the surface 1133 is spaced from the upper surface 1111 of the carrier 111 . There is a space between the surface 1133 and the upper surface 1111 .
- the surface 1133 may be substantially parallel to either or each of the upper surface 1131 and the lower surface 1132 .
- the portion of the encapsulating material 1130 has a side surface 1136 .
- the side surface 1136 may connect the surface 1133 and the upper surface 1131 .
- An angle A between the side surface 1136 and the upper surface 1131 ranges from about 90 degrees to about 110 degrees.
- FIG. 3A , FIG. 3B , FIG. 3C , FIG. 3D and FIG. 3E show a method of manufacturing a semiconductor device package 120 in accordance with another embodiment of the instant disclosure.
- a carrier 121 has an upper surface 1211 and a recess 1210 formed in the upper surface 1211 .
- the carrier 121 has a recessed surface 1212 (e.g. that defines a bottom of the recess 1210 ) recessed with respect to the upper surface 1211 .
- At least one electronic component 122 is disposed on the upper surface 1211 of the carrier 121 .
- a glue is dispensed on the upper surface 1211 of the carrier 121 , wherein a portion of the glue flows into the recess 1210 .
- a removable/sacrificial layer 1217 is formed on the upper surface 1211 and the recessed surface 1212 of the carrier 121 .
- an encapsulating material 123 is disposed on the carrier 121 and encapsulates the at least one electronic component 122 and the removable/sacrificial layer 1217 .
- the encapsulating material 123 covers the at least one electronic component 122 , the upper surface 1211 of the carrier 121 and the removable/sacrificial layer 1217 .
- a portion of the encapsulating material 123 is removed by a laser process and thus a portion of the removable/sacrificial layer 1217 is exposed.
- the encapsulating material 123 is divided into two portions 1230 and 1239 , wherein the portion of the encapsulating material 1230 is attached to the upper surface 1211 of the carrier 121 and the removable/sacrificial layer 1217 , and the portion of the encapsulating material 1239 is attached to the removable/sacrificial layer 1217 .
- the removable/sacrificial layer 1217 is removed by physical methods or chemical methods, such as a water washing process.
- the portion of the encapsulating material 1239 attached to the removable/sacrificial layer 1217 is removed (e.g. while removing the removable/sacrificial layer 1217 ).
- the portion of the encapsulating material 1230 remains on the carrier 121 and a portion of the upper surface 1211 and the recessed surface 1212 of the carrier 121 are exposed.
- the portion of the encapsulating material 1230 is disposed on the upper surface 1211 of the carrier 121 .
- the portion of the encapsulating material 1230 has an upper surface 1231 and a lower surface 1232 which is opposite to the upper surface 1231 . Further, a portion of the lower surface 1232 is spaced from the recessed surface 1212 of the carrier 121 (e.g. is spaced from and disposed over the recessed surface 1212 of the carrier 121 ) and a portion of the lower surface 1232 is attached to the upper surface 1211 of the carrier 121 . There is a space between the lower surface 1232 and the recessed surface 1212 .
- the portion of the encapsulating material 1230 has a side surface 1236 .
- An angle B between the side surface 1236 and the upper surface 1231 ranges from about 90 degrees to about 110 degrees.
- FIG. 4A , FIG. 4B , FIG. 4C , FIG. 4D and FIG. 4E show a method of manufacturing a semiconductor device package 130 in accordance with another embodiment of the instant disclosure.
- a carrier 131 has an upper surface 1311 and a recess 1310 formed in the upper surface 1311 .
- the carrier 131 further has a recessed surface 1312 (e.g. that defines a bottom of the recess 1310 ) recessed with respect to the upper surface 1311 .
- At least one electronic component 132 is disposed on the upper surface 1311 of the carrier 131 .
- a glue is dispensed on the upper surface 1311 of the carrier 131 , wherein a portion of the glue flows into the recess 1310 .
- a removable/sacrificial layer 1317 is formed on the upper surface 1311 and the recessed surface 1312 of the carrier 131 .
- the removable/sacrificial layer 1317 has an upper surface 1318 higher than the upper surface 1311 of the carrier 131 .
- the removable/sacrificial layer 1317 has a side surface 1319 , which is substantially coplanar with a side surface 1315 of the recess 1310 .
- an encapsulating material 133 is disposed on the carrier 131 and encapsulates the at least one electronic component 132 and the removable/sacrificial layer 1317 .
- the encapsulating material 133 covers the at least one electronic component 132 , the upper surface 1311 of the carrier 131 and the removable/sacrificial layer 1317 .
- a portion of the encapsulating material 133 is removed by a laser process and thus a portion of the removable/sacrificial layer 1317 is exposed.
- the encapsulating material 133 is divided into two portions 1330 and 1339 , wherein the portion of the encapsulating material 1330 is attached to the upper surface 1311 of the carrier 131 and the removable/sacrificial layer 1317 and the portion of the encapsulating material 1339 is attached to the removable/sacrificial layer 1317 .
- the removable/sacrificial layer 1317 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1339 attached to the removable/sacrificial layer 1317 is removed (e.g. while removing the removable/sacrificial layer 1317 ). After removing the removable/sacrificial layer 1317 and the portion of the encapsulating material 1339 , the portion of the encapsulating material 1330 remains on the carrier 131 and a portion of the upper surface 1311 and the recessed surface 1312 of the carrier 131 are exposed. The portion of the encapsulating material 1330 is disposed on the upper surface 1311 of the carrier 131 .
- the portion of the encapsulating material 1330 has an upper surface 1331 and a lower surface 1332 which is opposite to the upper surface 1131 .
- the portion of the encapsulating material 1330 further has a surface 1333 at a height between that of the upper surface 1331 and the lower surface 1332 , wherein the surface 1333 is spaced from and disposed over the recessed surface 1312 of the carrier 131 . There is a space between the surface 1333 and the recessed surface 1312 .
- the portion of the encapsulating material 1330 has a side surface 1335 , which is connected to the lower surface 1332 and the surface 1333 .
- the side surface 1335 is substantially coplanar with the side surface 1313 of the recess 1310 .
- the portion of the encapsulating material 1330 has a side surface 1336 .
- An angle C between the side surface 1336 and the upper surface 1331 ranges from about 90 degrees to about 110 degrees.
- FIG. 5A , FIG. 5B , FIG. 5C , FIG. 5D and FIG. 5E show a method of manufacturing a semiconductor device package 140 in accordance with another embodiment of the instant disclosure.
- a carrier 141 has an upper surface 1411 and a recess 1410 formed in the upper surface 1411 .
- the carrier 141 further has a recessed surface 1412 (e.g. that defines a bottom of the recess 1410 ) recessed with respect to the upper surface 1411 .
- At least one electronic component 142 is disposed on the upper surface 1411 of the carrier 141 .
- a glue is dispensed on the upper surface 1411 of the carrier 141 , wherein a portion of the glue flows into the recess 1410 .
- a removable/sacrificial layer 1417 is formed on the upper surface 1411 and the recessed surface 1412 of the carrier 141 .
- the removable/sacrificial layer 1417 has an upper surface 1418 higher than the upper surface 1411 of the carrier 141 .
- the removable/sacrificial layer 1417 extends across the recess 1410 and has a side surface 1419 on the upper surface 1411 of the carrier 141 .
- an encapsulating material 143 is disposed on the carrier 141 and encapsulates the at least one electronic component 142 and the removable/sacrificial layer 1417 .
- the encapsulating material 143 covers the at least one electronic component 142 , the upper surface 1411 of the carrier 141 and the removable/sacrificial layer 1417 .
- a portion of the encapsulating material 143 is removed by a laser process and thus a portion of the removable/sacrificial layer 1417 is exposed.
- the encapsulating material 143 is divided into two portions 1430 and 1439 , wherein the portion of the encapsulating material 1430 is attached to the upper surface 1411 of the carrier 141 and the removable/sacrificial layer 1417 and the portion of the encapsulating material 1439 is attached to the removable/sacrificial layer 1417 .
- the removable/sacrificial layer 1417 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1439 attached to the removable/sacrificial layer 1417 is removed (e.g. while removing the removable/sacrificial layer 1417 ). After removing the removable/sacrificial layer 1417 and the portion of the encapsulating material 1439 , the portion of the encapsulating material 1430 remains on the carrier 141 and a portion of the upper surface 1411 and the recessed surface 1412 of the carrier 141 are exposed. The portion of the encapsulating material 1430 is disposed on the upper surface 1411 of the carrier 141 .
- the portion of the encapsulating material 1430 has an upper surface 1431 and a lower surface 1432 which is opposite to the upper surface 1431 .
- the portion of the encapsulating material 1430 further has a surface 1433 at a height between that of the upper surface 1431 and the lower surface 1432 , wherein the surface 1433 is spaced from the upper surface 1411 and the recessed surface 1412 of the carrier 141 . There is a space between the surface 1433 and the upper surface 1411 the recessed surface 1412 .
- the portion of the encapsulating material 1430 further has a side surface 1434 which is connected to the lower surface 1432 and the surface 1433 .
- the side surface 1434 is disposed on the upper surface 1411 of the carrier 141 and not coplanar with a side surface 1415 of the recess 1410 .
- the side surface of the recess 1410 may be disposed under the surface 1433 .
- the portion of the encapsulating material 1430 has a side surface 1436 .
- An angle D between the side surface 1436 and the upper surface 1431 ranges from about 90 degrees to about 110 degrees.
- FIG. 6A , FIG. 6B , FIG. 6C , FIG. 6D and FIG. 6E show a method of manufacturing a semiconductor device package 150 in accordance with another embodiment of the instant disclosure.
- a carrier 151 has an upper surface 1511 and a recess 1510 formed in the upper surface 1511 .
- the carrier 151 further has a recessed surface 1512 (e.g. that defines a bottom of the recess 1510 ) recessed with respect to the upper surface 1511 .
- At least one electronic component 152 is disposed on the upper surface 1511 of the carrier 151 .
- a glue is dispensed on the upper surface 1511 of the carrier 151 , wherein a portion of the glue flows into the recess 1510 .
- a removable/sacrificial layer 1517 is formed on the upper surface 1511 and the recessed surface 1512 of the carrier 151 .
- the removable/sacrificial layer 1517 has an upper surface 1518 higher than the upper surface 1511 of the carrier 151 .
- the removable/sacrificial layer 157 has a protrusion 1515 protruded from the upper surface 1518 of the removable/sacrificial layer 1517 .
- the protrusion 1515 has a side surface 1516 substantially coplanar with the side surface 1519 of the recess 1510 .
- an encapsulating material 153 is disposed on the carrier 151 and encapsulates the at least one electronic component 152 and the removable/sacrificial layer 1517 .
- the encapsulating material 153 covers the at least one electronic component 152 , the upper surface 1511 of the carrier 151 and the removable/sacrificial layer 1517 .
- a portion of the encapsulating material 153 is removed by a laser process and thus a portion of the removable/sacrificial layer 1517 is exposed.
- the encapsulating material 153 is divided into two portions 1530 and 1539 , wherein the portion of the encapsulating material 1530 is attached to the upper surface 1511 of the carrier 151 and the removable/sacrificial layer 1517 and the portion of the encapsulating material 1539 is attached to the removable/sacrificial layer 1517 .
- the removable/sacrificial layer 1517 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1539 attached to the removable/sacrificial layer 1517 is removed (e.g. while removing the removable/sacrificial layer 1517 ). After removing the removable/sacrificial layer 1517 and the portion of the encapsulating material 1539 , the portion of the encapsulating material 1530 remains on the carrier 151 and a portion of the upper surface 1511 and the recessed surface 1512 of the carrier 151 are exposed. The portion of the encapsulating material 1530 is disposed on the upper surface 1511 of the carrier 151 .
- the portion of the encapsulating material 1530 has an upper surface 1531 and a lower surface 1532 which is opposite to the upper surface 1131 .
- the portion of the encapsulating material 1530 further has a surface 1533 at a height between that of the upper surface 1531 and the lower surface 1532 , wherein the surface 1533 is spaced from the upper surface 1511 and the recessed surface 1512 of the carrier 151 .
- the surface 1533 is disposed over the recessed surface 1512 of the carrier 151 .
- the portion of the encapsulating material 1530 further has a surface 1534 which is adjacent to the surface 1533 and lower than the surface 1533 .
- the surface 1534 is spaced from (and, for example, disposed over) the recessed surface 1512 of the carrier 151 .
- the surface 1534 may be substantially parallel to the surface 1533 . There is a space between the surfaces 1533 , 1534 and the recessed surface 1512 .
- the portion of the encapsulating material 1530 further has a side surface 1535 which is connected to the lower surface 1532 and the surface 1533 .
- the side surface 1535 is substantially coplanar with the side surface 1519 of the recess 1510 .
- the portion of the encapsulating material 1530 has a side surface 1536 .
- An angle E between the side surface 1536 and the upper surface 1531 ranges from about 90 degrees to about 110 degrees.
- FIG. 7A , FIG. 7B , FIG. 7C , FIG. 7D and FIG. 7E show a method of manufacturing a semiconductor device package 160 in accordance with another embodiment of the instant disclosure.
- a carrier 161 has an upper surface 1611 and a recess 1610 formed in the upper surface 1611 .
- the carrier 161 further has a recessed surface 1612 (e.g. that defines a bottom of the recess 1610 ) recessed with respect to the upper surface 1611 .
- At least one electronic component 162 is disposed on the upper surface 1611 of the carrier 161 .
- a glue is dispensed on the upper surface 1611 of the carrier 161 , wherein a portion of the glue flows into the recess 1610 .
- a removable/sacrificial layer 1617 is formed on the upper surface 1611 and the recessed surface 1612 of the carrier 151 .
- the removable/sacrificial layer 1617 has an upper surface 1618 higher than the upper surface 1611 of the carrier 161 .
- the removable/sacrificial layer 1617 has a protrusion 1615 protruded from the upper surface 1618 of the removable/sacrificial layer 1617 and extending to the upper surface 1611 of the carrier 161 .
- the protrusion 1615 has a side surface 1616 disposed on the upper surface 1611 of the carrier 161 .
- an encapsulating material 163 is disposed on the carrier 161 and encapsulates the at least one electronic component 162 and the removable/sacrificial layer 1617 .
- the encapsulating material 163 covers the at least one electronic component 162 , the upper surface 1611 of the carrier 161 and the removable/sacrificial layer 1617 .
- a portion of the encapsulating material 163 is removed by a laser process and thus a portion of the removable/sacrificial layer 1617 is exposed.
- the encapsulating material 163 is divided into two portions 1630 and 1639 , wherein the portion of the encapsulating material 1630 is attached to the upper surface 1611 of the carrier 161 and the removable/sacrificial layer 1617 and the portion of the encapsulating material 1639 is attached to the removable/sacrificial layer 1617 .
- the removable/sacrificial layer 1617 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1639 attached to the removable/sacrificial layer 1617 is removed (e.g. while removing the removable/sacrificial layer 1617 ). After removing the removable/sacrificial layer 1617 and the portion of the encapsulating material 1639 , the portion of the encapsulating material 1630 remains on the carrier 161 and a portion of the upper surface 1611 and the recessed surface 1612 of the carrier 161 are exposed. The portion of the encapsulating material 1630 is disposed on the upper surface 1611 of the carrier 161 .
- the portion of the encapsulating material 1630 has an upper surface 1631 and a lower surface 1632 which is opposite to the upper surface 1631 .
- the portion of the encapsulating material 1630 further has a surface 1633 at a height between that of the upper surface 1631 and the lower surface 1632 , wherein the surface 1633 is spaced from the upper surface 1611 and the recessed surface 1612 of the carrier 161 . At least a portion of the surface 1633 is disposed over the recessed surface 1612 of the carrier 161 .
- the portion of the encapsulating material 1630 further has a surface 1634 which is adjacent to the surface 1633 and lower than the surface 1633 . The surface 1634 is spaced from the recessed surface 1612 of the carrier 161 .
- the surface 1634 may be substantially parallel to the surface 1633 . There is a space between the surfaces 1633 , 1634 and the upper and the recessed surfaces 1611 , 1612 .
- the portion of the encapsulating material 1630 further has a side surface 1635 which is connected to the lower surface 1632 and the surface 1633 .
- the side surface 1635 is disposed on the upper surface 1611 of the carrier 161 and not coplanar with the side surface 1615 of the recess 1610 .
- the portion of the encapsulating material 1630 has a side surface 1636 .
- An angle F between the side surface 1636 and the upper surface 1631 ranges from about 90 degrees to about 110 degrees.
- FIG. 8A , FIG. 8B , FIG. 8C , FIG. 8D and FIG. 8E show a method of manufacturing a semiconductor device package 170 in accordance with another embodiment of the instant disclosure.
- a carrier 171 has an upper surface 1711 and a protrusion 1710 formed on the upper surface 1711 .
- the carrier 171 further has a protruded surface 1712 protruded with respect to the upper surface 1711 .
- At least one electronic component 172 is disposed on the upper surface 1711 of the carrier 171 .
- a glue is dispensed on the upper surface 1711 of the carrier 171 , wherein the glue does not flow across the protrusion 1710 .
- a removable/sacrificial layer 1717 is formed on the upper surface 1711 .
- the removable/sacrificial layer 1717 has an upper surface 1718 substantially coplanar with the protruded surface 1712 .
- an encapsulating material 173 is disposed on the carrier 171 and encapsulates the at least one electronic component 172 and the removable/sacrificial layer 1717 .
- the encapsulating material 173 covers at least one electronic component 172 , the upper surface 1711 and the protruded surface 1712 of the carrier 171 and the removable/sacrificial layer 1717 .
- a portion of the encapsulating material 173 is removed by a laser process and thus a portion of the removable/sacrificial layer 1717 is exposed.
- the encapsulating material 173 is divided into two portions 1730 and 1739 , wherein the portion of the encapsulating material 1730 is attached to the upper surface 1711 and the protruded surface 1712 of the carrier 171 and the removable/sacrificial layer 1717 and the portion of the encapsulating material 1739 is attached to the removable/sacrificial layer 1717 .
- the removable/sacrificial layer 1717 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1739 attached to the removable/sacrificial layer 1717 is removed (e.g. while removing the removable/sacrificial layer 1717 ). After removing the removable/sacrificial layer 1717 and the portion of the encapsulating material 1739 , the portion of the encapsulating material 1730 remains on the carrier 171 and a portion of the upper surface 1711 of the carrier 171 is exposed. The portion of the encapsulating material 1730 is disposed on the upper surface 1711 of the carrier 171 .
- the portion of the encapsulating material 1730 has an upper surface 1731 and a lower surface 1732 which is opposite to the upper surface 1731 .
- the portion of the encapsulating material 1730 further has a surface 1733 at a height between that of the upper surface 1731 and the lower surface 1732 , wherein a portion of the surface 1733 is attached to the protruded surface 1712 of the carrier 171 and a portion of the surface 1733 is spaced from the upper surface 1711 of the carrier 171 . There is a space between the surface 1733 and the upper surface 1711 .
- the portion of the encapsulating material 1730 has a side surface 1736 .
- An angle G between the side surface 1736 and the upper surface 1731 ranges from about 90 degrees to about 110 degrees.
- FIG. 9A , FIG. 9B , FIG. 9C , FIG. 9D and FIG. 9E show a method of manufacturing a semiconductor device package 180 in accordance with another embodiment of the instant disclosure.
- a carrier 181 has an upper surface 1811 and a protrusion 1810 formed on the upper surface 1811 .
- the carrier 181 further has a protruded surface 1812 protruded with respect to the upper surface 1811 .
- At least one electronic component 182 is disposed on the upper surface 1811 of the carrier 181 .
- a glue is dispensed on the upper surface 1811 of the carrier 181 , wherein the glue does not flow across the protrusion 1810 .
- a removable/sacrificial layer 1817 is formed on the upper surface 1811 .
- the removable/sacrificial layer 1817 has an upper surface 1818 lower than the protruded surface 1812 .
- an encapsulating material 183 is disposed on the carrier 181 and encapsulates the at least one electronic component 182 and the removable/sacrificial layer 1817 .
- the encapsulating material 183 covers at least one electronic component 182 , the upper surface 1811 and the protruded surface 1812 of the carrier 181 and the removable/sacrificial layer 1817 .
- a portion of the encapsulating material 183 is removed by a laser process and thus a portion of the removable/sacrificial layer 1817 is exposed.
- the encapsulating material 183 is divided into two portions 1830 and 1839 , wherein the portion of the encapsulating material 1830 is attached to the upper surface 1811 and the protruded surface 1812 of the carrier 181 and the removable/sacrificial layer 1817 and the portion of the encapsulating material 1839 is attached to the removable/sacrificial layer 1817 .
- the removable/sacrificial layer 1817 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1839 attached to the removable/sacrificial layer 1817 is removed (e.g. while removing the removable/sacrificial layer 1817 ). After removing the removable/sacrificial layer 1817 and the portion of the encapsulating material 1839 , the portion of the encapsulating material 1830 remains on the carrier 181 and a portion of the upper surface 1811 of the carrier 181 is exposed. The portion of the encapsulating material 1830 is disposed on the upper surface 1811 of the carrier 181 .
- the portion of the encapsulating material 1830 has an upper surface 1831 and a lower surface 1832 which is opposite to the upper surface 1831 .
- the portion of the encapsulating material 1830 further has a surface 1833 at a height between that of the upper surface 1831 and the lower surface 1832 , wherein the surface 1833 is attached to the protruded surface 1812 of the carrier 181 .
- the portion of the encapsulating material 1830 further has a surface 1834 which is adjacent to the surface 1833 and lower than the surface 1833 .
- the surface 1834 may be substantially parallel to the surface 1833 .
- the surface 1834 is spaced from the upper surface 1811 of the carrier 181 . There is a space between the surface 1834 and the upper surface 1811 .
- the portion of the encapsulating material 1830 has a side surface 1836 .
- An angle H between the side surface 1836 and the upper surface 1831 ranges from about 90 degrees to about 110 degrees.
- FIG. 10A , FIG. 10B , FIG. 10C , FIG. 10D and FIG. 10E show a method of manufacturing a semiconductor device package 190 in accordance with another embodiment of the instant disclosure.
- a carrier 191 has an upper surface 1911 and a protrusion 1910 formed on the upper surface 1911 .
- the carrier 191 further has a protruded surface 1912 protruded with respect to the upper surface 1911 .
- At least one electronic component 192 is disposed on the upper surface 1911 of the carrier 191 .
- a glue is dispensed on the upper surface 1911 of the carrier 191 , wherein the glue extends on the protruded surface 1912 but does not flow across the protrusion 1910 .
- a removable/sacrificial layer 1917 is formed on the upper surface 1911 and the protruded surface 1912 .
- the removable/sacrificial layer 1917 has a substantially flat upper surface 1918 .
- an encapsulating material 193 is disposed on the carrier 191 and encapsulates the at least one electronic component 192 and the removable/sacrificial layer 1917 .
- the encapsulating material 193 covers at least one electronic component 192 , the upper surface 1911 of the carrier 191 and the removable/sacrificial layer 1917 .
- a portion of the encapsulating material 193 is removed by a laser process and thus a portion of the removable/sacrificial layer 1917 is exposed.
- the encapsulating material 193 is divided into two portions 1930 and 1939 , wherein the portion of the encapsulating material 1930 is attached to the upper surface 1911 of the carrier 191 and the removable/sacrificial layer 1917 and the portion of the encapsulating material 1939 is attached to the removable/sacrificial layer 1917 .
- the removable/sacrificial layer 1917 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 1939 attached to the removable/sacrificial layer 1917 is removed (e.g. while removing the removable/sacrificial layer 1917 ). After removing the removable/sacrificial layer 1917 and the portion of the encapsulating material 1939 , the portion of the encapsulating material 1930 remains on the carrier 191 and a portion of the upper surface 1911 of the carrier 191 is exposed. The portion of the encapsulating material 1930 is disposed on the upper surface 1911 of the carrier 191 .
- the portion of the encapsulating material 1930 has an upper surface 1931 and a lower surface 1932 which is opposite to the upper surface 1931 .
- the portion of the encapsulating material 1930 further has a surface 1933 at a height between that of the upper surface 1931 and the lower surface 1932 , wherein the surface 1933 is spaced from the upper surface 1911 and the protruded surface 1912 of the carrier 191 .
- the surface 1933 may be disposed above the protruded surface 1912 .
- the portion of the encapsulating material 1930 has a side surface 1936 .
- An angle I between the side surface 1936 and the upper surface 1931 ranges from about 90 degrees to about 110 degrees.
- FIG. 11A , FIG. 11B , FIG. 11C , FIG. 11D and FIG. 11E show a method of manufacturing a semiconductor device package 200 in accordance with another embodiment of the instant disclosure.
- a carrier 201 has an upper surface 2011 and a protrusion 2010 formed on the upper surface 2011 .
- the carrier 201 further has a protruded surface 2012 protruded with respect to the upper surface 2011 .
- At least one electronic component 202 is disposed on the upper surface 2011 of the carrier 201 .
- a glue is dispensed on the upper surface 2011 of the carrier 201 , wherein the glue extends on the protruded surface 2012 but does not flow across the protrusion 2010 .
- a removable/sacrificial layer 2017 is formed on the upper surface 2011 and the protruded surface 2012 .
- the removable/sacrificial layer 2017 has an uneven upper surface 2018 .
- an encapsulating material 203 is disposed on the carrier 201 and encapsulates the at least one electronic component 202 and the removable/sacrificial layer 2017 .
- the encapsulating material 203 covers at least one electronic component 202 , the upper surface 2011 of the carrier 201 and the removable/sacrificial layer 2017 .
- a portion of the encapsulating material 203 is removed by a laser process and thus a portion of the removable/sacrificial layer 2017 is exposed.
- the encapsulating material 203 is divided into two portions 2030 and 2039 , wherein the portion of the encapsulating material 2030 is attached to the upper surface 2011 of the carrier 201 and the removable/sacrificial layer 2017 and the portion of the encapsulating material 2039 is attached to the removable/sacrificial layer 2017 .
- the removable/sacrificial layer 2017 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 2039 attached to the removable/sacrificial layer 2017 is removed (e.g. while removing the removable/sacrificial layer 2017 ). After removing the removable/sacrificial layer 2017 and the portion of the encapsulating material 2039 , the portion of the encapsulating material 2030 remains on the carrier 201 and a portion of the upper surface 2011 of the carrier 201 is exposed. The portion of the encapsulating material 2030 is disposed on the upper surface 2011 of the carrier 201 .
- the portion of the encapsulating material 2030 has an upper surface 2031 and a lower surface 2032 which is opposite to the upper surface 2031 .
- the portion of the encapsulating material 2030 further has a surface 2033 at a height between that of the upper surface 2031 and the lower surface 2032 .
- the surface 2033 is spaced from (and, for example, disposed over) the protruded surface 2012 of the carrier 201 .
- the portion of the encapsulating material 2030 further has a surface 2034 which is adjacent to the surface 2033 and lower than the surface 2033 .
- the surface 2034 may be substantially parallel to the surface 2033 .
- the surface 2034 is spaced from the upper surface 2011 of the carrier 201 . There is a space between the surfaces 2033 , 2034 and the upper and protruded surfaces 2011 , 2012 .
- the portion of the encapsulating material 2030 has a side surface 2036 .
- An angle J between the side surface 2036 and the upper surface 2031 ranges from about 90 degrees to about 110 degrees.
- FIG. 12A , FIG. 12B , FIG. 12C , FIG. 12D , FIG. 12E and FIG. 12F show a method of manufacturing a semiconductor device package 210 in accordance with another embodiment of the instant disclosure.
- a carrier 211 has an upper surface 2111 and a recess 2110 formed in the upper surface 2111 .
- the carrier 211 further has a recessed surface 2112 (e.g. that defines a bottom of the recess 2110 ) recessed with respect to the upper surface 2110 .
- At least one electronic component 212 is disposed on the upper surface 2111 of the carrier 211 .
- a conductive layer 215 is disposed on the recessed surface 2112 .
- a glue is dispensed on the upper surface 2111 of the carrier 211 , wherein a portion of the glue flows into the recess 2110 .
- a removable/sacrificial layer 2117 is formed on the upper surface 2111 and the recessed surface 2112 of the carrier 211 and the conductive layer 215 .
- an encapsulating material 213 is disposed on the carrier 211 and encapsulates the at least one electronic component 212 and the removable/sacrificial layer 2117 .
- the encapsulating material 213 covers the at least one electronic component 212 , the upper surface 2111 of the carrier 211 and the removable/sacrificial layer 2117 .
- a portion of the encapsulating material 213 is removed by a laser process and thus a portion of the removable/sacrificial layer 2117 is exposed.
- the cutting gap formed by the laser substantially aligns with the position of the conductive layer 215 .
- the encapsulating material 213 is divided into two portions 2130 and 2139 , wherein the portion of the encapsulating material 2130 is attached to the upper surface 2111 of the carrier 211 and the removable/sacrificial layer 2117 and the portion of the encapsulating material 2139 is attached to the removable/sacrificial layer 2117 .
- the removable/sacrificial layer 2117 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 2139 attached to the removable/sacrificial layer 2117 is removed (e.g. while removing the removable/sacrificial layer 2117 ). After removing the removable/sacrificial layer 2117 and the portion of the encapsulating material 2139 , the portion of the encapsulating material 2130 remains on the carrier 211 and a portion of the upper surface 2111 and the recessed surface 2112 of the carrier 211 and the conductive layer 215 are exposed. The portion of the encapsulating material 2130 is disposed on the upper surface 2111 of the carrier 211 .
- the portion of the encapsulating material 2130 has an upper surface 2131 and a lower surface 2132 which is opposite to the upper surface 2131 . Further, a portion of the lower surface 2132 is spaced from (and, for example, disposed over) the recessed surface 2112 of the carrier 211 and a portion of the lower surface 2132 is attached to the upper surface 2111 of the carrier 211 . There is a space between the lower surface 2132 and the recessed surface 2112 .
- the portion of the encapsulating material 2130 has a side surface 2136 .
- An angle K between the side surface 2136 and the upper surface 2131 ranges from about 90 degrees to about 110 degrees.
- a shield layer 217 is formed on the conductive layer 215 and the portion of the encapsulating material 2130 .
- FIG. 13A , FIG. 13B , FIG. 13C , FIG. 13D , FIG. 13E and FIG. 13F show a method of manufacturing a semiconductor device package 220 in accordance with another embodiment of the instant disclosure.
- a carrier 221 has an upper surface 2211 and a conductive layer 225 . A portion of the top surface of the conductive layer 255 is exposed and recessed with respect to the upper surface 2211 of the carrier 221 .
- a glue is dispensed on the upper surface 2211 of the carrier 211 and the conductive layer 225 .
- a removable/sacrificial layer 2217 is formed on the upper surface 2211 and the carrier 221 and the conductive layer 225 .
- an encapsulating material 223 is disposed on the carrier 221 and encapsulates the at least one electronic component 222 and the removable/sacrificial layer 2217 .
- the encapsulating material 223 covers the at least one electronic component 222 , the upper surface 2211 of the carrier 221 and the removable/sacrificial layer 2217 .
- a portion of the encapsulating material 223 is removed by a laser process and thus a portion of the removable/sacrificial layer 2217 is exposed.
- the cutting gap formed by the laser substantially aligns with the position of the conductive layer 225 .
- the encapsulating material 223 is divided into two portions 2230 and 2239 , wherein the portion of the encapsulating material 2230 is attached to the upper surface 2211 of the carrier 221 and the removable/sacrificial layer 2217 and the portion of the encapsulating material 2239 is attached to the removable/sacrificial layer 2217 .
- the removable/sacrificial layer 2217 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 2239 attached to the removable/sacrificial layer 2217 is removed (e.g. while removing the removable/sacrificial layer 2217 ). After removing the removable/sacrificial layer 2217 and the portion of the encapsulating material 2239 , the portion of the encapsulating material 2230 remains on the carrier 221 and a portion of the upper surface 2211 the carrier 211 and the conductive layer 225 are exposed. The portion of the encapsulating material 2230 is disposed on the upper surface 2211 of the carrier 221 .
- the portion of the encapsulating material 2230 has an upper surface 2231 and a lower surface 2232 which is opposite to the upper surface 2231 . Further, a portion of the lower surface 2232 is spaced from the conductive layer 225 and a portion of the lower surface 2232 is attached to the upper surface 2211 of the carrier 221 . There is a space between the lower surface 2232 and the conductive layer 225 .
- the portion of the encapsulating material 2230 has a side surface 2236 .
- An angle L between the side surface 2236 and the upper surface 2231 ranges from about 90 degrees to about 110 degrees.
- a shield layer 227 is formed on the conductive layer 225 and the portion of the encapsulating material 2230 .
- FIG. 14A , FIG. 14B , FIG. 14C , FIG. 14D and FIG. 14E show a method of manufacturing a semiconductor device package 230 in accordance with another embodiment of the instant disclosure.
- a carrier 231 has an upper surface 2311 and includes a conductive layer 235 .
- a portion of the top surface of the conductive layer 235 is exposed and recessed with respect to the upper surface 2311 of the carrier 231 .
- the carrier 231 further has side surfaces 2313 , 2314 disposed on the conductive layer 225 and adjacent to and angled (e.g. at about 90 degrees) with respect to the upper surface 2311 of the carrier 231 .
- a glue is dispensed on the upper surface 2311 of the carrier 231 and the conductive layer 235 .
- a removable/sacrificial layer 2317 is formed on the upper surface 2311 and the carrier 231 and the conductive layer 235 .
- an encapsulating material 233 is disposed on the carrier 231 and encapsulates the at least one electronic component 232 and the removable/sacrificial layer 2317 .
- the encapsulating material 233 covers the at least one electronic component 232 , the upper surface 2311 of the carrier 231 and the removable/sacrificial layer 2317 .
- a portion of the encapsulating material 233 is removed by a laser process and thus a portion of the removable/sacrificial layer 2317 and a portion of the upper surface 2311 of the carrier 231 are exposed. Further, while using the laser to cut the encapsulating material 233 , the laser contacts the portion of the removable/sacrificial layer 2317 and the portion of the upper surface 2311 of the carrier 231 which are exposed after the portion of the encapsulating material 233 has been removed. The portion of the upper surface 2311 of the carrier 231 contacted by the laser may be roughened by the laser.
- the encapsulating material 233 is divided into two portions 2330 and 2339 , wherein the portion of the encapsulating material 2330 is attached to the upper surface 2311 of the carrier 231 and the portion of the encapsulating material 2339 is attached to the removable/sacrificial layer 2317 .
- the removable/sacrificial layer 2317 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulating material 2339 attached to the removable/sacrificial layer 2317 is removed (e.g. while removing the removable/sacrificial layer 2317 ). After removing the removable/sacrificial layer 2317 and the portion of the encapsulating material 2339 , the portion of the encapsulating material 2330 remains on the carrier 231 and a portion of the upper surface 2311 the carrier 211 and the conductive layer 235 are exposed. As above mentioned, the laser directly contacts the portion of the upper surface 2311 while cutting the encapsulating material 233 .
- a surface 2312 of the carrier 231 which is between the portion of the encapsulating material 2330 and the conductive layer 235 , has a roughness greater than a roughness of another portion of the upper surface 2311 of the carrier 231 and greater than a roughness of the side surfaces 2313 , 2314 of the carrier 231 (e.g., by a factor of about 1.3 or more, of about 1.5 or more, of about 2 or more, or greater).
- the portion of the encapsulating material 2330 has a side surface 2336 .
- An angle M between the side surface 2336 and the upper surface 2331 ranges from about 90 degrees to about 110 degrees.
- references to the formation or positioning of a first feature over or on a second feature in the instant disclosure may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features, such that the first and second features may not be in direct contact.
- the terms “approximately,” “substantially,” “substantial” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation.
- the terms can refer to a range of variation of less than or equal to ⁇ 10% of that numerical value, such as less than or equal to ⁇ 5%, less than or equal to ⁇ 4%, less than or equal to ⁇ 3%, less than or equal to ⁇ 2%, less than or equal to ⁇ 1%, less than or equal to ⁇ 0.5%, less than or equal to ⁇ 0.1%, or less than or equal to ⁇ 0.05%.
- substantially parallel can refer to a range of angular variation relative to 0° of less than or equal to ⁇ 10°, such as less than or equal to ⁇ 5°, less than or equal to ⁇ 4°, less than or equal to ⁇ 3°, less than or equal to ⁇ 2°, less than or equal to ⁇ 1°, less than or equal to ⁇ 0.5°, less than or equal to ⁇ 0.1°, or less than or equal to ⁇ 0.05°.
- substantially perpendicular can refer to a range of angular variation relative to 90° of less than or equal to ⁇ 10°, such as less than or equal to ⁇ 5°, less than or equal to ⁇ 4°, less than or equal to ⁇ 3°, less than or equal to ⁇ 2°, less than or equal to ⁇ 1°, less than or equal to ⁇ 0.5°, less than or equal to ⁇ 0.1°, or less than or equal to ⁇ 0.05°.
- Two surfaces can be deemed to be coplanar or substantially coplanar if a displacement between the two surfaces is no greater than 5 ⁇ m, no greater than 2 ⁇ m, no greater than 1 ⁇ m, or no greater than 0.5 ⁇ m.
- a surface can be deemed to be substantially flat if a displacement between a highest point and a lowest point of the surface is no greater than 5 ⁇ m, no greater than 2 ⁇ m, no greater than 1 ⁇ m, or no greater than 0.5 ⁇ m.
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
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Abstract
Description
- This application claims the benefit of and priority to U.S. Provisional Application No. 62/728,720, filed Sep. 7, 2018, the contents of which are incorporated herein by reference in their entirety.
- The instant disclosure relates to, amongst other things, a semiconductor device package, and a semiconductor device package having an area or space devoid of an encapsulating material.
- A molding process is a packaging technology for a semiconductor package, which is used to protect a substrate and components on the substrate. However, in some implementations not all regions of the substrate should be covered by the encapsulating material (also referred to as a molding compound), such as in antenna-on-package (AoP) implementations, in which it may be desirable to perform impedance matching of a path from a component to an antenna. Thus, a semiconductor device package can have a non-molding area or space (an area or space devoid of the encapsulating material), and a user can readily adjust the impedance matching by adjusting surface mount technology (SMT) passive components after the molding process.
- According to one example embodiment of the instant disclosure, a semiconductor device package includes a carrier and an encapsulant disposed on the carrier. Further, at least one portion of the encapsulant is spaced from the carrier by a space.
- According to another example embodiment of the instant disclosure, a semiconductor device package comprises a carrier comprising a first surface and a second surface adjacent to the first surface, and an encapsulant disposed on the first surface of the carrier. Further, a roughness of the second surface of the carrier is greater than a roughness of the first surface of the carrier.
- According to another example embodiment of the instant disclosure, method of manufacturing a semiconductor device package includes: a) providing a carrier having a surface; b) forming a sacrificial layer on the surface of the carrier; c) encapsulating the carrier and the sacrificial layer by an encapsulant; d) removing a portion of the encapsulant to expose a portion of the sacrificial layer such that the encapsulant is divided into a first portion and a second portion, wherein the first portion of the encapsulant is attached to the carrier and the second portion of the encapsulant is attached to the sacrificial layer; and e) removing the sacrificial layer and the second portion of the encapsulant.
- In order to further understanding of the instant disclosure, the following embodiments are provided along with illustrations to facilitate appreciation of the instant disclosure; however, the appended drawings are merely provided for reference and illustration, and do not limit the scope of the instant disclosure.
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FIG. 1 is a cross-sectional view of a semiconductor device package in accordance with an embodiment of the instant disclosure. -
FIG. 2A ,FIG. 2B ,FIG. 2C andFIG. 2D show a method of manufacturing a semiconductor device package in accordance with an embodiment of the instant disclosure. -
FIG. 3A ,FIG. 3B ,FIG. 3C ,FIG. 3D andFIG. 3E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 4A ,FIG. 4B ,FIG. 4C ,FIG. 4D andFIG. 4E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 5A ,FIG. 5B ,FIG. 5C ,FIG. 5D andFIG. 5E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 6A ,FIG. 6B ,FIG. 6C ,FIG. 6D andFIG. 6E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 7A ,FIG. 7B ,FIG. 7C ,FIG. 7D andFIG. 7E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 8A ,FIG. 8B ,FIG. 8C ,FIG. 8D andFIG. 8E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 9A ,FIG. 9B ,FIG. 9C ,FIG. 9D andFIG. 9E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 10A ,FIG. 10B ,FIG. 10C ,FIG. 10D andFIG. 10E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 11A ,FIG. 11B ,FIG. 11C ,FIG. 11D andFIG. 11E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 12A ,FIG. 12B ,FIG. 12C ,FIG. 12D ,FIG. 12E andFIG. 12F show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 13A ,FIG. 13B ,FIG. 13C ,FIG. 13D ,FIG. 13E andFIG. 13F show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. -
FIG. 14A ,FIG. 14B ,FIG. 14C ,FIG. 14D andFIG. 14E show a method of manufacturing a semiconductor device package in accordance with another embodiment of the instant disclosure. - The aforementioned illustrations and following detailed descriptions are examples for the purpose of explaining the instant disclosure.
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FIG. 1 shows a semiconductor device package 1 in accordance with an embodiment of the instant disclosure. In particular, the semiconductor device package 1 has two non-symmetricalnon-molding areas FIG. 1 , the semiconductor device package 1 comprises acarrier 10. Thecarrier 10 has anupper surface 11 and alower surface 12 opposite to theupper surface 11. An encapsulatingmaterial 20 is disposed on theupper surface 11 of thecarrier 10. Adie 101 andcomponents 102, 103 (e.g., electronic components, such as passive electronic components) are disposed on the disposed on theupper surface 11 of thecarrier 10 and covered by the encapsulatingmaterial 20. As shown inFIG. 1 , one or more regions of theupper surface 11 of thecarrier 10 are exposed from the encapsulating material 20 (e.g., are substantially devoid of the encapsulating material 20). Theupper surface 11 of thecarrier 10 has anon-molding area 13. In thenon-molding area 13, there is substantially no encapsulatingmaterial 20 disposed on theupper surface 11 of thecarrier 10, and thedie 104 and thecomponent 105 disposed on theupper surface 11 of thecarrier 10 are not covered by the encapsulatingmaterial 20 and thus are exposed. Further, an encapsulatingmaterial 21 is disposed on thelower surface 12 of thecarrier 10. Dies 106 andelectrical contacts 107 are disposed on thelower surface 12 of thecarrier 10 and covered by the encapsulatingmaterial 21. In addition, asubstrate 19 is disposed on the encapsulatingmaterial 21. Further, one or more regions of thelower surface 12 of thecarrier 10 are exposed from the encapsulating material 21 (e.g., are substantially devoid of the encapsulating material 21). Thelower surface 12 of thecarrier 10 has anon-molding area 15. In thenon-molding area 15, there is substantially no encapsulatingmaterial 21 disposed on thelower surface 12 of thecarrier 10, and thecomponents lower surface 12 of thecarrier 10 are not covered by the encapsulatingmaterial 21 and thus are exposed. - Moreover, referring to
FIG. 1 , thenon-molding areas non-molding area 13 on theupper surface 11 of thecarrier 10 and thenon-molding area 15 on thelower surface 12 of thecarrier 10 are not symmetrical to each other. -
FIG. 2A ,FIG. 2B ,FIG. 2C andFIG. 2D show a method of manufacturing asemiconductor device package 110 in accordance with an embodiment of the instant disclosure. As shown inFIG. 2A , at least oneelectronic component 112 is disposed on anupper surface 1111 of acarrier 111. Further, in some embodiments, a glue is dispensed on theupper surface 1111 of thecarrier 111 so as to form a removable/sacrificial layer 1117 on theupper surface 1111 of thecarrier 111. In some embodiments, the removable/sacrificial layer 1117 can include a tape adhered or taped on theupper surface 1111 of thecarrier 111 or another removable binding material coated or printed on theupper surface 1111 of thecarrier 111. - With reference to
FIG. 2B , an encapsulatingmaterial 113 is disposed on thecarrier 111 and encapsulates the at least oneelectronic component 112 and the removable/sacrificial layer 1117. The encapsulatingmaterial 113 covers the at least oneelectronic component 112, theupper surface 111 of thecarrier 11 and the removable/sacrificial layer 1117. - With reference to
FIG. 2C , a portion of the encapsulatingmaterial 113 is removed by a laser process and thus a portion of the removable/sacrificial layer 1117 is exposed. Thereby, the encapsulatingmaterial 113 is divided into twoportions material 1130 is attached to theupper surface 1111 of thecarrier 111 and the removable/sacrificial layer 1117, and the portion of the encapsulatingmaterial 1139 is attached to the removable/sacrificial layer 1117. - With reference to
FIG. 2D , the removable/sacrificial layer 1117 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1139 attached to the removable/sacrificial layer 1117 is removed too (e.g., is removed while removing the removable/sacrificial layer 1117). After removing the removable/sacrificial layer 1117 and the portion of the encapsulatingmaterial 1139, the portion of the encapsulatingmaterial 1130 remains on thecarrier 111 and a portion of theupper surface 1111 of thecarrier 111 is exposed. The portion of the encapsulatingmaterial 1130 is disposed on theupper surface 1111 of the carrier. The portion of the encapsulatingmaterial 1130 has anupper surface 1131 and alower surface 1132 which is opposite to theupper surface 1131 and attached to theupper surface 1111 of thecarrier 111. In addition, the portion of the encapsulatingmaterial 1130 further has asurface 1133 at a height between that of theupper surface 1131 and thelower surface 1132, wherein thesurface 1133 is spaced from theupper surface 1111 of thecarrier 111. There is a space between thesurface 1133 and theupper surface 1111. Thesurface 1133 may be substantially parallel to either or each of theupper surface 1131 and thelower surface 1132. - Moreover, the portion of the encapsulating
material 1130 has aside surface 1136. Theside surface 1136 may connect thesurface 1133 and theupper surface 1131. An angle A between theside surface 1136 and theupper surface 1131 ranges from about 90 degrees to about 110 degrees. -
FIG. 3A ,FIG. 3B ,FIG. 3C ,FIG. 3D andFIG. 3E show a method of manufacturing asemiconductor device package 120 in accordance with another embodiment of the instant disclosure. As shown inFIG. 3A , acarrier 121 has anupper surface 1211 and arecess 1210 formed in theupper surface 1211. Thecarrier 121 has a recessed surface 1212 (e.g. that defines a bottom of the recess 1210) recessed with respect to theupper surface 1211. At least oneelectronic component 122 is disposed on theupper surface 1211 of thecarrier 121. - Further, with reference to
FIG. 3B , a glue is dispensed on theupper surface 1211 of thecarrier 121, wherein a portion of the glue flows into therecess 1210. Thus, a removable/sacrificial layer 1217 is formed on theupper surface 1211 and the recessedsurface 1212 of thecarrier 121. - With reference to
FIG. 3C , an encapsulatingmaterial 123 is disposed on thecarrier 121 and encapsulates the at least oneelectronic component 122 and the removable/sacrificial layer 1217. The encapsulatingmaterial 123 covers the at least oneelectronic component 122, theupper surface 1211 of thecarrier 121 and the removable/sacrificial layer 1217. - With reference to
FIG. 3D , a portion of the encapsulatingmaterial 123 is removed by a laser process and thus a portion of the removable/sacrificial layer 1217 is exposed. Thereby, the encapsulatingmaterial 123 is divided into twoportions material 1230 is attached to theupper surface 1211 of thecarrier 121 and the removable/sacrificial layer 1217, and the portion of the encapsulatingmaterial 1239 is attached to the removable/sacrificial layer 1217. - With reference to
FIG. 3E , the removable/sacrificial layer 1217 is removed by physical methods or chemical methods, such as a water washing process. The portion of the encapsulatingmaterial 1239 attached to the removable/sacrificial layer 1217 is removed (e.g. while removing the removable/sacrificial layer 1217). After removing the removable/sacrificial layer 1217 and the portion of the encapsulatingmaterial 1239, the portion of the encapsulatingmaterial 1230 remains on thecarrier 121 and a portion of theupper surface 1211 and the recessedsurface 1212 of thecarrier 121 are exposed. The portion of the encapsulatingmaterial 1230 is disposed on theupper surface 1211 of thecarrier 121. The portion of the encapsulatingmaterial 1230 has anupper surface 1231 and alower surface 1232 which is opposite to theupper surface 1231. Further, a portion of thelower surface 1232 is spaced from the recessedsurface 1212 of the carrier 121 (e.g. is spaced from and disposed over the recessedsurface 1212 of the carrier 121) and a portion of thelower surface 1232 is attached to theupper surface 1211 of thecarrier 121. There is a space between thelower surface 1232 and the recessedsurface 1212. - Moreover, the portion of the encapsulating
material 1230 has aside surface 1236. An angle B between theside surface 1236 and theupper surface 1231 ranges from about 90 degrees to about 110 degrees. -
FIG. 4A ,FIG. 4B ,FIG. 4C ,FIG. 4D andFIG. 4E show a method of manufacturing asemiconductor device package 130 in accordance with another embodiment of the instant disclosure. As shown inFIG. 4A , acarrier 131 has anupper surface 1311 and arecess 1310 formed in theupper surface 1311. Thecarrier 131 further has a recessed surface 1312 (e.g. that defines a bottom of the recess 1310) recessed with respect to theupper surface 1311. At least oneelectronic component 132 is disposed on theupper surface 1311 of thecarrier 131. - Further, with reference to
FIG. 4B , a glue is dispensed on theupper surface 1311 of thecarrier 131, wherein a portion of the glue flows into therecess 1310. Thus, a removable/sacrificial layer 1317 is formed on theupper surface 1311 and the recessedsurface 1312 of thecarrier 131. The removable/sacrificial layer 1317 has anupper surface 1318 higher than theupper surface 1311 of thecarrier 131. Moreover, the removable/sacrificial layer 1317 has aside surface 1319, which is substantially coplanar with aside surface 1315 of therecess 1310. - With reference to
FIG. 4C , an encapsulatingmaterial 133 is disposed on thecarrier 131 and encapsulates the at least oneelectronic component 132 and the removable/sacrificial layer 1317. The encapsulatingmaterial 133 covers the at least oneelectronic component 132, theupper surface 1311 of thecarrier 131 and the removable/sacrificial layer 1317. - With reference to
FIG. 4D , a portion of the encapsulatingmaterial 133 is removed by a laser process and thus a portion of the removable/sacrificial layer 1317 is exposed. Thereby, the encapsulatingmaterial 133 is divided into twoportions material 1330 is attached to theupper surface 1311 of thecarrier 131 and the removable/sacrificial layer 1317 and the portion of the encapsulatingmaterial 1339 is attached to the removable/sacrificial layer 1317. - With reference to
FIG. 4E , the removable/sacrificial layer 1317 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1339 attached to the removable/sacrificial layer 1317 is removed (e.g. while removing the removable/sacrificial layer 1317). After removing the removable/sacrificial layer 1317 and the portion of the encapsulatingmaterial 1339, the portion of the encapsulatingmaterial 1330 remains on thecarrier 131 and a portion of theupper surface 1311 and the recessedsurface 1312 of thecarrier 131 are exposed. The portion of the encapsulatingmaterial 1330 is disposed on theupper surface 1311 of thecarrier 131. The portion of the encapsulatingmaterial 1330 has anupper surface 1331 and alower surface 1332 which is opposite to theupper surface 1131. In addition, the portion of the encapsulatingmaterial 1330 further has asurface 1333 at a height between that of theupper surface 1331 and thelower surface 1332, wherein thesurface 1333 is spaced from and disposed over the recessedsurface 1312 of thecarrier 131. There is a space between thesurface 1333 and the recessedsurface 1312. Moreover, the portion of the encapsulatingmaterial 1330 has aside surface 1335, which is connected to thelower surface 1332 and thesurface 1333. Theside surface 1335 is substantially coplanar with the side surface 1313 of therecess 1310. - Moreover, the portion of the encapsulating
material 1330 has aside surface 1336. An angle C between theside surface 1336 and theupper surface 1331 ranges from about 90 degrees to about 110 degrees. -
FIG. 5A ,FIG. 5B ,FIG. 5C ,FIG. 5D andFIG. 5E show a method of manufacturing asemiconductor device package 140 in accordance with another embodiment of the instant disclosure. As shown inFIG. 5A , acarrier 141 has anupper surface 1411 and arecess 1410 formed in theupper surface 1411. Thecarrier 141 further has a recessed surface 1412 (e.g. that defines a bottom of the recess 1410) recessed with respect to theupper surface 1411. At least oneelectronic component 142 is disposed on theupper surface 1411 of thecarrier 141. - Further, with reference to
FIG. 5B , a glue is dispensed on theupper surface 1411 of thecarrier 141, wherein a portion of the glue flows into therecess 1410. Thus, a removable/sacrificial layer 1417 is formed on theupper surface 1411 and the recessedsurface 1412 of thecarrier 141. The removable/sacrificial layer 1417 has anupper surface 1418 higher than theupper surface 1411 of thecarrier 141. Moreover, since the glue overflows therecess 1410, the removable/sacrificial layer 1417 extends across therecess 1410 and has aside surface 1419 on theupper surface 1411 of thecarrier 141. - With reference to
FIG. 5C , an encapsulatingmaterial 143 is disposed on thecarrier 141 and encapsulates the at least oneelectronic component 142 and the removable/sacrificial layer 1417. The encapsulatingmaterial 143 covers the at least oneelectronic component 142, theupper surface 1411 of thecarrier 141 and the removable/sacrificial layer 1417. - With reference to
FIG. 5D , a portion of the encapsulatingmaterial 143 is removed by a laser process and thus a portion of the removable/sacrificial layer 1417 is exposed. Thereby, the encapsulatingmaterial 143 is divided into twoportions material 1430 is attached to theupper surface 1411 of thecarrier 141 and the removable/sacrificial layer 1417 and the portion of the encapsulatingmaterial 1439 is attached to the removable/sacrificial layer 1417. - With reference to
FIG. 5E , the removable/sacrificial layer 1417 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1439 attached to the removable/sacrificial layer 1417 is removed (e.g. while removing the removable/sacrificial layer 1417). After removing the removable/sacrificial layer 1417 and the portion of the encapsulatingmaterial 1439, the portion of the encapsulatingmaterial 1430 remains on thecarrier 141 and a portion of theupper surface 1411 and the recessedsurface 1412 of thecarrier 141 are exposed. The portion of the encapsulatingmaterial 1430 is disposed on theupper surface 1411 of thecarrier 141. The portion of the encapsulatingmaterial 1430 has anupper surface 1431 and alower surface 1432 which is opposite to theupper surface 1431. The portion of the encapsulatingmaterial 1430 further has asurface 1433 at a height between that of theupper surface 1431 and thelower surface 1432, wherein thesurface 1433 is spaced from theupper surface 1411 and the recessedsurface 1412 of thecarrier 141. There is a space between thesurface 1433 and theupper surface 1411 the recessedsurface 1412. In addition, the portion of the encapsulatingmaterial 1430 further has aside surface 1434 which is connected to thelower surface 1432 and thesurface 1433. Theside surface 1434 is disposed on theupper surface 1411 of thecarrier 141 and not coplanar with aside surface 1415 of therecess 1410. The side surface of therecess 1410 may be disposed under thesurface 1433. - Moreover, the portion of the encapsulating
material 1430 has aside surface 1436. An angle D between theside surface 1436 and theupper surface 1431 ranges from about 90 degrees to about 110 degrees. -
FIG. 6A ,FIG. 6B ,FIG. 6C ,FIG. 6D andFIG. 6E show a method of manufacturing asemiconductor device package 150 in accordance with another embodiment of the instant disclosure. As shown inFIG. 6A , acarrier 151 has anupper surface 1511 and arecess 1510 formed in theupper surface 1511. Thecarrier 151 further has a recessed surface 1512 (e.g. that defines a bottom of the recess 1510) recessed with respect to theupper surface 1511. At least oneelectronic component 152 is disposed on theupper surface 1511 of thecarrier 151. - Further, with reference to
FIG. 6B , a glue is dispensed on theupper surface 1511 of thecarrier 151, wherein a portion of the glue flows into therecess 1510. Thus, a removable/sacrificial layer 1517 is formed on theupper surface 1511 and the recessedsurface 1512 of thecarrier 151. The removable/sacrificial layer 1517 has anupper surface 1518 higher than theupper surface 1511 of thecarrier 151. Moreover, since the glue overflows therecess 1510, the removable/sacrificial layer 157 has aprotrusion 1515 protruded from theupper surface 1518 of the removable/sacrificial layer 1517. Theprotrusion 1515 has aside surface 1516 substantially coplanar with theside surface 1519 of therecess 1510. - With reference to
FIG. 6C , an encapsulatingmaterial 153 is disposed on thecarrier 151 and encapsulates the at least oneelectronic component 152 and the removable/sacrificial layer 1517. The encapsulatingmaterial 153 covers the at least oneelectronic component 152, theupper surface 1511 of thecarrier 151 and the removable/sacrificial layer 1517. - With reference to
FIG. 6D , a portion of the encapsulatingmaterial 153 is removed by a laser process and thus a portion of the removable/sacrificial layer 1517 is exposed. Thereby, the encapsulatingmaterial 153 is divided into twoportions material 1530 is attached to theupper surface 1511 of thecarrier 151 and the removable/sacrificial layer 1517 and the portion of the encapsulatingmaterial 1539 is attached to the removable/sacrificial layer 1517. - With reference to
FIG. 6E , the removable/sacrificial layer 1517 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1539 attached to the removable/sacrificial layer 1517 is removed (e.g. while removing the removable/sacrificial layer 1517). After removing the removable/sacrificial layer 1517 and the portion of the encapsulatingmaterial 1539, the portion of the encapsulatingmaterial 1530 remains on thecarrier 151 and a portion of theupper surface 1511 and the recessedsurface 1512 of thecarrier 151 are exposed. The portion of the encapsulatingmaterial 1530 is disposed on theupper surface 1511 of thecarrier 151. The portion of the encapsulatingmaterial 1530 has anupper surface 1531 and alower surface 1532 which is opposite to theupper surface 1131. The portion of the encapsulatingmaterial 1530 further has asurface 1533 at a height between that of theupper surface 1531 and thelower surface 1532, wherein thesurface 1533 is spaced from theupper surface 1511 and the recessedsurface 1512 of thecarrier 151. Thesurface 1533 is disposed over the recessedsurface 1512 of thecarrier 151. Moreover, the portion of the encapsulatingmaterial 1530 further has asurface 1534 which is adjacent to thesurface 1533 and lower than thesurface 1533. Thesurface 1534 is spaced from (and, for example, disposed over) the recessedsurface 1512 of thecarrier 151. Thesurface 1534 may be substantially parallel to thesurface 1533. There is a space between thesurfaces surface 1512. In addition, the portion of the encapsulatingmaterial 1530 further has aside surface 1535 which is connected to thelower surface 1532 and thesurface 1533. Theside surface 1535 is substantially coplanar with theside surface 1519 of therecess 1510. - Moreover, the portion of the encapsulating
material 1530 has aside surface 1536. An angle E between theside surface 1536 and theupper surface 1531 ranges from about 90 degrees to about 110 degrees. -
FIG. 7A ,FIG. 7B ,FIG. 7C ,FIG. 7D andFIG. 7E show a method of manufacturing asemiconductor device package 160 in accordance with another embodiment of the instant disclosure. As shown inFIG. 7A , acarrier 161 has anupper surface 1611 and arecess 1610 formed in theupper surface 1611. Thecarrier 161 further has a recessed surface 1612 (e.g. that defines a bottom of the recess 1610) recessed with respect to theupper surface 1611. At least oneelectronic component 162 is disposed on theupper surface 1611 of thecarrier 161. - Further, with reference to
FIG. 7B , a glue is dispensed on theupper surface 1611 of thecarrier 161, wherein a portion of the glue flows into therecess 1610. Thus, a removable/sacrificial layer 1617 is formed on theupper surface 1611 and the recessedsurface 1612 of thecarrier 151. The removable/sacrificial layer 1617 has anupper surface 1618 higher than theupper surface 1611 of thecarrier 161. Moreover, since the glue overflows therecess 1610, the removable/sacrificial layer 1617 has aprotrusion 1615 protruded from theupper surface 1618 of the removable/sacrificial layer 1617 and extending to theupper surface 1611 of thecarrier 161. Theprotrusion 1615 has aside surface 1616 disposed on theupper surface 1611 of thecarrier 161. - With reference to
FIG. 7C , an encapsulatingmaterial 163 is disposed on thecarrier 161 and encapsulates the at least oneelectronic component 162 and the removable/sacrificial layer 1617. The encapsulatingmaterial 163 covers the at least oneelectronic component 162, theupper surface 1611 of thecarrier 161 and the removable/sacrificial layer 1617. - With reference to
FIG. 7D , a portion of the encapsulatingmaterial 163 is removed by a laser process and thus a portion of the removable/sacrificial layer 1617 is exposed. Thereby, the encapsulatingmaterial 163 is divided into twoportions material 1630 is attached to theupper surface 1611 of thecarrier 161 and the removable/sacrificial layer 1617 and the portion of the encapsulatingmaterial 1639 is attached to the removable/sacrificial layer 1617. - With reference to
FIG. 7E , the removable/sacrificial layer 1617 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1639 attached to the removable/sacrificial layer 1617 is removed (e.g. while removing the removable/sacrificial layer 1617). After removing the removable/sacrificial layer 1617 and the portion of the encapsulatingmaterial 1639, the portion of the encapsulatingmaterial 1630 remains on thecarrier 161 and a portion of theupper surface 1611 and the recessedsurface 1612 of thecarrier 161 are exposed. The portion of the encapsulatingmaterial 1630 is disposed on theupper surface 1611 of thecarrier 161. The portion of the encapsulatingmaterial 1630 has anupper surface 1631 and alower surface 1632 which is opposite to theupper surface 1631. The portion of the encapsulatingmaterial 1630 further has asurface 1633 at a height between that of theupper surface 1631 and thelower surface 1632, wherein thesurface 1633 is spaced from theupper surface 1611 and the recessedsurface 1612 of thecarrier 161. At least a portion of thesurface 1633 is disposed over the recessedsurface 1612 of thecarrier 161. Moreover, the portion of the encapsulatingmaterial 1630 further has asurface 1634 which is adjacent to thesurface 1633 and lower than thesurface 1633. Thesurface 1634 is spaced from the recessedsurface 1612 of thecarrier 161. Thesurface 1634 may be substantially parallel to thesurface 1633. There is a space between thesurfaces surfaces material 1630 further has aside surface 1635 which is connected to thelower surface 1632 and thesurface 1633. Theside surface 1635 is disposed on theupper surface 1611 of thecarrier 161 and not coplanar with theside surface 1615 of therecess 1610. - Moreover, the portion of the encapsulating
material 1630 has aside surface 1636. An angle F between theside surface 1636 and theupper surface 1631 ranges from about 90 degrees to about 110 degrees. -
FIG. 8A ,FIG. 8B ,FIG. 8C ,FIG. 8D andFIG. 8E show a method of manufacturing asemiconductor device package 170 in accordance with another embodiment of the instant disclosure. As shown inFIG. 8A , acarrier 171 has anupper surface 1711 and aprotrusion 1710 formed on theupper surface 1711. Thecarrier 171 further has a protrudedsurface 1712 protruded with respect to theupper surface 1711. At least oneelectronic component 172 is disposed on theupper surface 1711 of thecarrier 171. - Further, with reference to
FIG. 8B , a glue is dispensed on theupper surface 1711 of thecarrier 171, wherein the glue does not flow across theprotrusion 1710. Thus, a removable/sacrificial layer 1717 is formed on theupper surface 1711. Moreover, the removable/sacrificial layer 1717 has anupper surface 1718 substantially coplanar with the protrudedsurface 1712. - With reference to
FIG. 8C , an encapsulatingmaterial 173 is disposed on thecarrier 171 and encapsulates the at least oneelectronic component 172 and the removable/sacrificial layer 1717. The encapsulatingmaterial 173 covers at least oneelectronic component 172, theupper surface 1711 and the protrudedsurface 1712 of thecarrier 171 and the removable/sacrificial layer 1717. - With reference to
FIG. 8D , a portion of the encapsulatingmaterial 173 is removed by a laser process and thus a portion of the removable/sacrificial layer 1717 is exposed. Thereby, the encapsulatingmaterial 173 is divided into twoportions material 1730 is attached to theupper surface 1711 and the protrudedsurface 1712 of thecarrier 171 and the removable/sacrificial layer 1717 and the portion of the encapsulatingmaterial 1739 is attached to the removable/sacrificial layer 1717. - With reference to
FIG. 8E , the removable/sacrificial layer 1717 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1739 attached to the removable/sacrificial layer 1717 is removed (e.g. while removing the removable/sacrificial layer 1717). After removing the removable/sacrificial layer 1717 and the portion of the encapsulatingmaterial 1739, the portion of the encapsulatingmaterial 1730 remains on thecarrier 171 and a portion of theupper surface 1711 of thecarrier 171 is exposed. The portion of the encapsulatingmaterial 1730 is disposed on theupper surface 1711 of thecarrier 171. The portion of the encapsulatingmaterial 1730 has anupper surface 1731 and alower surface 1732 which is opposite to theupper surface 1731. In addition, the portion of the encapsulatingmaterial 1730 further has asurface 1733 at a height between that of theupper surface 1731 and thelower surface 1732, wherein a portion of thesurface 1733 is attached to the protrudedsurface 1712 of thecarrier 171 and a portion of thesurface 1733 is spaced from theupper surface 1711 of thecarrier 171. There is a space between thesurface 1733 and theupper surface 1711. - Moreover, the portion of the encapsulating
material 1730 has aside surface 1736. An angle G between theside surface 1736 and theupper surface 1731 ranges from about 90 degrees to about 110 degrees. -
FIG. 9A ,FIG. 9B ,FIG. 9C ,FIG. 9D andFIG. 9E show a method of manufacturing asemiconductor device package 180 in accordance with another embodiment of the instant disclosure. As shown inFIG. 9A , acarrier 181 has anupper surface 1811 and aprotrusion 1810 formed on theupper surface 1811. Thecarrier 181 further has a protrudedsurface 1812 protruded with respect to theupper surface 1811. At least oneelectronic component 182 is disposed on theupper surface 1811 of thecarrier 181. - Further, with reference to
FIG. 9B , a glue is dispensed on theupper surface 1811 of thecarrier 181, wherein the glue does not flow across theprotrusion 1810. Thus, a removable/sacrificial layer 1817 is formed on theupper surface 1811. Moreover, the removable/sacrificial layer 1817 has anupper surface 1818 lower than the protrudedsurface 1812. - With reference to
FIG. 9C , an encapsulatingmaterial 183 is disposed on thecarrier 181 and encapsulates the at least oneelectronic component 182 and the removable/sacrificial layer 1817. The encapsulatingmaterial 183 covers at least oneelectronic component 182, theupper surface 1811 and the protrudedsurface 1812 of thecarrier 181 and the removable/sacrificial layer 1817. - With reference to
FIG. 9D , a portion of the encapsulatingmaterial 183 is removed by a laser process and thus a portion of the removable/sacrificial layer 1817 is exposed. Thereby, the encapsulatingmaterial 183 is divided into twoportions material 1830 is attached to theupper surface 1811 and the protrudedsurface 1812 of thecarrier 181 and the removable/sacrificial layer 1817 and the portion of the encapsulatingmaterial 1839 is attached to the removable/sacrificial layer 1817. - With reference to
FIG. 9E , the removable/sacrificial layer 1817 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1839 attached to the removable/sacrificial layer 1817 is removed (e.g. while removing the removable/sacrificial layer 1817). After removing the removable/sacrificial layer 1817 and the portion of the encapsulatingmaterial 1839, the portion of the encapsulatingmaterial 1830 remains on thecarrier 181 and a portion of theupper surface 1811 of thecarrier 181 is exposed. The portion of the encapsulatingmaterial 1830 is disposed on theupper surface 1811 of thecarrier 181. The portion of the encapsulatingmaterial 1830 has anupper surface 1831 and alower surface 1832 which is opposite to theupper surface 1831. In addition, the portion of the encapsulatingmaterial 1830 further has asurface 1833 at a height between that of theupper surface 1831 and thelower surface 1832, wherein thesurface 1833 is attached to the protrudedsurface 1812 of thecarrier 181. Moreover, the portion of the encapsulatingmaterial 1830 further has asurface 1834 which is adjacent to thesurface 1833 and lower than thesurface 1833. Thesurface 1834 may be substantially parallel to thesurface 1833. Thesurface 1834 is spaced from theupper surface 1811 of thecarrier 181. There is a space between thesurface 1834 and theupper surface 1811. - Moreover, the portion of the encapsulating
material 1830 has aside surface 1836. An angle H between theside surface 1836 and theupper surface 1831 ranges from about 90 degrees to about 110 degrees. -
FIG. 10A ,FIG. 10B ,FIG. 10C ,FIG. 10D andFIG. 10E show a method of manufacturing asemiconductor device package 190 in accordance with another embodiment of the instant disclosure. As shown inFIG. 10A , acarrier 191 has anupper surface 1911 and aprotrusion 1910 formed on theupper surface 1911. Thecarrier 191 further has a protrudedsurface 1912 protruded with respect to theupper surface 1911. At least oneelectronic component 192 is disposed on theupper surface 1911 of thecarrier 191. - Further, with reference to
FIG. 10B , a glue is dispensed on theupper surface 1911 of thecarrier 191, wherein the glue extends on the protrudedsurface 1912 but does not flow across theprotrusion 1910. Thus, a removable/sacrificial layer 1917 is formed on theupper surface 1911 and the protrudedsurface 1912. Moreover, the removable/sacrificial layer 1917 has a substantially flatupper surface 1918. - With reference to
FIG. 10C , an encapsulatingmaterial 193 is disposed on thecarrier 191 and encapsulates the at least oneelectronic component 192 and the removable/sacrificial layer 1917. The encapsulatingmaterial 193 covers at least oneelectronic component 192, theupper surface 1911 of thecarrier 191 and the removable/sacrificial layer 1917. - With reference to
FIG. 10D , a portion of the encapsulatingmaterial 193 is removed by a laser process and thus a portion of the removable/sacrificial layer 1917 is exposed. Thereby, the encapsulatingmaterial 193 is divided into twoportions material 1930 is attached to theupper surface 1911 of thecarrier 191 and the removable/sacrificial layer 1917 and the portion of the encapsulatingmaterial 1939 is attached to the removable/sacrificial layer 1917. - With reference to
FIG. 10E , the removable/sacrificial layer 1917 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 1939 attached to the removable/sacrificial layer 1917 is removed (e.g. while removing the removable/sacrificial layer 1917). After removing the removable/sacrificial layer 1917 and the portion of the encapsulatingmaterial 1939, the portion of the encapsulatingmaterial 1930 remains on thecarrier 191 and a portion of theupper surface 1911 of thecarrier 191 is exposed. The portion of the encapsulatingmaterial 1930 is disposed on theupper surface 1911 of thecarrier 191. The portion of the encapsulatingmaterial 1930 has anupper surface 1931 and alower surface 1932 which is opposite to theupper surface 1931. In addition, the portion of the encapsulatingmaterial 1930 further has asurface 1933 at a height between that of theupper surface 1931 and thelower surface 1932, wherein thesurface 1933 is spaced from theupper surface 1911 and the protrudedsurface 1912 of thecarrier 191. There is a space between thesurface 1933 and theupper surface 1911 and the protrudedsurface 1912. Thesurface 1933 may be disposed above the protrudedsurface 1912. - Moreover, the portion of the encapsulating
material 1930 has aside surface 1936. An angle I between theside surface 1936 and theupper surface 1931 ranges from about 90 degrees to about 110 degrees. -
FIG. 11A ,FIG. 11B ,FIG. 11C ,FIG. 11D andFIG. 11E show a method of manufacturing asemiconductor device package 200 in accordance with another embodiment of the instant disclosure. As shown inFIG. 11A , acarrier 201 has anupper surface 2011 and aprotrusion 2010 formed on theupper surface 2011. Thecarrier 201 further has a protrudedsurface 2012 protruded with respect to theupper surface 2011. At least oneelectronic component 202 is disposed on theupper surface 2011 of thecarrier 201. - Further, with reference to
FIG. 11B , a glue is dispensed on theupper surface 2011 of thecarrier 201, wherein the glue extends on the protrudedsurface 2012 but does not flow across theprotrusion 2010. Thus, a removable/sacrificial layer 2017 is formed on theupper surface 2011 and the protrudedsurface 2012. Moreover, the removable/sacrificial layer 2017 has an unevenupper surface 2018. - With reference to
FIG. 11C , an encapsulatingmaterial 203 is disposed on thecarrier 201 and encapsulates the at least oneelectronic component 202 and the removable/sacrificial layer 2017. The encapsulatingmaterial 203 covers at least oneelectronic component 202, theupper surface 2011 of thecarrier 201 and the removable/sacrificial layer 2017. - With reference to
FIG. 11D , a portion of the encapsulatingmaterial 203 is removed by a laser process and thus a portion of the removable/sacrificial layer 2017 is exposed. Thereby, the encapsulatingmaterial 203 is divided into twoportions material 2030 is attached to theupper surface 2011 of thecarrier 201 and the removable/sacrificial layer 2017 and the portion of the encapsulatingmaterial 2039 is attached to the removable/sacrificial layer 2017. - With reference to
FIG. 11E , the removable/sacrificial layer 2017 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 2039 attached to the removable/sacrificial layer 2017 is removed (e.g. while removing the removable/sacrificial layer 2017). After removing the removable/sacrificial layer 2017 and the portion of the encapsulatingmaterial 2039, the portion of the encapsulatingmaterial 2030 remains on thecarrier 201 and a portion of theupper surface 2011 of thecarrier 201 is exposed. The portion of the encapsulatingmaterial 2030 is disposed on theupper surface 2011 of thecarrier 201. The portion of the encapsulatingmaterial 2030 has anupper surface 2031 and alower surface 2032 which is opposite to theupper surface 2031. In addition, the portion of the encapsulatingmaterial 2030 further has asurface 2033 at a height between that of theupper surface 2031 and thelower surface 2032. Thesurface 2033 is spaced from (and, for example, disposed over) the protrudedsurface 2012 of thecarrier 201. Moreover, the portion of the encapsulatingmaterial 2030 further has asurface 2034 which is adjacent to thesurface 2033 and lower than thesurface 2033. Thesurface 2034 may be substantially parallel to thesurface 2033. Thesurface 2034 is spaced from theupper surface 2011 of thecarrier 201. There is a space between thesurfaces surfaces - Moreover, the portion of the encapsulating
material 2030 has aside surface 2036. An angle J between theside surface 2036 and theupper surface 2031 ranges from about 90 degrees to about 110 degrees. -
FIG. 12A ,FIG. 12B ,FIG. 12C ,FIG. 12D ,FIG. 12E andFIG. 12F show a method of manufacturing asemiconductor device package 210 in accordance with another embodiment of the instant disclosure. As shown inFIG. 12A , acarrier 211 has anupper surface 2111 and arecess 2110 formed in theupper surface 2111. Thecarrier 211 further has a recessed surface 2112 (e.g. that defines a bottom of the recess 2110) recessed with respect to theupper surface 2110. At least oneelectronic component 212 is disposed on theupper surface 2111 of thecarrier 211. Further, aconductive layer 215 is disposed on the recessedsurface 2112. - Further, with reference to
FIG. 12B , a glue is dispensed on theupper surface 2111 of thecarrier 211, wherein a portion of the glue flows into therecess 2110. Thus, a removable/sacrificial layer 2117 is formed on theupper surface 2111 and the recessedsurface 2112 of thecarrier 211 and theconductive layer 215. - With reference to
FIG. 12C , an encapsulatingmaterial 213 is disposed on thecarrier 211 and encapsulates the at least oneelectronic component 212 and the removable/sacrificial layer 2117. The encapsulatingmaterial 213 covers the at least oneelectronic component 212, theupper surface 2111 of thecarrier 211 and the removable/sacrificial layer 2117. - With reference to
FIG. 12D , a portion of the encapsulatingmaterial 213 is removed by a laser process and thus a portion of the removable/sacrificial layer 2117 is exposed. The cutting gap formed by the laser substantially aligns with the position of theconductive layer 215. The encapsulatingmaterial 213 is divided into twoportions material 2130 is attached to theupper surface 2111 of thecarrier 211 and the removable/sacrificial layer 2117 and the portion of the encapsulatingmaterial 2139 is attached to the removable/sacrificial layer 2117. - With reference to
FIG. 12E , the removable/sacrificial layer 2117 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 2139 attached to the removable/sacrificial layer 2117 is removed (e.g. while removing the removable/sacrificial layer 2117). After removing the removable/sacrificial layer 2117 and the portion of the encapsulatingmaterial 2139, the portion of the encapsulatingmaterial 2130 remains on thecarrier 211 and a portion of theupper surface 2111 and the recessedsurface 2112 of thecarrier 211 and theconductive layer 215 are exposed. The portion of the encapsulatingmaterial 2130 is disposed on theupper surface 2111 of thecarrier 211. The portion of the encapsulatingmaterial 2130 has anupper surface 2131 and alower surface 2132 which is opposite to theupper surface 2131. Further, a portion of thelower surface 2132 is spaced from (and, for example, disposed over) the recessedsurface 2112 of thecarrier 211 and a portion of thelower surface 2132 is attached to theupper surface 2111 of thecarrier 211. There is a space between thelower surface 2132 and the recessedsurface 2112. - Moreover, the portion of the encapsulating
material 2130 has aside surface 2136. An angle K between theside surface 2136 and theupper surface 2131 ranges from about 90 degrees to about 110 degrees. - With reference to
FIG. 12F , ashield layer 217 is formed on theconductive layer 215 and the portion of the encapsulatingmaterial 2130. -
FIG. 13A ,FIG. 13B ,FIG. 13C ,FIG. 13D ,FIG. 13E andFIG. 13F show a method of manufacturing asemiconductor device package 220 in accordance with another embodiment of the instant disclosure. As shown inFIG. 13A , acarrier 221 has anupper surface 2211 and aconductive layer 225. A portion of the top surface of the conductive layer 255 is exposed and recessed with respect to theupper surface 2211 of thecarrier 221. - Further, with reference to
FIG. 13B , a glue is dispensed on theupper surface 2211 of thecarrier 211 and theconductive layer 225. Thus, a removable/sacrificial layer 2217 is formed on theupper surface 2211 and thecarrier 221 and theconductive layer 225. - With reference to
FIG. 13C , an encapsulatingmaterial 223 is disposed on thecarrier 221 and encapsulates the at least oneelectronic component 222 and the removable/sacrificial layer 2217. The encapsulatingmaterial 223 covers the at least oneelectronic component 222, theupper surface 2211 of thecarrier 221 and the removable/sacrificial layer 2217. - With reference to
FIG. 13D , a portion of the encapsulatingmaterial 223 is removed by a laser process and thus a portion of the removable/sacrificial layer 2217 is exposed. The cutting gap formed by the laser substantially aligns with the position of theconductive layer 225. The encapsulatingmaterial 223 is divided into twoportions material 2230 is attached to theupper surface 2211 of thecarrier 221 and the removable/sacrificial layer 2217 and the portion of the encapsulatingmaterial 2239 is attached to the removable/sacrificial layer 2217. - With reference to
FIG. 13E , the removable/sacrificial layer 2217 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 2239 attached to the removable/sacrificial layer 2217 is removed (e.g. while removing the removable/sacrificial layer 2217). After removing the removable/sacrificial layer 2217 and the portion of the encapsulatingmaterial 2239, the portion of the encapsulatingmaterial 2230 remains on thecarrier 221 and a portion of theupper surface 2211 thecarrier 211 and theconductive layer 225 are exposed. The portion of the encapsulatingmaterial 2230 is disposed on theupper surface 2211 of thecarrier 221. The portion of the encapsulatingmaterial 2230 has anupper surface 2231 and alower surface 2232 which is opposite to theupper surface 2231. Further, a portion of thelower surface 2232 is spaced from theconductive layer 225 and a portion of thelower surface 2232 is attached to theupper surface 2211 of thecarrier 221. There is a space between thelower surface 2232 and theconductive layer 225. - Moreover, the portion of the encapsulating
material 2230 has aside surface 2236. An angle L between theside surface 2236 and theupper surface 2231 ranges from about 90 degrees to about 110 degrees. - With reference to
FIG. 13F , ashield layer 227 is formed on theconductive layer 225 and the portion of the encapsulatingmaterial 2230. -
FIG. 14A ,FIG. 14B ,FIG. 14C ,FIG. 14D andFIG. 14E show a method of manufacturing asemiconductor device package 230 in accordance with another embodiment of the instant disclosure. As shown inFIG. 14A , acarrier 231 has anupper surface 2311 and includes aconductive layer 235. A portion of the top surface of theconductive layer 235 is exposed and recessed with respect to theupper surface 2311 of thecarrier 231. Further, since the portion of the top surface of theconductive layer 235 is exposed and recessed with respect to theupper surface 2311 of thecarrier 231, thecarrier 231 further hasside surfaces conductive layer 225 and adjacent to and angled (e.g. at about 90 degrees) with respect to theupper surface 2311 of thecarrier 231. - Further, with reference to
FIG. 14B , a glue is dispensed on theupper surface 2311 of thecarrier 231 and theconductive layer 235. Thus, a removable/sacrificial layer 2317 is formed on theupper surface 2311 and thecarrier 231 and theconductive layer 235. - With reference to
FIG. 14C , an encapsulatingmaterial 233 is disposed on thecarrier 231 and encapsulates the at least oneelectronic component 232 and the removable/sacrificial layer 2317. The encapsulatingmaterial 233 covers the at least oneelectronic component 232, theupper surface 2311 of thecarrier 231 and the removable/sacrificial layer 2317. - With reference to
FIG. 14D , a portion of the encapsulatingmaterial 233 is removed by a laser process and thus a portion of the removable/sacrificial layer 2317 and a portion of theupper surface 2311 of thecarrier 231 are exposed. Further, while using the laser to cut the encapsulatingmaterial 233, the laser contacts the portion of the removable/sacrificial layer 2317 and the portion of theupper surface 2311 of thecarrier 231 which are exposed after the portion of the encapsulatingmaterial 233 has been removed. The portion of theupper surface 2311 of thecarrier 231 contacted by the laser may be roughened by the laser. The encapsulatingmaterial 233 is divided into twoportions material 2330 is attached to theupper surface 2311 of thecarrier 231 and the portion of the encapsulatingmaterial 2339 is attached to the removable/sacrificial layer 2317. - With reference to
FIG. 14E , the removable/sacrificial layer 2317 is removed by physical methods or chemical methods, such as a water washing process. Further, the portion of the encapsulatingmaterial 2339 attached to the removable/sacrificial layer 2317 is removed (e.g. while removing the removable/sacrificial layer 2317). After removing the removable/sacrificial layer 2317 and the portion of the encapsulatingmaterial 2339, the portion of the encapsulatingmaterial 2330 remains on thecarrier 231 and a portion of theupper surface 2311 thecarrier 211 and theconductive layer 235 are exposed. As above mentioned, the laser directly contacts the portion of theupper surface 2311 while cutting the encapsulatingmaterial 233. Thus, asurface 2312 of thecarrier 231, which is between the portion of the encapsulatingmaterial 2330 and theconductive layer 235, has a roughness greater than a roughness of another portion of theupper surface 2311 of thecarrier 231 and greater than a roughness of the side surfaces 2313, 2314 of the carrier 231 (e.g., by a factor of about 1.3 or more, of about 1.5 or more, of about 2 or more, or greater). - Moreover, the portion of the encapsulating
material 2330 has aside surface 2336. An angle M between theside surface 2336 and theupper surface 2331 ranges from about 90 degrees to about 110 degrees. - Reference to the formation or positioning of a first feature over or on a second feature in the instant disclosure may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features, such that the first and second features may not be in direct contact.
- As used herein, the terms “approximately,” “substantially,” “substantial” and “about” are used to describe and account for small variations. When used in conjunction with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs precisely as well as instances in which the event or circumstance occurs to a close approximation. For example, when used in conjunction with a numerical value, the terms can refer to a range of variation of less than or equal to ±10% of that numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.
- For example, substantially parallel can refer to a range of angular variation relative to 0° of less than or equal to ±10°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. For example, substantially perpendicular can refer to a range of angular variation relative to 90° of less than or equal to ±10°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.
- Two surfaces can be deemed to be coplanar or substantially coplanar if a displacement between the two surfaces is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm. A surface can be deemed to be substantially flat if a displacement between a highest point and a lowest point of the surface is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm.
- As used herein, the singular terms “a,” “an,” and “the” may include plural referents unless the context clearly dictates otherwise.
- Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity and should be understood flexibly to include numerical values explicitly specified as limits of a range, but also to include all individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly specified.
- While the instant disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not limiting. It should be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the instant disclosure as defined by the appended claims. The illustrations may not be necessarily drawn to scale. There may be distinctions between the artistic renditions in the instant disclosure and the actual apparatus due to manufacturing processes and tolerances. There may be other embodiments of the instant disclosure which are not specifically illustrated. The specification and drawings are to be regarded as illustrative rather than restrictive. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the instant disclosure. All such modifications are intended to be within the scope of the claims appended hereto. While the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations may be combined, sub-divided, or re-ordered to form an equivalent method without departing from the teachings of the instant disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations are not limitations of the instant disclosure.
Claims (20)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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US16/409,665 US20200083132A1 (en) | 2018-09-07 | 2019-05-10 | Semiconductor device package |
CN201910753785.2A CN110890333A (en) | 2018-09-07 | 2019-08-15 | Semiconductor device package |
US17/876,468 US20220367308A1 (en) | 2018-09-07 | 2022-07-28 | Method of making a semiconductor device package |
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US201862728720P | 2018-09-07 | 2018-09-07 | |
US16/409,665 US20200083132A1 (en) | 2018-09-07 | 2019-05-10 | Semiconductor device package |
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US17/876,468 Continuation US20220367308A1 (en) | 2018-09-07 | 2022-07-28 | Method of making a semiconductor device package |
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US20200083132A1 true US20200083132A1 (en) | 2020-03-12 |
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US17/876,468 Pending US20220367308A1 (en) | 2018-09-07 | 2022-07-28 | Method of making a semiconductor device package |
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US17/876,468 Pending US20220367308A1 (en) | 2018-09-07 | 2022-07-28 | Method of making a semiconductor device package |
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US (2) | US20200083132A1 (en) |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20210118760A1 (en) * | 2019-10-17 | 2021-04-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package |
US20220061162A1 (en) * | 2020-08-24 | 2022-02-24 | At&S (China) Co. Ltd. | Component Carrier With Well-Defined Outline Sidewall Cut by Short Laser Pulse and/or Green Laser |
Family Cites Families (6)
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KR100475272B1 (en) * | 2002-06-29 | 2005-03-10 | 주식회사 하이닉스반도체 | Manufacturing Method of Semiconductor Device |
US7226873B2 (en) * | 2004-11-22 | 2007-06-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of improving via filling uniformity in isolated and dense via-pattern regions |
KR100723415B1 (en) * | 2005-12-08 | 2007-05-30 | 삼성전자주식회사 | Method of fabricating inkjet printhead |
US8430255B2 (en) * | 2009-03-19 | 2013-04-30 | Robert Bosch Gmbh | Method of accurately spacing Z-axis electrode |
US8519538B2 (en) * | 2010-04-28 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Laser etch via formation |
EP3589092A1 (en) * | 2018-06-29 | 2020-01-01 | INL - International Iberian Nanotechnology Laboratory | Foldable layered connection, and method for manufacturing a foldable layered connection |
-
2019
- 2019-05-10 US US16/409,665 patent/US20200083132A1/en not_active Abandoned
- 2019-08-15 CN CN201910753785.2A patent/CN110890333A/en active Pending
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2022
- 2022-07-28 US US17/876,468 patent/US20220367308A1/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20210118760A1 (en) * | 2019-10-17 | 2021-04-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package |
US11211302B2 (en) * | 2019-10-17 | 2021-12-28 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package |
US20220061162A1 (en) * | 2020-08-24 | 2022-02-24 | At&S (China) Co. Ltd. | Component Carrier With Well-Defined Outline Sidewall Cut by Short Laser Pulse and/or Green Laser |
Also Published As
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US20220367308A1 (en) | 2022-11-17 |
CN110890333A (en) | 2020-03-17 |
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