US20200044554A1 - Driver for switching gallium nitride (gan) devices - Google Patents
Driver for switching gallium nitride (gan) devices Download PDFInfo
- Publication number
- US20200044554A1 US20200044554A1 US16/052,479 US201816052479A US2020044554A1 US 20200044554 A1 US20200044554 A1 US 20200044554A1 US 201816052479 A US201816052479 A US 201816052479A US 2020044554 A1 US2020044554 A1 US 2020044554A1
- Authority
- US
- United States
- Prior art keywords
- low side
- high side
- supply
- gan device
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 285
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 274
- 238000000034 method Methods 0.000 claims description 42
- 239000003990 capacitor Substances 0.000 claims description 41
- 230000001276 controlling effect Effects 0.000 claims description 21
- 230000001105 regulatory effect Effects 0.000 claims description 20
- 230000003213 activating effect Effects 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 12
- 230000004913 activation Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- NDVLTYZPCACLMA-UHFFFAOYSA-N silver oxide Chemical compound [O-2].[Ag+].[Ag+] NDVLTYZPCACLMA-UHFFFAOYSA-N 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- OJIJEKBXJYRIBZ-UHFFFAOYSA-N cadmium nickel Chemical compound [Ni].[Cd] OJIJEKBXJYRIBZ-UHFFFAOYSA-N 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 229910001416 lithium ion Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052987 metal hydride Inorganic materials 0.000 description 1
- 239000010445 mica Substances 0.000 description 1
- 229910052618 mica group Inorganic materials 0.000 description 1
- QELJHCBNGDEXLD-UHFFFAOYSA-N nickel zinc Chemical compound [Ni].[Zn] QELJHCBNGDEXLD-UHFFFAOYSA-N 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 229910001923 silver oxide Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/06—Modifications for ensuring a fully conducting state
- H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0072—Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Definitions
- This disclosure relates to circuitry for driving Gallium Nitride (GaN) devices, particularly, GaN devices in half bridge switching applications.
- GaN Gallium Nitride
- Gallium Nitride (GaN) devices have desirable characteristics, which can make them more suitable compared to metal-oxide-semiconductor field-effect transistors (MOSFETs) in half bridge switching applications, especially when high frequencies and high efficiencies are needed.
- GaN devices can have a faster switching speed and/or a smaller package compared to MOSFETs.
- GaN devices can omit a parasitic body diode, which can result in no reverse recovery losses. Further, GaN devices are capable of reverse conduction. As such, GaN devices may omit an external anti-parallel diode.
- this disclosure is directed to a driver for Gallium Nitride (GaN) devices with a high side supply that is charged with a low side supply.
- the driver may be adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- the driver may charge the high side supply to a desired floating voltage without necessarily relying on additional components for post-regulation of the voltage output by the high side supply or clamping the voltage output by the high side supply.
- a device for switching GaN devices includes a high side driver adapted to control a high side GaN device using a high side supply, a low side driver adapted to control a low side GaN device using a low side supply, and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- a method for driving GaN devices includes controlling a high side GaN device using a high side supply, controlling a low side GaN device using a low side supply, and charging the high side supply with the low side supply when the low side driver activates the low side GaN device.
- a system for controlling a power converter includes a high side GaN device, a low side GaN device, a high side driver adapted to control the high side GaN device using a high side supply, a low side driver adapted to control the low side GaN device using a low side supply, and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- FIG. 1 is a block diagram illustrating a driver for Gallium Nitride (GaN) devices with a high side supply that is charged with a low side supply in accordance with one or more techniques of this disclosure.
- GaN Gallium Nitride
- FIG. 2 is a circuit diagram illustrating a first example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 3 is a circuit diagram illustrating a second example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 4 is a circuit diagram illustrating a third example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 5 is a circuit diagram illustrating a fourth example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 6 is a first illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 7 is a second illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 8 is a third illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- FIG. 9 is a flow diagram for a method for driving GaN devices in accordance with one or more techniques of this disclosure.
- a difficulty when driving Gallium Nitride (GaN) Enhancement High-electron-mobility transistor (e-HEMTs) is the narrow gate voltage range ( ⁇ 4V/+6V typical) of GaN e-HEMTs compared to metal-oxide-semiconductor field-effect transistors (MOSFETs).
- Another characteristic of a GaN e-HEMT is that reverse current flow with the Voltage Gate to Source “V GS ” less than zero (e.g., V GS ⁇ 0 V) is “diode-like” and establishes when the gate voltage with respect to the drain exceeds a voltage threshold “V th ” of the GaN e-HEMT.
- V th voltage threshold
- V SG is the Voltage Source to Gate
- V GD is the Voltage Gate to Drain
- I is the current at the GaN e-HEMT
- Rev_ON is the resistance of the GaN e-HEMT.
- the Voltage Source to Drain “V SD ” is typically higher than the voltage threshold of a silicon power MOSFET.
- GaN e-HEMTs may be turned off with a negative Voltage Gate to Source “V GS ”, further increasing the Voltage Source to Drain “V SD ” needed by the GaN e-HEMT device to operate in reverse.
- Such GaN e-HEMT characteristics may be undesirable in applications in which low side free-wheeling is used, such as, but not limited to, half bridge switching applications using a high side GaN e-HEMT device and a low side GaN e-HEMT device.
- a positive inductor current is forced to flow on the low side, which goes into reverse conduction, which results in the switching node voltage being equal to Voltage Drain to Source “V DS ” voltage of the low side GaN e-HEMT “T L ” during dead switching.
- the negative voltage at the switching node e.g. the high side driver floating ground
- additional post-regulation circuitry is used to regulate a bootstrap voltage to avoid damaging the GaN e-HEMT while preserving driving capabilities.
- additional external (or internal) Zener diodes (plus a resistor) is used to clamp bootstrap voltage to avoid damaging the GaN e-HEMT while preserving driving capabilities.
- an additional series switch with its body diode back-to-back connected to the bootstrap diode is used to cut out the recharge path when the low side GaN e-HEMT device is OFF (e.g., operating in an open state).
- a driver may include high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- a driver may be adapted to connect a bootstrap diode to the low side GaN e-HEMT gate re-using the already existing gate pull-up pMOS as a blocking switch, optimizing the synchronization between low side GaN e-HEMT turn-on and bootstrap capacitor recharge path activation, thus protecting the application against bootstrap overcharge with no extra pin and silicon cost.
- Some advantages of including such high side charge circuitry may include, but are not limited to, for example, an optimal timing between low side turn-on and bootstrap capacitor recharge path activation, no additional external or internal components, and no additional driver pins.
- FIG. 1 is a block diagram illustrating a driver for GaN devices with a high side supply that is charged with a low side supply in accordance with one or more techniques of this disclosure.
- FIG. 1 shows system 100 which includes low side supply 102 , low side driver 104 , low side GaN device 106 , high side charge circuitry 110 , high side supply 112 , high side driver 114 , high side GaN device 116 , and converter elements 124 .
- System 100 may include additional components than those shown.
- system 100 may be implemented as a single or multiple integrated circuit (IC) packages.
- IC integrated circuit
- Low side supply 102 may be configured to provide electrical power to one or more other components of system 100 .
- low side supply 102 may be configured to supply a charge at a gate of low side GaN device 106 .
- low side supply 102 may be an output of a power converter, power inverter, regulator, or other power conversion circuitry.
- low side supply 102 may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, a linear regulator, or other power conversion circuitry.
- DC direct current
- AC alternating current
- Low side driver 104 may be adapted to control low side GaN device 106 using low side supply 102 .
- low side driver 104 may include switching elements that couple a gate of low side GaN device 106 to a positive terminal of low side supply 102 or a negative terminal (e.g., ground) of low side supply 102 .
- switching elements may include, but are not limited to, junction field-effect transistor (JFET), metal-oxide-semiconductor Field-Effect-Transistor (MOSFET), dual-gate MOSFET, insulated-gate bipolar transistor (IGBT), any other type of FET, or any combination of the switching elements.
- JFET junction field-effect transistor
- MOSFET metal-oxide-semiconductor Field-Effect-Transistor
- IGBT insulated-gate bipolar transistor
- MOSFETS may include, but are not limited to, p-channel MOSFET (pMOS), n-channel MOSFET (nMOS), double diffused MOSFET (DMOS), or any other type of MOSFET, or any combination of the same.
- a switching element may comprise a high-electron mobility transistor, a GaN based transistor, or another switching element. Other materials may also be used to realize a switching element.
- Low side driver 104 may include low side driving circuitry adapted to selectively drive switching elements to couple a gate of low side GaN device 106 to a positive terminal of low side supply 102 or a negative terminal (e.g., ground) of low side supply 102 .
- Low side driving circuitry may comprise a modulation (e.g., pulse-width modulation) controller.
- low side driving circuitry may output, to the switching elements, a high signal (e.g., logical ‘1’) during a first portion of a pulse-width modulation cycle to cause switching elements to couple a gate of low side GaN device 106 to a positive terminal of low side supply 102 .
- low side driving circuitry may output, to switching elements, a low signal (e.g., logical ‘0’) during a second portion of a pulse-width modulation cycle to cause switching elements to couple a gate of low side GaN device 106 to a negative terminal of low side supply 102 .
- low side driving circuitry may output, to switching elements, one or more dead-time signal during a third portion of a pulse-width modulation cycle to cause switching elements to decouple a gate of low side GaN device 106 from the low side supply 102 .
- Low side driving circuitry may comprise any suitable arrangement of hardware, software, firmware, or any combination thereof.
- Low side driving circuitry may include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components.
- DSPs digital signal processors
- ASICs application specific integrated circuits
- FPGAs field programmable gate arrays
- Low side driving circuitry may further include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units.
- a processing unit may include one or more microprocessors, DSPs, ASICs, FPGAs, or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components.
- High side supply 112 may be adapted to provide electrical power to one or more other components of system 100 .
- high side supply 112 may be adapted to supply a charge at a gate of high side GaN device 116 .
- high side supply 112 may be floating.
- high side supply 112 may have a negative terminal that has a voltage different from a ground of system 100 (e.g., a negative terminal of low side supply 102 ).
- high side supply 112 includes a capacitor.
- a capacitor may include, an electrical component adapted to store electrical energy in an electric field.
- Examples of an electrical component configured to store electrical energy in an electric field may include, but are not limited to, ceramic capacitors, film capacitors, electrolytic capacitors (e.g., aluminum, tantalum, niobium, or the like), super capacitors (e.g., double layer, pseudocapacitors, hybrid capacitors), mica capacitors, or another capacitor.
- a capacitor may be an array of capacitive elements.
- high side supply 112 may include a capacitor formed of an array of capacitive elements coupled in parallel and/or series.
- each capacitive element may be a discrete component, while in other instances, each one of the capacitive elements may be contained within a single package (e.g., capacitor array).
- High side driver 114 may include high side driving circuitry adapted to selectively drive switching elements to couple a gate of high side GaN device 116 to a positive terminal of high side supply 112 or a negative terminal of high side supply 112 .
- High side driving circuitry may comprise a modulation (e.g., pulse-width modulation) controller.
- high side driving circuitry may output, to the switching elements, a high signal (e.g., logical ‘1’) during a first portion of a pulse-width modulation cycle to cause switching elements to couple a gate of high side GaN device 116 to a positive terminal of high side supply 112 .
- high side driving circuitry may output, to switching elements, a low signal (e.g., logical ‘0’) during a second portion of a pulse-width modulation cycle to cause switching elements to couple a gate of high side GaN device 116 to a negative terminal of high side supply 112 .
- high side driving circuitry may output, to switching elements, one or more dead-time signal during a third portion of a pulse-width modulation cycle to cause switching elements to decouple a gate of high side GaN device 116 from the high side supply 112 .
- High side driving circuitry may comprise any suitable arrangement of hardware, software, firmware, or any combination thereof.
- High side driving circuitry may include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components.
- DSPs digital signal processors
- ASICs application specific integrated circuits
- FPGAs field programmable gate arrays
- low side driving circuitry may further include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units.
- High side charge circuitry 110 may be adapted to charge high side supply 112 with low side supply 102 when low side driver 104 activates low side GaN device 106 .
- high side charge circuitry 110 may be adapted to prevent current from flowing from high side supply 112 to low side driver 104 and to permit current to flow from low side driver 104 to high side supply 112 .
- high side charge circuitry 110 may be configured to generate a channel that electronically couples low side supply 102 to high side supply 112 when low side driver 104 activates low side GaN device 106 .
- high side charge circuitry may be coupled to an output of low side driver 104 and/or a gate of low side GaN device 106 .
- high side charge circuitry 110 may include a diode that prevents current from flowing from high side supply 112 to low side supply 102 and permits current to flow from low side supply 102 to high side supply 112 .
- high side charge circuitry 110 may include a switch that is selectively activated to prevent current from flowing from high side supply 112 to low side supply 102 and to permit current to flow from low side supply 102 to high side supply 112 .
- Converter elements 124 may be adapted to provide a target voltage, current, or power at a load.
- Converter elements 124 may include, for example, one or more of a capacitor, an inductor, a resistor, a transformer, a sensor, or another converter element.
- a load is coupled to converter elements 124 that is configured to receive the target voltage, current, or power output by converter elements 124 .
- high side charge circuitry 110 is adapted to charge high side supply 112 with low side supply 102 when low side driver 104 activates low side GaN device 106 .
- low side driver 104 couples a gate of low side GaN device 106 to a positive terminal of low side driver 104
- high side charge circuitry 110 may couple a positive terminal of high side supply 112 to the positive terminal of low side driver 104 .
- low side GaN device 106 forms a channel that couples the negative terminal of low side supply 102 and high side supply 112 such that low side supply 102 charges high side supply 112 .
- low side GaN device 106 forms a channel that couples the negative terminal of low side supply 102 and high side supply 112 such that high side supply 112 charges a capacitor of high side supply 112 .
- FIG. 2 is a circuit diagram illustrating a first example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- system 200 includes low side supply 202 , low side driver 204 , low side GaN device 206 , high side charge circuitry 210 , high side supply 212 , high side driver 214 , high side GaN device 216 , and converter elements 224 .
- System 200 may include additional components than those shown. In some examples, system 200 may be implemented as a single or multiple IC packages.
- Low side supply 202 , low side driver 204 , and low side GaN device 206 may be examples of low side supply 102 , low side driver 104 , low side GaN device 106 , respectively.
- High side supply 212 , high side driver 214 , and high side GaN device 216 are examples of high side supply 112 , high side driver 114 , and high side GaN device 116 , respectively.
- high side supply 212 may include a capacitive element (e.g., capacitor).
- High side charge circuitry 210 is an example of high side charge circuitry 110 and converter elements 224 is an example of converter elements 124 .
- converter elements 224 may include an inductor.
- FIG. 2 is described in the context of FIG. 1 for exemplary purposes only.
- high side GaN device 216 includes a control node coupled to high side driver 214 , a first node coupled to positive terminal 215 of a power converter supply, and a second node coupled to one or more converter elements 224 for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current.
- low side GaN device 206 includes a control node coupled to low side driver 204 , a first node coupled to one or more converter elements 224 , and a second node coupled to negative terminal 217 of the power converter supply.
- the power converter supply may be an output of a linear regulator, power converter, power inverter, or another regulated voltage supply.
- the power converter supply may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, or another regulated voltage supply.
- the power converter supply may include a battery which may be configured to store electrical energy. Examples of batteries may include, but are not limited to, nickel-cadmium, lead-acid, nickel-metal hydride, nickel-zinc, silver-oxide, lithium-ion, lithium polymer, any other type of rechargeable battery, or any combination of batteries.
- Low side supply 202 includes regulated voltage supply 230 coupled in parallel with capacitor 232 .
- Regulated voltage supply 230 may be an output of a linear regulator, power converter, power inverter, or another regulated voltage supply.
- regulated voltage supply 230 may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, or another regulated voltage supply.
- Regulated voltage supply 230 may include a battery which may be configured to store electrical energy.
- Low side driver 204 includes first low side switching element 234 , second low side switching element 236 , and low side driving circuitry 238 .
- First low side switching element 234 includes a first node coupled to a positive terminal of low side supply 202 , a second node coupled to a control node of low side GaN device 206 , and a control node.
- Second low side switching element 236 includes a first node coupled to the control node of low side GaN device 206 , a second node coupled to the negative terminal of low side supply 202 , and a control node.
- the control node of first low side switching element 234 and/or the control node of second low side switching element 236 may be coupled to low side driving circuitry 238 .
- Low side driving circuitry 238 may be adapted to generate a first control signal at the control node of first low side switching element 234 to cause first low side switching element 234 to establish the first low side channel between the positive terminal of low side supply 202 and the control node of low side GaN device 206 to activate low side GaN device 206 .
- low side driving circuitry 238 may be adapted to generate a second control signal at the control node of second low side switching element 236 to cause second low side switching element 236 to establish the second low side channel between the negative terminal of low side supply 202 and the control node of low side GaN device 206 to deactivate low side GaN device 206 .
- High side driver 214 includes first high side switching element 244 , second high side switching element 246 , and high side driving circuitry 248 .
- First high side switching element 244 includes a first node coupled to a positive terminal of high side supply 212 , a second node coupled to a control node of high side GaN device 216 , and a control node.
- Second high side switching element 246 includes a first node coupled to the control node of high side GaN device 216 , a second node coupled to the negative terminal of high side supply 212 , and a control node.
- the control node of first high side switching element 244 and/or the control node of second high side switching element 246 may be coupled to high side driving circuitry 248 .
- High side driving circuitry 248 may be adapted to generate a first control signal at the control node of first high side switching element 244 to cause first high side switching element 244 to establish the first high side channel between the positive terminal of high side supply 212 and the control node of high side GaN device 216 to activate high side GaN device 216 .
- high side driving circuitry 248 may be adapted to generate a second control signal at the control node of second high side switching element 246 to cause second high side switching element 246 to establish the second high side channel between the negative terminal of high side supply 212 and the control node of high side GaN device 216 to deactivate high side GaN device 216 .
- High side charge circuitry 210 includes diode 250 .
- diode 250 includes an anode coupled low side driver 204 and a cathode coupled to high side supply 212 to prevent current from flowing from high side supply 212 to low side driver 204 and to permit current to flow from low side driver 204 to high side supply 212 .
- high side charge circuitry 210 is adapted to charge high side supply 212 with low side supply 202 when low side driver 204 activates low side GaN device 206 .
- diode 250 may couple low side driver 204 to the positive terminal of high side supply 212 .
- low side GaN device 206 forms a channel that couples the negative terminal of low side supply 202 and the negative terminal of high side supply 212 such that low side supply 202 charges high side supply 212 .
- low side GaN device 206 forms a channel that couples the negative terminal of low side supply 202 and the negative terminal of high side supply 212 such that low side supply 202 charges a capacitor of high side supply 212 .
- FIG. 3 is a circuit diagram illustrating a second example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- system 300 includes low side supply 302 , low side driver 304 , low side GaN device 306 , high side charge circuitry 310 , high side supply 312 , high side driver 314 , high side GaN device 316 , and converter elements 324 , which may be substantially similar to low side supply 202 , low side driver 204 , low side GaN device 206 , high side charge circuitry 210 , high side supply 212 , high side driver 214 , high side GaN device 216 , and converter elements 224 , respectively.
- system 300 further includes low side discharge circuitry 308 and high side discharge circuitry 318 .
- System 300 may include additional components than those shown.
- system 300 may be implemented as a single or multiple IC packages.
- FIG. 3 is described in the context of FIG. 1 for exemplary purposes only.
- Low side discharge circuitry 308 is adapted to reduce current flow from low side driver 304 to low side GaN device 306 and to refrain from reducing current flow from low side GaN device 306 to low side driver 304 .
- Low side discharge circuitry 308 may include resistor 352 , diode 354 , and resistor 356 . As shown, a first side of low side discharge circuitry 308 is coupled to low side driver 304 and a second side of low side discharge circuitry 308 is coupled to low side GaN device 306 .
- the first side of low side discharge circuitry 308 is coupled to a cathode of diode 354 and a first node of resistor 352 .
- the anode of diode 354 is coupled to a first node of resistor 356 .
- the second side of low side discharge circuitry 308 is coupled to a second node of resistor 356 and a second side of resistor 352 .
- High side discharge circuitry 318 may be adapted to reduce current flow from high side driver 314 to high side GaN device 316 and to refrain from reducing current flow from high side GaN device 316 to high side driver 314 .
- High side discharge circuitry 318 may include a first resistor, a diode, and a second resistor arranged similarly to low side discharge circuitry 308 .
- high side charge circuitry 310 is adapted to charge high side supply 312 with low side supply 302 when low side driver 304 activates low side GaN device 306 .
- low side driver 304 couples a gate of low side GaN device 306 to a positive terminal of low side supply 302
- high side charge circuitry 310 may couple the gate of low side GaN device 306 to the positive terminal of high side supply 312 .
- low side GaN device 306 forms a channel that couples the negative terminal of low side supply 302 and the negative terminal of high side supply 312 such that low side supply 302 charges high side supply 312 .
- FIG. 4 is a circuit diagram illustrating a third example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- system 400 includes low side supply 402 , low side driver 404 , low side GaN device 406 , high side supply 412 , high side driver 414 , high side GaN device 416 , and converter elements 424 , which may be substantially similar to low side supply 202 , low side driver 204 , low side GaN device 206 , high side supply 212 , high side driver 214 , high side GaN device 216 , and converter elements 224 , respectively.
- System 400 further includes high side charge circuitry 410 .
- System 400 may include additional components than those shown. In some examples, system 400 may be implemented as a single or multiple IC packages.
- FIG. 4 is described in the context of FIG. 1 for exemplary purposes only.
- High side charge circuitry 410 includes switching element 460 and active switching circuitry 462 .
- Switching element 460 includes a first node coupled high side supply 412 and a second node coupled to low side driver 404 and/or low side GaN device 406 .
- Active switching circuitry 462 may be adapted to selectively activate switching element 460 to prevent current from flowing from high side supply 412 to low side driver 404 and to permit current to flow from low side driver 404 to high side supply 412 .
- high side charge circuitry 410 is adapted to charge high side supply 412 with low side supply 402 when low side driver 404 activates low side GaN device 406 .
- active switching circuitry 462 drives switching element 460 to couple the gate of low side GaN device 406 to the positive terminal of high side supply 412 .
- low side GaN device 406 forms a channel that couples the negative terminal of low side supply 402 and the negative terminal of high side supply 412 such that low side supply 402 charges high side supply 412 .
- FIG. 5 is a circuit diagram illustrating a fourth example of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- system 500 includes low side supply 502 , low side driver 504 , low side GaN device 506 , high side charge circuitry 510 , high side supply 512 , high side driver 514 , high side GaN device 516 , and converter elements 524 , which may be substantially similar to low side supply 402 , low side driver 404 , low side GaN device 406 , high side charge circuitry 410 , high side supply 412 , high side driver 414 , high side GaN device 416 , and converter elements 424 , respectively.
- system 500 further includes low side discharge circuitry 508 and high side discharge circuitry 518 .
- System 500 may include additional components than those shown.
- system 500 may be implemented as a single or multiple IC packages.
- FIG. 5 is described in the context of FIGS. 1 and 4 for exemplary purposes only.
- Low side discharge circuitry 508 is adapted to reduce current flow from low side driver 504 to low side GaN device 506 and to refrain from reducing current flow from low side GaN device 506 to low side driver 504 .
- Low side discharge circuitry 508 may include resistor 552 , diode 554 , and resistor 556 . As shown, a first side of low side discharge circuitry 508 is coupled to low side driver 504 and a second side of low side discharge circuitry 508 is coupled to low side GaN device 506 .
- the first side of low side discharge circuitry 508 is coupled to a cathode of diode 554 and a first node of resistor 552 .
- the anode of diode 554 is coupled to a first node of resistor 556 .
- the second side of low side discharge circuitry 508 is coupled to a second node of resistor 556 and a second side of resistor 552 .
- High side discharge circuitry 518 may be adapted to reduce current flow from high side driver 514 to high side GaN device 516 and to refrain from reducing current flow from high side GaN device 516 to high side driver 514 .
- High side discharge circuitry 518 may include a first resistor, a diode, and a second resistor arranged similarly to low side discharge circuitry 508 .
- high side charge circuitry 510 is adapted to charge high side supply 512 with low side supply 502 when low side driver 504 activates low side GaN device 506 .
- high side charge circuitry 510 may couple the gate of low side GaN device 506 to the positive terminal of high side supply 512 .
- low side GaN device 506 forms a channel that couples the negative terminal of low side supply 502 and the negative terminal of high side supply 512 such that low side supply 502 charges high side supply 512 .
- FIG. 6 is a first illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- the abscissa axis (e.g., horizontal) of FIG. 6 represents time and the ordinate axis (e.g., vertical) of FIG. 6 represents a converter voltage (SWN) 602 at an input to converter elements 124 , a high side switching voltage (HX-SWN) 604 at a gate of high side GaN device 116 , a low side switching voltage (LX) 606 at a gate of low side GaN device 106 , and a bootstrap voltage 608 (Bootstrap_Diode) at high side charge circuitry 110 .
- SWN converter voltage
- HX-SWN high side switching voltage
- LX low side switching voltage
- Bootstrap_Diode bootstrap voltage
- converter voltage 602 is negative during dead-times 610 , for example, due to free-wheeling inductor current flow.
- bootstrap voltage 608 illustrates that high side charge circuitry 110 blocks a charging of high side supply 112 during dead-times 610 . In this way, high side charge circuitry 110 may avoid overcharging of high side supply 112 in a presence of low side free-wheeling inductor current flow.
- FIG. 7 is a second illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- the abscissa axis (e.g., horizontal) of FIG. 7 represents time and the ordinate axis (e.g., vertical) of FIG. 7 represents an inductor current 702 at converter elements 124 , converter voltage 704 at an input to converter elements 124 , a high side supply voltage 706 at high side supply 112 , a bootstrap voltage 708 at high side charge circuitry 110 , and gate-to-source voltage 710 at high side GaN device 116 .
- high side supply voltage 706 remains less than a maximum GaN voltage rating of 5 volts, thereby resulting in gate-to-source voltage 710 being less than the maximum GaN voltage rating.
- techniques described here may prevent an overcharge of high side supply 112 above the maximum rating of GaN Voltage Source to Gate “V GS ”.
- FIG. 8 is a third illustration of a performance of the driver of FIG. 1 in accordance with one or more techniques of this disclosure.
- the abscissa axis (e.g., horizontal) of FIG. 8 represents time and the ordinate axis (e.g., vertical) of FIG. 8 represents converter voltage 802 at an input to converter elements 124 , a bootstrap voltage 804 at high side charge circuitry 110 , a low side switching voltage 806 at a gate of low side GaN device 106 , and a low side driving voltage 808 output by low side driver 104 .
- first low side switching element 234 e.g., a pull-up pMOS
- first low side switching element 234 e.g., a pull-up pMOS
- VCC low side supply 102
- first low side switching element 234 e.g., a pull-up pMOS
- ON e.g., activated
- converter voltage 802 is not dangerous because low side GaN device 106 is turned ON (e.g., activated).
- system 100 may help to achieve a desired timing between low side turn-on of low side GaN device 106 and the bootstrap cap recharge path activation, even in a presence of additional external components on the gate driving path.
- FIG. 9 is a flow diagram for a method for driving GaN devices in accordance with one or more techniques of this disclosure.
- FIG. 9 is described in the context of FIGS. 1-8 for exemplary purposes only.
- low side driver 104 controls low side GaN device 106 using low side supply 102 ( 902 ).
- High side driver 114 control high side GaN device 116 using high side supply 112 ( 904 ).
- High side charge circuitry 110 charges high side supply 112 with low side supply 102 when low side driver 104 activates low side GaN device 106 ( 906 ).
- a device for switching Gallium Nitride (GaN) devices comprising: a high side driver adapted to control a high side GaN device using a high side supply; a low side driver adapted to control a low side GaN device using a low side supply; and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- GaN Gallium Nitride
- the high side charge circuitry is adapted to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- the high side charge circuitry comprises a diode comprising an anode coupled the low side driver and a cathode coupled to the high side supply to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- the high side charge circuitry comprises: a switching element comprising a first node coupled the high side supply and a second node coupled to the low side driver; and active switching circuitry adapted to selectively activate the switching element to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- the low side supply comprises a capacitor coupled in parallel with a voltage source; and wherein the high side supply comprises a capacitor.
- the device of any combination of examples 1-5 comprising one or more of: low side discharge circuitry adapted to reduce current flow from the low side driver to the low side GaN device and to refrain from reducing current flow from the low side GaN device to the low side driver; or high side discharge circuitry adapted to reduce current flow from the high side driver to the high side GaN device and to refrain from reducing current flow from the high side GaN device to the high side driver.
- the low side driver is adapted to establish a first low side channel between a positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and to establish a second low side channel between a negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device; and wherein the high side driver is adapted to establish a first high side channel between a positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and to establish a second high side channel between a negative terminal of the high side supply and the low side GaN device to deactivate the high side GaN device.
- the low side driver comprises: a first low side switching element comprising a first node coupled to the positive terminal of the low side supply, a second node coupled to the low side GaN device, and a control node; a second low side switching element comprising a first node coupled to the low side GaN device, a second node coupled to the negative terminal of the low side supply, and a control node; and low side driving circuitry adapted to generate a first control signal at the control node of the first low side switching element to cause the first low side switching element to establish the first low side channel between the positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and to generate a second control signal at the control node of the second low side switching element to cause the second low side switching element to establish the second low side channel between the negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device.
- the high side driver comprises: a first high side switching element comprising a first node coupled to the positive terminal of the high side supply, a second node coupled to the high side GaN device, and a control node; a second high side switching element comprising a first node coupled to the high side GaN device, a second node coupled to the negative terminal of the high side supply, and a control node; and high side driving circuitry adapted to generate a first control signal at the control node of the first high side switching element to cause the first high side switching element to establish the first high side channel between the positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and to generate a second control signal at the control node of the second high side switching element to cause the second high side switching element to establish the second high side channel between the negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- the high side GaN device comprises a control node coupled to the high side driver, a first node coupled to a positive terminal of a power converter supply, and a second node coupled to one or more converter elements for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current; and wherein the low side GaN device comprises a control node coupled to the low side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter supply.
- a method for driving a Gallium Nitride (GaN) devices comprising: controlling a high side GaN device using a high side supply; controlling a low side GaN device using a low side supply; and charging the high side supply with the low side supply when the low side driver activates the low side GaN device.
- GaN Gallium Nitride
- charging the high side supply comprises: preventing current from flowing from the high side supply to the low side driver; and permitting current to flow from the low side driver to the high side supply.
- charging the high side voltage comprises: selectively activating a switching element to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- the low side supply comprises a capacitor coupled in parallel with a voltage source; and wherein the high side supply comprises a capacitor.
- controlling the high side GaN device comprises reducing current flow from the high side driver to the high side GaN device and refraining from reducing current flow from the high side GaN device to the high side driver; and wherein controlling the low side GaN device comprises reducing current flow from the low side driver to the low side GaN device and refraining from reducing current flow from the low side GaN device to the low side driver.
- controlling the low side GaN device comprises establishing a first low side channel between a positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and establishing a second low side channel between a negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device; and wherein controlling the high side GaN device comprises establishing a first high side channel between a positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and establishing a second high side channel between a negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- controlling the low side GaN device comprises: generating a control signal at a control node of a first low side switching element to cause the first low side switching element to establish the first low side channel between the positive terminal of the low side supply and the low side GaN device to activate the low side GaN device; and generating a second control signal at a control node of a second low side switching element to cause the second low side switching element to establish the second low side channel between the negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device.
- controlling the high side GaN device comprises: generating a first control signal at a control node of a first high side switching element to cause the first high side switching element to establish the first high side channel between the positive terminal of the high side supply and the high side GaN device to activate the high side GaN device; and generating a second control signal at a control node of a second high side switching element to cause the second high side switching element to establish the second high side channel between the negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- the high side GaN device comprises a control node coupled to the high side driver, a first node coupled to a positive terminal of a power converter supply, and a second node coupled to one or more converter elements for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current; and wherein the low side GaN device comprises a control node coupled to the low side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter supply.
- a system for controlling a power converter comprising: a high side GaN device; a low side GaN device; a high side driver adapted to control the high side GaN device using a high side supply; a low side driver adapted to control the low side GaN device using a low side supply; and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Conversion In General (AREA)
- Dc-Dc Converters (AREA)
- Inverter Devices (AREA)
Abstract
Description
- This disclosure relates to circuitry for driving Gallium Nitride (GaN) devices, particularly, GaN devices in half bridge switching applications.
- Gallium Nitride (GaN) devices have desirable characteristics, which can make them more suitable compared to metal-oxide-semiconductor field-effect transistors (MOSFETs) in half bridge switching applications, especially when high frequencies and high efficiencies are needed. For example GaN devices can have a faster switching speed and/or a smaller package compared to MOSFETs. Moreover, GaN devices can omit a parasitic body diode, which can result in no reverse recovery losses. Further, GaN devices are capable of reverse conduction. As such, GaN devices may omit an external anti-parallel diode.
- In general, this disclosure is directed to a driver for Gallium Nitride (GaN) devices with a high side supply that is charged with a low side supply. For example, the driver may be adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device. In this way, the driver may charge the high side supply to a desired floating voltage without necessarily relying on additional components for post-regulation of the voltage output by the high side supply or clamping the voltage output by the high side supply.
- In an example, a device for switching GaN devices includes a high side driver adapted to control a high side GaN device using a high side supply, a low side driver adapted to control a low side GaN device using a low side supply, and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- In another example, a method for driving GaN devices includes controlling a high side GaN device using a high side supply, controlling a low side GaN device using a low side supply, and charging the high side supply with the low side supply when the low side driver activates the low side GaN device.
- In another example, a system for controlling a power converter includes a high side GaN device, a low side GaN device, a high side driver adapted to control the high side GaN device using a high side supply, a low side driver adapted to control the low side GaN device using a low side supply, and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- Details of these and other examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.
-
FIG. 1 is a block diagram illustrating a driver for Gallium Nitride (GaN) devices with a high side supply that is charged with a low side supply in accordance with one or more techniques of this disclosure. -
FIG. 2 is a circuit diagram illustrating a first example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 3 is a circuit diagram illustrating a second example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 4 is a circuit diagram illustrating a third example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 5 is a circuit diagram illustrating a fourth example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 6 is a first illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 7 is a second illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 8 is a third illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. -
FIG. 9 is a flow diagram for a method for driving GaN devices in accordance with one or more techniques of this disclosure. - A difficulty when driving Gallium Nitride (GaN) Enhancement High-electron-mobility transistor (e-HEMTs) is the narrow gate voltage range (−4V/+6V typical) of GaN e-HEMTs compared to metal-oxide-semiconductor field-effect transistors (MOSFETs). Another characteristic of a GaN e-HEMT is that reverse current flow with the Voltage Gate to Source “VGS” less than zero (e.g., VGS≤0 V) is “diode-like” and establishes when the gate voltage with respect to the drain exceeds a voltage threshold “Vth” of the GaN e-HEMT. An example of the Voltage Source to Drain “VSD” follows.
-
V SD =V SG +V GD =−V GS +V th +I*R rev_ON (equation 1) - where “VSG” is the Voltage Source to Gate, “VGD” is the Voltage Gate to Drain, “I” is the current at the GaN e-HEMT, and “Rrev_ON” is the resistance of the GaN e-HEMT.
- Given that the voltage threshold “Vth” is in the range 1.5 V-2 V, the Voltage Source to Drain “VSD” is typically higher than the voltage threshold of a silicon power MOSFET. For high voltage and high dV/dt kW applications, GaN e-HEMTs may be turned off with a negative Voltage Gate to Source “VGS”, further increasing the Voltage Source to Drain “VSD” needed by the GaN e-HEMT device to operate in reverse.
- Such GaN e-HEMT characteristics may be undesirable in applications in which low side free-wheeling is used, such as, but not limited to, half bridge switching applications using a high side GaN e-HEMT device and a low side GaN e-HEMT device. For example, when the high side GaN e-HEMT “TH” is turned off, a positive inductor current is forced to flow on the low side, which goes into reverse conduction, which results in the switching node voltage being equal to Voltage Drain to Source “VDS” voltage of the low side GaN e-HEMT “TL” during dead switching. In bootstrap capacitor based high side drivers, the negative voltage at the switching node (e.g. the high side driver floating ground) may overcharge the bootstrap capacitor above the maximum rating of GaN Voltage Source to Gate “VGS,” which may result in damage to the high side GaN e-HEMT device.
- In some systems, additional post-regulation circuitry is used to regulate a bootstrap voltage to avoid damaging the GaN e-HEMT while preserving driving capabilities. In other systems, additional external (or internal) Zener diodes (plus a resistor) is used to clamp bootstrap voltage to avoid damaging the GaN e-HEMT while preserving driving capabilities. In yet further systems, an additional series switch with its body diode back-to-back connected to the bootstrap diode is used to cut out the recharge path when the low side GaN e-HEMT device is OFF (e.g., operating in an open state).
- In accordance with one or more techniques described herein, a driver may include high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device. For example, a driver may be adapted to connect a bootstrap diode to the low side GaN e-HEMT gate re-using the already existing gate pull-up pMOS as a blocking switch, optimizing the synchronization between low side GaN e-HEMT turn-on and bootstrap capacitor recharge path activation, thus protecting the application against bootstrap overcharge with no extra pin and silicon cost. Some advantages of including such high side charge circuitry may include, but are not limited to, for example, an optimal timing between low side turn-on and bootstrap capacitor recharge path activation, no additional external or internal components, and no additional driver pins.
-
FIG. 1 is a block diagram illustrating a driver for GaN devices with a high side supply that is charged with a low side supply in accordance with one or more techniques of this disclosure.FIG. 1 showssystem 100 which includeslow side supply 102,low side driver 104, low side GaNdevice 106, highside charge circuitry 110,high side supply 112,high side driver 114, high side GaNdevice 116, andconverter elements 124.System 100 may include additional components than those shown. In some examples,system 100 may be implemented as a single or multiple integrated circuit (IC) packages. -
Low side supply 102 may be configured to provide electrical power to one or more other components ofsystem 100. For instance,low side supply 102 may be configured to supply a charge at a gate of low side GaNdevice 106. In some examples,low side supply 102 may be an output of a power converter, power inverter, regulator, or other power conversion circuitry. For instance,low side supply 102 may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, a linear regulator, or other power conversion circuitry. -
Low side driver 104 may be adapted to control lowside GaN device 106 usinglow side supply 102. For example,low side driver 104 may include switching elements that couple a gate of lowside GaN device 106 to a positive terminal oflow side supply 102 or a negative terminal (e.g., ground) oflow side supply 102. Examples of switching elements may include, but are not limited to, junction field-effect transistor (JFET), metal-oxide-semiconductor Field-Effect-Transistor (MOSFET), dual-gate MOSFET, insulated-gate bipolar transistor (IGBT), any other type of FET, or any combination of the switching elements. Examples of MOSFETS may include, but are not limited to, p-channel MOSFET (pMOS), n-channel MOSFET (nMOS), double diffused MOSFET (DMOS), or any other type of MOSFET, or any combination of the same. In some examples, a switching element may comprise a high-electron mobility transistor, a GaN based transistor, or another switching element. Other materials may also be used to realize a switching element. -
Low side driver 104 may include low side driving circuitry adapted to selectively drive switching elements to couple a gate of lowside GaN device 106 to a positive terminal oflow side supply 102 or a negative terminal (e.g., ground) oflow side supply 102. Low side driving circuitry may comprise a modulation (e.g., pulse-width modulation) controller. For example, low side driving circuitry may output, to the switching elements, a high signal (e.g., logical ‘1’) during a first portion of a pulse-width modulation cycle to cause switching elements to couple a gate of lowside GaN device 106 to a positive terminal oflow side supply 102. In the example, low side driving circuitry may output, to switching elements, a low signal (e.g., logical ‘0’) during a second portion of a pulse-width modulation cycle to cause switching elements to couple a gate of lowside GaN device 106 to a negative terminal oflow side supply 102. In some examples, low side driving circuitry may output, to switching elements, one or more dead-time signal during a third portion of a pulse-width modulation cycle to cause switching elements to decouple a gate of lowside GaN device 106 from thelow side supply 102. - Low side driving circuitry may comprise any suitable arrangement of hardware, software, firmware, or any combination thereof. Low side driving circuitry may include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components. When low side driving circuitry includes software or firmware, low side driving circuitry may further include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units. In general, a processing unit may include one or more microprocessors, DSPs, ASICs, FPGAs, or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components.
-
High side supply 112 may be adapted to provide electrical power to one or more other components ofsystem 100. For instance,high side supply 112 may be adapted to supply a charge at a gate of highside GaN device 116. In some examples,high side supply 112 may be floating. For example,high side supply 112 may have a negative terminal that has a voltage different from a ground of system 100 (e.g., a negative terminal of low side supply 102). In some examples,high side supply 112 includes a capacitor. A capacitor may include, an electrical component adapted to store electrical energy in an electric field. Examples of an electrical component configured to store electrical energy in an electric field may include, but are not limited to, ceramic capacitors, film capacitors, electrolytic capacitors (e.g., aluminum, tantalum, niobium, or the like), super capacitors (e.g., double layer, pseudocapacitors, hybrid capacitors), mica capacitors, or another capacitor. Although examples of this disclosure may refer to a capacitor as a single capacitor, in some examples, a capacitor may be an array of capacitive elements. For instance,high side supply 112 may include a capacitor formed of an array of capacitive elements coupled in parallel and/or series. In some instances, each capacitive element may be a discrete component, while in other instances, each one of the capacitive elements may be contained within a single package (e.g., capacitor array). -
High side driver 114 may include high side driving circuitry adapted to selectively drive switching elements to couple a gate of highside GaN device 116 to a positive terminal ofhigh side supply 112 or a negative terminal ofhigh side supply 112. High side driving circuitry may comprise a modulation (e.g., pulse-width modulation) controller. For example, high side driving circuitry may output, to the switching elements, a high signal (e.g., logical ‘1’) during a first portion of a pulse-width modulation cycle to cause switching elements to couple a gate of highside GaN device 116 to a positive terminal ofhigh side supply 112. In the example, high side driving circuitry may output, to switching elements, a low signal (e.g., logical ‘0’) during a second portion of a pulse-width modulation cycle to cause switching elements to couple a gate of highside GaN device 116 to a negative terminal ofhigh side supply 112. In some examples, high side driving circuitry may output, to switching elements, one or more dead-time signal during a third portion of a pulse-width modulation cycle to cause switching elements to decouple a gate of highside GaN device 116 from thehigh side supply 112. - High side driving circuitry may comprise any suitable arrangement of hardware, software, firmware, or any combination thereof. High side driving circuitry may include any one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or any other equivalent integrated or discrete logic circuitry, as well as any combinations of such components. When high side driving circuitry includes software or firmware, low side driving circuitry may further include any necessary hardware for storing and executing the software or firmware, such as one or more memories and one or more processors or processing units.
- High
side charge circuitry 110 may be adapted to chargehigh side supply 112 withlow side supply 102 whenlow side driver 104 activates lowside GaN device 106. In some examples, highside charge circuitry 110 may be adapted to prevent current from flowing fromhigh side supply 112 tolow side driver 104 and to permit current to flow fromlow side driver 104 tohigh side supply 112. For example, highside charge circuitry 110 may be configured to generate a channel that electronically coupleslow side supply 102 tohigh side supply 112 whenlow side driver 104 activates lowside GaN device 106. For instance, high side charge circuitry may be coupled to an output oflow side driver 104 and/or a gate of lowside GaN device 106. In some examples, highside charge circuitry 110 may include a diode that prevents current from flowing fromhigh side supply 112 tolow side supply 102 and permits current to flow fromlow side supply 102 tohigh side supply 112. In some examples, highside charge circuitry 110 may include a switch that is selectively activated to prevent current from flowing fromhigh side supply 112 tolow side supply 102 and to permit current to flow fromlow side supply 102 tohigh side supply 112. -
Converter elements 124 may be adapted to provide a target voltage, current, or power at a load.Converter elements 124 may include, for example, one or more of a capacitor, an inductor, a resistor, a transformer, a sensor, or another converter element. In some examples, a load is coupled toconverter elements 124 that is configured to receive the target voltage, current, or power output byconverter elements 124. - Rather than relying on specialized circuitry for regulating a voltage at
high side supply 112, highside charge circuitry 110 is adapted to chargehigh side supply 112 withlow side supply 102 whenlow side driver 104 activates lowside GaN device 106. For example, whenlow side driver 104 couples a gate of lowside GaN device 106 to a positive terminal oflow side driver 104, highside charge circuitry 110 may couple a positive terminal ofhigh side supply 112 to the positive terminal oflow side driver 104. In this example, lowside GaN device 106 forms a channel that couples the negative terminal oflow side supply 102 andhigh side supply 112 such thatlow side supply 102 chargeshigh side supply 112. For instance, lowside GaN device 106 forms a channel that couples the negative terminal oflow side supply 102 andhigh side supply 112 such thathigh side supply 112 charges a capacitor ofhigh side supply 112. -
FIG. 2 is a circuit diagram illustrating a first example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. As shown,system 200 includeslow side supply 202,low side driver 204, lowside GaN device 206, highside charge circuitry 210,high side supply 212,high side driver 214, highside GaN device 216, andconverter elements 224.System 200 may include additional components than those shown. In some examples,system 200 may be implemented as a single or multiple IC packages.Low side supply 202,low side driver 204, and lowside GaN device 206 may be examples oflow side supply 102,low side driver 104, lowside GaN device 106, respectively.High side supply 212,high side driver 214, and highside GaN device 216 are examples ofhigh side supply 112,high side driver 114, and highside GaN device 116, respectively. As shown,high side supply 212 may include a capacitive element (e.g., capacitor). Highside charge circuitry 210 is an example of highside charge circuitry 110 andconverter elements 224 is an example ofconverter elements 124. For example,converter elements 224 may include an inductor.FIG. 2 is described in the context ofFIG. 1 for exemplary purposes only. - As shown, high
side GaN device 216 includes a control node coupled tohigh side driver 214, a first node coupled topositive terminal 215 of a power converter supply, and a second node coupled to one ormore converter elements 224 for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current. In this example, lowside GaN device 206 includes a control node coupled tolow side driver 204, a first node coupled to one ormore converter elements 224, and a second node coupled tonegative terminal 217 of the power converter supply. The power converter supply may be an output of a linear regulator, power converter, power inverter, or another regulated voltage supply. For example, the power converter supply may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, or another regulated voltage supply. The power converter supply may include a battery which may be configured to store electrical energy. Examples of batteries may include, but are not limited to, nickel-cadmium, lead-acid, nickel-metal hydride, nickel-zinc, silver-oxide, lithium-ion, lithium polymer, any other type of rechargeable battery, or any combination of batteries. -
Low side supply 202 includes regulated voltage supply 230 coupled in parallel withcapacitor 232. Regulated voltage supply 230 may be an output of a linear regulator, power converter, power inverter, or another regulated voltage supply. For example, regulated voltage supply 230 may be an output of a direct current (DC) to DC power converter, an alternating current (AC) to DC power converter, a DC to AC power inverter, or another regulated voltage supply. Regulated voltage supply 230 may include a battery which may be configured to store electrical energy. -
Low side driver 204 includes first low side switching element 234, second low side switching element 236, and lowside driving circuitry 238. First low side switching element 234 includes a first node coupled to a positive terminal oflow side supply 202, a second node coupled to a control node of lowside GaN device 206, and a control node. Second low side switching element 236 includes a first node coupled to the control node of lowside GaN device 206, a second node coupled to the negative terminal oflow side supply 202, and a control node. The control node of first low side switching element 234 and/or the control node of second low side switching element 236 may be coupled to lowside driving circuitry 238. - Low
side driving circuitry 238 may be adapted to generate a first control signal at the control node of first low side switching element 234 to cause first low side switching element 234 to establish the first low side channel between the positive terminal oflow side supply 202 and the control node of lowside GaN device 206 to activate lowside GaN device 206. In some example, lowside driving circuitry 238 may be adapted to generate a second control signal at the control node of second low side switching element 236 to cause second low side switching element 236 to establish the second low side channel between the negative terminal oflow side supply 202 and the control node of lowside GaN device 206 to deactivate lowside GaN device 206. -
High side driver 214 includes first high side switching element 244, second high side switching element 246, and highside driving circuitry 248. First high side switching element 244 includes a first node coupled to a positive terminal ofhigh side supply 212, a second node coupled to a control node of highside GaN device 216, and a control node. Second high side switching element 246 includes a first node coupled to the control node of highside GaN device 216, a second node coupled to the negative terminal ofhigh side supply 212, and a control node. The control node of first high side switching element 244 and/or the control node of second high side switching element 246 may be coupled to highside driving circuitry 248. - High
side driving circuitry 248 may be adapted to generate a first control signal at the control node of first high side switching element 244 to cause first high side switching element 244 to establish the first high side channel between the positive terminal ofhigh side supply 212 and the control node of highside GaN device 216 to activate highside GaN device 216. In some example, highside driving circuitry 248 may be adapted to generate a second control signal at the control node of second high side switching element 246 to cause second high side switching element 246 to establish the second high side channel between the negative terminal ofhigh side supply 212 and the control node of highside GaN device 216 to deactivate highside GaN device 216. - High
side charge circuitry 210 includesdiode 250. As shown,diode 250 includes an anode coupledlow side driver 204 and a cathode coupled tohigh side supply 212 to prevent current from flowing fromhigh side supply 212 tolow side driver 204 and to permit current to flow fromlow side driver 204 tohigh side supply 212. - Rather than relying on specialized circuitry for regulating a voltage at
high side supply 212, highside charge circuitry 210 is adapted to chargehigh side supply 212 withlow side supply 202 whenlow side driver 204 activates lowside GaN device 206. For example, whenlow side driver 204 couples a gate of lowside GaN device 206 to a positive terminal oflow side supply 202,diode 250 may couplelow side driver 204 to the positive terminal ofhigh side supply 212. In this example, lowside GaN device 206 forms a channel that couples the negative terminal oflow side supply 202 and the negative terminal ofhigh side supply 212 such thatlow side supply 202 chargeshigh side supply 212. For instance, lowside GaN device 206 forms a channel that couples the negative terminal oflow side supply 202 and the negative terminal ofhigh side supply 212 such thatlow side supply 202 charges a capacitor ofhigh side supply 212. -
FIG. 3 is a circuit diagram illustrating a second example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. As shown,system 300 includeslow side supply 302,low side driver 304, lowside GaN device 306, highside charge circuitry 310,high side supply 312,high side driver 314, highside GaN device 316, andconverter elements 324, which may be substantially similar tolow side supply 202,low side driver 204, lowside GaN device 206, highside charge circuitry 210,high side supply 212,high side driver 214, highside GaN device 216, andconverter elements 224, respectively. Moreover,system 300 further includes lowside discharge circuitry 308 and highside discharge circuitry 318.System 300 may include additional components than those shown. In some examples,system 300 may be implemented as a single or multiple IC packages.FIG. 3 is described in the context ofFIG. 1 for exemplary purposes only. - Low
side discharge circuitry 308 is adapted to reduce current flow fromlow side driver 304 to lowside GaN device 306 and to refrain from reducing current flow from lowside GaN device 306 tolow side driver 304. Lowside discharge circuitry 308 may includeresistor 352,diode 354, andresistor 356. As shown, a first side of lowside discharge circuitry 308 is coupled tolow side driver 304 and a second side of lowside discharge circuitry 308 is coupled to lowside GaN device 306. The first side of lowside discharge circuitry 308 is coupled to a cathode ofdiode 354 and a first node ofresistor 352. The anode ofdiode 354 is coupled to a first node ofresistor 356. The second side of lowside discharge circuitry 308 is coupled to a second node ofresistor 356 and a second side ofresistor 352. - High
side discharge circuitry 318 may be adapted to reduce current flow fromhigh side driver 314 to highside GaN device 316 and to refrain from reducing current flow from highside GaN device 316 tohigh side driver 314. Highside discharge circuitry 318 may include a first resistor, a diode, and a second resistor arranged similarly to lowside discharge circuitry 308. - In the example of
FIG. 3 , highside charge circuitry 310 is adapted to chargehigh side supply 312 withlow side supply 302 whenlow side driver 304 activates lowside GaN device 306. For example, whenlow side driver 304 couples a gate of lowside GaN device 306 to a positive terminal oflow side supply 302, highside charge circuitry 310 may couple the gate of lowside GaN device 306 to the positive terminal ofhigh side supply 312. In this example, lowside GaN device 306 forms a channel that couples the negative terminal oflow side supply 302 and the negative terminal ofhigh side supply 312 such thatlow side supply 302 chargeshigh side supply 312. -
FIG. 4 is a circuit diagram illustrating a third example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. As shown,system 400 includeslow side supply 402,low side driver 404, lowside GaN device 406,high side supply 412,high side driver 414, highside GaN device 416, andconverter elements 424, which may be substantially similar tolow side supply 202,low side driver 204, lowside GaN device 206,high side supply 212,high side driver 214, highside GaN device 216, andconverter elements 224, respectively.System 400 further includes highside charge circuitry 410.System 400 may include additional components than those shown. In some examples,system 400 may be implemented as a single or multiple IC packages.FIG. 4 is described in the context ofFIG. 1 for exemplary purposes only. - High
side charge circuitry 410 includes switchingelement 460 and active switching circuitry 462.Switching element 460 includes a first node coupledhigh side supply 412 and a second node coupled tolow side driver 404 and/or lowside GaN device 406. Active switching circuitry 462 may be adapted to selectively activate switchingelement 460 to prevent current from flowing fromhigh side supply 412 tolow side driver 404 and to permit current to flow fromlow side driver 404 tohigh side supply 412. - In the example of
FIG. 4 , highside charge circuitry 410 is adapted to chargehigh side supply 412 withlow side supply 402 whenlow side driver 404 activates lowside GaN device 406. For example, whenlow side driver 404 couples a gate of lowside GaN device 406 to a positive terminal oflow side supply 402, active switching circuitry 462drives switching element 460 to couple the gate of lowside GaN device 406 to the positive terminal ofhigh side supply 412. In this example, lowside GaN device 406 forms a channel that couples the negative terminal oflow side supply 402 and the negative terminal ofhigh side supply 412 such thatlow side supply 402 chargeshigh side supply 412. -
FIG. 5 is a circuit diagram illustrating a fourth example of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. As shown,system 500 includeslow side supply 502,low side driver 504, lowside GaN device 506, highside charge circuitry 510,high side supply 512,high side driver 514, highside GaN device 516, andconverter elements 524, which may be substantially similar tolow side supply 402,low side driver 404, lowside GaN device 406, highside charge circuitry 410,high side supply 412,high side driver 414, highside GaN device 416, andconverter elements 424, respectively. Moreover,system 500 further includes lowside discharge circuitry 508 and highside discharge circuitry 518.System 500 may include additional components than those shown. In some examples,system 500 may be implemented as a single or multiple IC packages.FIG. 5 is described in the context ofFIGS. 1 and 4 for exemplary purposes only. - Low
side discharge circuitry 508 is adapted to reduce current flow fromlow side driver 504 to lowside GaN device 506 and to refrain from reducing current flow from lowside GaN device 506 tolow side driver 504. Lowside discharge circuitry 508 may includeresistor 552,diode 554, andresistor 556. As shown, a first side of lowside discharge circuitry 508 is coupled tolow side driver 504 and a second side of lowside discharge circuitry 508 is coupled to lowside GaN device 506. The first side of lowside discharge circuitry 508 is coupled to a cathode ofdiode 554 and a first node ofresistor 552. The anode ofdiode 554 is coupled to a first node ofresistor 556. The second side of lowside discharge circuitry 508 is coupled to a second node ofresistor 556 and a second side ofresistor 552. - High
side discharge circuitry 518 may be adapted to reduce current flow fromhigh side driver 514 to highside GaN device 516 and to refrain from reducing current flow from highside GaN device 516 tohigh side driver 514. Highside discharge circuitry 518 may include a first resistor, a diode, and a second resistor arranged similarly to lowside discharge circuitry 508. - In the example of
FIG. 5 , highside charge circuitry 510 is adapted to chargehigh side supply 512 withlow side supply 502 whenlow side driver 504 activates lowside GaN device 506. For example, whenlow side driver 504 couples a gate of lowside GaN device 506 to a positive terminal oflow side supply 502, highside charge circuitry 510 may couple the gate of lowside GaN device 506 to the positive terminal ofhigh side supply 512. In this example, lowside GaN device 506 forms a channel that couples the negative terminal oflow side supply 502 and the negative terminal ofhigh side supply 512 such thatlow side supply 502 chargeshigh side supply 512. -
FIG. 6 is a first illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. The abscissa axis (e.g., horizontal) ofFIG. 6 represents time and the ordinate axis (e.g., vertical) ofFIG. 6 represents a converter voltage (SWN) 602 at an input toconverter elements 124, a high side switching voltage (HX-SWN) 604 at a gate of highside GaN device 116, a low side switching voltage (LX) 606 at a gate of lowside GaN device 106, and a bootstrap voltage 608 (Bootstrap_Diode) at highside charge circuitry 110. - As shown,
converter voltage 602 is negative during dead-times 610, for example, due to free-wheeling inductor current flow. However,bootstrap voltage 608 illustrates that highside charge circuitry 110 blocks a charging ofhigh side supply 112 during dead-times 610. In this way, highside charge circuitry 110 may avoid overcharging ofhigh side supply 112 in a presence of low side free-wheeling inductor current flow. -
FIG. 7 is a second illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. The abscissa axis (e.g., horizontal) ofFIG. 7 represents time and the ordinate axis (e.g., vertical) ofFIG. 7 represents an inductor current 702 atconverter elements 124,converter voltage 704 at an input toconverter elements 124, a highside supply voltage 706 athigh side supply 112, abootstrap voltage 708 at highside charge circuitry 110, and gate-to-source voltage 710 at highside GaN device 116. As shown, highside supply voltage 706 remains less than a maximum GaN voltage rating of 5 volts, thereby resulting in gate-to-source voltage 710 being less than the maximum GaN voltage rating. As such, techniques described here may prevent an overcharge ofhigh side supply 112 above the maximum rating of GaN Voltage Source to Gate “VGS”. -
FIG. 8 is a third illustration of a performance of the driver ofFIG. 1 in accordance with one or more techniques of this disclosure. The abscissa axis (e.g., horizontal) ofFIG. 8 represents time and the ordinate axis (e.g., vertical) ofFIG. 8 representsconverter voltage 802 at an input toconverter elements 124, a bootstrap voltage 804 at highside charge circuitry 110, a low side switching voltage 806 at a gate of lowside GaN device 106, and a lowside driving voltage 808 output bylow side driver 104. As shown, when first low side switching element 234 (e.g., a pull-up pMOS) is OFF (e.g., deactivated) the body diode of first low side switching element 234 blocks the charge path from low side supply 102 (e.g., VCC). When first low side switching element 234 (e.g., a pull-up pMOS) ON (e.g., activated) the charge path is active, butconverter voltage 802 is not dangerous because lowside GaN device 106 is turned ON (e.g., activated). In this way,system 100 may help to achieve a desired timing between low side turn-on of lowside GaN device 106 and the bootstrap cap recharge path activation, even in a presence of additional external components on the gate driving path. -
FIG. 9 is a flow diagram for a method for driving GaN devices in accordance with one or more techniques of this disclosure.FIG. 9 is described in the context ofFIGS. 1-8 for exemplary purposes only. In operation,low side driver 104 controls lowside GaN device 106 using low side supply 102 (902).High side driver 114 control highside GaN device 116 using high side supply 112 (904). Highside charge circuitry 110 chargeshigh side supply 112 withlow side supply 102 whenlow side driver 104 activates low side GaN device 106 (906). - While a device has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.
- The following examples may illustrate one or more aspects of the disclosure.
- A device for switching Gallium Nitride (GaN) devices, the device comprising: a high side driver adapted to control a high side GaN device using a high side supply; a low side driver adapted to control a low side GaN device using a low side supply; and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- The device of example 1, wherein the high side charge circuitry is adapted to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- The device of any combination of examples 1-2, wherein the high side charge circuitry comprises a diode comprising an anode coupled the low side driver and a cathode coupled to the high side supply to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- The device of any combination of examples 1-3, wherein the high side charge circuitry comprises: a switching element comprising a first node coupled the high side supply and a second node coupled to the low side driver; and active switching circuitry adapted to selectively activate the switching element to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- The device of any combination of examples 1-4, wherein the low side supply comprises a capacitor coupled in parallel with a voltage source; and wherein the high side supply comprises a capacitor.
- The device of any combination of examples 1-5, comprising one or more of: low side discharge circuitry adapted to reduce current flow from the low side driver to the low side GaN device and to refrain from reducing current flow from the low side GaN device to the low side driver; or high side discharge circuitry adapted to reduce current flow from the high side driver to the high side GaN device and to refrain from reducing current flow from the high side GaN device to the high side driver.
- The device of any combination of examples 1-6, wherein the low side driver is adapted to establish a first low side channel between a positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and to establish a second low side channel between a negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device; and wherein the high side driver is adapted to establish a first high side channel between a positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and to establish a second high side channel between a negative terminal of the high side supply and the low side GaN device to deactivate the high side GaN device.
- The device of any combination of examples 1-7, wherein the low side driver comprises: a first low side switching element comprising a first node coupled to the positive terminal of the low side supply, a second node coupled to the low side GaN device, and a control node; a second low side switching element comprising a first node coupled to the low side GaN device, a second node coupled to the negative terminal of the low side supply, and a control node; and low side driving circuitry adapted to generate a first control signal at the control node of the first low side switching element to cause the first low side switching element to establish the first low side channel between the positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and to generate a second control signal at the control node of the second low side switching element to cause the second low side switching element to establish the second low side channel between the negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device.
- The device of any combination of examples 1-8, wherein the high side driver comprises: a first high side switching element comprising a first node coupled to the positive terminal of the high side supply, a second node coupled to the high side GaN device, and a control node; a second high side switching element comprising a first node coupled to the high side GaN device, a second node coupled to the negative terminal of the high side supply, and a control node; and high side driving circuitry adapted to generate a first control signal at the control node of the first high side switching element to cause the first high side switching element to establish the first high side channel between the positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and to generate a second control signal at the control node of the second high side switching element to cause the second high side switching element to establish the second high side channel between the negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- The device of any combination of examples 1-9, wherein the high side GaN device comprises a control node coupled to the high side driver, a first node coupled to a positive terminal of a power converter supply, and a second node coupled to one or more converter elements for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current; and wherein the low side GaN device comprises a control node coupled to the low side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter supply.
- A method for driving a Gallium Nitride (GaN) devices, the method comprising: controlling a high side GaN device using a high side supply; controlling a low side GaN device using a low side supply; and charging the high side supply with the low side supply when the low side driver activates the low side GaN device.
- The method of example 11, wherein charging the high side supply comprises: preventing current from flowing from the high side supply to the low side driver; and permitting current to flow from the low side driver to the high side supply.
- The method of any combination of examples 11-12, wherein charging the high side voltage comprises: selectively activating a switching element to prevent current from flowing from the high side supply to the low side driver and to permit current to flow from the low side driver to the high side supply.
- The device of any combination of examples 11-13, wherein the low side supply comprises a capacitor coupled in parallel with a voltage source; and wherein the high side supply comprises a capacitor.
- The method of any combination of examples 11-14, wherein controlling the high side GaN device comprises reducing current flow from the high side driver to the high side GaN device and refraining from reducing current flow from the high side GaN device to the high side driver; and wherein controlling the low side GaN device comprises reducing current flow from the low side driver to the low side GaN device and refraining from reducing current flow from the low side GaN device to the low side driver.
- The method of any combination of examples 11-15, wherein controlling the low side GaN device comprises establishing a first low side channel between a positive terminal of the low side supply and the low side GaN device to activate the low side GaN device and establishing a second low side channel between a negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device; and wherein controlling the high side GaN device comprises establishing a first high side channel between a positive terminal of the high side supply and the high side GaN device to activate the high side GaN device and establishing a second high side channel between a negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- The method of any combination of examples 11-16, wherein controlling the low side GaN device comprises: generating a control signal at a control node of a first low side switching element to cause the first low side switching element to establish the first low side channel between the positive terminal of the low side supply and the low side GaN device to activate the low side GaN device; and generating a second control signal at a control node of a second low side switching element to cause the second low side switching element to establish the second low side channel between the negative terminal of the low side supply and the low side GaN device to deactivate the low side GaN device.
- The method of any combination of examples 11-17, wherein controlling the high side GaN device comprises: generating a first control signal at a control node of a first high side switching element to cause the first high side switching element to establish the first high side channel between the positive terminal of the high side supply and the high side GaN device to activate the high side GaN device; and generating a second control signal at a control node of a second high side switching element to cause the second high side switching element to establish the second high side channel between the negative terminal of the high side supply and the high side GaN device to deactivate the high side GaN device.
- The method of any combination of examples 11-18, wherein the high side GaN device comprises a control node coupled to the high side driver, a first node coupled to a positive terminal of a power converter supply, and a second node coupled to one or more converter elements for a power converter adapted to receive power from the power converter supply and output a regulated voltage or regulated current; and wherein the low side GaN device comprises a control node coupled to the low side driver, a first node coupled to the one or more converter elements, and a second node coupled to a negative terminal of the power converter supply.
- A system for controlling a power converter, the system comprising: a high side GaN device; a low side GaN device; a high side driver adapted to control the high side GaN device using a high side supply; a low side driver adapted to control the low side GaN device using a low side supply; and high side charge circuitry adapted to charge the high side supply with the low side supply when the low side driver activates the low side GaN device.
- Various aspects have been described in this disclosure. These and other aspects are within the scope of the following claims.
Claims (20)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/052,479 US10536070B1 (en) | 2018-08-01 | 2018-08-01 | Driver for switching gallium nitride (GaN) devices |
DE102019120488.7A DE102019120488A1 (en) | 2018-08-01 | 2019-07-30 | Device for driving gallium nitride (GaN) devices, method and system |
CN201910700081.9A CN110798053A (en) | 2018-08-01 | 2019-07-31 | Driver for switching gallium nitride (GaN) devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/052,479 US10536070B1 (en) | 2018-08-01 | 2018-08-01 | Driver for switching gallium nitride (GaN) devices |
Publications (2)
Publication Number | Publication Date |
---|---|
US10536070B1 US10536070B1 (en) | 2020-01-14 |
US20200044554A1 true US20200044554A1 (en) | 2020-02-06 |
Family
ID=69141269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/052,479 Active US10536070B1 (en) | 2018-08-01 | 2018-08-01 | Driver for switching gallium nitride (GaN) devices |
Country Status (3)
Country | Link |
---|---|
US (1) | US10536070B1 (en) |
CN (1) | CN110798053A (en) |
DE (1) | DE102019120488A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3905523A1 (en) * | 2020-04-30 | 2021-11-03 | Infineon Technologies Austria AG | Switching circuit, gate driver and method of operating a transistor device |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10992295B2 (en) * | 2018-01-25 | 2021-04-27 | Renesas Electronics Corporation | Controlling a high-side switching element using a bootstrap capacitor |
CN111758210B (en) * | 2018-02-19 | 2023-09-26 | 夏普株式会社 | Rectifying circuit and power supply device |
CN115021736B (en) * | 2021-11-26 | 2023-05-05 | 荣耀终端有限公司 | Switching circuit and electronic device |
CN116455006B (en) * | 2022-01-07 | 2024-04-05 | 荣耀终端有限公司 | Charging circuit, electronic equipment and charging system |
US11923832B1 (en) * | 2022-09-19 | 2024-03-05 | Infineon Technologies Austria Ag | Gate driver circuit with a limiting function to maintain control voltage under a rated limit |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5373435A (en) | 1993-05-07 | 1994-12-13 | Philips Electronics North America Corporation | High voltage integrated circuit driver for half-bridge circuit employing a bootstrap diode emulator |
US5666280A (en) | 1993-05-07 | 1997-09-09 | Philips Electronics North America Corporation | High voltage integrated circuit driver for half-bridge circuit employing a jet to emulate a bootstrap diode |
AU2003215854A1 (en) * | 2002-04-19 | 2003-11-03 | Koninklijke Philips Electronics N.V. | Power amplifier |
FR2858493B1 (en) | 2003-07-31 | 2005-10-21 | St Microelectronics Sa | AUTOELEVATION ATTACK CIRCUIT |
US7215189B2 (en) * | 2003-11-12 | 2007-05-08 | International Rectifier Corporation | Bootstrap diode emulator with dynamic back-gate biasing |
JP4641178B2 (en) * | 2004-11-17 | 2011-03-02 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit |
US7456658B2 (en) | 2006-04-07 | 2008-11-25 | International Rectifier Corporation | Circuit to optimize charging of bootstrap capacitor with bootstrap diode emulator |
US7592831B2 (en) | 2007-04-05 | 2009-09-22 | International Rectifier Corporation | Circuit to optimize charging of bootstrap capacitor with bootstrap diode emulator |
US7843237B2 (en) * | 2008-11-17 | 2010-11-30 | Infineon Technologies Austria Ag | Circuit arrangement for actuating a transistor |
JP5675566B2 (en) | 2011-11-30 | 2015-02-25 | 株式会社 日立パワーデバイス | Bootstrap circuit and inverter device including the same |
US9086705B2 (en) * | 2012-07-19 | 2015-07-21 | Infineon Technologies Austria Ag | Charge recovery in power converter driver stages |
US8558586B1 (en) * | 2012-08-30 | 2013-10-15 | Infineon Technologies Ag | Circuit arrangement for driving transistors in bridge circuits |
US9401612B2 (en) | 2014-09-16 | 2016-07-26 | Navitas Semiconductor Inc. | Pulsed level shift and inverter circuits for GaN devices |
US9571093B2 (en) | 2014-09-16 | 2017-02-14 | Navitas Semiconductor, Inc. | Half bridge driver circuits |
JP6392604B2 (en) * | 2014-09-24 | 2018-09-19 | 国立大学法人京都大学 | Gate driver |
US9667245B2 (en) * | 2014-10-10 | 2017-05-30 | Efficient Power Conversion Corporation | High voltage zero QRR bootstrap supply |
US9595954B2 (en) * | 2014-11-10 | 2017-03-14 | Nxp Usa, Inc. | Method and circuit for recharging a bootstrap capacitor using a transfer capacitor |
US10122274B2 (en) | 2015-12-11 | 2018-11-06 | Freebird Semiconductor Corporation | Multi-function power control circuit using enhancement mode gallium nitride (GaN) high electron mobility transistors (HEMTs) |
CN109314457B (en) | 2016-05-04 | 2021-03-19 | 香港科技大学 | Power device with integrated gate driver |
-
2018
- 2018-08-01 US US16/052,479 patent/US10536070B1/en active Active
-
2019
- 2019-07-30 DE DE102019120488.7A patent/DE102019120488A1/en active Pending
- 2019-07-31 CN CN201910700081.9A patent/CN110798053A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3905523A1 (en) * | 2020-04-30 | 2021-11-03 | Infineon Technologies Austria AG | Switching circuit, gate driver and method of operating a transistor device |
US11575377B2 (en) | 2020-04-30 | 2023-02-07 | Infineon Technologies Austria Ag | Switching circuit, gate driver and method of operating a transistor device |
Also Published As
Publication number | Publication date |
---|---|
DE102019120488A1 (en) | 2020-02-06 |
US10536070B1 (en) | 2020-01-14 |
CN110798053A (en) | 2020-02-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10536070B1 (en) | Driver for switching gallium nitride (GaN) devices | |
US8558586B1 (en) | Circuit arrangement for driving transistors in bridge circuits | |
US10033269B2 (en) | Voltage doubler with capacitor module for increasing capacitance | |
US10038438B2 (en) | Power semiconductor element driving circuit | |
US10033264B2 (en) | Bulk capacitor switching for power converters | |
US9515649B2 (en) | Cascode circuit | |
Seidel et al. | A fully integrated three-level 11.6 nC gate driver supporting GaN gate injection transistors | |
US9584046B2 (en) | Gate drive circuit and a method for controlling a power transistor | |
US8717085B2 (en) | Power saving resonant gate driver and related method | |
US9444351B2 (en) | Electrical power conversion device including normally-off bidirectional switch | |
US10243451B1 (en) | System and method for powering a switching converter | |
US10256744B2 (en) | Controller device with adaptive synchronous rectification | |
US10680601B1 (en) | Driver for switching insulated-gate bipolar transistors with first pull-down signal and second pull-down signal | |
EP2871765A1 (en) | NPC converter for use in power module, and power module incorporating same | |
US11502685B2 (en) | Gate drive circuit and control circuit for switching circuit, and switching power supply | |
US9490800B2 (en) | Control circuit of semiconductor switching element | |
US7248093B2 (en) | Bipolar bootstrap top switch gate drive for half-bridge semiconductor power topologies | |
US10763743B1 (en) | Analog predictive dead-time | |
US10622910B2 (en) | Semiconductor device and method of operating the same | |
US10186859B2 (en) | Reverse current protection for a switching unit | |
US9705423B1 (en) | Controlled bootstrap driver for high side electronic switching device | |
EP2672617A1 (en) | A buck converter with reverse current protection, and a photovoltaic system | |
US10855179B2 (en) | Fast charge sharing between capacitors of a dual input path DC/DC converter | |
US10097010B2 (en) | Control of freewheeling voltage | |
CN110970882A (en) | Protection circuit and battery management system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: INFINEON TECHNOLOGIES AG, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PENZO, ROBERTO;GALVANO, MAURIZIO;REEL/FRAME:046530/0775 Effective date: 20180801 |
|
FEPP | Fee payment procedure |
Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |