US20190237321A1 - Method of wafer recycling - Google Patents
Method of wafer recycling Download PDFInfo
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- US20190237321A1 US20190237321A1 US15/885,311 US201815885311A US2019237321A1 US 20190237321 A1 US20190237321 A1 US 20190237321A1 US 201815885311 A US201815885311 A US 201815885311A US 2019237321 A1 US2019237321 A1 US 2019237321A1
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- 238000000034 method Methods 0.000 title claims abstract description 82
- 238000004064 recycling Methods 0.000 title abstract description 4
- 238000005530 etching Methods 0.000 claims abstract description 37
- 238000007517 polishing process Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000005137 deposition process Methods 0.000 claims abstract description 11
- 235000012431 wafers Nutrition 0.000 claims description 296
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 106
- 238000000151 deposition Methods 0.000 claims description 65
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 48
- 238000004519 manufacturing process Methods 0.000 claims description 36
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 25
- 238000005498 polishing Methods 0.000 claims description 17
- 239000002245 particle Substances 0.000 claims description 16
- 230000007547 defect Effects 0.000 claims description 13
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical group O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 6
- 238000003672 processing method Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 description 51
- 239000000463 material Substances 0.000 description 17
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 12
- 239000000243 solution Substances 0.000 description 8
- 238000007689 inspection Methods 0.000 description 7
- 239000007789 gas Substances 0.000 description 6
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000003384 imaging method Methods 0.000 description 4
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 description 1
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- -1 e.g. Substances 0.000 description 1
- 238000000572 ellipsometry Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- ZQXQADNTSSMHJI-UHFFFAOYSA-N hafnium(4+) oxygen(2-) tantalum(5+) Chemical compound [O-2].[Ta+5].[Hf+4] ZQXQADNTSSMHJI-UHFFFAOYSA-N 0.000 description 1
- KQHQLIAOAVMAOW-UHFFFAOYSA-N hafnium(4+) oxygen(2-) zirconium(4+) Chemical compound [O--].[O--].[O--].[O--].[Zr+4].[Hf+4] KQHQLIAOAVMAOW-UHFFFAOYSA-N 0.000 description 1
- KUVFGOLWQIXGBP-UHFFFAOYSA-N hafnium(4+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Hf+4] KUVFGOLWQIXGBP-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
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- 238000012634 optical imaging Methods 0.000 description 1
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- 238000005389 semiconductor device fabrication Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Images
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/405—Oxides of refractory metals or yttrium
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
- H01L21/02148—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
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- H01L21/31111—Etching inorganic layers by chemical means
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Definitions
- deposition processes are performed in the fabrication of some semiconductor devices to form a layer or film of an oxide or other material.
- Deposition processes may be carried out on a batch of semiconductor wafers, as opposed to depositing the layers on wafers one at a time.
- the batch of wafers that are exposed to a particular deposition process may include production wafers, which are the wafers on which the semiconductor devices are formed, and may also include dummy wafers.
- the dummy wafers are sometimes included in a batch of wafers so that uniform deposition on the production wafers of oxides or other materials can be achieved, e.g., the dummy wafers may be included in order to provide a desired number of total wafers in the batch, for example, in a case where less than a full batch of production wafers are available for processing and the processing is sensitive to the number/load of wafers being processed.
- the dummy wafers are thus subjected to the same deposition of material as are the production wafers; however, the dummy wafers do not typically proceed to further processing steps in the production of the semiconductor devices.
- the dummy wafers are typically discarded after a certain number of uses, or after the dummy wafers have accumulated a certain thickness of the deposited material. Discarding dummy wafers increases the costs of producing the production wafers.
- FIG. 1 is a flowchart illustrating a wafer processing method, in accordance with some embodiments.
- FIG. 2 is a schematic illustration of a deposition apparatus that may be used for depositing an oxide layer on wafers, in accordance with some embodiments.
- FIG. 3A is a cross-sectional view illustrating a wafer after deposition of an oxide layer, in accordance with some embodiments.
- FIG. 3B is a cross-sectional view illustrating the wafer after etching has been performed to remove the oxide layer, in accordance with some embodiments.
- FIG. 3C is a cross-sectional view illustrating the wafer after polishing has been performed, in accordance with some embodiments.
- FIG. 4A is an illustration showing a surface of a wafer that was subjected to only a polishing process to remove a deposited oxide layer.
- FIG. 4B is an illustration showing a surface of a wafer that underwent an etching process and a polishing process to remove a deposited oxide layer, in accordance with some embodiments.
- first and second features are formed in direct contact
- additional features may be formed between the first and second features, such that the first and second features may not be in direct contact
- present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
- spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures.
- the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.
- the apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
- a dummy wafer or dummy wafers as examples of wafers that can be treated in accordance with the various methods described herein, and refers to hafnium oxide as an example of oxide materials that are deposited on wafers in accordance with embodiments described herein; however, the description of the various embodiments is not limited to processing of dummy wafers or using hafnium oxide as the oxide material that is deposited on the wafers.
- oxide materials include oxide materials used in the production of semiconductor devices that are deposited as thin films, e.g., other high-k dielectric materials, including hafnium silicon oxide (HfSiO), hafnium silicon oxynitride (HfSiON), hafnium tantalum oxide (HMO), hafnium titanium oxide (HMO), hafnium zirconium oxide (HfArO) and combinations thereof.
- HfSiO hafnium silicon oxide
- HfSiON hafnium silicon oxynitride
- HMO hafnium tantalum oxide
- HMO hafnium titanium oxide
- HfArO hafnium zirconium oxide
- Suitable materials for use in accordance with embodiments described herein include materials used in the production of semiconductor structures that can be deposited using one or more of chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), or other deposition techniques.
- CVD chemical vapor deposition
- ALD atomic layer deposition
- PVD physical vapor deposition
- PECVD plasma enhanced CVD
- LPCVD low-pressure CVD
- Embodiments described herein include a wafer processing method that permits wafers, e.g., dummy wafers, including a substrate upon which an oxide material has been deposited, to be recycled for reuse in subsequent deposition cycles with a new batch of production wafers.
- Embodiments of described methods include an etching process performed on the dummy wafer to remove the oxide layer from the substrate.
- Implementations of described methods include performing a mechanical polishing process on the wafer after the etching process. After performing methods in accordance with disclosed embodiments, the dummy wafer is in condition for reuse in a semiconductor device fabrication process with a new batch of production wafers, for example, in an oxide deposition process.
- the etchant includes hydrofluoric acid and the polishing includes chemical-mechanical planarization.
- FIG. 1 is a flowchart illustrating a wafer processing method 100 , in accordance with one or more embodiments of the present disclosure.
- wafers are loaded into a material, e.g., hafnium oxide (HfO 2 ), deposition apparatus.
- a material e.g., hafnium oxide (HfO 2 ), deposition apparatus.
- FIG. 2 illustrates a deposition apparatus 200 which is used for depositing a HfO 2 layer on wafers, in accordance with embodiments of the present disclosure.
- the wafers include at least one dummy wafer 10 and one or more production wafers 30 .
- the wafers may also include one or more particle control wafers 20 .
- the dummy wafers 10 are non-production wafers included with the production wafers so that uniform deposition of oxides or other materials on the production wafers can be achieved.
- the dummy wafers consume process gas in the HfO 2 deposition apparatus in order to maintain a consistent, uniform deposition of HfO 2 on the production wafers 30 .
- Dummy wafers are commonly used in the case where less than a full batch of production wafers are available for processing and the processing is sensitive to the number/load of wafers being processed.
- the particle control wafers 20 are processed along with the production wafers 30 , they are used to monitor the processing of the production wafers 30 .
- the particle control wafers 20 may be used to measure a thickness of layers deposited during processing of the wafers, to monitor or measure defects introduced by the processing, and so on.
- the production wafers 30 are wafers that are used to form semiconductor devices, such as circuit components, integrated circuits, chips, or the like.
- the dummy wafer 10 may be any wafer onto which a layer or thin film of
- the dummy wafer 10 may be a monocrystalline silicon (Si) wafer, an amorphous Si wafer, a gallium arsenide (GaAs) wafer, or any other semiconductor wafer suitable to consume process gases in an HfO 2 deposition process so that a layer or thin film of HfO 2 is deposited on a surface of the dummy wafer 10 .
- Si monocrystalline silicon
- GaAs gallium arsenide
- the deposition apparatus 200 includes a process chamber 202 into which the wafers are loaded on a boat or carrier 204 .
- the boat 204 is used to support the wafers and hold the wafers in a desired position within the process chamber 202 during the deposition process.
- the boat 204 may be formed of, or otherwise includes, one or more supports, and may further include upper and lower plates positioned at top and bottom positions, respectively, along the supports.
- the wafers are disposed between the upper and lower plates, for example, in slots formed in the supports that hold edges of the wafers in particular spaced-apart positions.
- the boat 204 may hold any number of wafers, for example, 50 or 100 or more or fewer wafers, during the HfO 2 layer deposition. In one or more embodiments, the boat 204 holds a batch of one-hundred ( 100 ) wafers during the HfO 2 layer deposition.
- the batch of 100 wafers may include any combination of dummy wafers 10 , particle control wafers 20 , and production wafers 30 .
- the dummy wafers 10 are positioned at top and bottom positions in the boat 204 , e.g., adjacent to the upper and lower plates, as shown.
- deposition conditions may be non-ideal, such that deposition may be non-uniform in these regions due to various factors such as non-uniform temperature control, gas flow, gas pressure, or the like.
- deposition conditions may be non-ideal, such that deposition may be non-uniform in these regions due to various factors such as non-uniform temperature control, gas flow, gas pressure, or the like.
- the dummy wafers 10 may consume the process gasses in these regions of the process chamber 202 , while the production wafers 30 may be positioned between the dummy wafers 10 and subjected to a more uniform HfO 2 layer deposition.
- the particle control wafers 20 may be positioned anywhere between the dummy wafers 10 , and may be positioned between production wafers 30 .
- the deposition apparatus 200 is any apparatus capable of depositing a layer of HfO 2 on surfaces of the wafers.
- the deposition apparatus 202 is any apparatus that deposits HfO 2 by chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), or any other deposition technique suitable to deposit an HfO 2 layer to desired specifications as may be set based on a final structure to be formed on the production wafers 30 .
- CVD chemical vapor deposition
- ALD atomic layer deposition
- PVD physical vapor deposition
- PECVD plasma enhanced CVD
- LPCVD low-pressure CVD
- the deposition apparatus 200 includes various well-known components, features, and functionalities needed to deposit an HfO 2 layer on one or more surfaces of the wafers in the boat 204 .
- the process chamber 202 may include tubes, gas injection ports, heaters, exhaust ports, and the like.
- the deposition of the HfO 2 layer is performed under suitable deposition conditions within the process chamber 202 , which include suitable temperature, gas flow rate, pressure, deposition time, and so on.
- the HfO 2 layer is deposited as a thin film that forms on one or more surfaces of the dummy wafers 10 , the particle control wafers 20 , and the production wafers 30 .
- the HfO 2 layer on the particle control wafers 20 and on the production wafers 30 is deposited to have a desired thickness, however, the thickness of the HfO 2 layer formed on the dummy wafers 10 may vary somewhat from the thickness of the HfO 2 layer formed on the particle control wafers 20 and the production wafers 30 . This variation in thickness of the deposited layer is a result of the deposition conditions being different in the upper and lower regions of the process chamber 202 where the dummy wafers 10 are positioned.
- FIG. 3A is a cross-sectional view illustrating a dummy wafer 10 after deposition of an HfO 2 layer 12 , for example, at 104 of FIG. 1 . While the HfO 2 layer 12 is shown as being deposited on only one surface of the dummy wafer 10 , it should be readily appreciated that in various embodiments, a HfO 2 layer may be deposited on more than one, or even on all, exposed surfaces of the dummy wafer 10 .
- the deposition apparatus 200 is configured to deposit the HfO 2 layer having a particular thickness on the processed batch of wafers, which includes the dummy wafers 10 , the particle control wafers 20 , and the production wafers 30 .
- the thickness of the deposited layer may be varied, for example the thickness may be less than 600 nm, less than 300 nm, or less than 100 nm in various embodiments. In other embodiments, the thickness of the deposited layer is more than 600 nm.
- the method 100 includes determining whether a thickness of the HfO 2 layer deposited on the dummy wafer 10 exceeds a threshold thickness.
- the thickness of the HfO 2 layer on the dummy wafer 10 may be determined by any suitable thickness measuring device for measuring an oxide layer thickness on a semiconductor wafer.
- Such thickness measuring devices may include, for example, optical measurement devices that use interferometry, ellipsometry or the like, capacitance-based probes or gages, or any other device suitable for measuring the thickness of the deposited HfO 2 layer.
- the threshold thickness of the HfO 2 layer on the dummy wafer 10 is greater than the target thickness of the HfO 2 layer that is deposited in one deposition cycle on the batch of wafers.
- the threshold thickness of the HfO 2 layer on the dummy wafer 10 may be selected from within a range of 400 nm to 1000 nm, inclusive.
- the threshold thickness of the HfO 2 layer may be 600 nm. In other embodiments, the threshold thickness is more than or less than 600 nm and may be less than 400 nm or greater than 1000 nm.
- the threshold thickness is selected based on various factors, including, for example, the stress that may be induced on the dummy wafer 10 due to the thickness of the HfO 2 layer that builds up on the dummy wafer 10 after one or more deposition cycles. For example, if the thickness of the HfO 2 layer becomes too large or exceeds the threshold thickness, the dummy wafer may become stressed and may break or experience other undesirable defects.
- the dummy wafer 10 In a case where the dummy wafer 10 is a new or recycled dummy wafer and is therefore generally free of any HfO 2 layer when it is loaded into the deposition apparatus 200 (e.g., at 102 of FIG. 1 ), the dummy wafer 10 will likely have an HfO 2 layer thickness after one deposition cycle (e.g., at 106 of FIG. 1 ) that is less than the threshold thickness.
- the dummy wafer 10 may receive a HfO 2 layer having a thickness that is less than 100 nm, as measured at 106 FIG. 1 . In an embodiment where the threshold thickness is 600 nm, the measured thickness of the HfO 2 layer is less than the threshold thickness.
- dummy wafer 10 When the measured thickness of the deposited layer is less than the threshold thickness, as illustrated at 106 in FIG. 1 , dummy wafer 10 is returned to the beginning of method 100 without further treatment. In other words, when the measured thickness of the deposited layer on the dummy wafer is less than the threshold thickness, dummy wafer 10 does not require any special treatment before it can be used in a subsequent deposition cycle with the same batch of wafers or a subsequent deposition cycle with another, different batch of wafers.
- dummy wafer 10 is processed to prepare it for reuse.
- dummy wafer 10 is subjected to a process to remove the accumulated HfO 2 layer.
- the process used to remove the accumulated HfO 2 layer includes an etching process or any other suitable process for removing the HfO 2 layer with little or no damage to the underlying substrate.
- a suitable etching process performed at 108 is a wet etching process using an etchant to remove the HfO 2 layer.
- a hydrogen fluoride (HF) solution, or hydrofluoric acid is used as the etchant to remove the HfO 2 layer.
- HF hydrogen fluoride
- Embodiments described herein are not limited to using hydrofluoric acid as an etchant and other etchants suitable for removing the HfO 2 layer from the wafer can be used.
- HF solution etchants or etchants other than an HF solution can be used, including etchants that are known to remove the target oxide.
- the dummy wafer 10 may be immersed in a bath of HF etchant to remove the HfO 2 layer, or the HfO 2 layer may be removed by an HF vapor that is supplied to one or more surfaces of the dummy wafer 10 in a vapor etching process.
- the etchant and the etching conditions are selected to remove a desired thickness of the HfO 2 layer. For example, if the threshold thickness of the HfO 2 layer on the dummy wafer 10 is 600 nm, the etchant, etch rate, etch time, temperature and other appropriate etching conditions are selected to remove as much as possible of the 600 nm thick HfO 2 layer without removing or damaging the underlying dummy wafer 10 .
- the etchant is a 49% HF solution, e.g., hydrofluoric acid containing 49% by weight of hydrogen fluoride (HF), and the etch time may be equal to or greater than 30 minutes, and in various embodiments the etch time may be equal to or greater than 40 minutes.
- HF hydrogen fluoride
- the HF solution contains more than or less than 49% by weight hydrogen fluoride and the etch time is greater than or less than 40 minutes.
- FIG. 3B is a cross-sectional view illustrating the dummy wafer 10 after HF etching has been performed to remove the HfO 2 layer 12 at 108 of FIG. 1 .
- the surface 14 of the dummy wafer 10 is rough or uneven after the HF etching. This rough surface may cause defects during a subsequent deposition of an HfO 2 layer during use of the dummy wafer 10 in another deposition cycle.
- the dummy wafer 10 is polished to reduce surface roughness and to smooth the surface of the dummy wafer 10 .
- Suitable polishing processes include polishing processes that smooth the surface of the dummy wafer 10 so that an HfO 2 layer may be evenly deposited on the surface of the dummy wafer 10 in a subsequent deposition cycle.
- a chemical-mechanical planarization (CMP) or polishing process is performed at 110 to smooth the surface of the dummy wafer 10 .
- the polishing process removes a thickness of the dummy wafer 10 within a range from 0.5 ⁇ m to inclusive. In other embodiments, more than 1 ⁇ m or less than 0.5 ⁇ m are removed from the dummy wafer 10 .
- FIG. 3C is a cross-sectional view illustrating the dummy wafer 10 after polishing has been performed at 110 of FIG. 1 .
- the surface 16 of the dummy wafer 10 is smooth and even after the polishing. The smooth surface facilitates even deposition of an HfO 2 layer during use of the dummy wafer 10 in another deposition cycle.
- the dummy wafer 10 is inspected, for example, by an imaging machine, to determine whether a sufficient amount of the HfO 2 layer has been removed such that the dummy wafer 10 is suitable for use as a dummy wafer in another deposition cycle.
- determining whether sufficient amounts of the HfO 2 layer have been removed involves determining whether any of the HfO 2 layer remains on the surface of the polished dummy wafer.
- the inspection checks for other defects in the dummy wafer that would make it unsuitable for use as a dummy wafer in another deposition cycle.
- other criteria are used to determine whether the polished dummy wafer is suitable for use as a dummy wafer in another deposition cycle. If the inspection indicates the dummy wafer is suitable for another deposition cycle, then the dummy wafer 10 is reused in the method 100 . If the inspection determines the polished dummy wafer is not suitable for another deposition cycle, e.g., insufficient amounts of the HfO 2 layer were removed or the wafer surface has too many defects, the polished dummy wafer 10 is subjected to another HF etch 108 and/or polish 110 . That is, the dummy wafer 10 is returned to the etching process at 108 , or may be returned to the polishing process at 110 .
- the reason why the dummy wafer was determined to be unsuitable for another deposition cycle is used to determine whether the dummy wafer 10 will undergo both a repeated etching process and polishing process, or only the polishing process or only the etching process. For example, if the inspection at 112 reveals that the HfO 2 layer has been suitably removed, but the surface of the dummy wafer 10 is not as smooth as desired, the dummy wafer 10 is returned to the polishing process at 110 . On the other hand, if the inspection at 112 reveals that the HfO 2 layer has not been suitably removed, the dummy wafer 10 is returned to the etching process at 108 , which is followed by the polishing process at 110 .
- the inspection at 112 may be performed, for example, by an imaging machine that images the surface of the dummy wafer 10 .
- the imaging machine may be, for example, a defect inspection system, including an optical imaging machine, optical scattering machine, or the like, and may utilize automatic defect classification equipment and techniques to automatically classify detected defects.
- the imaging machine may detect the presence of defects on the dummy wafer 10 , and further may identify the spatial locations of such defects on the surface of the dummy wafer 10 .
- the dummy wafer 10 is determined to be suitable for a subsequent deposition cycle at 112 , e.g., if the surface of the dummy wafer 10 is determined to be suitably free of defects, the dummy wafer 10 is returned to the start of the method 100 for reuse as a dummy wafer in a new HfO 2 layer deposition cycle.
- method 100 includes, at 114 , determining whether a number of etching/polishing cycles performed on the dummy wafer 10 exceeds a threshold number of etching/polishing cycles.
- Embodiments of the wafer processing method describe herein include one or both of the etching process at 108 and the polishing process at 110 . Thus, the number of times that a particular dummy wafer 10 has undergone one or more of these processes is compared to a threshold at 114 . If the dummy wafer 10 has been etched/polished more than the threshold number of times, the dummy wafer 10 is deemed unsuitable for further use as a dummy wafer 10 in the method 100 .
- the dummy wafer 10 will not be subjected to any further deposition or recycling processes, but instead will be disposed of or used in some other way. However, if fewer than the threshold number of etching/polishing cycles have been carried out on the dummy wafer 10 , the dummy wafer 10 is returned to the beginning of the method 100 , where it is used in a new batch of wafers in the HfO 2 layer deposition at 102 of FIG. 1 .
- FIG. 4A is an illustration showing a surface of a dummy wafer 310 that underwent a polishing process to remove a deposited HfO 2 layer.
- An HfO 2 layer of about 600 nm thickness was deposited on the dummy wafer 310 .
- the dummy wafer 310 was then polished using CMP to remove between about 0.5 ⁇ m and 1 ⁇ m of thickness, which included removal of some of the HfO 2 layer as well as removal of some of the underlying wafer material.
- the polishing did not completely remove the HfO 2 layer.
- portions 312 of the HfO 2 layer remained in edge regions of the dummy wafer.
- the remaining portions 312 of the HfO 2 layer are shown in FIG. 4A as the stippled region near the perimeter of the dummy wafer 310 , which surrounds a central region of the dummy wafer 310 where the HfO 2 layer was removed by the polishing. These remaining portions 312 of the HfO 2 layer are undesirable because they peel from the dummy wafer 310 when the dummy wafer 310 is included with a new batch of wafers in a new HfO 2 layer deposition cycle.
- FIG. 4B is an illustration showing a surface of a dummy wafer 410 that underwent an etching process and a polishing process to remove a deposited HfO 2 layer in accordance with embodiments described herein.
- An HfO 2 layer of about 600 nm thickness was deposited on the dummy wafer 410 .
- the dummy wafer 410 was then subjected to an HF etching process using a 49% HF solution for an etch time of 40 minutes.
- the dummy wafer 410 was polished using CMP to remove between about 0.5 ⁇ m and 1 ⁇ m of thickness, which included removal of the HfO 2 layer as well as removal of some of the underlying wafer material.
- CMP CMP
- the dummy wafer 410 shown in FIG. 4B was nearly completely free of any residual HfO 2 layer that was not removed by the etching process and the polishing process.
- the nearly defect-free dummy wafer 410 shown in FIG. 4B is suitable for a repeated use in a new batch of wafers to be subjected to a new HfO 2 layer deposition cycle.
- the present disclosure provides, in various embodiments, methods that may be utilized to recycle and reuse dummy wafers, thereby facilitating repeated use of a single dummy wafer in multiple deposition processes using different batches of wafers. This results in cost savings, since the dummy wafer does not need to be discarded after a single use, or even after a certain number of deposition cycles or after a certain thickness of deposited material has accumulated. Instead, the methods described by the present disclosure allow the deposited material to be removed from the dummy wafer, the surface of the dummy wafer to be smoothed, and the dummy wafer made suitable for reuse with another batch of wafers for a new deposition cycle.
- a wafer processing method includes receiving a dummy wafer that includes a substrate and an oxide layer over the substrate. An etching process is performed on the wafer to remove the oxide layer. The method further includes performing a mechanical polishing process on the wafer. The wafer is then reused in a semiconductor process.
- a method includes depositing hafnium oxide (HfO 2 ) on a first batch of semiconductor wafers.
- the first batch of semiconductor wafers includes a first production wafer, a first particle control wafer, and a dummy wafer.
- the method further includes removing the deposited hafnium oxide from the dummy wafer by etching the dummy wafer with a hydrofluoric acid solution, and polishing the dummy wafer by chemical-mechanical planarization.
- a method includes depositing hafnium oxide (HfO 2 ) on a first batch of semiconductor wafers that includes a first plurality of production wafers, a first particle control wafer, and a dummy wafer. A thickness of a first hafnium oxide layer on the dummy wafer is measured, and a determination is made as to whether the measured thickness of the first hafnium oxide layer exceeds a threshold thickness.
- hafnium oxide HfO 2
- the dummy wafer is reused by depositing hafnium oxide on a second batch of semiconductor wafers that includes the dummy wafer, along with a second plurality of production wafers and a second particle control wafer.
- a thickness of a second hafnium oxide layer on the dummy wafer is measured, and the second hafnium oxide layer includes the first hafnium oxide layer.
- the method further includes determining whether the measured thickness of the second hafnium oxide layer exceeds the threshold thickness.
- the method includes removing the second hafnium oxide layer from the dummy wafer by etching the dummy wafer with a hydrofluoric acid solution, and polishing the dummy wafer by chemical-mechanical planarization.
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Abstract
Description
- A variety of processes are performed in the fabrication of semiconductor devices. For example, deposition processes are performed in the fabrication of some semiconductor devices to form a layer or film of an oxide or other material. Deposition processes may be carried out on a batch of semiconductor wafers, as opposed to depositing the layers on wafers one at a time. The batch of wafers that are exposed to a particular deposition process may include production wafers, which are the wafers on which the semiconductor devices are formed, and may also include dummy wafers. The dummy wafers are sometimes included in a batch of wafers so that uniform deposition on the production wafers of oxides or other materials can be achieved, e.g., the dummy wafers may be included in order to provide a desired number of total wafers in the batch, for example, in a case where less than a full batch of production wafers are available for processing and the processing is sensitive to the number/load of wafers being processed. The dummy wafers are thus subjected to the same deposition of material as are the production wafers; however, the dummy wafers do not typically proceed to further processing steps in the production of the semiconductor devices. Rather, the dummy wafers are typically discarded after a certain number of uses, or after the dummy wafers have accumulated a certain thickness of the deposited material. Discarding dummy wafers increases the costs of producing the production wafers.
- Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
-
FIG. 1 is a flowchart illustrating a wafer processing method, in accordance with some embodiments. -
FIG. 2 is a schematic illustration of a deposition apparatus that may be used for depositing an oxide layer on wafers, in accordance with some embodiments. -
FIG. 3A is a cross-sectional view illustrating a wafer after deposition of an oxide layer, in accordance with some embodiments. -
FIG. 3B is a cross-sectional view illustrating the wafer after etching has been performed to remove the oxide layer, in accordance with some embodiments. -
FIG. 3C is a cross-sectional view illustrating the wafer after polishing has been performed, in accordance with some embodiments. -
FIG. 4A is an illustration showing a surface of a wafer that was subjected to only a polishing process to remove a deposited oxide layer. -
FIG. 4B is an illustration showing a surface of a wafer that underwent an etching process and a polishing process to remove a deposited oxide layer, in accordance with some embodiments. - The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
- Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
- The following description of various embodiments refers to a dummy wafer or dummy wafers as examples of wafers that can be treated in accordance with the various methods described herein, and refers to hafnium oxide as an example of oxide materials that are deposited on wafers in accordance with embodiments described herein; however, the description of the various embodiments is not limited to processing of dummy wafers or using hafnium oxide as the oxide material that is deposited on the wafers. For example, other oxide materials include oxide materials used in the production of semiconductor devices that are deposited as thin films, e.g., other high-k dielectric materials, including hafnium silicon oxide (HfSiO), hafnium silicon oxynitride (HfSiON), hafnium tantalum oxide (HMO), hafnium titanium oxide (HMO), hafnium zirconium oxide (HfArO) and combinations thereof. Suitable materials for use in accordance with embodiments described herein include materials used in the production of semiconductor structures that can be deposited using one or more of chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), or other deposition techniques.
- Embodiments described herein include a wafer processing method that permits wafers, e.g., dummy wafers, including a substrate upon which an oxide material has been deposited, to be recycled for reuse in subsequent deposition cycles with a new batch of production wafers. Embodiments of described methods include an etching process performed on the dummy wafer to remove the oxide layer from the substrate. Implementations of described methods include performing a mechanical polishing process on the wafer after the etching process. After performing methods in accordance with disclosed embodiments, the dummy wafer is in condition for reuse in a semiconductor device fabrication process with a new batch of production wafers, for example, in an oxide deposition process.
- In some embodiments the etchant includes hydrofluoric acid and the polishing includes chemical-mechanical planarization.
-
FIG. 1 is a flowchart illustrating awafer processing method 100, in accordance with one or more embodiments of the present disclosure. At 102, wafers are loaded into a material, e.g., hafnium oxide (HfO2), deposition apparatus. -
FIG. 2 illustrates adeposition apparatus 200 which is used for depositing a HfO2 layer on wafers, in accordance with embodiments of the present disclosure. The wafers include at least one dummy wafer 10 and one or more production wafers 30. The wafers may also include one or moreparticle control wafers 20. Thedummy wafers 10 are non-production wafers included with the production wafers so that uniform deposition of oxides or other materials on the production wafers can be achieved. For example, the dummy wafers consume process gas in the HfO2 deposition apparatus in order to maintain a consistent, uniform deposition of HfO2 on the production wafers 30. Dummy wafers are commonly used in the case where less than a full batch of production wafers are available for processing and the processing is sensitive to the number/load of wafers being processed. When theparticle control wafers 20 are processed along with the production wafers 30, they are used to monitor the processing of the production wafers 30. For example, theparticle control wafers 20 may be used to measure a thickness of layers deposited during processing of the wafers, to monitor or measure defects introduced by the processing, and so on. Theproduction wafers 30 are wafers that are used to form semiconductor devices, such as circuit components, integrated circuits, chips, or the like. Thedummy wafer 10 may be any wafer onto which a layer or thin film of - HfO2 may be deposited. For example, the
dummy wafer 10 may be a monocrystalline silicon (Si) wafer, an amorphous Si wafer, a gallium arsenide (GaAs) wafer, or any other semiconductor wafer suitable to consume process gases in an HfO2 deposition process so that a layer or thin film of HfO2 is deposited on a surface of thedummy wafer 10. - As shown in
FIG. 2 , thedeposition apparatus 200 includes aprocess chamber 202 into which the wafers are loaded on a boat orcarrier 204. Theboat 204 is used to support the wafers and hold the wafers in a desired position within theprocess chamber 202 during the deposition process. Theboat 204 may be formed of, or otherwise includes, one or more supports, and may further include upper and lower plates positioned at top and bottom positions, respectively, along the supports. The wafers are disposed between the upper and lower plates, for example, in slots formed in the supports that hold edges of the wafers in particular spaced-apart positions. - The
boat 204 may hold any number of wafers, for example, 50 or 100 or more or fewer wafers, during the HfO2 layer deposition. In one or more embodiments, theboat 204 holds a batch of one-hundred (100) wafers during the HfO2 layer deposition. The batch of 100 wafers may include any combination ofdummy wafers 10,particle control wafers 20, andproduction wafers 30. - The
dummy wafers 10 are positioned at top and bottom positions in theboat 204, e.g., adjacent to the upper and lower plates, as shown. At the top and bottom positions within theprocess chamber 202, deposition conditions may be non-ideal, such that deposition may be non-uniform in these regions due to various factors such as non-uniform temperature control, gas flow, gas pressure, or the like. Thus, by placing thedummy wafers 10 at the top and bottom positions of theboat 204, as shown inFIG. 2 , thedummy wafers 10 may consume the process gasses in these regions of theprocess chamber 202, while theproduction wafers 30 may be positioned between thedummy wafers 10 and subjected to a more uniform HfO2 layer deposition. Theparticle control wafers 20 may be positioned anywhere between thedummy wafers 10, and may be positioned betweenproduction wafers 30. - Referring again to
FIG. 1 , at 104 an HfO2 layer is deposited on the wafers. Thedeposition apparatus 200 is any apparatus capable of depositing a layer of HfO2 on surfaces of the wafers. For example, thedeposition apparatus 202 is any apparatus that deposits HfO2 by chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), or any other deposition technique suitable to deposit an HfO2 layer to desired specifications as may be set based on a final structure to be formed on theproduction wafers 30. - The
deposition apparatus 200 includes various well-known components, features, and functionalities needed to deposit an HfO2 layer on one or more surfaces of the wafers in theboat 204. For example, theprocess chamber 202 may include tubes, gas injection ports, heaters, exhaust ports, and the like. The deposition of the HfO2 layer is performed under suitable deposition conditions within theprocess chamber 202, which include suitable temperature, gas flow rate, pressure, deposition time, and so on. - In accordance with embodiments described herein, the HfO2 layer is deposited as a thin film that forms on one or more surfaces of the
dummy wafers 10, theparticle control wafers 20, and theproduction wafers 30. The HfO2 layer on theparticle control wafers 20 and on theproduction wafers 30 is deposited to have a desired thickness, however, the thickness of the HfO2 layer formed on thedummy wafers 10 may vary somewhat from the thickness of the HfO2 layer formed on theparticle control wafers 20 and theproduction wafers 30. This variation in thickness of the deposited layer is a result of the deposition conditions being different in the upper and lower regions of theprocess chamber 202 where thedummy wafers 10 are positioned. -
FIG. 3A is a cross-sectional view illustrating adummy wafer 10 after deposition of an HfO2 layer 12, for example, at 104 ofFIG. 1 . While the HfO2 layer 12 is shown as being deposited on only one surface of thedummy wafer 10, it should be readily appreciated that in various embodiments, a HfO2 layer may be deposited on more than one, or even on all, exposed surfaces of thedummy wafer 10. - The
deposition apparatus 200 is configured to deposit the HfO2 layer having a particular thickness on the processed batch of wafers, which includes thedummy wafers 10, theparticle control wafers 20, and theproduction wafers 30. The thickness of the deposited layer may be varied, for example the thickness may be less than 600 nm, less than 300 nm, or less than 100 nm in various embodiments. In other embodiments, the thickness of the deposited layer is more than 600 nm. - Referring again to
FIG. 1 , at 106, themethod 100 includes determining whether a thickness of the HfO2 layer deposited on thedummy wafer 10 exceeds a threshold thickness. The thickness of the HfO2 layer on thedummy wafer 10 may be determined by any suitable thickness measuring device for measuring an oxide layer thickness on a semiconductor wafer. Such thickness measuring devices may include, for example, optical measurement devices that use interferometry, ellipsometry or the like, capacitance-based probes or gages, or any other device suitable for measuring the thickness of the deposited HfO2 layer. - The threshold thickness of the HfO2 layer on the
dummy wafer 10 is greater than the target thickness of the HfO2 layer that is deposited in one deposition cycle on the batch of wafers. For example, in one or more embodiments, the threshold thickness of the HfO2 layer on thedummy wafer 10 may be selected from within a range of 400 nm to 1000 nm, inclusive. In one or more embodiments, the threshold thickness of the HfO2 layer may be 600 nm. In other embodiments, the threshold thickness is more than or less than 600 nm and may be less than 400 nm or greater than 1000 nm. - The threshold thickness is selected based on various factors, including, for example, the stress that may be induced on the
dummy wafer 10 due to the thickness of the HfO2 layer that builds up on thedummy wafer 10 after one or more deposition cycles. For example, if the thickness of the HfO2 layer becomes too large or exceeds the threshold thickness, the dummy wafer may become stressed and may break or experience other undesirable defects. - In a case where the
dummy wafer 10 is a new or recycled dummy wafer and is therefore generally free of any HfO2 layer when it is loaded into the deposition apparatus 200 (e.g., at 102 ofFIG. 1 ), thedummy wafer 10 will likely have an HfO2 layer thickness after one deposition cycle (e.g., at 106 ofFIG. 1 ) that is less than the threshold thickness. For example, in one deposition cycle, thedummy wafer 10 may receive a HfO2 layer having a thickness that is less than 100 nm, as measured at 106FIG. 1 . In an embodiment where the threshold thickness is 600 nm, the measured thickness of the HfO2 layer is less than the threshold thickness. When the measured thickness of the deposited layer is less than the threshold thickness, as illustrated at 106 inFIG. 1 ,dummy wafer 10 is returned to the beginning ofmethod 100 without further treatment. In other words, when the measured thickness of the deposited layer on the dummy wafer is less than the threshold thickness,dummy wafer 10 does not require any special treatment before it can be used in a subsequent deposition cycle with the same batch of wafers or a subsequent deposition cycle with another, different batch of wafers. - On the other hand, when the determined thickness of the HfO2 layer on the
dummy wafer 10 exceeds the threshold thickness, in accordance withdetermination block 106 inFIG. 1 ,dummy wafer 10 is processed to prepare it for reuse. Referring to 108 inFIG. 1 , when the determined thickness of the HfO2 layer exceeds the threshold thickness,dummy wafer 10 is subjected to a process to remove the accumulated HfO2 layer. The process used to remove the accumulated HfO2 layer includes an etching process or any other suitable process for removing the HfO2 layer with little or no damage to the underlying substrate. - A suitable etching process performed at 108 is a wet etching process using an etchant to remove the HfO2 layer. In one or more embodiments, a hydrogen fluoride (HF) solution, or hydrofluoric acid, is used as the etchant to remove the HfO2 layer. Embodiments described herein are not limited to using hydrofluoric acid as an etchant and other etchants suitable for removing the HfO2 layer from the wafer can be used. In embodiments where the deposited layer of oxide to be removed is not HfO2, HF solution etchants or etchants other than an HF solution can be used, including etchants that are known to remove the target oxide. The
dummy wafer 10 may be immersed in a bath of HF etchant to remove the HfO2 layer, or the HfO2 layer may be removed by an HF vapor that is supplied to one or more surfaces of thedummy wafer 10 in a vapor etching process. - The etchant and the etching conditions are selected to remove a desired thickness of the HfO2 layer. For example, if the threshold thickness of the HfO2 layer on the
dummy wafer 10 is 600 nm, the etchant, etch rate, etch time, temperature and other appropriate etching conditions are selected to remove as much as possible of the 600 nm thick HfO2 layer without removing or damaging theunderlying dummy wafer 10. In one or more embodiments, the etchant is a 49% HF solution, e.g., hydrofluoric acid containing 49% by weight of hydrogen fluoride (HF), and the etch time may be equal to or greater than 30 minutes, and in various embodiments the etch time may be equal to or greater than 40 minutes. These etching conditions have resulted in the removal of all, or substantially all, of the 600 nm thick HfO2 layer on thedummy wafer 10. In accordance with other embodiments, the HF solution contains more than or less than 49% by weight hydrogen fluoride and the etch time is greater than or less than 40 minutes. -
FIG. 3B is a cross-sectional view illustrating thedummy wafer 10 after HF etching has been performed to remove the HfO2 layer 12 at 108 ofFIG. 1 . As seen fromFIG. 3B , thesurface 14 of thedummy wafer 10 is rough or uneven after the HF etching. This rough surface may cause defects during a subsequent deposition of an HfO2 layer during use of thedummy wafer 10 in another deposition cycle. - In accordance with some embodiments described herein, at 110 in
FIG. 1 , thedummy wafer 10 is polished to reduce surface roughness and to smooth the surface of thedummy wafer 10. Suitable polishing processes include polishing processes that smooth the surface of thedummy wafer 10 so that an HfO2 layer may be evenly deposited on the surface of thedummy wafer 10 in a subsequent deposition cycle. In one or more embodiments, a chemical-mechanical planarization (CMP) or polishing process is performed at 110 to smooth the surface of thedummy wafer 10. In one or more embodiments, the polishing process removes a thickness of thedummy wafer 10 within a range from 0.5 μm to inclusive. In other embodiments, more than 1 μm or less than 0.5 μm are removed from thedummy wafer 10. -
FIG. 3C is a cross-sectional view illustrating thedummy wafer 10 after polishing has been performed at 110 ofFIG. 1 . As can be seen fromFIG. 3C , thesurface 16 of thedummy wafer 10 is smooth and even after the polishing. The smooth surface facilitates even deposition of an HfO2 layer during use of thedummy wafer 10 in another deposition cycle. - At 112 in
FIG. 1 , thedummy wafer 10 is inspected, for example, by an imaging machine, to determine whether a sufficient amount of the HfO2 layer has been removed such that thedummy wafer 10 is suitable for use as a dummy wafer in another deposition cycle. In some embodiments, determining whether sufficient amounts of the HfO2 layer have been removed involves determining whether any of the HfO2 layer remains on the surface of the polished dummy wafer. In some embodiments, the inspection checks for other defects in the dummy wafer that would make it unsuitable for use as a dummy wafer in another deposition cycle. In yet other embodiments, other criteria are used to determine whether the polished dummy wafer is suitable for use as a dummy wafer in another deposition cycle. If the inspection indicates the dummy wafer is suitable for another deposition cycle, then thedummy wafer 10 is reused in themethod 100. If the inspection determines the polished dummy wafer is not suitable for another deposition cycle, e.g., insufficient amounts of the HfO2 layer were removed or the wafer surface has too many defects, thepolished dummy wafer 10 is subjected to anotherHF etch 108 and/orpolish 110. That is, thedummy wafer 10 is returned to the etching process at 108, or may be returned to the polishing process at 110. The reason why the dummy wafer was determined to be unsuitable for another deposition cycle is used to determine whether thedummy wafer 10 will undergo both a repeated etching process and polishing process, or only the polishing process or only the etching process. For example, if the inspection at 112 reveals that the HfO2 layer has been suitably removed, but the surface of thedummy wafer 10 is not as smooth as desired, thedummy wafer 10 is returned to the polishing process at 110. On the other hand, if the inspection at 112 reveals that the HfO2 layer has not been suitably removed, thedummy wafer 10 is returned to the etching process at 108, which is followed by the polishing process at 110. - The inspection at 112 may be performed, for example, by an imaging machine that images the surface of the
dummy wafer 10. The imaging machine may be, for example, a defect inspection system, including an optical imaging machine, optical scattering machine, or the like, and may utilize automatic defect classification equipment and techniques to automatically classify detected defects. The imaging machine may detect the presence of defects on thedummy wafer 10, and further may identify the spatial locations of such defects on the surface of thedummy wafer 10. - If the
dummy wafer 10 is determined to be suitable for a subsequent deposition cycle at 112, e.g., if the surface of thedummy wafer 10 is determined to be suitably free of defects, thedummy wafer 10 is returned to the start of themethod 100 for reuse as a dummy wafer in a new HfO2 layer deposition cycle. - In some embodiments,
method 100 includes, at 114, determining whether a number of etching/polishing cycles performed on thedummy wafer 10 exceeds a threshold number of etching/polishing cycles. Embodiments of the wafer processing method describe herein include one or both of the etching process at 108 and the polishing process at 110. Thus, the number of times that aparticular dummy wafer 10 has undergone one or more of these processes is compared to a threshold at 114. If thedummy wafer 10 has been etched/polished more than the threshold number of times, thedummy wafer 10 is deemed unsuitable for further use as adummy wafer 10 in themethod 100. That is, thedummy wafer 10 will not be subjected to any further deposition or recycling processes, but instead will be disposed of or used in some other way. However, if fewer than the threshold number of etching/polishing cycles have been carried out on thedummy wafer 10, thedummy wafer 10 is returned to the beginning of themethod 100, where it is used in a new batch of wafers in the HfO2 layer deposition at 102 ofFIG. 1 . -
FIG. 4A is an illustration showing a surface of adummy wafer 310 that underwent a polishing process to remove a deposited HfO2 layer. An HfO2 layer of about 600 nm thickness was deposited on thedummy wafer 310. Thedummy wafer 310 was then polished using CMP to remove between about 0.5 μm and 1 μm of thickness, which included removal of some of the HfO2 layer as well as removal of some of the underlying wafer material. However, as shown inFIG. 4A , the polishing did not completely remove the HfO2 layer. In particular, after polishing,portions 312 of the HfO2 layer remained in edge regions of the dummy wafer. The remainingportions 312 of the HfO2 layer are shown inFIG. 4A as the stippled region near the perimeter of thedummy wafer 310, which surrounds a central region of thedummy wafer 310 where the HfO2 layer was removed by the polishing. These remainingportions 312 of the HfO2 layer are undesirable because they peel from thedummy wafer 310 when thedummy wafer 310 is included with a new batch of wafers in a new HfO2 layer deposition cycle. -
FIG. 4B is an illustration showing a surface of adummy wafer 410 that underwent an etching process and a polishing process to remove a deposited HfO2 layer in accordance with embodiments described herein. An HfO2 layer of about 600 nm thickness was deposited on thedummy wafer 410. Thedummy wafer 410 was then subjected to an HF etching process using a 49% HF solution for an etch time of 40 minutes. Next, thedummy wafer 410 was polished using CMP to remove between about 0.5 μm and 1 μm of thickness, which included removal of the HfO2 layer as well as removal of some of the underlying wafer material. In contrast to thedummy wafer 310 shown inFIG. 4A , thedummy wafer 410 shown inFIG. 4B was nearly completely free of any residual HfO2 layer that was not removed by the etching process and the polishing process. The nearly defect-free dummy wafer 410 shown inFIG. 4B is suitable for a repeated use in a new batch of wafers to be subjected to a new HfO2 layer deposition cycle. - The present disclosure provides, in various embodiments, methods that may be utilized to recycle and reuse dummy wafers, thereby facilitating repeated use of a single dummy wafer in multiple deposition processes using different batches of wafers. This results in cost savings, since the dummy wafer does not need to be discarded after a single use, or even after a certain number of deposition cycles or after a certain thickness of deposited material has accumulated. Instead, the methods described by the present disclosure allow the deposited material to be removed from the dummy wafer, the surface of the dummy wafer to be smoothed, and the dummy wafer made suitable for reuse with another batch of wafers for a new deposition cycle.
- According to one embodiment, a wafer processing method includes receiving a dummy wafer that includes a substrate and an oxide layer over the substrate. An etching process is performed on the wafer to remove the oxide layer. The method further includes performing a mechanical polishing process on the wafer. The wafer is then reused in a semiconductor process.
- According to another embodiment, a method is provided that includes depositing hafnium oxide (HfO2) on a first batch of semiconductor wafers. The first batch of semiconductor wafers includes a first production wafer, a first particle control wafer, and a dummy wafer. The method further includes removing the deposited hafnium oxide from the dummy wafer by etching the dummy wafer with a hydrofluoric acid solution, and polishing the dummy wafer by chemical-mechanical planarization.
- According to yet another embodiment, a method is provided that includes depositing hafnium oxide (HfO2) on a first batch of semiconductor wafers that includes a first plurality of production wafers, a first particle control wafer, and a dummy wafer. A thickness of a first hafnium oxide layer on the dummy wafer is measured, and a determination is made as to whether the measured thickness of the first hafnium oxide layer exceeds a threshold thickness. In response to the measured thickness of the first hafnium oxide layer being less than the threshold thickness, the dummy wafer is reused by depositing hafnium oxide on a second batch of semiconductor wafers that includes the dummy wafer, along with a second plurality of production wafers and a second particle control wafer. A thickness of a second hafnium oxide layer on the dummy wafer is measured, and the second hafnium oxide layer includes the first hafnium oxide layer. The method further includes determining whether the measured thickness of the second hafnium oxide layer exceeds the threshold thickness. In response to the measured thickness of the second hafnium oxide layer exceeding the threshold thickness, the method includes removing the second hafnium oxide layer from the dummy wafer by etching the dummy wafer with a hydrofluoric acid solution, and polishing the dummy wafer by chemical-mechanical planarization.
- The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
- The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
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US20200219745A1 (en) * | 2017-09-27 | 2020-07-09 | Kokusai Electric Corporation | Substrate processing apparatus and recording medium |
US20210384090A1 (en) * | 2020-06-08 | 2021-12-09 | Changxin Memory Technologies, Inc. | Auxiliary wafer, preparation method of auxiliary wafer, and semiconductor production process |
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TW416104B (en) * | 1998-08-28 | 2000-12-21 | Kobe Steel Ltd | Method for reclaiming wafer substrate and polishing solution composition for reclaiming wafer substrate |
US6406923B1 (en) * | 2000-07-31 | 2002-06-18 | Kobe Precision Inc. | Process for reclaiming wafer substrates |
FR2843826B1 (en) * | 2002-08-26 | 2006-12-22 | RECYCLING A PLATE COMPRISING A BUFFER LAYER AFTER SELECTING A THIN LAYER | |
FR2849715B1 (en) * | 2003-01-07 | 2007-03-09 | Soitec Silicon On Insulator | RECYCLING A PLATE COMPRISING A MULTILAYER STRUCTURE AFTER REMOVING A THIN LAYER |
EP2219208B1 (en) * | 2009-02-12 | 2012-08-29 | Soitec | Method for reclaiming a surface of a substrate |
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