US20190165242A1 - Low loss architecture for superconducting qubit circuits - Google Patents
Low loss architecture for superconducting qubit circuits Download PDFInfo
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Definitions
- the present invention generally relates to superconducting structures, and more specifically, to low loss architectures for superconducting qubit circuits.
- Superconducting quantum computing is an implementation of a quantum computer in superconducting electronic circuits. Quantum computation studies the application of quantum phenomena for information processing and communication.
- the basic building block of such a quantum computer is the quantum bit or qubit.
- a qubit is similar to the classical bit in that it is a system of two discrete states, which can be in the discrete quantum states
- a quantum gate is a generalization of a logic gate. However, the quantum gate describes the transformation that one or more qubits will experience after the gate is applied on them, given their initial state.
- the electromagnetic energy associated with the qubit can be stored in so-called Josephson junctions and in the capacitive and inductive elements that are used to form the qubit.
- a microwave signal is applied to the microwave readout cavity that couples to the qubit at the cavity frequency.
- the transmitted (or reflected) microwave signal goes through multiple thermal isolation stages and low-noise amplifiers that are required to block or reduce the noise and improve the signal-to-noise ratio.
- the microwave signal is measured at room temperature.
- the amplitude and/or phase of the returned/output microwave signal carry information about the qubit state, such as whether the qubit is at a ground state, an excited state, or a superposition of the two states.
- Embodiments of the present invention are directed to a structure.
- a non-limiting example of the structure includes a first surface having an inductive element of a resonator.
- the structure includes a second surface having a first portion of a capacitive element of the resonator and at least one qubit, where a second portion of the capacitive element of the resonator is on the first surface.
- Embodiments of the present invention are directed to a method of forming a structure.
- a non-limiting example of the method of forming the structure includes disposing an inductive element of a resonator on a first surface and disposing a first portion of a capacitive element of the resonator and at least one qubit on a second surface, where a second portion of the capacitive element of the resonator is on the first surface.
- Embodiments of the present invention are directed to a structure.
- a non-limiting example of the structure includes a first surface having inductive elements of resonators and first portions of capacitive elements of the resonators.
- the structure includes a second surface having at least two qubits coupled by a bus resonator.
- the second surface includes second portions of the capacitive elements of the resonators.
- Embodiments of the present invention are directed to a method of forming a structure.
- a non-limiting example of the method of forming the structure includes disposing inductive elements of resonators and first portions of capacitive elements of the resonators on a first surface.
- the method includes disposing at least two qubits coupled by a bus resonator on a second surface.
- the second surface includes second portions of the capacitive elements of the resonators.
- Embodiments of the present invention are directed to a superconducting qubit circuit.
- a non-limiting example of superconducting qubit circuit includes readout resonators configured to respectively couple to qubits, one or more bus resonators configured to couple at least two of the qubits together, a first surface comprising inductive elements of the readout resonators, and a second surface having the qubits. The first and second surfaces are different circuit planes.
- FIG. 1 depicts a schematic circuit diagram of two coupled qubits with individual readout according to embodiments of the invention
- FIG. 2 depicts a top view of a portion of a qubit plane according to embodiments of the invention
- FIG. 3 depicts a top view of a portion of a readout plane according to embodiments of the invention.
- FIG. 4 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention
- FIG. 5 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention
- FIG. 6 depicts an example layout of a qubit coupling to a readout resonator and a bus resonator according to embodiments of the invention
- FIG. 7 depicts a flow chart of method of forming a structure according to embodiments of the invention.
- FIG. 8 depicts a flow chart of method of forming a structure according to embodiments of the invention.
- FIG. 9 depicts a flow chart of method of forming a structure according to embodiments of the invention.
- FIG. 10 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 11 depicts a cross-sectional view of the resonator in FIG. 10 according to embodiments of the invention.
- FIG. 12 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 13 depicts a cross-sectional view of the resonator in FIG. 12 according to embodiments of the invention.
- FIG. 14 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 15 depicts a cross-sectional view of the example resonator in FIG. 14 according to embodiments of the invention.
- FIG. 16 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 18 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 19 depicts a cross-sectional view of the resonator in FIG. 18 according to embodiments of the invention.
- FIG. 20 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 21 depicts a cross-sectional view of the resonator in FIG. 20 according to embodiments of the invention.
- FIG. 22 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 23 depicts a cross-sectional view of the resonator in FIG. 22 according to embodiments of the invention.
- FIG. 24 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- FIG. 25 is a cross-sectional view of the resonator in FIG. 22 according to embodiments of the invention.
- FIG. 26 depicts a flow chart of a method of forming a structure according to embodiments of the invention.
- FIG. 28 depicts a flow chart of forming a superconducting qubit circuit according to embodiments of the invention.
- Typical uses of bumps and/or through-silicon-vias to connect different circuits within a superconducting qubit chip include either flux controls or signal delivery.
- transmon qubits a popular superconducting qubit, are electromagnetic circuits, there are a number of factors in their environment which can degrade their performance, such as fluctuators coupled to the qubit and losses in the materials and/or connections.
- Qubit errors can be classified as either relaxation and dephasing.
- one or more embodiments of the invention address the above-described shortcomings of the prior art by providing a novel resonator structure. More specifically, the above-described aspects of the invention address the shortcomings of the prior art by providing a compact (lumped element) resonator structure spanning two superconducting circuit planes, and the compact resonator structure maintains most of the capacitive energy stored on one plane and most of the inductive energy stored on the other plane. In the context of qubit circuits, this compact resonator structure allows for keeping electrical currents off the qubit plane and on the readout path.
- Electromagnetic fields at the transition/connection regions of the compact resonator are well controlled/designed to avoid coupling of the qubits to lossy parts of the system because the lumped element resonator has magnetic fields focused in the well-defined regions of the chip, according to embodiments of the invention.
- qubit 102 (e.g., also referred to as qubit # 1 ) is coupled to the bus resonator 104 (e.g., also referred to as inter-qubit coupling bus) via coupling capacitor 182 and is coupled to readout resonator 106 (e.g., also referred to as readout resonator # 1 ) via coupling capacitor 183 .
- bus resonator 104 e.g., also referred to as inter-qubit coupling bus
- readout resonator 106 e.g., also referred to as readout resonator # 1
- FIG. 1 illustrates one example of a superconducting qubit circuit.
- Embodiments of the invention can be utilized in any type of superconducting qubit circuit as understood by one skilled in the art and are not meant to be limited to the exact elements or the exact configuration of elements in FIG. 1 .
- two qubits 102 are shown coupled by one bus resonator 104 and each qubit 102 is coupled to its own readout resonator 106 , it should be appreciated that multiple qubits 102 (with their respective readout resonators 106 ) can be coupled using multiple bus resonators 104 in various configurations.
- Embodiments of the invention are not meant to be limited to a specific number of qubits 102 , bus resonators 104 , and readout resonators 106 .
- FIG. 1 shows system 190 and system 192 , each representative of connecting to a 50 ⁇ environment.
- the system 190 represents a 50 ⁇ resistor and voltage source (V 1 ), and the voltage source V 1 can be utilized to generate a qubit drive signal at the resonance frequency of qubit 102 (e.g., qubit # 1 ) and generate a readout signal at the resonance frequency of the readout resonator 106 (e.g., readout resonator # 1 ).
- the system 192 represents a 50 ⁇ resistor and voltage source (V 2 ), and the voltage source V 2 can be utilized to generate a qubit drive signal at the resonance frequency of qubit 102 (e.g., qubit # 2 ) and generate a readout signal at the resonance frequency of the readout resonator 106 (e.g., readout resonator # 2 ).
- the readout resonator 106 along with any resonator such as the bus resonator 104 , can be implemented as a compact (lumped element) resonator structure as discussed further herein.
- the compact resonator structure can also be referred to as a bumped resonator structure.
- FIG. 2 depicts a top view of a portion of a qubit plane 202 according to embodiments of the invention.
- the qubit plane 202 illustrates a part of the readout resonator 106 in the circuit 100 .
- the qubit plane 202 includes a capacitor pad 204 in direct contact with an interconnect 210 .
- the interconnect 210 is shown as dashed lines because interconnect 210 is underneath the capacitor pad 204 .
- the interconnect 210 can be a solder connection such a solder bump and/or a through-silicon-via.
- the capacitor pad 204 is depicted in a square like shape in this illustration. It should be appreciated that the capacitor pad 204 can be other shapes such as rectangular, circular, polygonal, triangular, etc.
- the capacitor pad 204 is surrounded by a dielectric material 220 .
- the dielectric material 220 can be a non-electrically conductive, such as an insulator.
- the dielectric material 220 can be air such as, for example, as an empty space or vacuum.
- a ground plane 206 surrounds the dielectric material 220 so as to separate the capacitor pad 204 , circumscribed within the dielectric material 220 , from the ground plane 206 outside of the dielectric material 220 .
- the ground plane 206 can be on one, two, three, and/or all sides of the capacitor pad 204 .
- the qubit 102 is formed on the qubit plane 202 but is not illustrated in FIG. 2 for the sake of conciseness. On the qubit plane 202 , a portion of the compact lumped element resonator 106 (i.e., readout resonator) is the capacitor pad 204 .
- At least a portion of the capacitor pad 204 , at least a portion of the interconnect 210 , and at least a portion of the capacitor pad 304 have an equipotential.
- the readout plane 302 can also be referred to as the control plane because transmission signal for driving the qubit 102 (each qubit can have its own resonance frequency) and reading out the readout resonator 106 (each readout resonator can have its own resonance frequency) can enter and exit the readout plane 302 .
- the readout plane 302 includes a capacitor pad 304 in direct contact with the interconnect 210 .
- the capacitor pad 304 and capacitor pad 204 are attached to opposite ends/portions of the interconnect 210 .
- the interconnect 210 is shown as dashed lines because interconnect 210 is underneath the capacitor pad 304 .
- the interconnect 210 is underneath (or above) the capacitor pad 204 or capacitor pad 304 is based on whether the qubit plane 202 is on top or the readout plane 302 is on top. For example, if the qubit plane 202 having the capacitor pad 204 is on top and the readout plane 302 is on the bottom, then interconnect 210 is underneath the capacitor pad 204 but above the capacitor pad 304 of the readout plane 302 . Conversely, if the readout plane 302 having the capacitor pad 304 is on top and the qubit plane 202 is on the bottom, then interconnect 210 is underneath the capacitor pad 304 but above the capacitor pad 204 of the qubit plane 202 . In some cases, the qubit plane 202 and readout plane 302 can be on the side (e.g., left and right sides), and not necessarily on the top and bottom.
- the readout plane 302 includes the inductor 130 .
- the inductor 130 is formed of a spiral coil 332 that meanders around the capacitor pad 304 . Forming the spiral coil 332 around the capacitor pad 304 is one example.
- spiral coil 332 is the inductive part of the readout resonator 106 , but the readout resonator 106 is not limited to the spiral coil 332 as the inductive part and there can be other structures utilized.
- Another example, structure, and/or shape to form the spiral coil 332 of the inductor can include a meandering transmission line, a kinetic inductor (with high kinetic inductance material), a Josephson junction, and/or a series array of Josephson junctions, as discussed further in FIGS. 10-28 .
- Kinetic inductance originates in the kinetic energy required by each electron that is contributing to a flow of current.
- Kinetic inductance is the manifestation of the inertial mass of mobile charge carriers (e.g., electrons) in alternating electric fields as an equivalent series inductance.
- Kinetic inductance is observed in high carrier mobility conductors (e.g. superconductors) and at very high frequencies.
- the high kinetic inductor is based on the geometry of the material and being a superconductor material that has a high inductance at superconducting temperatures (e.g., cryogenic temperatures).
- a high kinetic inductance material for a kinetic inductor can include niobium nitride (NbN), niobium titanium nitride (NbTiN), and/or titanium nitride (TiN).
- Niobium nitride has a higher inductance than niobium alone.
- the high kinetic inductor can be formed in a line and is not required to be coiled like the spiral coil 332 .
- a Josephson junction is also an inductive element, and one or more Josephson junctions (e.g., in series) can be utilized to replace the spiral coil 332 as the inductive element in the readout resonator 106 .
- one end of the spiral coil 332 is attached to the capacitor pad 304 at connection 328 and the other end of the spiral coil 332 is shunted to a ground plane 306 at connection 326 .
- the ground plane 306 surrounds the capacitor pad 304 and the spiral coil 332 .
- the ground plane 306 can be on one, two, three, and/or all sides of the capacitor pad 304 . It should be appreciated that the capacitor pad 304 can be other shapes such as rectangular, circular, polygonal, triangular, etc.
- a dielectric material 320 can surround the capacitor pad 304 (except at the connection 328 and is in between the wires (i.e., lines) of the spiral coil 332 .
- the dielectric material 320 and 220 can be the same in some implementations. In other implementations, the dielectric material 320 and 220 can be different materials.
- the dielectric material 320 can be a non-electrically conductive material, such as an insulator. Also, the dielectric material can be an empty space such as, for example, air or vacuum.
- the spiral coil 332 of the inductor 130 is coupled (e.g., mostly inductively coupled) to a transmission line 322 .
- the spiral coil 332 can be inductively coupled to the transmission line 322 .
- the transmission line 322 connects the inductor 130 to launch pads which provide external connection to readout resonator 106 (via the inductor 130 ) and to the qubit 102 .
- the readout resonator 106 has portions in both the qubit plane 202 and the readout plane 302 .
- the capacitor 150 of the readout resonator 106 is formed of the qubit plane capacitor pad 204 , the interconnect 210 , and the readout plane capacitor pad 304 while the inductor 130 is formed of the spiral coil 332 .
- the capacitive portion (shown as 150 in FIG. 1 ) of the readout resonator 106 is on both the qubit plane 202 and the readout plane 302 .
- the inductive portion shown as inductor 130 formed by the spiral coil 332 is only on the readout plane 302 and is not on the qubit plane 202 . Further description of the readout resonator 106 can be understood by the cross-sectional views depicted in FIGS. 4 and 5 .
- FIG. 4 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention.
- FIG. 4 shows another depiction of the lumped element readout resonator 106 .
- FIG. 4 illustrates an example in which the interconnect 210 is a solder bump that attaches to both the capacitor pad 204 and to the capacitor pad 304 .
- the solder bump physically and electrically connects the qubit plane 202 to the readout plane 302 .
- the readout resonator 106 is formed of the spiral coil 332 of the inductor 130 and the capacitor pad 204 , capacitor pad 304 , and interconnect 210 (e.g., solder bump) of the capacitor 150 .
- the inductor 130 made of the spiral coil 332 is only on the readout plane 302 such that the qubit plane 202 is free of the inductive elements (e.g., spiral coil 332 ) of the readout resonator 106 .
- the qubit 102 is isolated from magnetic fields created by the electrical current flowing through the spiral coil 332 of the inductor 130 .
- the magnetic fields of the inductor 130 of readout resonator 106 can cause decoherence of the qubit 102 .
- the capacitor 150 has two plates, where one plate is the capacitor pad 204 in the qubit plane 202 and the other plate is the capacitor pad 304 in the readout plane 302 .
- FIG. 4 depicts the qubit plane 202 formed on a substrate 402 and the readout plane 302 formed on a substrate 404 .
- the substrate 402 and 404 can be any suitable material.
- the substrates 402 and 404 may or may not be the same material.
- the substrates 402 and 404 can be silicon substrates, sapphire substrates, silicon-on-insulator substrates, and/or any combination thereof.
- the substrate 402 can be one wafer and the substrate 404 can be another wafer.
- the qubit plane 202 formed on substrate 402 can be one chip and the readout plane 302 formed on substrate 404 can be another chip.
- the ground plane 206 of the qubit plane 202 can be electrically and physically connected to the ground plane 306 of the readout plane 302 by multiple interconnects such that the ground planes 206 and 306 are maintained at the same potential (or nearly the same potential).
- the interconnect 210 i.e., the solder bump
- the readout plane 302 is depicted as being on top of the qubit plane 202 , the selection of the top and bottom planes is arbitrary.
- the circuit elements in FIGS. 1-6 can be formed by lithography, electroplating, etc., and patterning accordingly as understood by one skilled in the art. More particularly, the Josephson junctions can be formed by shadow evaporation techniques, etc.
- the circuits of the readout plane 302 and qubit plane 202 can be separately formed.
- solder bump as the interconnect 210 on any one of the planes and the other plane can then be connected to the other plane via the solder bump.
- under-bump metallization UBM
- the materials of the circuit elements in the qubit plane 202 and readout plane 302 are superconducting materials, along with the interconnect 210 .
- FIG. 5 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention.
- FIG. 5 shows another depiction of the lumped element readout resonator 106 .
- the interconnect 210 is a through-silicon-via that attaches to both the capacitor pad 204 and to the capacitor pad 304 .
- the through-silicon-via physically and electrically connects the qubit plane 202 to the readout plane 302 .
- the through-silicon-via is formed through wafer 502 to thereby connect the qubit and readout planes 202 and 302 . Instead of the qubit plane 202 facing the readout plane 302 in FIG.
- the qubit and readout planes 202 and 302 are formed on opposite sides/surfaces of the wafer 502 .
- the wafer 502 can include the same materials discussed above for substrates 402 and/or 404 .
- the ground plane 206 of the qubit plane 202 can be electrically and physically connected to the ground plane 306 of the readout plane 302 by multiple interconnects such that the ground planes 206 and 306 are maintained at the same potential (or nearly the same potential).
- the inductor 130 made of the spiral coil 332 is only on the readout plane 302 such that the qubit plane 202 is free of the inductive elements (e.g., spiral coil 332 ) of the readout resonator 106 .
- the capacitor 150 has two plates, where one plate is the capacitor pad 204 in the qubit plane 202 and the other plate is the capacitor pad 304 in the readout plane 302 .
- the readout resonator 106 is formed of the spiral coil 332 of the inductor 130 and the capacitor pad 204 , capacitor pad 304 , and interconnect 210 (e.g., TSV) of the capacitor 150 .
- interconnect 210 e.g., TSV
- the circuit of the qubit plane 202 can be formed on one surface of the wafer 502 , the through-silicon-via is formed to connect with the capacitor pad 204 of the qubit plane 202 , and the circuit of the readout plane 302 is formed on the opposite surface of the wafer 502 such that the capacitor pad 304 is in direct connect with the through-silicon-via (i.e., interconnect 210 ).
- FIG. 6 depicts an example layout of a qubit coupling to a readout resonator and a bus resonator according to embodiments of the invention.
- FIG. 2 illustrates a portion of the qubit plane 202 that focuses on a portion of the readout resonator 106 .
- FIG. 6 illustrates an example showing the qubit 102 capacitively coupled via coupling capacitor 180 to the capacitor pad 204 of the readout resonator 106 .
- the qubit 102 shows the capacitor 162 formed of qubit capacitor pads 602 A and 602 B separated by the dielectric material 220 (which may be air or vacuum).
- the qubit 102 includes the Josephson junction 160 connected to the qubit capacitor pads 602 A and 602 B.
- the capacitor pads 602 A and 602 B are superconducting material.
- the Josephson junction 160 includes two superconducting materials separated by any of the following: a dielectric material, a short length of normal (non-superconducting) metal, or a constriction of a superconductor.
- the qubit 102 is capacitively coupled to the bus resonator 104 via coupling capacitor 181 . In this example, the bus resonator 104 is not shown.
- the bus resonator 104 can be formed in the same manner discussed for the readout resonator 106 , such that the bus resonator 104 is a compact lumped element resonator (using a solder bump and/or through-silicon-via interconnect 210 ).
- the bus resonator 104 can be formed using state-of-the-art techniques as understood by one skilled in the art, and the bus resonator 104 is not shown in FIG. 6 so as not to obscure the figure.
- compact (lumped element) resonator structure e.g., readout resonator 106
- the compact resonator structure maintains most of the capacitive energy stored on the qubit plane 202 and most of the inductive energy stored on the readout plane 302 .
- This compact resonator structure keeps electrical currents off the qubit plane 202 containing the qubit 102 and on the readout path on the readout plane 302 .
- Electromagnetic fields at the transition/connection regions are well controlled/designed to avoid coupling of the qubits to lossy parts of the system (i.e., inductor 130 having spiral coil 332 ) because the lumped element resonator 106 has magnetic fields focused in the well-defined regions (e.g., the inductive part which is spiral coil 332 on readout plane 302 ) of the chip.
- inductors are classified into three distinct categories to better understand location with respect to the qubit plane 202 and the readout plane 302 , particular as it relates to placement of the capacitor (C) and inductor (L):
- Josephson junctions are non-linear, lossless, lumped inductors. Josephson junctions provide the inductive part of the qubit LC resonators. As the term lossless suggests, Josephson junctions are not problematic from a loss perspective. Furthermore, the (inductive) energy in Josephson junctions is stored locally and the junctions in the qubits 102 interact inductively very little with the external circuit (other parts of the circuitry on the qubit plane 202 and/or the readout plane 302 ). Josephson junctions or series arrays of Josephson junctions can also be used as a replacement for spiral coil 332 .
- Bus resonators 104 between qubits fall into this category of LC resonators.
- a bus resonator 104 enables/facilitates transmission of a photon of frequencies different from its resonance frequency or harmonics thereof. Loss from these bus resonators (and their inductive parts) is not a concern, because the modes (i.e., the resonance frequency and its harmonics) of the resonator do not get excited.
- these bus resonators are made with very high quality factors (Q-factors), i.e., very low loss.
- readout resonators 106 fall into this category.
- the readout resonator 106 also couple/connect to the external (off-chip) circuitry (all the way to room-temperature electronics).
- the experimenters are concerned about the loss created by readout resonator 106 , and the loss is stronger in their inductive parts, and embodiments of the invention provide techniques and structures to move the inductive parts of the readout resonator 106 away from the (sensitive) qubits as discussed herein.
- the circuit elements of the quantum/qubit circuit 100 , the qubit plane 202 , and the readout plane 302 can be made of superconducting material.
- the respective resonators, inductors, capacitors, interconnects (e.g., solder bump and TSV), transmission lines, qubits, ground planes, spiral coils, etc., are made of superconducting materials.
- superconducting materials at low temperatures, such as about 10-100 millikelvin (mK), or about 4 K
- the Josephson junctions are made of superconducting material, and their tunnel junctions can be made of a thin tunnel barrier, such as an oxide.
- the capacitors can be made of superconducting material separated by low-loss dielectric material, air, etc.
- the transmission lines (i.e., wires) connecting the various elements are made of a superconducting material.
- FIG. 7 depicts a flow chart 700 of method of forming a structure (e.g., resonator 106 ) according to embodiments of the invention.
- an inductive part e.g., inductor 130
- a capacitive part is disposed on the first surface (e.g., readout plane 302 ) and a second surface (e.g., qubit plane 202 ).
- an interconnect structure e.g., interconnect 210
- the second surface e.g., between the readout plane 302 and qubit plane 202 .
- the capacitive part includes the interconnect structure.
- the capacitor 150 includes the capacitor pad 204 , the capacitor pad 304 , and interconnect 210 .
- the inductive part e.g., the inductor 130
- the inductive part is selected from the group consisting of a spiral coil, a spiral-like coil, a meandering wire/transmission line, a (straight) kinetic inductor (with high kinetic inductance material), a Josephson junction, and/or a series array of Josephson junctions.
- An example spiral coil 332 which can be in any meandering wire-like shape, is depicted in FIG. 3 .
- the inductive part is shunted to ground.
- the spiral coil 332 is shunted to the ground plane 306 at connection 326 .
- the capacitive part is selected from the group consisting of a plate capacitor and/or an interdigitated capacitor.
- the capacitor pad 204 and capacitor pad 304 can be formed as a plate capacitor and/or an interdigital/interdigitated capacitor (i.e., finger capacitor) with the interconnect 210 in between.
- the interconnect structure is a solder bump, as depicted in FIG. 4 .
- the interconnect structure is a through-silicon via, as depicted in FIG. 5 .
- At least one signal delivery line is coupled to the inductive part of the resonator 106 .
- the transmission line 322 i.e., signal delivery line
- the transmission line 322 is coupled to the spiral coil 332 , as depicted in FIG. 3 .
- the transmission line 322 can be inductively coupled to the spiral coil 332 .
- At least one signal delivery line is coupled to the capacitive part of the resonator.
- a transmission line just like the transmission line 322 can be capacitively (or inductively) coupled to capacitor pad 204 in FIG. 2 , although not shown.
- At least one superconducting qubit 102 is coupled to the capacitive part of the resonator.
- the qubit 102 is capacitively coupled to the capacitor pad 204 of the readout resonator 106 , as depicted in FIGS. 1, 2, and 6 .
- at least one superconducting qubit 102 is coupled to the inductive part of the resonator 106 .
- the qubit 102 could be coupled to the spiral coil 332 if the qubit 102 is placed on the readout plane 302 with spiral coil 332 , although not shown.
- the inductive part and capacitive part are made of superconducting metal.
- the capacitive part and the interconnect structure are equipotential, i.e., have the same voltage or potential.
- the first surface e.g., readout plane 302
- the second surface e.g., qubit plane 202 .
- FIG. 8 depicts a flow chart 800 of method of forming a structure (e.g., readout resonator 106 ) according to embodiments of the invention.
- a capacitive part e.g., capacitor 150
- a first portion e.g., capacitor pad 304
- a second portion e.g., capacitor pad 204
- a second surface e.g., qubit plane 202
- an inductive part e.g., inductor 130 on one of the first and second surfaces and void/absent from another one of the first and second surfaces.
- the inductive part 130 is depicted on the readout plane 302 , as depicted in FIGS. 3, 4, and 5 .
- the inductive part 130 could be on the qubit plane 202 .
- An interconnect structure 210 connects the first and second portions (e.g., capacitor pads 204 and 304 ) to thereby have the equipotential.
- FIG. 9 depicts a flow chart 900 of method of forming a resonator (e.g., readout resonator 106 ) according to embodiments of the invention.
- a capacitor 150 formed with a first superconducting material (e.g., capacitor pad 204 ) and a second superconducting material (e.g., capacitor pad 304 ) connected by a superconducting interconnect 210 , where the first and second superconducting materials are on different surfaces (e.g., the qubit plane 202 and the readout plane 302 ).
- an inductor 130 is disposed on one of the different surfaces (e.g., one of the qubit plane 202 and the readout plane 302 but not both).
- the inductor 130 is disposed on either the qubit plane 202 or the readout plane 302 .
- lumped compact resonator having inductive and capacitive elements in which the inductive element is on an isolated plane have been discussed above using a solder bump and through-silicon via. Additional examples of lumped resonators having various types of structures for the inductive element are described in FIGS. 10-25 .
- FIG. 10 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a meandering transmission line.
- FIG. 11 is a cross-sectional view of the resonator in FIG. 10 according to embodiments of the invention.
- FIG. 11 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 11 shows the bottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 . As can be seen in FIGS. 10 and 11 , the inductive element 130 is not limited to a spiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and the bottom substrate 402 together form a bottom chip
- the readout plane 302 (circuit plane) and the top substrate 404 together form a top chip.
- the solder bump 1110 , the top intermetallic pad 1114 , and the bottom intermetallic pad 1104 can be formed when forming the capacitor pad 204 , capacitor pad 304 , and interconnect 210 of the bump resonator when the bump resonator is on the circuit 100 .
- FIG. 12 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a meandering transmission line.
- FIG. 13 is a cross-sectional view of the resonator in FIG. 12 according to embodiments of the invention.
- FIG. 13 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 13 shows the bottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 . As can be seen in FIGS. 12 and 13 , the inductive element 130 is not limited to a spiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of the wafer 502 .
- FIG. 13 shows a through-silicon via 1310 connecting the qubit plane 202 and readout plane 302 .
- One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed.
- the through-silicon vias 1310 can be connected to a top via pad 1314 of the readout plane 302 and connected to a bottom via pad 1304 of the qubit plane 202 .
- the through-silicon via 1310 , top via pad 1314 , and the bottom via pad 1304 are made of superconducting materials as discussed herein.
- the through-silicon via 1310 , top via pad 1314 , and the bottom via pad 1304 can be formed when forming the capacitor pad 204 , capacitor pad 304 , and interconnect 210 of the TSV resonator when the TSV resonator is on the circuit 100 .
- FIG. 14 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a kinetic inductor formed of high kinetic inductance material, and the kinetic inductor can be formed in a straight line, nearly a straight line, a diagonal line, etc.
- high kinetic inductance material for the kinetic inductor can include niobium nitride (NbN), niobium titanium nitride (NbTiN), and/or titanium nitride (TiN).
- NbN niobium nitride
- NbTiN niobium titanium nitride
- TiN titanium nitride
- FIG. 15 is a cross-sectional view of the example resonator in FIG. 14 according to embodiments of the invention.
- FIG. 15 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 15 shows the bottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- solder bump 1110 is shown connecting the qubit plane 202 and readout plane 302 .
- One or more solder bumps 1110 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed.
- the solder bump 1110 can be connected to a top intermetallic pad 1114 of the readout plane 302 and connected to a bottom intermetallic pad 1104 of the qubit plane 202 .
- the solder bump 1110 , the top intermetallic pad 1114 , and the bottom intermetallic pad 1104 are made of superconducting material.
- FIG. 16 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a kinetic inductor formed of high kinetic inductance material as discussed above.
- FIG. 17 is a cross-sectional view of the resonator in FIG. 16 according to embodiments of the invention.
- FIG. 17 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 17 shows the bottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 . As can be seen in FIGS. 16 and 17 , the inductive element 130 is not limited to a spiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of the wafer 502 .
- FIG. 17 shows a through-silicon via 1310 connecting the qubit plane 202 and readout plane 302 .
- One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed.
- the through-silicon vias 1310 can be connected to a top via pad 1314 of the readout plane 302 and connected to a bottom via pad 1304 of the qubit plane 202 .
- the through-silicon via 1310 , top via pad 1314 , and the bottom via pad 1304 are made of superconducting materials as discussed herein.
- FIG. 18 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a spiral inductor transmission line connected to any the side of the capacitor 150 .
- the spiral inductive element 130 has a center piece 1802 . One end of the spiral transmission line connects to the top capacitor pad 304 and the other end of the spiral transmission line connects to the center piece 1802 .
- a connector 1820 connects to the center piece 1802 , and the connector 1820 can be connected to another circuit element such as a transmission line for external connection.
- a dielectric crossover 1822 is underneath the connector 1820 so as to separate the connector 1820 from the spiral transmission line underneath.
- the dielectric crossover 1822 can be an air bridge such that the dielectric crossover 1822 is air or space between the connector 1820 and spiral transmission line underneath.
- the dielectric crossover 1822 can be a dielectric material, such as an oxide, nitride, etc.
- the inductor 130 including the spiral transmission line and the center piece 1802 (along with the connector 1820 ) and the capacitor 150 including the top capacitor pad 304 and the bottom capacitor 204 can be formed of superconducting material.
- FIG. 19 is a cross-sectional view of the resonator in FIG. 18 according to embodiments of the invention.
- FIG. 19 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 19 shows the bottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 . As can be seen in FIGS. 18 and 19 , the inductive element 130 is not limited to a spiral coil 332 around the capacitor but can be other shapes and/or designs and in other locations, according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and the bottom substrate 402 together form a bottom chip
- the readout plane 302 (circuit plane) and the top substrate 404 together form a top chip.
- solder bump 1110 is shown connecting the qubit plane 202 and readout plane 302 .
- One or more solder bumps 1110 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the solder bump 1110 , top intermetallic pad 1114 , and bottom intermetallic pad 1104 have been discussed herein.
- FIG. 20 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a spiral inductor transmission line connected to any the side of the capacitor 150 .
- the spiral inductive element 130 has a center piece 1802 . One end of the spiral transmission line connects to the top capacitor pad 304 and the other endo of the spiral transmission line connects to the center piece 1802 .
- a connector 1820 connects to the center piece 1802 , the connector 1820 can be connected to another circuit element such as a transmission line for external connection.
- a dielectric crossover 1822 is underneath the connector so as to separate the connector 1820 from the spiral transmission line underneath.
- the dielectric crossover 1822 can be an air bridge such that the dielectric crossover 1822 is air or space between the connector 1820 and spiral transmission line.
- the dielectric crossover 1822 can be a dielectric material, such as an oxide, nitride, etc.
- the inductor 130 including the spiral transmission line and the center piece 1802 (along with the connector 1820 ) and the capacitor 150 including the top capacitor pad 304 and the bottom capacitor 204 can be formed of superconducting material.
- FIG. 21 is a cross-sectional view of the resonator in FIG. 20 according to embodiments of the invention.
- FIG. 20 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- FIG. 20 shows the bottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 .
- the inductive element 130 is not limited to a spiral coil 332 around the capacitor but can be other shapes and/or designs and in other locations, according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of the wafer 502 .
- FIG. 21 shows a through-silicon via 1310 connecting the qubit plane 202 and readout plane 302 .
- One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the through-silicon vias 1310 , top via pad 1314 , and bottom via pad 1304 have been discussed herein.
- the center piece 1802 is shown connected to a connector 1820 which can then be connected to other circuit elements, while the other end of the spiral inductor 130 is shown connected to the capacitor pad 304 .
- the connector 1820 could be connected to the top capacitor pad 304 while the other end of the spiral inductor 130 can then be connected to other circuit elements.
- FIG. 22 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a Josephson junction or an array of Josephson junctions 2250 .
- the Josephson junction or array of Josephson junctions 2250 include a first superconducting electrode 2252 A and a second superconducting electrode 2252 B separated by a tunnel barrier 2302 (depicted in FIG. 23 ).
- the first superconducting electrode 2252 A is connected to the top capacitor pad 304 by a left superconducting lead 2242 .
- a right superconducting lead 2244 is connected to the second superconducting electrode 2252 B, and the right superconducting lead 2244 connects to other circuit elements, such as, for example, a qubit, the external environment (e.g., the system 190 , 192 ), etc.
- Each Josephson junction in the array has its own first and second superconducting elements 2252 A and 2252 B along with its tunnel barrier 2302 . Josephson junction can be connected together in series.
- FIG. 23 is a cross-sectional view of the resonator in FIG. 22 according to embodiments of the invention.
- FIG. 23 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- the Josephson junction or array of Josephson junction 2250 are schematically depicted as two overlapping superconducting films 2252 A and 2252 B with the tunnel barrier 2302 in between.
- the tunnel barrier 2302 can be selected from the group including dielectric material, a short section of normal (non-superconducting) metal (that does not become superconducting at the cryogenic temperate of the superconducting material), and/or a constriction of a superconductor (i.e., (narrowed superconducting material) as understood by one skilled in the art.
- the superconducting materials utilized as connections can be different from the superconducting material used for the capacitor 150 (the top capacitor pad 304 and the bottom capacitor 204 ) in some implementations and can be the same as the superconducting material used for the capacitor 150 in some implementations.
- the superconducting material utilized for the first superconducting electrode 2252 A and second superconducting electrode 2252 B can be the same or different from the superconducting material used for the capacitors 150 , and/or the superconducting material used for the left and right superconducting leads 2242 and 2244 .
- FIG. 23 shows the bottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 .
- the inductive element 130 is not limited to a spiral coil 332 around the capacitor but another device (i.e., one or more Josephson junctions 2250 ) according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and the bottom substrate 402 together form a bottom chip
- the readout plane 302 (circuit plane) and the top substrate 404 together form a top chip.
- solder bump 1110 is shown connecting the qubit plane 202 and readout plane 302 .
- One or more solder bumps 1110 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the solder bump 1110 , top intermetallic pad 1114 , and bottom intermetallic pad 1104 are discussed herein.
- FIG. 24 depicts a simplified version of a top view for an example resonator according to embodiments of the invention.
- the resonator can be, for example, a readout resonator 106 .
- the readout resonator 106 has a top capacitor pad 304 and a bottom capacitor pad 204 , which form the capacitor 150 .
- the top capacitor pad 304 is connected to the inductive element 130 .
- the inductive element 130 is depicted as a Josephson junction or an array of Josephson junctions 2250 .
- the Josephson junction or array of Josephson junctions 2250 include a first superconducting electrode 2252 A and a second superconducting electrode 2252 B separated by a tunnel barrier 2302 (depicted in FIG.
- the first superconducting electrode 2252 A is connected to the top capacitor pad 304 by a left superconducting lead 2242 .
- a right superconducting lead 2244 is connected to the second superconducting electrode 2252 B, and the right superconducting lead 2244 connects to other circuit elements, such as, for example, a qubit, the external environment (e.g., the system 190 , 192 ), etc.
- FIG. 25 is a cross-sectional view of the resonator in FIG. 22 according to embodiments of the invention.
- FIG. 25 only illustrates an example portion of a superconducting qubit circuit 100 and it is understood that other circuit elements are present.
- the Josephson junction or array of Josephson junction 2250 are schematically depicted as two overlapping superconducting films 2252 A and 2252 B with the tunnel barrier 2302 in between.
- the tunnel barrier 2302 can be selected from the group including dielectric material, a short section of normal (non-superconducting) metal (that does not become superconducting), and/or a constriction of a superconductor as understood by one skilled in the art.
- the superconducting materials utilized as connections can be different from the superconducting material used for the capacitor 150 (the top capacitor pad 304 and the bottom capacitor 204 ) in some implementations and can be the same as the superconducting material used for the capacitor 150 in some implementations.
- the superconducting material utilized for the first superconducting electrode 2252 A and second superconducting electrode 2252 B can be the same or different from the superconducting material used for the capacitors 150 , and/or the superconducting material used for the left and right superconducting leads 2242 and 2244 .
- FIG. 25 shows the bottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and the top capacitor pad 304 on the readout plane 302 , thereby forming the capacitor 150 .
- the inductive element 130 is (only) on the readout plane 302 and is connected to the top capacitor pad 304 .
- the inductive element 130 is not limited to a spiral coil 332 around the capacitor but another device (i.e., one or more Josephson junctions 2250 ) according to embodiments of the invention.
- the qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of the wafer 502 .
- FIG. 25 shows a through-silicon via 1310 connecting the qubit plane 202 and readout plane 302 .
- One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on the qubit plane 202 to the readout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the through-silicon vias 1310 , top via pad 1314 , and bottom via pad 1304 have been discussed herein.
- FIG. 26 depicts a flow chart 2600 of a method of forming a structure (e.g., a superconducting qubit circuit 100 having the inductive element on a separate plane) according to embodiments of the invention.
- a first surface e.g., readout plane 302
- a resonator e.g., readout resonator 106
- a second surface (e.g., qubit plane 202 ) includes a first portion (e.g., capacitor pad 204 ) of a capacitive element 150 of the resonator (e.g., readout resonator 106 ) and at least one qubit (e.g., one or more qubits 102 ), where a second portion (e.g., capacitor pad 304 ) of the capacitive element 150 of the resonator is on the first surface.
- a first portion e.g., capacitor pad 204
- the capacitive element 150 of the resonator e.g., readout resonator 106
- at least one qubit e.g., one or more qubits 102
- the capacitive element comprises an interconnect structure 210 .
- the interconnect structure 210 is a solder bump, e.g., as depicted in FIG. 4 .
- the interconnect structure 210 is a through-silicon via, e.g., as depicted in FIG. 5 .
- the first surface and the second surface are circuit planes, and the circuit planes are on opposite sides of a substrate (e.g., substrate 502 ).
- the first surface and the second surface are circuit planes, and the circuit planes are on different substrates (e.g., substrates 402 and 404 ).
- the interconnect structure 210 connecting the first and second portions forms an equipotential between at least a segment of the interconnect structure, at least a segment of the first portion, and at least a segment of the second portion.
- the at least one qubit is a capacitive-type quantum bit.
- the at least one qubit comprises an inductive-type quantum bit
- FIG. 27 depicts a flow chart 2700 of a method of forming a structure (e.g., a superconducting qubit circuit 100 having the inductive element on a separate plane) according to embodiments of the invention.
- a structure e.g., a superconducting qubit circuit 100 having the inductive element on a separate plane
- a first surface (e.g., readout plane 302 ) includes inductive elements 130 of resonators (e.g., numerous readout resonators 106 ) and first portions (e.g., numerous capacitor pads 304 ) of capacitive elements 150 of the resonators.
- a second surface (e.g., qubit plane 202 ) includes at least two qubits 102 coupled by a bus resonator (e.g., bus resonator 104 ), where the second surface includes second portions (e.g., numerous capacitor pads 204 ) of the capacitive elements 150 of the resonators.
- Each of the resonators (e.g., readout resonators 106 ) has its own capacitor pads 204 and 304 (and optionally interconnect 210 ) and inductive element 130 .
- the first surface is a first circuit plane (e.g., readout plane 302 ) and the second surface is a second circuit plane (e.g., qubit plane 202 ) separate from the first circuit plane, such that the inductive elements 130 of the resonators 106 and the at least two qubits 102 are positioned on different circuit planes.
- first circuit plane e.g., readout plane 302
- second circuit plane e.g., qubit plane 202
- the resonators are readout resonators 106 .
- the readout resonators 106 are operable to read out respective ones of the at least two qubits 102 .
- Respective ones of the readout resonators 106 are coupled (e.g., capacitively and/or inductively coupled) to respective ones of the at least two qubits 102 .
- 5, 10, 15 . . . 35 or more qubits 102 can be coupled to its own readout resonator 106 on a one-to-one basis, such that the state of the respective qubit can be read out by its respective readout resonator as understood by one skilled in the art.
- Each qubit 102 can have its own distinct resonance frequency for addressing, and each readout resonator 106 can have its own distinct resonance frequency for read out.
- FIG. 28 depicts a flow chart of forming a superconducting qubit circuit 100 according to embodiments of the invention.
- readout resonators 106 are configured to respectively couple to qubits 102 .
- one or more bus resonators 104 are configured to couple at least two of the qubits 102 together. Although one bus resonator 104 is illustrated coupling two qubits 102 in FIG. 1 , it should be appreciated that the bus resonator 104 can couple 3, 4, 5, 7 . . . 10 or more qubits 102 together.
- a first surface e.g., readout plane 302
- a second surface e.g., qubit plane 202
- resonators are not limited to readout resonators.
- Other resonators including bus resonators or even qubits can be formed as discussed so as to isolate inductive element on, for example, on the readout plane that connects to the external environment (e.g., the 50 ohm environment).
- references in the present description to forming layer “A” over layer “B” include situations in which one or more intermediate layers (e.g., layer “C”) is between layer “A” and layer “B” as long as the relevant characteristics and functionalities of layer “A” and layer “B” are not substantially changed by the intermediate layer(s).
- layer “C” one or more intermediate layers
- compositions comprising, “comprising,” “includes,” “including,” “has,” “having,” “contains” or “containing,” or any other variation thereof, are intended to cover a non-exclusive inclusion.
- a composition, a mixture, process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.
- connection can include an indirect “connection” and a direct “connection.”
- references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
- the unique combination of the operations described in connection with the fabrication of a semiconductor device according to the present invention utilize a variety of individually known physical and chemical processes performed on a superconducting over a dielectric (e.g., silicon) substrate, some of which are described in the immediately following paragraphs.
- a dielectric e.g., silicon
- Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer.
- Available technologies include physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others.
- Removal/etching is any process that removes material from the wafer. Examples include etch processes (either wet or dry), and chemical-mechanical planarization (CMP), and the like.
- Films of both conductors e.g., poly-silicon, aluminum, copper, etc.
- insulators e.g., various forms of silicon dioxide, silicon nitride, etc.
- Lithography is the formation of three-dimensional relief images or patterns on the semiconductor substrate for subsequent transfer of the pattern to the substrate.
- the patterns are formed by a light sensitive polymer called a photo-resist.
- photo-resist a light sensitive polymer
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Abstract
A technique relates to a structure. A first surface includes an inductive element of a resonator. A second surface includes a first portion of a capacitive element of the resonator and at least one qubit. A second portion of the capacitive element of the resonator is on the first surface.
Description
- The present invention generally relates to superconducting structures, and more specifically, to low loss architectures for superconducting qubit circuits.
- Superconducting quantum computing is an implementation of a quantum computer in superconducting electronic circuits. Quantum computation studies the application of quantum phenomena for information processing and communication. The basic building block of such a quantum computer is the quantum bit or qubit. As a generalization, a qubit is similar to the classical bit in that it is a system of two discrete states, which can be in the discrete quantum states |1 and |2, as well as arbitrary superposition states. These discrete quantum states can be any set of two quantum mechanical levels, such as an electron spin or nuclear spin, or a pair of energy levels in an atom, ion or molecule. Similar to universal logic operations, there also exists a set of quantum gates which are universal, such that combinations of gates can realize complex quantum algorithms. A quantum gate is a generalization of a logic gate. However, the quantum gate describes the transformation that one or more qubits will experience after the gate is applied on them, given their initial state.
- The electromagnetic energy associated with the qubit can be stored in so-called Josephson junctions and in the capacitive and inductive elements that are used to form the qubit. In one example, to read out the qubit state, a microwave signal is applied to the microwave readout cavity that couples to the qubit at the cavity frequency. The transmitted (or reflected) microwave signal goes through multiple thermal isolation stages and low-noise amplifiers that are required to block or reduce the noise and improve the signal-to-noise ratio. The microwave signal is measured at room temperature. The amplitude and/or phase of the returned/output microwave signal carry information about the qubit state, such as whether the qubit is at a ground state, an excited state, or a superposition of the two states.
- Embodiments of the present invention are directed to a structure. A non-limiting example of the structure includes a first surface having an inductive element of a resonator. The structure includes a second surface having a first portion of a capacitive element of the resonator and at least one qubit, where a second portion of the capacitive element of the resonator is on the first surface.
- Embodiments of the present invention are directed to a method of forming a structure. A non-limiting example of the method of forming the structure includes disposing an inductive element of a resonator on a first surface and disposing a first portion of a capacitive element of the resonator and at least one qubit on a second surface, where a second portion of the capacitive element of the resonator is on the first surface.
- Embodiments of the present invention are directed to a structure. A non-limiting example of the structure includes a first surface having inductive elements of resonators and first portions of capacitive elements of the resonators. The structure includes a second surface having at least two qubits coupled by a bus resonator. The second surface includes second portions of the capacitive elements of the resonators.
- Embodiments of the present invention are directed to a method of forming a structure. A non-limiting example of the method of forming the structure includes disposing inductive elements of resonators and first portions of capacitive elements of the resonators on a first surface. The method includes disposing at least two qubits coupled by a bus resonator on a second surface. The second surface includes second portions of the capacitive elements of the resonators.
- Embodiments of the present invention are directed to a superconducting qubit circuit. A non-limiting example of superconducting qubit circuit includes readout resonators configured to respectively couple to qubits, one or more bus resonators configured to couple at least two of the qubits together, a first surface comprising inductive elements of the readout resonators, and a second surface having the qubits. The first and second surfaces are different circuit planes.
- Additional technical features and benefits are realized through the techniques of the present invention. Embodiments and aspects of the invention are described in detail herein and are considered a part of the claimed subject matter. For a better understanding, refer to the detailed description and to the drawings.
- The specifics of the exclusive rights described herein are particularly pointed out and distinctly claimed in the claims at the conclusion of the specification. The foregoing and other features and advantages of the embodiments of the invention are apparent from the following detailed description taken in conjunction with the accompanying drawings in which:
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FIG. 1 depicts a schematic circuit diagram of two coupled qubits with individual readout according to embodiments of the invention; -
FIG. 2 depicts a top view of a portion of a qubit plane according to embodiments of the invention; -
FIG. 3 depicts a top view of a portion of a readout plane according to embodiments of the invention; -
FIG. 4 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention; -
FIG. 5 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention; -
FIG. 6 depicts an example layout of a qubit coupling to a readout resonator and a bus resonator according to embodiments of the invention; -
FIG. 7 depicts a flow chart of method of forming a structure according to embodiments of the invention; -
FIG. 8 depicts a flow chart of method of forming a structure according to embodiments of the invention; -
FIG. 9 depicts a flow chart of method of forming a structure according to embodiments of the invention; -
FIG. 10 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 11 depicts a cross-sectional view of the resonator inFIG. 10 according to embodiments of the invention; -
FIG. 12 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 13 depicts a cross-sectional view of the resonator inFIG. 12 according to embodiments of the invention; -
FIG. 14 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 15 depicts a cross-sectional view of the example resonator inFIG. 14 according to embodiments of the invention; -
FIG. 16 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 17 depicts a cross-sectional view of the resonator inFIG. 16 according to embodiments of the invention; -
FIG. 18 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 19 depicts a cross-sectional view of the resonator inFIG. 18 according to embodiments of the invention; -
FIG. 20 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 21 depicts a cross-sectional view of the resonator inFIG. 20 according to embodiments of the invention; -
FIG. 22 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 23 depicts a cross-sectional view of the resonator inFIG. 22 according to embodiments of the invention; -
FIG. 24 depicts a simplified version of a top view for an example resonator according to embodiments of the invention; -
FIG. 25 is a cross-sectional view of the resonator inFIG. 22 according to embodiments of the invention; -
FIG. 26 depicts a flow chart of a method of forming a structure according to embodiments of the invention; -
FIG. 27 depicts a flow chart of a method of forming a structure according to embodiments of the invention; and -
FIG. 28 depicts a flow chart of forming a superconducting qubit circuit according to embodiments of the invention. - The diagrams depicted herein are illustrative. There can be many variations to the diagram or the operations described therein without departing from the spirit of the invention. For instance, the actions can be performed in a differing order or actions can be added, deleted or modified. Also, the term “coupled” and variations thereof describes having a communications path between two elements and does not imply a direct connection between the elements with no intervening elements/connections between them. All of these variations are considered a part of the specification.
- In the accompanying figures and following detailed description of the disclosed embodiments, the various elements illustrated in the figures are provided with two or three digit reference numbers. With minor exceptions, the leftmost digit(s) of each reference number correspond to the figure in which its element is first illustrated.
- For the sake of brevity, conventional techniques related to semiconductor and/or superconducting devices and integrated circuit (IC) fabrication may or may not be described in detail herein. Moreover, the various tasks and process steps described herein can be incorporated into a more comprehensive procedure or process having additional steps or functionality not described in detail herein. In particular, various steps in the manufacture of semiconductor and/or superconducting devices and semiconductor/superconductor-based ICs are well known and so, in the interest of brevity, many conventional steps will only be mentioned briefly herein or will be omitted entirely without providing the well-known process details.
- Turning now to an overview of technologies that are more specifically relevant to aspects of the invention, techniques to “break the plane” are needed for scaling up superconducting quantum computing hardware for larger qubit processors in an extensible way, such as, for example, 17 qubits in a distance-three surface code layout or larger. State-of-the-art researchers are developing flip chip technology and/or through-silicon-vias (TSVs) using superconducting materials to accomplish this goal. This results in the introduction of lossy materials and/or connections which might couple to the qubits and limit qubit coherence times if the electromagnetic field distributions at the transition/connection regions are not well controlled/designed. Typical uses of bumps and/or through-silicon-vias to connect different circuits within a superconducting qubit chip include either flux controls or signal delivery. As transmon qubits, a popular superconducting qubit, are electromagnetic circuits, there are a number of factors in their environment which can degrade their performance, such as fluctuators coupled to the qubit and losses in the materials and/or connections. Qubit errors can be classified as either relaxation and dephasing.
- Turning now to an overview of the aspects of the invention, one or more embodiments of the invention address the above-described shortcomings of the prior art by providing a novel resonator structure. More specifically, the above-described aspects of the invention address the shortcomings of the prior art by providing a compact (lumped element) resonator structure spanning two superconducting circuit planes, and the compact resonator structure maintains most of the capacitive energy stored on one plane and most of the inductive energy stored on the other plane. In the context of qubit circuits, this compact resonator structure allows for keeping electrical currents off the qubit plane and on the readout path.
- The implementation of a flip chip requires fabrication steps that go beyond what is necessary to fabricate superconducting quantum bits (qubits). Each new fabrication step can introduce new loss pathways, which may be detrimental to quantum coherence and/or qubit operation. In broad terms, keeping lossy components on the readout paths, which behave more classically, is more desirable than introducing lossy components near qubits or lossy components in the interconnects between qubits, which are needed to behave more quantum-mechanically. A small footprint of required resonant structures in the quantum circuit benefits scaling as discussed herein. Electromagnetic fields at the transition/connection regions of the compact resonator are well controlled/designed to avoid coupling of the qubits to lossy parts of the system because the lumped element resonator has magnetic fields focused in the well-defined regions of the chip, according to embodiments of the invention.
- Turning now to a more detailed description of embodiments of the invention,
FIG. 1 depicts a schematic circuit diagram 100 of two coupled qubits with individual readout according to embodiments of the invention. The circuit diagram is a quantum/qubit circuit as understood by one skilled in the art. The circuit diagram 100 illustrates twoqubits 102 coupled by abus resonator 104. The twoqubits 102 are each coupled to itsown readout resonator 106. There are fourcoupling capacitors coupling capacitor 182 and is coupled to readout resonator 106 (e.g., also referred to as readout resonator #1) viacoupling capacitor 183. Similarly, from the right side, qubit 102 (e.g., also referred to as qubit #2) is coupled to the bus resonator 104 (e.g., inter-qubit coupling bus) viacoupling capacitor 181 and is coupled to readout resonator 106 (e.g., also referred to as readout resonator #2) viacoupling capacitor 180. Eachqubit 102 is formed of aJosephson junction 160 and acapacitor 162. Eachreadout resonator 106 is formed of aninductor 130 and acapacitor 150 as understood by one skilled in the art. Thebus resonator 104 is formed of aninductor 140 andcapacitor 142 as understood by one skilled in the art. - For explanation purposes and not limitation,
FIG. 1 illustrates one example of a superconducting qubit circuit. Embodiments of the invention can be utilized in any type of superconducting qubit circuit as understood by one skilled in the art and are not meant to be limited to the exact elements or the exact configuration of elements inFIG. 1 . Although twoqubits 102 are shown coupled by onebus resonator 104 and eachqubit 102 is coupled to itsown readout resonator 106, it should be appreciated that multiple qubits 102 (with their respective readout resonators 106) can be coupled usingmultiple bus resonators 104 in various configurations. Embodiments of the invention are not meant to be limited to a specific number ofqubits 102,bus resonators 104, andreadout resonators 106. - As understood by one skilled in the art, a qubit system is typically connected to a 50 ohm (Ω) environment. For completeness and not limitation,
FIG. 1 showssystem 190 andsystem 192, each representative of connecting to a 50Ω environment. Thesystem 190 represents a 50Ω resistor and voltage source (V1), and the voltage source V1 can be utilized to generate a qubit drive signal at the resonance frequency of qubit 102 (e.g., qubit #1) and generate a readout signal at the resonance frequency of the readout resonator 106 (e.g., readout resonator #1). Similarly, thesystem 192 represents a 50Ω resistor and voltage source (V2), and the voltage source V2 can be utilized to generate a qubit drive signal at the resonance frequency of qubit 102 (e.g., qubit #2) and generate a readout signal at the resonance frequency of the readout resonator 106 (e.g., readout resonator #2). - In accordance with embodiments of the invention, the
readout resonator 106, along with any resonator such as thebus resonator 104, can be implemented as a compact (lumped element) resonator structure as discussed further herein. The compact resonator structure can also be referred to as a bumped resonator structure. -
FIG. 2 depicts a top view of a portion of aqubit plane 202 according to embodiments of the invention. InFIG. 2 , thequbit plane 202 illustrates a part of thereadout resonator 106 in thecircuit 100. - The
qubit plane 202 includes acapacitor pad 204 in direct contact with aninterconnect 210. Theinterconnect 210 is shown as dashed lines becauseinterconnect 210 is underneath thecapacitor pad 204. Theinterconnect 210 can be a solder connection such a solder bump and/or a through-silicon-via. Thecapacitor pad 204 is depicted in a square like shape in this illustration. It should be appreciated that thecapacitor pad 204 can be other shapes such as rectangular, circular, polygonal, triangular, etc. Thecapacitor pad 204 is surrounded by adielectric material 220. Thedielectric material 220 can be a non-electrically conductive, such as an insulator. Thedielectric material 220 can be air such as, for example, as an empty space or vacuum. Aground plane 206 surrounds thedielectric material 220 so as to separate thecapacitor pad 204, circumscribed within thedielectric material 220, from theground plane 206 outside of thedielectric material 220. Theground plane 206 can be on one, two, three, and/or all sides of thecapacitor pad 204. Thequbit 102 is formed on thequbit plane 202 but is not illustrated inFIG. 2 for the sake of conciseness. On thequbit plane 202, a portion of the compact lumped element resonator 106 (i.e., readout resonator) is thecapacitor pad 204. The one end of theinterconnect 210 is physically and electrically attached to thecapacitor pad 204 such that theinterconnect 210 and thecapacitor pad 204 are equipotential, i.e., at the same electric potential or same voltage with respect to ground or with respect to a voltage source (such as V1 or V2), especially at the cryogenic temperatures at which theresonator 106 is used, because the materials of theinterconnect 210 and thecapacitor pad 204 are superconducting at such temperatures. Furthermore, thecapacitor pad 204, theinterconnect 210, and a capacitor pad 304 (depicted inFIG. 3 ) have an equipotential, i.e., the same electric potential or same voltage with respect to ground or with respect to a voltage source (such as V1 or V2), especially at the cryogenic temperatures at which the resonator is used, because the materials of theinterconnect 210, thecapacitor pad 204 and thecapacitor pad 304 are superconducting at such temperatures. In some implementations, at least a portion of thecapacitor pad 204, at least a portion of theinterconnect 210, and at least a portion of the capacitor pad 304 (depicted inFIG. 3 ) have an equipotential. -
FIG. 3 depicts a top view of a portion of areadout plane 302 according to embodiments of the invention. InFIG. 3 , thereadout plane 302 illustrates another part of thereadout resonator 106 in thecircuit 100. - The
readout plane 302 can also be referred to as the control plane because transmission signal for driving the qubit 102 (each qubit can have its own resonance frequency) and reading out the readout resonator 106 (each readout resonator can have its own resonance frequency) can enter and exit thereadout plane 302. Thereadout plane 302 includes acapacitor pad 304 in direct contact with theinterconnect 210. Thecapacitor pad 304 andcapacitor pad 204 are attached to opposite ends/portions of theinterconnect 210. As noted above, theinterconnect 210 is shown as dashed lines becauseinterconnect 210 is underneath thecapacitor pad 304. It is noted that whether theinterconnect 210 is underneath (or above) thecapacitor pad 204 orcapacitor pad 304 is based on whether thequbit plane 202 is on top or thereadout plane 302 is on top. For example, if thequbit plane 202 having thecapacitor pad 204 is on top and thereadout plane 302 is on the bottom, then interconnect 210 is underneath thecapacitor pad 204 but above thecapacitor pad 304 of thereadout plane 302. Conversely, if thereadout plane 302 having thecapacitor pad 304 is on top and thequbit plane 202 is on the bottom, then interconnect 210 is underneath thecapacitor pad 304 but above thecapacitor pad 204 of thequbit plane 202. In some cases, thequbit plane 202 andreadout plane 302 can be on the side (e.g., left and right sides), and not necessarily on the top and bottom. - The
readout plane 302 includes theinductor 130. Theinductor 130 is formed of aspiral coil 332 that meanders around thecapacitor pad 304. Forming thespiral coil 332 around thecapacitor pad 304 is one example. Therespiral coil 332 is the inductive part of thereadout resonator 106, but thereadout resonator 106 is not limited to thespiral coil 332 as the inductive part and there can be other structures utilized. Another example, structure, and/or shape to form thespiral coil 332 of the inductor can include a meandering transmission line, a kinetic inductor (with high kinetic inductance material), a Josephson junction, and/or a series array of Josephson junctions, as discussed further inFIGS. 10-28 . - Kinetic inductance originates in the kinetic energy required by each electron that is contributing to a flow of current. Kinetic inductance is the manifestation of the inertial mass of mobile charge carriers (e.g., electrons) in alternating electric fields as an equivalent series inductance. Kinetic inductance is observed in high carrier mobility conductors (e.g. superconductors) and at very high frequencies. The high kinetic inductor is based on the geometry of the material and being a superconductor material that has a high inductance at superconducting temperatures (e.g., cryogenic temperatures). A high kinetic inductance material for a kinetic inductor can include niobium nitride (NbN), niobium titanium nitride (NbTiN), and/or titanium nitride (TiN). Niobium nitride has a higher inductance than niobium alone. The high kinetic inductor can be formed in a line and is not required to be coiled like the
spiral coil 332. As understood by one skilled in the art, a Josephson junction is also an inductive element, and one or more Josephson junctions (e.g., in series) can be utilized to replace thespiral coil 332 as the inductive element in thereadout resonator 106. - In
FIG. 3 , one end of thespiral coil 332 is attached to thecapacitor pad 304 atconnection 328 and the other end of thespiral coil 332 is shunted to aground plane 306 atconnection 326. Theground plane 306 surrounds thecapacitor pad 304 and thespiral coil 332. In some implementations, theground plane 306 can be on one, two, three, and/or all sides of thecapacitor pad 304. It should be appreciated that thecapacitor pad 304 can be other shapes such as rectangular, circular, polygonal, triangular, etc. - A dielectric material 320 can surround the capacitor pad 304 (except at the
connection 328 and is in between the wires (i.e., lines) of thespiral coil 332. Thedielectric material 320 and 220 can be the same in some implementations. In other implementations, thedielectric material 320 and 220 can be different materials. As noted above, the dielectric material 320 can be a non-electrically conductive material, such as an insulator. Also, the dielectric material can be an empty space such as, for example, air or vacuum. - The
spiral coil 332 of theinductor 130 is coupled (e.g., mostly inductively coupled) to atransmission line 322. In some implementations, thespiral coil 332 can be inductively coupled to thetransmission line 322. For example, thetransmission line 322 connects theinductor 130 to launch pads which provide external connection to readout resonator 106 (via the inductor 130) and to thequbit 102. - The
readout resonator 106 has portions in both thequbit plane 202 and thereadout plane 302. For example, thecapacitor 150 of thereadout resonator 106 is formed of the qubitplane capacitor pad 204, theinterconnect 210, and the readoutplane capacitor pad 304 while theinductor 130 is formed of thespiral coil 332. The capacitive portion (shown as 150 inFIG. 1 ) of thereadout resonator 106 is on both thequbit plane 202 and thereadout plane 302. By the unique structure, it should be recognized that the inductive portion shown asinductor 130 formed by thespiral coil 332 is only on thereadout plane 302 and is not on thequbit plane 202. Further description of thereadout resonator 106 can be understood by the cross-sectional views depicted inFIGS. 4 and 5 . -
FIG. 4 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention.FIG. 4 shows another depiction of the lumpedelement readout resonator 106.FIG. 4 illustrates an example in which theinterconnect 210 is a solder bump that attaches to both thecapacitor pad 204 and to thecapacitor pad 304. The solder bump physically and electrically connects thequbit plane 202 to thereadout plane 302. As can be seen inFIG. 4 , thereadout resonator 106 is formed of thespiral coil 332 of theinductor 130 and thecapacitor pad 204,capacitor pad 304, and interconnect 210 (e.g., solder bump) of thecapacitor 150. Theinductor 130 made of thespiral coil 332 is only on thereadout plane 302 such that thequbit plane 202 is free of the inductive elements (e.g., spiral coil 332) of thereadout resonator 106. By isolating theinductor 130 on thereadout plane 302 away from thequbit plane 202, thequbit 102 is isolated from magnetic fields created by the electrical current flowing through thespiral coil 332 of theinductor 130. The magnetic fields of theinductor 130 ofreadout resonator 106 can cause decoherence of thequbit 102. Thecapacitor 150 has two plates, where one plate is thecapacitor pad 204 in thequbit plane 202 and the other plate is thecapacitor pad 304 in thereadout plane 302. - As an example implementation,
FIG. 4 depicts thequbit plane 202 formed on asubstrate 402 and thereadout plane 302 formed on asubstrate 404. Thesubstrate substrates substrates substrate 402 can be one wafer and thesubstrate 404 can be another wafer. Thequbit plane 202 formed onsubstrate 402 can be one chip and thereadout plane 302 formed onsubstrate 404 can be another chip. Although not shown for simplicity, theground plane 206 of thequbit plane 202 can be electrically and physically connected to theground plane 306 of thereadout plane 302 by multiple interconnects such that the ground planes 206 and 306 are maintained at the same potential (or nearly the same potential). - It is noted that the
interconnect 210, i.e., the solder bump, can be formed and deposited using flip chip technology. Although thereadout plane 302 is depicted as being on top of thequbit plane 202, the selection of the top and bottom planes is arbitrary. The circuit elements inFIGS. 1-6 can be formed by lithography, electroplating, etc., and patterning accordingly as understood by one skilled in the art. More particularly, the Josephson junctions can be formed by shadow evaporation techniques, etc. InFIG. 4 , the circuits of thereadout plane 302 andqubit plane 202 can be separately formed. Subsequently, flip chip technology can be utilized to deposit the solder bump as theinterconnect 210 on any one of the planes and the other plane can then be connected to the other plane via the solder bump. Although not shown for the sake of conciseness, under-bump metallization (UBM) can be utilized on thecapacitor pad 204 and/or thecapacitor pad 304 to form a good connection respectively to the solder bump as understood by one skilled in the art. As discussed further herein, the materials of the circuit elements in thequbit plane 202 andreadout plane 302 are superconducting materials, along with theinterconnect 210. -
FIG. 5 depicts a cross-sectional view of a portion of the qubit plane and readout plane according to embodiments of the invention.FIG. 5 shows another depiction of the lumpedelement readout resonator 106. Particularly,FIG. 5 illustrates an example in which theinterconnect 210 is a through-silicon-via that attaches to both thecapacitor pad 204 and to thecapacitor pad 304. The through-silicon-via physically and electrically connects thequbit plane 202 to thereadout plane 302. Unlike the solder bump interconnect, the through-silicon-via is formed throughwafer 502 to thereby connect the qubit andreadout planes qubit plane 202 facing thereadout plane 302 inFIG. 4 , the qubit andreadout planes wafer 502. In some implementations, there can be one or more layers of materials between thequbit plane 202 and thewafer 502 and/or there can be one or more layers of materials betweenreadout plane 302 and thewafer 502. Thewafer 502 can include the same materials discussed above forsubstrates 402 and/or 404. Although not shown for simplicity, theground plane 206 of thequbit plane 202 can be electrically and physically connected to theground plane 306 of thereadout plane 302 by multiple interconnects such that the ground planes 206 and 306 are maintained at the same potential (or nearly the same potential). - As discussed above, the
inductor 130 made of thespiral coil 332 is only on thereadout plane 302 such that thequbit plane 202 is free of the inductive elements (e.g., spiral coil 332) of thereadout resonator 106. Thecapacitor 150 has two plates, where one plate is thecapacitor pad 204 in thequbit plane 202 and the other plate is thecapacitor pad 304 in thereadout plane 302. As can be seen inFIG. 5 , thereadout resonator 106 is formed of thespiral coil 332 of theinductor 130 and thecapacitor pad 204,capacitor pad 304, and interconnect 210 (e.g., TSV) of thecapacitor 150. InFIG. 5 , the circuit of thequbit plane 202 can be formed on one surface of thewafer 502, the through-silicon-via is formed to connect with thecapacitor pad 204 of thequbit plane 202, and the circuit of thereadout plane 302 is formed on the opposite surface of thewafer 502 such that thecapacitor pad 304 is in direct connect with the through-silicon-via (i.e., interconnect 210). -
FIG. 6 depicts an example layout of a qubit coupling to a readout resonator and a bus resonator according to embodiments of the invention. Above,FIG. 2 illustrates a portion of thequbit plane 202 that focuses on a portion of thereadout resonator 106.FIG. 6 illustrates an example showing thequbit 102 capacitively coupled viacoupling capacitor 180 to thecapacitor pad 204 of thereadout resonator 106. Thequbit 102 shows thecapacitor 162 formed ofqubit capacitor pads qubit 102 includes theJosephson junction 160 connected to thequbit capacitor pads capacitor pads Josephson junction 160 includes two superconducting materials separated by any of the following: a dielectric material, a short length of normal (non-superconducting) metal, or a constriction of a superconductor. Thequbit 102 is capacitively coupled to thebus resonator 104 viacoupling capacitor 181. In this example, thebus resonator 104 is not shown. In some embodiments of the invention, thebus resonator 104 can be formed in the same manner discussed for thereadout resonator 106, such that thebus resonator 104 is a compact lumped element resonator (using a solder bump and/or through-silicon-via interconnect 210). In some embodiments of the invention, thebus resonator 104 can be formed using state-of-the-art techniques as understood by one skilled in the art, and thebus resonator 104 is not shown inFIG. 6 so as not to obscure the figure. - Technical benefits and advantages include a compact (lumped element) resonator structure (e.g., readout resonator 106) spanning two superconducting circuit planes, and the compact resonator structure maintains most of the capacitive energy stored on the
qubit plane 202 and most of the inductive energy stored on thereadout plane 302. This compact resonator structure keeps electrical currents off thequbit plane 202 containing thequbit 102 and on the readout path on thereadout plane 302. Electromagnetic fields at the transition/connection regions (e.g., at of the connection ofinterconnect 210 andcapacitor pad 204, at the connection of interconnect (compact)readout resonator 106, and/or at theconnection 328 ofcapacitor pad 304 and spiral coil 332) are well controlled/designed to avoid coupling of the qubits to lossy parts of the system (i.e.,inductor 130 having spiral coil 332) because the lumpedelement resonator 106 has magnetic fields focused in the well-defined regions (e.g., the inductive part which isspiral coil 332 on readout plane 302) of the chip. - For ease of understanding, inductors are classified into three distinct categories to better understand location with respect to the
qubit plane 202 and thereadout plane 302, particular as it relates to placement of the capacitor (C) and inductor (L): - 1) Josephson junctions are non-linear, lossless, lumped inductors. Josephson junctions provide the inductive part of the qubit LC resonators. As the term lossless suggests, Josephson junctions are not problematic from a loss perspective. Furthermore, the (inductive) energy in Josephson junctions is stored locally and the junctions in the
qubits 102 interact inductively very little with the external circuit (other parts of the circuitry on thequbit plane 202 and/or the readout plane 302). Josephson junctions or series arrays of Josephson junctions can also be used as a replacement forspiral coil 332. - 2) LC resonators that are only virtually excited, but not populated with photons.
Bus resonators 104 between qubits fall into this category of LC resonators. By virtual excitation, abus resonator 104 enables/facilitates transmission of a photon of frequencies different from its resonance frequency or harmonics thereof. Loss from these bus resonators (and their inductive parts) is not a concern, because the modes (i.e., the resonance frequency and its harmonics) of the resonator do not get excited. Furthermore, in practice, these bus resonators are made with very high quality factors (Q-factors), i.e., very low loss. - 3) LC resonators, whose modes are directly excited (at their resonance frequency or potentially also a harmonic), are populated with (some) photons. In the example quantum circuits discussed herein,
readout resonators 106 fall into this category. Thereadout resonator 106 also couple/connect to the external (off-chip) circuitry (all the way to room-temperature electronics). The experimenters are concerned about the loss created byreadout resonator 106, and the loss is stronger in their inductive parts, and embodiments of the invention provide techniques and structures to move the inductive parts of thereadout resonator 106 away from the (sensitive) qubits as discussed herein. - The circuit elements of the quantum/
qubit circuit 100, thequbit plane 202, and thereadout plane 302 can be made of superconducting material. The respective resonators, inductors, capacitors, interconnects (e.g., solder bump and TSV), transmission lines, qubits, ground planes, spiral coils, etc., are made of superconducting materials. Examples of superconducting materials (at low temperatures, such as about 10-100 millikelvin (mK), or about 4 K) include niobium, aluminum, tantalum, etc. For example, the Josephson junctions are made of superconducting material, and their tunnel junctions can be made of a thin tunnel barrier, such as an oxide. The capacitors can be made of superconducting material separated by low-loss dielectric material, air, etc. The transmission lines (i.e., wires) connecting the various elements are made of a superconducting material. -
FIG. 7 depicts aflow chart 700 of method of forming a structure (e.g., resonator 106) according to embodiments of the invention. Atblock 702, an inductive part (e.g., inductor 130) is disposed on a first surface (e.g., readout plane 302). Atblock 704, a capacitive part is disposed on the first surface (e.g., readout plane 302) and a second surface (e.g., qubit plane 202). Atblock 706, an interconnect structure (e.g., interconnect 210) is coupled/connected between the first surface and the second surface (e.g., between thereadout plane 302 and qubit plane 202). - The capacitive part includes the interconnect structure. For example, the
capacitor 150 includes thecapacitor pad 204, thecapacitor pad 304, andinterconnect 210. The inductive part (e.g., the inductor 130) is selected from the group consisting of a spiral coil, a spiral-like coil, a meandering wire/transmission line, a (straight) kinetic inductor (with high kinetic inductance material), a Josephson junction, and/or a series array of Josephson junctions. Anexample spiral coil 332, which can be in any meandering wire-like shape, is depicted inFIG. 3 . The inductive part is shunted to ground. For example, thespiral coil 332 is shunted to theground plane 306 atconnection 326. - The capacitive part is selected from the group consisting of a plate capacitor and/or an interdigitated capacitor. For example, the
capacitor pad 204 andcapacitor pad 304 can be formed as a plate capacitor and/or an interdigital/interdigitated capacitor (i.e., finger capacitor) with theinterconnect 210 in between. - The interconnect structure is a solder bump, as depicted in
FIG. 4 . The interconnect structure is a through-silicon via, as depicted inFIG. 5 . - At least one signal delivery line is coupled to the inductive part of the
resonator 106. For example, the transmission line 322 (i.e., signal delivery line) is coupled to thespiral coil 332, as depicted inFIG. 3 . In some implementations, thetransmission line 322 can be inductively coupled to thespiral coil 332. At least one signal delivery line is coupled to the capacitive part of the resonator. For example, a transmission line just like thetransmission line 322 can be capacitively (or inductively) coupled tocapacitor pad 204 inFIG. 2 , although not shown. - At least one
superconducting qubit 102 is coupled to the capacitive part of the resonator. For example, thequbit 102 is capacitively coupled to thecapacitor pad 204 of thereadout resonator 106, as depicted inFIGS. 1, 2, and 6 . As another option, at least onesuperconducting qubit 102 is coupled to the inductive part of theresonator 106. For example, thequbit 102 could be coupled to thespiral coil 332 if thequbit 102 is placed on thereadout plane 302 withspiral coil 332, although not shown. - The inductive part and capacitive part (including interconnect structure 210) are made of superconducting metal. The capacitive part and the interconnect structure are equipotential, i.e., have the same voltage or potential. The first surface (e.g., readout plane 302) opposes the second surface (e.g., qubit plane 202).
-
FIG. 8 depicts aflow chart 800 of method of forming a structure (e.g., readout resonator 106) according to embodiments of the invention. Atblock 802, a capacitive part (e.g., capacitor 150) is formed with a first portion (e.g., capacitor pad 304) on a first surface (e.g., readout plane 302) and a second portion (e.g., capacitor pad 204) on a second surface (e.g., qubit plane 202), where the first and second portions having an equipotential. - At
block 804, an inductive part (e.g., inductor 130) on one of the first and second surfaces and void/absent from another one of the first and second surfaces. Theinductive part 130 is depicted on thereadout plane 302, as depicted inFIGS. 3, 4, and 5 . However, theinductive part 130 could be on thequbit plane 202. - An
interconnect structure 210 connects the first and second portions (e.g.,capacitor pads 204 and 304) to thereby have the equipotential. -
FIG. 9 depicts aflow chart 900 of method of forming a resonator (e.g., readout resonator 106) according to embodiments of the invention. Atblock 902, acapacitor 150 formed with a first superconducting material (e.g., capacitor pad 204) and a second superconducting material (e.g., capacitor pad 304) connected by asuperconducting interconnect 210, where the first and second superconducting materials are on different surfaces (e.g., thequbit plane 202 and the readout plane 302). Atblock 904, aninductor 130 is disposed on one of the different surfaces (e.g., one of thequbit plane 202 and thereadout plane 302 but not both). For example, theinductor 130 is disposed on either thequbit plane 202 or thereadout plane 302. - Examples of the lumped compact resonator having inductive and capacitive elements in which the inductive element is on an isolated plane have been discussed above using a solder bump and through-silicon via. Additional examples of lumped resonators having various types of structures for the inductive element are described in
FIGS. 10-25 . -
FIG. 10 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 10 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Theinductive element 130 is depicted as a meandering transmission line. -
FIG. 11 is a cross-sectional view of the resonator inFIG. 10 according to embodiments of the invention.FIG. 11 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 11 shows thebottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. - The
inductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 10 and 11 , theinductive element 130 is not limited to aspiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention. The qubit plane 202 (circuit plane) and thebottom substrate 402 together form a bottom chip, and the readout plane 302 (circuit plane) and thetop substrate 404 together form a top chip. - In addition to the
readout resonator 106, asolder bump 1110 is shown connecting thequbit plane 202 andreadout plane 302. One ormore solder bumps 1110 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Thesolder bump 1110 can be connected to atop intermetallic pad 1114 of thereadout plane 302 and connected to abottom intermetallic pad 1104 of thequbit plane 202. Thesolder bump 1110, thetop intermetallic pad 1114, and thebottom intermetallic pad 1104 are made of superconducting material. Thesolder bump 1110, thetop intermetallic pad 1114, and thebottom intermetallic pad 1104 can be formed when forming thecapacitor pad 204,capacitor pad 304, and interconnect 210 of the bump resonator when the bump resonator is on thecircuit 100. -
FIG. 12 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 12 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Again, theinductive element 130 is depicted as a meandering transmission line. -
FIG. 13 is a cross-sectional view of the resonator inFIG. 12 according to embodiments of the invention.FIG. 13 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 13 shows thebottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. Theinductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 12 and 13 , theinductive element 130 is not limited to aspiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention. The qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of thewafer 502. - In addition to the
readout resonator 106, (unlikeFIG. 11 )FIG. 13 shows a through-silicon via 1310 connecting thequbit plane 202 andreadout plane 302. One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. The through-silicon vias 1310 can be connected to a top viapad 1314 of thereadout plane 302 and connected to a bottom viapad 1304 of thequbit plane 202. The through-silicon via 1310, top viapad 1314, and the bottom viapad 1304 are made of superconducting materials as discussed herein. The through-silicon via 1310, top viapad 1314, and the bottom viapad 1304 can be formed when forming thecapacitor pad 204,capacitor pad 304, and interconnect 210 of the TSV resonator when the TSV resonator is on thecircuit 100. -
FIG. 14 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 14 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Theinductive element 130 is depicted as a kinetic inductor formed of high kinetic inductance material, and the kinetic inductor can be formed in a straight line, nearly a straight line, a diagonal line, etc. As noted above, high kinetic inductance material for the kinetic inductor can include niobium nitride (NbN), niobium titanium nitride (NbTiN), and/or titanium nitride (TiN). -
FIG. 15 is a cross-sectional view of the example resonator inFIG. 14 according to embodiments of the invention.FIG. 15 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 15 shows thebottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. - The
inductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 14 and 15 , theinductive element 130 is not limited to aspiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention. The qubit plane 202 (circuit plane) and thebottom substrate 402 together form a bottom chip, and the readout plane 302 (circuit plane) and thetop substrate 404 together form a top chip. - In addition to the
readout resonator 106, asolder bump 1110 is shown connecting thequbit plane 202 andreadout plane 302. One ormore solder bumps 1110 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Thesolder bump 1110 can be connected to atop intermetallic pad 1114 of thereadout plane 302 and connected to abottom intermetallic pad 1104 of thequbit plane 202. Thesolder bump 1110, thetop intermetallic pad 1114, and thebottom intermetallic pad 1104 are made of superconducting material. -
FIG. 16 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 16 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Again, theinductive element 130 is depicted as a kinetic inductor formed of high kinetic inductance material as discussed above. -
FIG. 17 is a cross-sectional view of the resonator inFIG. 16 according to embodiments of the invention.FIG. 17 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 17 shows thebottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. Theinductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 16 and 17 , theinductive element 130 is not limited to aspiral coil 332 but can be other shapes and/or designs, according to embodiments of the invention. The qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of thewafer 502. - In addition to the
readout resonator 106, (unlikeFIG. 15 )FIG. 17 shows a through-silicon via 1310 connecting thequbit plane 202 andreadout plane 302. One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. The through-silicon vias 1310 can be connected to a top viapad 1314 of thereadout plane 302 and connected to a bottom viapad 1304 of thequbit plane 202. The through-silicon via 1310, top viapad 1314, and the bottom viapad 1304 are made of superconducting materials as discussed herein. -
FIG. 18 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 18 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Theinductive element 130 is depicted as a spiral inductor transmission line connected to any the side of thecapacitor 150. The spiralinductive element 130 has acenter piece 1802. One end of the spiral transmission line connects to thetop capacitor pad 304 and the other end of the spiral transmission line connects to thecenter piece 1802. Aconnector 1820 connects to thecenter piece 1802, and theconnector 1820 can be connected to another circuit element such as a transmission line for external connection. Adielectric crossover 1822 is underneath theconnector 1820 so as to separate theconnector 1820 from the spiral transmission line underneath. In some implementations, thedielectric crossover 1822 can be an air bridge such that thedielectric crossover 1822 is air or space between theconnector 1820 and spiral transmission line underneath. In some implementations, thedielectric crossover 1822 can be a dielectric material, such as an oxide, nitride, etc. Theinductor 130 including the spiral transmission line and the center piece 1802 (along with the connector 1820) and thecapacitor 150 including thetop capacitor pad 304 and thebottom capacitor 204 can be formed of superconducting material. -
FIG. 19 is a cross-sectional view of the resonator inFIG. 18 according to embodiments of the invention.FIG. 19 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 19 shows thebottom capacitor pad 204 on the qubit plane 202 (where the qubits are not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. - The
inductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 18 and 19 , theinductive element 130 is not limited to aspiral coil 332 around the capacitor but can be other shapes and/or designs and in other locations, according to embodiments of the invention. The qubit plane 202 (circuit plane) and thebottom substrate 402 together form a bottom chip, and the readout plane 302 (circuit plane) and thetop substrate 404 together form a top chip. - In addition to the
readout resonator 106, asolder bump 1110 is shown connecting thequbit plane 202 andreadout plane 302. One ormore solder bumps 1110 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of thesolder bump 1110,top intermetallic pad 1114, andbottom intermetallic pad 1104 have been discussed herein. -
FIG. 20 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 20 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Again, theinductive element 130 is depicted as a spiral inductor transmission line connected to any the side of thecapacitor 150. The spiralinductive element 130 has acenter piece 1802. One end of the spiral transmission line connects to thetop capacitor pad 304 and the other endo of the spiral transmission line connects to thecenter piece 1802. Aconnector 1820 connects to thecenter piece 1802, theconnector 1820 can be connected to another circuit element such as a transmission line for external connection. Adielectric crossover 1822 is underneath the connector so as to separate theconnector 1820 from the spiral transmission line underneath. In some implementations, thedielectric crossover 1822 can be an air bridge such that thedielectric crossover 1822 is air or space between theconnector 1820 and spiral transmission line. In some implementations, thedielectric crossover 1822 can be a dielectric material, such as an oxide, nitride, etc. Theinductor 130 including the spiral transmission line and the center piece 1802 (along with the connector 1820) and thecapacitor 150 including thetop capacitor pad 304 and thebottom capacitor 204 can be formed of superconducting material. -
FIG. 21 is a cross-sectional view of the resonator inFIG. 20 according to embodiments of the invention.FIG. 20 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present.FIG. 20 shows thebottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. Theinductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 20 and 21 , theinductive element 130 is not limited to aspiral coil 332 around the capacitor but can be other shapes and/or designs and in other locations, according to embodiments of the invention. The qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of thewafer 502. - In addition to the
readout resonator 106, (unlikeFIG. 19 )FIG. 21 shows a through-silicon via 1310 connecting thequbit plane 202 andreadout plane 302. One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the through-silicon vias 1310, top viapad 1314, and bottom viapad 1304 have been discussed herein. - In
FIGS. 18-21 , thecenter piece 1802 is shown connected to aconnector 1820 which can then be connected to other circuit elements, while the other end of thespiral inductor 130 is shown connected to thecapacitor pad 304. These connections could be reversed. For example, theconnector 1820 could be connected to thetop capacitor pad 304 while the other end of thespiral inductor 130 can then be connected to other circuit elements. -
FIG. 22 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 22 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. Theinductive element 130 is depicted as a Josephson junction or an array ofJosephson junctions 2250. The Josephson junction or array ofJosephson junctions 2250 include afirst superconducting electrode 2252A and asecond superconducting electrode 2252B separated by a tunnel barrier 2302 (depicted inFIG. 23 ). Thefirst superconducting electrode 2252A is connected to thetop capacitor pad 304 by aleft superconducting lead 2242. Aright superconducting lead 2244 is connected to thesecond superconducting electrode 2252B, and theright superconducting lead 2244 connects to other circuit elements, such as, for example, a qubit, the external environment (e.g., thesystem 190, 192), etc. Each Josephson junction in the array has its own first and secondsuperconducting elements tunnel barrier 2302. Josephson junction can be connected together in series. -
FIG. 23 is a cross-sectional view of the resonator inFIG. 22 according to embodiments of the invention.FIG. 23 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present. As can be seen, the Josephson junction or array ofJosephson junction 2250 are schematically depicted as two overlappingsuperconducting films tunnel barrier 2302 in between. Thetunnel barrier 2302 can be selected from the group including dielectric material, a short section of normal (non-superconducting) metal (that does not become superconducting at the cryogenic temperate of the superconducting material), and/or a constriction of a superconductor (i.e., (narrowed superconducting material) as understood by one skilled in the art. - The superconducting materials utilized as connections (
right superconducting lead 2244 and left superconducting lead 2242) can be different from the superconducting material used for the capacitor 150 (thetop capacitor pad 304 and the bottom capacitor 204) in some implementations and can be the same as the superconducting material used for thecapacitor 150 in some implementations. The same applies for the superconducting materials utilized in the at least one Josephson junction or the array of Josephson junction 2250 (i.e., inductor 130). The superconducting material utilized for thefirst superconducting electrode 2252A and secondsuperconducting electrode 2252B can be the same or different from the superconducting material used for thecapacitors 150, and/or the superconducting material used for the left and right superconducting leads 2242 and 2244. -
FIG. 23 shows thebottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. Theinductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 22 and 23 , theinductive element 130 is not limited to aspiral coil 332 around the capacitor but another device (i.e., one or more Josephson junctions 2250) according to embodiments of the invention. The qubit plane 202 (circuit plane) and thebottom substrate 402 together form a bottom chip, and the readout plane 302 (circuit plane) and thetop substrate 404 together form a top chip. - In addition to the
readout resonator 106, thesolder bump 1110 is shown connecting thequbit plane 202 andreadout plane 302. One ormore solder bumps 1110 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of thesolder bump 1110,top intermetallic pad 1114, andbottom intermetallic pad 1104 are discussed herein. -
FIG. 24 depicts a simplified version of a top view for an example resonator according to embodiments of the invention. The resonator can be, for example, areadout resonator 106. InFIG. 24 , thereadout resonator 106 has atop capacitor pad 304 and abottom capacitor pad 204, which form thecapacitor 150. Thetop capacitor pad 304 is connected to theinductive element 130. As discussed above, theinductive element 130 is depicted as a Josephson junction or an array ofJosephson junctions 2250. The Josephson junction or array ofJosephson junctions 2250 include afirst superconducting electrode 2252A and asecond superconducting electrode 2252B separated by a tunnel barrier 2302 (depicted inFIG. 25 ). Thefirst superconducting electrode 2252A is connected to thetop capacitor pad 304 by aleft superconducting lead 2242. Aright superconducting lead 2244 is connected to thesecond superconducting electrode 2252B, and theright superconducting lead 2244 connects to other circuit elements, such as, for example, a qubit, the external environment (e.g., thesystem 190, 192), etc. -
FIG. 25 is a cross-sectional view of the resonator inFIG. 22 according to embodiments of the invention.FIG. 25 only illustrates an example portion of asuperconducting qubit circuit 100 and it is understood that other circuit elements are present. As can be seen, the Josephson junction or array ofJosephson junction 2250 are schematically depicted as two overlappingsuperconducting films tunnel barrier 2302 in between. Thetunnel barrier 2302 can be selected from the group including dielectric material, a short section of normal (non-superconducting) metal (that does not become superconducting), and/or a constriction of a superconductor as understood by one skilled in the art. - As noted above, the superconducting materials utilized as connections (
right superconducting lead 2244 and left superconducting lead 2242) can be different from the superconducting material used for the capacitor 150 (thetop capacitor pad 304 and the bottom capacitor 204) in some implementations and can be the same as the superconducting material used for thecapacitor 150 in some implementations. The same applies for the superconducting materials utilized in the at least one Josephson junction or the array of Josephson junction 2250 (i.e., inductor 130). The superconducting material utilized for thefirst superconducting electrode 2252A and secondsuperconducting electrode 2252B can be the same or different from the superconducting material used for thecapacitors 150, and/or the superconducting material used for the left and right superconducting leads 2242 and 2244. -
FIG. 25 shows thebottom capacitor pad 204 on the qubit plane 202 (and the qubit is not shown) and thetop capacitor pad 304 on thereadout plane 302, thereby forming thecapacitor 150. Theinductive element 130 is (only) on thereadout plane 302 and is connected to thetop capacitor pad 304. As can be seen inFIGS. 24 and 25 , theinductive element 130 is not limited to aspiral coil 332 around the capacitor but another device (i.e., one or more Josephson junctions 2250) according to embodiments of the invention. The qubit plane 202 (circuit plane) and readout plane 302 (circuit plane) are (circuits) formed on opposite sides of thewafer 502. - In addition to the
readout resonator 106, (unlikeFIG. 23 )FIG. 25 shows a through-silicon via 1310 connecting thequbit plane 202 andreadout plane 302. One or more through-silicon vias 1310 can be utilized to connect, for example, ground planes on thequbit plane 202 to thereadout plane 302 and/or to connect other circuit elements between the qubit and readout planes as needed. Details of the through-silicon vias 1310, top viapad 1314, and bottom viapad 1304 have been discussed herein. -
FIG. 26 depicts aflow chart 2600 of a method of forming a structure (e.g., asuperconducting qubit circuit 100 having the inductive element on a separate plane) according to embodiments of the invention. Atblock 2602, a first surface (e.g., readout plane 302) includes aninductive element 130 of a resonator (e.g., readout resonator 106). Atblock 2604, a second surface (e.g., qubit plane 202) includes a first portion (e.g., capacitor pad 204) of acapacitive element 150 of the resonator (e.g., readout resonator 106) and at least one qubit (e.g., one or more qubits 102), where a second portion (e.g., capacitor pad 304) of thecapacitive element 150 of the resonator is on the first surface. - The capacitive element comprises an
interconnect structure 210. Theinterconnect structure 210 is a solder bump, e.g., as depicted inFIG. 4 . Theinterconnect structure 210 is a through-silicon via, e.g., as depicted inFIG. 5 . - The first surface and the second surface are circuit planes, and the circuit planes are on opposite sides of a substrate (e.g., substrate 502). The first surface and the second surface are circuit planes, and the circuit planes are on different substrates (e.g.,
substrates 402 and 404). - The
interconnect structure 210 connecting the first and second portions (e.g.,capacitor pads 304 and 204) forms an equipotential between at least a segment of the interconnect structure, at least a segment of the first portion, and at least a segment of the second portion. - The at least one qubit is a capacitive-type quantum bit. The at least one qubit comprises an inductive-type quantum bit
-
FIG. 27 depicts aflow chart 2700 of a method of forming a structure (e.g., asuperconducting qubit circuit 100 having the inductive element on a separate plane) according to embodiments of the invention. - At
block 2702, a first surface (e.g., readout plane 302) includesinductive elements 130 of resonators (e.g., numerous readout resonators 106) and first portions (e.g., numerous capacitor pads 304) ofcapacitive elements 150 of the resonators. At block 2704, a second surface (e.g., qubit plane 202) includes at least twoqubits 102 coupled by a bus resonator (e.g., bus resonator 104), where the second surface includes second portions (e.g., numerous capacitor pads 204) of thecapacitive elements 150 of the resonators. Each of the resonators (e.g., readout resonators 106) has itsown capacitor pads 204 and 304 (and optionally interconnect 210) andinductive element 130. - The first surface is a first circuit plane (e.g., readout plane 302) and the second surface is a second circuit plane (e.g., qubit plane 202) separate from the first circuit plane, such that the
inductive elements 130 of theresonators 106 and the at least twoqubits 102 are positioned on different circuit planes. - The resonators are
readout resonators 106. Thereadout resonators 106 are operable to read out respective ones of the at least twoqubits 102. Respective ones of thereadout resonators 106 are coupled (e.g., capacitively and/or inductively coupled) to respective ones of the at least twoqubits 102. For example, 5, 10, 15 . . . 35 ormore qubits 102 can be coupled to itsown readout resonator 106 on a one-to-one basis, such that the state of the respective qubit can be read out by its respective readout resonator as understood by one skilled in the art. Eachqubit 102 can have its own distinct resonance frequency for addressing, and eachreadout resonator 106 can have its own distinct resonance frequency for read out. -
FIG. 28 depicts a flow chart of forming asuperconducting qubit circuit 100 according to embodiments of the invention. At block 2802,readout resonators 106 are configured to respectively couple toqubits 102. At block 2804, one ormore bus resonators 104 are configured to couple at least two of thequbits 102 together. Although onebus resonator 104 is illustrated coupling twoqubits 102 inFIG. 1 , it should be appreciated that thebus resonator 104 can couple 3, 4, 5, 7 . . . 10 ormore qubits 102 together. Atblock 2806, a first surface (e.g., readout plane 302) includesinductive elements 130 of thereadout resonators 106. Atblock 2808, a second surface (e.g., qubit plane 202) include thequbits 102, where the first and second surfaces are different circuit planes. - Although the novel structures for resonators have been explained as readout resonators, it should be appreciated that the resonators are not limited to readout resonators. Other resonators including bus resonators or even qubits can be formed as discussed so as to isolate inductive element on, for example, on the readout plane that connects to the external environment (e.g., the 50 ohm environment).
- Various embodiments of the present invention are described herein with reference to the related drawings. Alternative embodiments can be devised without departing from the scope of this invention. Although various connections and positional relationships (e.g., over, below, adjacent, etc.) are set forth between elements in the following description and in the drawings, persons skilled in the art will recognize that many of the positional relationships described herein are orientation-independent when the described functionality is maintained even though the orientation is changed. These connections and/or positional relationships, unless specified otherwise, can be direct or indirect, and the present invention is not intended to be limiting in this respect. Accordingly, a coupling of entities can refer to either a direct or an indirect coupling, and a positional relationship between entities can be a direct or indirect positional relationship. As an example of an indirect positional relationship, references in the present description to forming layer “A” over layer “B” include situations in which one or more intermediate layers (e.g., layer “C”) is between layer “A” and layer “B” as long as the relevant characteristics and functionalities of layer “A” and layer “B” are not substantially changed by the intermediate layer(s).
- The following definitions and abbreviations are to be used for the interpretation of the claims and the specification. As used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having,” “contains” or “containing,” or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a composition, a mixture, process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such composition, mixture, process, method, article, or apparatus.
- Additionally, the term “exemplary” is used herein to mean “serving as an example, instance or illustration.” Any embodiment or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments or designs. The terms “at least one” and “one or more” are understood to include any integer number greater than or equal to one, i.e. one, two, three, four, etc. The terms “a plurality” are understood to include any integer number greater than or equal to two, i.e. two, three, four, five, etc. The term “connection” can include an indirect “connection” and a direct “connection.”
- References in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
- The terms “about,” “substantially,” “approximately,” and variations thereof, are intended to include the degree of error associated with measurement of the particular quantity based upon the equipment available at the time of filing the application. For example, “about” can include a range of ±8% or 5%, or 2% of a given value.
- As previously noted herein, for the sake of brevity, conventional techniques related to superconducting device and integrated circuit (IC) fabrication may or may not be described in detail herein. By way of background, however, a more general description of the superconducting device fabrication processes that can be utilized in implementing one or more embodiments of the present invention will now be provided. Although specific fabrication operations used in implementing one or more embodiments of the present invention can be individually known, the described combination of operations and/or resulting structures of the present invention are unique. Thus, the unique combination of the operations described in connection with the fabrication of a semiconductor device according to the present invention utilize a variety of individually known physical and chemical processes performed on a superconducting over a dielectric (e.g., silicon) substrate, some of which are described in the immediately following paragraphs.
- In general, the various processes used to form a micro-chip that will be packaged into an IC fall into general categories, including, film deposition, removal/etching, and patterning/lithography. Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer. Available technologies include physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others. Removal/etching is any process that removes material from the wafer. Examples include etch processes (either wet or dry), and chemical-mechanical planarization (CMP), and the like. Films of both conductors (e.g., poly-silicon, aluminum, copper, etc.) and insulators (e.g., various forms of silicon dioxide, silicon nitride, etc.) are used to connect and isolate components. Lithography is the formation of three-dimensional relief images or patterns on the semiconductor substrate for subsequent transfer of the pattern to the substrate. In lithography, the patterns are formed by a light sensitive polymer called a photo-resist. To build the complex structures of a circuit, lithography and etch pattern transfer steps are repeated multiple times. Each pattern being printed on the wafer is aligned to the previously formed patterns and slowly the conductors, insulators and other regions are built up to form the final device.
- The flowchart and block diagrams in the Figures illustrate possible implementations of fabrication and/or operation methods according to various embodiments of the present invention. Various functions/operations of the method are represented in the flow diagram by blocks. In some alternative implementations, the functions noted in the blocks can occur out of the order noted in the Figures. For example, two blocks shown in succession can, in fact, be executed substantially concurrently, or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved.
- The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments described herein.
Claims (25)
1. A structure comprising:
a first surface comprising an inductive element of a resonator; and
a second surface comprising a first portion of a capacitive element of the resonator and at least one qubit, wherein a second portion of the capacitive element of the resonator is on the first surface;
wherein an interconnect structure connecting the first and second portions forms an equipotential between the interconnect structure, the first portion, and the second portion.
2. The structure of claim 1 , wherein the capacitive element comprises the interconnect structure.
3. The structure of claim 2 , wherein the interconnect structure comprises a solder bump.
4. The structure of claim 2 , wherein the interconnect structure comprises a through-silicon via.
5. The structure of claim 1 , wherein the first surface and the second surface comprise circuit planes, the circuit planes being on opposite sides of a substrate.
6. The structure of claim 1 , wherein the first surface and the second surface comprise circuit planes, the circuit planes being on different substrates.
7. (canceled)
8. The structure of claim 1 , wherein the at least one qubit comprises a capacitive-type quantum bit.
9. The structure of claim 1 , wherein the at least one qubit comprises an inductive-type quantum bit.
10. A method of forming a structure, the method comprising:
disposing an inductive element of a resonator on a first surface; and
disposing a first portion of a capacitive element of the resonator and at least one qubit on a second surface, wherein a second portion of the capacitive element of the resonator is on the first surface;
wherein an interconnect structure connecting the first and second portions forms an equipotential between the interconnect structure, the first portion, and the second portion.
11. The method of claim 10 , wherein the capacitive element comprises the interconnect structure.
12. The method of claim 11 , wherein the interconnect structure comprises a solder bump.
13. The method of claim 11 , wherein the interconnect structure comprises a through-silicon via.
14. The method of claim 10 , wherein the first surface and the second surface comprise circuit planes, the circuit planes being on opposite sides of a substrate.
15. The method of claim 10 , wherein the first surface and the second surface comprise circuit planes, the circuit planes being on different substrates.
16. (canceled)
17. The method of claim 10 , wherein the at least one qubit comprises a capacitive-type quantum bit.
18. The method of claim 10 , wherein the at least one qubit comprises an inductive-type quantum bit.
19. A structure comprising:
a first surface comprising inductive elements of resonators and first portions of capacitive elements of the resonators; and
a second surface comprising at least two qubits coupled by a bus resonator, the second surface comprising second portions of the capacitive elements of the resonators.
20. The structure of claim 19 , wherein the first surface comprises a first circuit plane and the second surface comprises a second circuit plane separate from the first circuit plane, such that the inductive elements of the resonators and the at least two qubits are positioned on different circuit planes.
21. The structure of claim 19 , wherein the resonators comprise readout resonators.
22. The structure of claim 21 , wherein the readout resonators are operable to read out respective ones of the at least two qubits.
23. The structure of claim 21 , wherein respective ones of the readout resonators are coupled to respective ones of the at least two qubits.
24. A method of forming a structure, the method comprising:
disposing inductive elements of resonators and first portions of capacitive elements of the resonators on a first surface; and
disposing at least two qubits coupled by a bus resonator on a second surface, the second surface comprising second portions of the capacitive elements of the resonators;
wherein the capacitive elements respectively comprise an interconnect structure coupling the first and second surfaces, the interconnect structure being selected from the group consisting of a solder bump and a through-silicon via.
25. A superconducting qubit circuit comprising:
readout resonators configured to respectively couple to qubits;
one or more bus resonators configured to couple at least two of the qubits together;
a first surface comprising inductive elements of the readout resonators and first portions of capacitive elements of the readout resonators; and
a second surface comprising the qubits and second portions of the capacitive elements of the readout resonators, the first and second surfaces being different circuit planes;
wherein the capacitive elements respectively comprise an interconnect structure coupling the first and second surfaces, the interconnect structure being selected from the group consisting of a solder bump and a through-silicon via.
Priority Applications (7)
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---|---|---|---|
US15/827,718 US10305015B1 (en) | 2017-11-30 | 2017-11-30 | Low loss architecture for superconducting qubit circuits |
DE112017008244.7T DE112017008244B4 (en) | 2017-11-30 | 2017-12-20 | ARCHITECTURE WITH LOW LOSSES FOR SUPRAL CONDUCTING QUBIT CIRCUITS |
GB2009577.4A GB2582527B (en) | 2017-11-30 | 2017-12-20 | Low loss architecture for superconducting qubit circuits |
PCT/IB2017/058214 WO2019106416A1 (en) | 2017-11-30 | 2017-12-20 | Low loss architecture for superconducting qubit circuits |
JP2020529504A JP7052042B2 (en) | 2017-11-30 | 2017-12-20 | Low-loss architecture for superconducting qubit circuits |
CN201780096729.5A CN111328432B (en) | 2017-11-30 | 2017-12-20 | Low loss architecture for superconducting qubit circuits |
US16/379,824 US10593858B2 (en) | 2017-11-30 | 2019-04-10 | Low loss architecture for superconducting qubit circuits |
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US15/827,718 US10305015B1 (en) | 2017-11-30 | 2017-11-30 | Low loss architecture for superconducting qubit circuits |
Related Child Applications (1)
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US16/379,824 Continuation US10593858B2 (en) | 2017-11-30 | 2019-04-10 | Low loss architecture for superconducting qubit circuits |
Publications (2)
Publication Number | Publication Date |
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US10305015B1 US10305015B1 (en) | 2019-05-28 |
US20190165242A1 true US20190165242A1 (en) | 2019-05-30 |
Family
ID=66634556
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US15/827,718 Active US10305015B1 (en) | 2017-11-30 | 2017-11-30 | Low loss architecture for superconducting qubit circuits |
US16/379,824 Active US10593858B2 (en) | 2017-11-30 | 2019-04-10 | Low loss architecture for superconducting qubit circuits |
Family Applications After (1)
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US16/379,824 Active US10593858B2 (en) | 2017-11-30 | 2019-04-10 | Low loss architecture for superconducting qubit circuits |
Country Status (6)
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US (2) | US10305015B1 (en) |
JP (1) | JP7052042B2 (en) |
CN (1) | CN111328432B (en) |
DE (1) | DE112017008244B4 (en) |
GB (1) | GB2582527B (en) |
WO (1) | WO2019106416A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022178208A1 (en) * | 2021-02-19 | 2022-08-25 | Rigetti & Co, Llc | Connecting circuitry in a cap wafer of a superconducting quantum processing unit(qpu) |
US11538854B2 (en) * | 2020-03-27 | 2022-12-27 | International Business Machines Corporation | Coupled-line bus to suppress classical crosstalk for superconducting qubits |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9948254B2 (en) | 2014-02-21 | 2018-04-17 | Yale University | Wireless Josephson bifurcation amplifier |
US9971970B1 (en) | 2015-04-27 | 2018-05-15 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with VIAS and methods for making the same |
EP3402744A4 (en) * | 2016-01-15 | 2019-08-21 | Yale University | Techniques for manipulation of two-qubit quantum states and related systems and methods |
CN110402446B (en) | 2017-03-13 | 2022-12-20 | 谷歌有限责任公司 | Integrated circuit elements in stacked quantum computing devices |
KR102217205B1 (en) * | 2017-03-13 | 2021-02-18 | 구글 엘엘씨 | Integrated circuit elements in stacked quantum computing devices |
US11121301B1 (en) | 2017-06-19 | 2021-09-14 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafers and their methods of manufacture |
US10305015B1 (en) | 2017-11-30 | 2019-05-28 | International Business Machines Corporation | Low loss architecture for superconducting qubit circuits |
WO2019118442A1 (en) | 2017-12-11 | 2019-06-20 | Yale University | Superconducting nonlinear asymmetric inductive element and related systems and methods |
US10811588B2 (en) * | 2018-08-06 | 2020-10-20 | International Business Machines Corporation | Vertical dispersive readout of qubits of a lattice surface code architecture |
US10692795B2 (en) * | 2018-11-13 | 2020-06-23 | International Business Machines Corporation | Flip chip assembly of quantum computing devices |
EP3912200B1 (en) | 2019-01-17 | 2024-05-15 | Yale University | Josephson nonlinear circuit |
FR3093255B1 (en) * | 2019-02-21 | 2021-02-12 | Centre Nat Rech Scient | Low characteristic impedance traveling wave parametric amplifier and method of manufacture thereof |
US10840428B2 (en) * | 2019-03-07 | 2020-11-17 | International Business Machines Corporation | Scalable quantum devices with vertical coaxial resonators |
US11088310B2 (en) * | 2019-04-29 | 2021-08-10 | International Business Machines Corporation | Through-silicon-via fabrication in planar quantum devices |
WO2021178042A1 (en) * | 2020-03-02 | 2021-09-10 | Massachusetts Institute Of Technology | Qubit circuits with deep, in-substrate components |
CN113887732B (en) * | 2021-09-24 | 2022-07-26 | 材料科学姑苏实验室 | Quantum chip and method for inhibiting signal crosstalk in quantum chip |
Family Cites Families (56)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0666535B2 (en) * | 1987-08-26 | 1994-08-24 | 住友電気工業株式会社 | Manufacturing method of ceramic circuit board with superconducting winding element |
US5039965A (en) | 1990-08-24 | 1991-08-13 | Motorola, Inc. | Radio frequency filter feedthrough structure for multilayer circuit boards |
US6203147B1 (en) | 1994-12-22 | 2001-03-20 | Hewlett-Packard Company | Electrical and fluidic interface for an ink supply |
US6183077B1 (en) | 1995-04-27 | 2001-02-06 | Hewlett-Packard Company | Method and apparatus for keying ink supply containers |
US5710579A (en) | 1995-05-04 | 1998-01-20 | Calcomp Inc. | Sensor system for printers |
US5914296A (en) | 1997-01-30 | 1999-06-22 | E. I. Du Pont De Nemours And Company | Resonators for high power high temperature superconducting devices |
US5939739A (en) | 1996-05-31 | 1999-08-17 | The Whitaker Corporation | Separation of thermal and electrical paths in flip chip ballasted power heterojunction bipolar transistors |
JPH11297906A (en) | 1998-03-23 | 1999-10-29 | Motorola Inc | Electronic assembly and its manufacture |
JP3480384B2 (en) | 1999-09-10 | 2003-12-15 | 株式会社村田製作所 | Laminated LC resonator and laminated LC filter |
US6900454B2 (en) | 2002-04-20 | 2005-05-31 | D-Wave Systems, Inc. | Resonant controlled qubit system |
JPWO2004075337A1 (en) | 2003-02-24 | 2006-06-01 | 日本電気株式会社 | Dielectric resonator, frequency adjusting method of dielectric resonator, and integrated circuit having dielectric resonator |
JP4315859B2 (en) | 2004-05-19 | 2009-08-19 | 富士通株式会社 | Superconducting filter |
JP4638711B2 (en) | 2004-10-27 | 2011-02-23 | 株式会社エヌ・ティ・ティ・ドコモ | Resonator |
JP2007036856A (en) | 2005-07-28 | 2007-02-08 | Fujitsu Media Device Kk | Resonator, filter and antenna branching filter |
WO2009052621A1 (en) * | 2007-10-22 | 2009-04-30 | D-Wave Systems Inc. | Systems, methods, and apparatus for electrical filters and input/output systems |
CN102027632B (en) | 2008-05-12 | 2013-10-30 | 松下电器产业株式会社 | Left-handed resonator and left-handed filter using same |
US8279022B2 (en) * | 2008-07-15 | 2012-10-02 | D-Wave Systems Inc. | Input/output systems and devices for use with superconducting devices |
US7772081B2 (en) | 2008-09-17 | 2010-08-10 | Stats Chippac, Ltd. | Semiconductor device and method of forming high-frequency circuit structure and method thereof |
US8547188B2 (en) | 2009-02-23 | 2013-10-01 | Tdk Corporation | Filter with integrated loading capacitors |
US8659007B2 (en) | 2010-11-10 | 2014-02-25 | Microsoft Corporation | Coherent quantum information transfer between conventional qubits |
US8242799B2 (en) * | 2010-11-16 | 2012-08-14 | Northrop Grumman Systems Corporation | System and method for phase error reduction in quantum systems |
JP5598548B2 (en) | 2010-11-16 | 2014-10-01 | 株式会社村田製作所 | Multilayer bandpass filter |
US8954125B2 (en) | 2011-07-28 | 2015-02-10 | International Business Machines Corporation | Low-loss superconducting devices |
US20160104073A1 (en) | 2012-12-05 | 2016-04-14 | The United States Of America As Represented By The Secretary Of Commerce | Radiation Suppression of Superconducting Quantum Bits Using a Conductive Plane |
US9219298B2 (en) | 2013-03-15 | 2015-12-22 | International Business Machines Corporation | Removal of spurious microwave modes via flip-chip crossover |
KR101804496B1 (en) | 2013-07-17 | 2017-12-04 | 가부시키가이샤 무라타 세이사쿠쇼 | Electronic component and method for producing same |
US9306537B1 (en) | 2013-08-30 | 2016-04-05 | Integrated Device Technology, Inc. | Integrated circuit device substrates having packaged crystal resonators thereon |
CN106461057B (en) | 2014-06-27 | 2019-11-12 | 东洋电机制造株式会社 | The decomposition method of geared system |
JP6490928B2 (en) * | 2014-09-08 | 2019-03-27 | 株式会社東芝 | Multiband filter |
US9501748B2 (en) * | 2014-11-04 | 2016-11-22 | Northrop Grumman Systems Corporation | Mixed coupling between a qubit and resonator |
CA2977662A1 (en) | 2015-02-27 | 2016-09-01 | Yale University | Techniques for coupling plannar qubits to non-planar resonators and related systems and methods |
US9836699B1 (en) * | 2015-04-27 | 2017-12-05 | Rigetti & Co. | Microwave integrated quantum circuits with interposer |
US9614270B2 (en) | 2015-04-30 | 2017-04-04 | International Business Machines Corporation | Superconducting airbridge crossover using superconducting sacrificial material |
US9929123B2 (en) | 2015-06-08 | 2018-03-27 | Analog Devices, Inc. | Resonant circuit including bump pads |
US9524470B1 (en) | 2015-06-12 | 2016-12-20 | International Business Machines Corporation | Modular array of vertically integrated superconducting qubit devices for scalable quantum computing |
US9893262B2 (en) | 2015-07-06 | 2018-02-13 | Rigetti & Co., Inc. | Lumped-element device for quantum information processing systems |
US10134972B2 (en) * | 2015-07-23 | 2018-11-20 | Massachusetts Institute Of Technology | Qubit and coupler circuit structures and coupling techniques |
US10658424B2 (en) * | 2015-07-23 | 2020-05-19 | Massachusetts Institute Of Technology | Superconducting integrated circuit |
GB201513774D0 (en) | 2015-08-04 | 2015-09-16 | Isis Innovation | Quantum information processing system |
US9520356B1 (en) | 2015-09-09 | 2016-12-13 | Analog Devices, Inc. | Circuit with reduced noise and controlled frequency |
US9847121B2 (en) * | 2015-09-13 | 2017-12-19 | International Business Machines Corporation | Providing controlled pulses for quantum computing |
US9983336B2 (en) * | 2015-09-28 | 2018-05-29 | International Business Machines Corporation | Low-loss infrared filter for microwave measurement which integrates a distributed bragg reflector into a microwave transmission line |
US9589236B1 (en) * | 2015-09-28 | 2017-03-07 | International Business Machines Corporation | High fidelity and high efficiency qubit readout scheme |
US9922289B2 (en) * | 2015-09-30 | 2018-03-20 | International Business Machines Corporation | Quantum nondemolition microwave photon counter based on the cross-Kerr nonlinearity of a Josephson junction embedded in a superconducting circuit |
US9444430B1 (en) | 2015-10-02 | 2016-09-13 | International Business Machines Corporation | Cavity filtered qubit |
WO2017131831A2 (en) * | 2015-11-05 | 2017-08-03 | Massachusetts Institute Of Technology | Qubit and coupler circuit structures and coupling techniques |
CN109075186B (en) | 2015-12-15 | 2023-09-05 | 谷歌有限责任公司 | Superconducting bump joint |
US10657455B2 (en) | 2015-12-16 | 2020-05-19 | Google Llc | Programmable universal quantum annealing with co-planar waveguide flux qubits |
US10467544B2 (en) | 2015-12-31 | 2019-11-05 | International Business Machines Corporation | Multi-qubit tunable coupling architecture using fixed-frequency superconducting qubits |
US9885888B2 (en) * | 2016-02-08 | 2018-02-06 | International Business Machines Corporation | Integrated microwave-to-optical single-photon transducer with strain-induced electro-optic material |
US10187030B2 (en) | 2016-04-25 | 2019-01-22 | Kumu Networks, Inc. | High quality factor time delay filters using multi-layer fringe capacitors |
US10050630B2 (en) * | 2016-08-19 | 2018-08-14 | Rigetti & Co, Inc. | Flux-tunable qubit device with multiple Josephson junctions |
US9806711B1 (en) * | 2016-09-28 | 2017-10-31 | International Business Machines Corporation | Quantum limited josephson amplifier with spatial separation between spectrally degenerate signal and idler modes |
US9870536B1 (en) * | 2017-04-04 | 2018-01-16 | International Business Machines Corporation | Integrated drive and readout circuit for superconducting qubits |
US10263170B1 (en) * | 2017-11-30 | 2019-04-16 | International Business Machines Corporation | Bumped resonator structure |
US10305015B1 (en) | 2017-11-30 | 2019-05-28 | International Business Machines Corporation | Low loss architecture for superconducting qubit circuits |
-
2017
- 2017-11-30 US US15/827,718 patent/US10305015B1/en active Active
- 2017-12-20 DE DE112017008244.7T patent/DE112017008244B4/en active Active
- 2017-12-20 GB GB2009577.4A patent/GB2582527B/en active Active
- 2017-12-20 JP JP2020529504A patent/JP7052042B2/en active Active
- 2017-12-20 CN CN201780096729.5A patent/CN111328432B/en active Active
- 2017-12-20 WO PCT/IB2017/058214 patent/WO2019106416A1/en active Application Filing
-
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- 2019-04-10 US US16/379,824 patent/US10593858B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11538854B2 (en) * | 2020-03-27 | 2022-12-27 | International Business Machines Corporation | Coupled-line bus to suppress classical crosstalk for superconducting qubits |
WO2022178208A1 (en) * | 2021-02-19 | 2022-08-25 | Rigetti & Co, Llc | Connecting circuitry in a cap wafer of a superconducting quantum processing unit(qpu) |
Also Published As
Publication number | Publication date |
---|---|
CN111328432B (en) | 2023-07-28 |
DE112017008244T5 (en) | 2020-08-13 |
DE112017008244B4 (en) | 2021-12-16 |
US10305015B1 (en) | 2019-05-28 |
GB202009577D0 (en) | 2020-08-05 |
GB2582527A (en) | 2020-09-23 |
JP2021504964A (en) | 2021-02-15 |
WO2019106416A1 (en) | 2019-06-06 |
JP7052042B2 (en) | 2022-04-11 |
GB2582527B (en) | 2021-01-20 |
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