US20190157218A1 - Interposer and method for producing holes in an interposer - Google Patents
Interposer and method for producing holes in an interposer Download PDFInfo
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- US20190157218A1 US20190157218A1 US16/256,093 US201916256093A US2019157218A1 US 20190157218 A1 US20190157218 A1 US 20190157218A1 US 201916256093 A US201916256093 A US 201916256093A US 2019157218 A1 US2019157218 A1 US 2019157218A1
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- holes
- interposer
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- 229910001845 yogo sapphire Inorganic materials 0.000 description 4
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- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 1
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- YEAUATLBSVJFOY-UHFFFAOYSA-N tetraantimony hexaoxide Chemical compound O1[Sb](O2)O[Sb]3O[Sb]1O[Sb]2O3 YEAUATLBSVJFOY-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/562—Protection against mechanical damage
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
Definitions
- the invention relates to interposers for electrically connecting the terminals of a CPU chip and a circuit board, and further relates to methods used in a critical manufacturing step of interposers.
- a CPU chip as a processor core, typically has several hundred contact points on its bottom surface, which are closely spaced to one another and distributed over a relatively small area. Due to this close spacing, these contact points cannot be mounted directly to a circuit board, the so called motherboard. Therefore, an intermediate part is employed which permits to enlarge the connection base.
- a glass fiber mat encased in epoxy material is employed, which is provided with a number of holes. Conductive paths running on one surface of the glass fiber mat extend into respective holes to fill them and to lead to the terminals of the processor core at the other surface of the glass fiber mat.
- an underfill is applied both around the processor core and between the processor core and the glass fiber mat, which protects the wires and mechanically joins the processor core and the glass fiber mat.
- the processor core and the glass fiber mat exhibit different thermal expansions.
- the glass fiber mat has an expansion coefficient from 15 to 17 ⁇ 10 ⁇ 6 /K
- the silicon-based core processor has a thermal expansion factor from 3.2 to 3.3 ⁇ 10 ⁇ 6 /K. Therefore, in case of heating there are differential expansions between the core processor and the glass fiber mat and hence mechanical stresses arise between these two components. This can be detrimental to the contact connections, especially when the two components are not completely joined face to face. In this case the contact points may break easily.
- Another drawback of using a glass fiber mat is related to the mechanical drilling of holes into the glass fiber mat.
- the hole diameter is limited to 250 to 450 ⁇ m.
- U.S. 2002/0180015 A1 discloses a multi-chip module which includes semiconductor devices and a wiring substrate for mounting the semiconductor devices.
- the wiring substrate comprises a glass substrate having holes which were formed by a sand blasting treatment.
- a wiring layer is formed on the surface of the glass substrate.
- the glass substrate has wirings and an insulation layer. It is aimed at selecting the coefficient of thermal expansion of the glass substrate close to the coefficient of silicon.
- U.S. Pat. No. 5,216,207 discloses ceramic multilayer circuit boards including silver conductors. The layers are fired at low temperatures. The circuit boards have a coefficient of thermal expansion close to that of silicon.
- U.S. 2009/0321114 A1 discloses an electrical testing substrate unit including a multilayer ceramic substrate. Although the materials used have a coefficient of thermal expansion close to the value of the invention, they are not pure glasses.
- U.S. Pat. No. 7,550,321 B1 discloses a substrate having a coefficient of thermal expansion with a gradient in the thickness direction.
- An object of the invention is to provide an interposer for electrical connection between a CPU chip and a circuit board, which is economical to produce and enables to produce microholes with a hole diameter in the order of 20 ⁇ m and 200 ⁇ m, and wherein the interposer body exhibits a thermal expansion similar to that of the CPU chip material.
- the novel interposer should be able to meet the following requirements: Multiple small holes (10 to 10,000) are to be accommodated in each interposer, with close tolerances of the holes to each other. It has to be possible to ensure a hole spacing down to 30 ⁇ m. Hole diameters down to a size of 20 ⁇ m should be possible. A ratio of the thickness of the interposer to the hole diameter, the so-called aspect ratio, from 1 to 10 should be possible. A center-to-center distance of the holes in a range from 120 ⁇ m and 400 ⁇ m should be possible.
- the hole should have a conical or crater-shaped inlet and outlet to the hole, but the inner walls of the hole in the center should be of cylindrical shape.
- the hole should have smooth walls (fire-polished).
- a bead may be produced around the edge of the hole, having a height of not more than 5 mm.
- the interposer according to the invention is characterized in that its board-shaped base substrate is made of glass having a coefficient of thermal expansion ranging from 3.1 ⁇ 10 ⁇ 6 /K to 3.4 ⁇ 10 ⁇ 6 /K. Silicon-based chip boards exhibit an expansion coefficient between 3.2 ⁇ 10 ⁇ 6 /K and 3.3 ⁇ 10 ⁇ 6 /K. Therefore, large mechanical stresses between the interposer and the CPU chip due to different thermal expansion behavior are not to be expected.
- the number of holes in the interposer is selected according to the particular requirements and may amount up to 10,000 holes per cm 2 .
- a usual number of holes ranges from 1000 to 3000.
- the center-to-center spacing of the holes ranges from 50 ⁇ m to 700 ⁇ m.
- holes are provided which have a diameter ranging from 20 ⁇ m to 200 ⁇ m.
- conductive paths extend on one of the surfaces of the interposer board to and into the holes and therethrough to form connection points for the CPU chip.
- the glass of the base substrate should have an alkali content of less than 700 ppm. Such a glass has a low coefficient of thermal expansion, as required, and exhibits very good signal-insulating properties, due to the high dielectric value. Furthermore, the risk of contamination of silicon processors with alkalis is largely avoided.
- an arsenic or antimony content of the glass composition is less than 50 ppm.
- Interposer boards have a thickness of less than 1 mm, but not below 30 ⁇ m.
- the number of holes of an interposer is chosen according to the needs, and is in the order from 1000 to 3000 holes per cm 2 .
- the invention targets to offer interposers on the market having microholes smaller than 100 ⁇ m. Hence, the holes are closely packed, with a center-to-center distance of the holes that may range from 150 ⁇ m to 400 ⁇ m. However, the edge-to-edge distance of the holes should not be less than 30 ⁇ m.
- the holes need not all have the same diameter, it is possible that holes of different diameters are provided in the board-shaped base substrate.
- the ratio of the thickness of the glass board to the hole diameter may be selected in a wide range from 0.1 to 25, an aspect ratio from 1 to 10 being preferred.
- the holes generally have a thin cylindrical shape, but may have rounded-broken edges at the inlet and outlet of the hole.
- the holes which may have a diameter ranging from 20 ⁇ m to 200 ⁇ m
- focused laser pulses are used in a wavelength range of transparency of the glass, so that the laser beams penetrate into the glass and are not already absorbed in the surface layers of the glass.
- the laser radiation used has a very high radiation intensity, so as to result in local non-thermal destruction of the glass along filamentary channels.
- These filamentary channels are subsequently widened to the desired diameter of the holes, for which purpose dielectric breakdowns may be employed which cause electro-thermal heating and evaporation of the material of the hole edges, and/or the filamentary channels are widened by supplying reactive gases.
- the perforations may be widened by supplied etching gas.
- FIG. 1 schematically illustrates, in a longitudinal sectional view, one way of producing an interposer
- FIG. 2 illustrates a second way of producing an interposer
- FIG. 3 an interposer, schematically.
- perforation points 10 on a board-shaped glass substrate 1 are marked by focused laser pulses 41 emanating from an array 4 of lasers 40 .
- the radiation intensity of these lasers is so strong that it causes local non-thermal destruction in the glass along a filamentary channel 11 .
- filamentary channels 11 are widened into holes 12 .
- opposing electrodes 6 and 7 may be employed, to which high voltage energy is applied, resulting in dielectric breakdowns across the glass substrate along filamentary channels 11 . These breakthroughs are widened by electro-thermal heating and evaporation of the perforation material until the process is stopped by switching off the power supply when the desired hole diameter is achieved.
- the filamentary channels 11 may be widened using reactive gases, as illustrated by nozzles 20 , 30 , which direct the gas to the perforation points 10 .
- conductive paths 13 to the perforation points 10 are applied on the upper surface of glass board 1 , and the holes 12 are filled with conductive material 14 to complete the connections to the contact points of a CPU chip or the like at the bottom surface of the board. (For mounting on the motherboard, glass board 1 is turned around.)
- FIG. 2 shows another way of producing microholes.
- Perforation points 10 are marked by precisely imprinted RF coupling material.
- high frequency energy is applied by means of electrodes 2 , 3 , so that the coupling points themselves and the glass material between the upper surface coupling points and the lower surface coupling points is heated, causing the dielectric strength of the material to be lowered.
- dielectric breakdowns will occur along narrow channels 11 .
- these narrow channels 11 may be widened to the size of holes 12 .
- conductive paths 13 to the holes 12 are applied on the upper surface of the glass substrate, and the holes are filled with conductive material 14 in order to establish the connections for the CPU chip, with the glass board 1 turned around.
- interposers need not to be produced separately, rather glass substrate boards for a plurality of interposers may be processed, and the large-sized glass substrate boards may be cut to obtain the individual interposers. Glass substrate boards of a size with edge lengths of 0.2 m by 3 m (or less) can be processed. Round board formats may have dimensions of up to 1 m.
- the table shows fifteen examples of suitable glasses and their compositions (in wt. % based on oxide) and their main features.
- the refining agents SnO 2 (Examples 1-8, 11, 12, 14, 15) and As Z O 3 (Examples 9, 10, 13) with a proportion of 0.3 wt. % is not listed.
- the following properties are specified:
- T4 the temperature at a viscosity of 10 4 dPa ⁇ s
- T2 the temperature at a viscosity of 10 2 dPa ⁇ s
- compositions in wt. % based on oxide, and essential properties of glasses according to the invention
- n.m. 1650 1615 n d 1.520 1.513 1.511 1.512 1.520 1.526 HCl (mg/cm 2 ) n.m. 0.30 0.89 n.m. n.m. 0.72 BHF (mg/cm 2 ) 0.62 0.45 0.43 0.40 0.44 0.49 13 14 15 SiO 2 61.4 59.5 63.9 B 2 O 3 8.2 10.0 10.4 Al 2 O 3 16.0 16.7 14.6 MgO 2.8 0.7 2.9 CaO 7.9 8.5 4.8 BaO 3.4 3.8 3.1 ZnO — — — ⁇ 20/300 (10 ⁇ 6 /K) 3.75 3.60 3.21 (g/cm 3 ) 2.48 2.48 2.41 Tg (° C.) 709 702 701 T 4 (° C.) 1273 1260 1311 T 2 (° C.) 1629 1629 n.m. n d 1.523 1.522 n.m. HCl (mg/cm 2 ) 0.41 0.97 n.
- the glasses have the following advantageous properties:
- T g >700° C.
- a high glass transition temperature i.e. a high temperature resistance. This is essential for a lowest possible production-related shrinkage (“compaction”) and for use of the glasses as substrates for coatings of amorphous Si layers and subsequent annealing thereof.
- the glasses exhibit high thermal shock resistance and good devitrification stability.
- the glasses can be produced as flat glasses by various drawing methods, e.g. microsheet down-draw, up-draw, or overflow fusion methods, and, in a preferred embodiment, if they are free of As 2 O 3 and Sb 2 O 3 , also by the float process.
- the glasses are highly suitable for use as substrate glass for producing interposers.
- Interposers which are occupied more densely with holes as compared to previous interposers, take smaller substrate sizes, thereby still further reducing the amount of different expansions and contractions of the involved layers or boards and thus the risk of warpage and hence cracking between the involved layers or boards.
- FIG. 3 a sectional view of an interposer is shown schematically in FIG. 3 .
- the interposer is mounted on a circuit board 17 and carries a CPU chip 16 .
- Contact points 15 of the CPU chip 16 schematically are shown in a first lead distribution layer 150 , and the conductive paths 13 are indicated in a second lead distribution layer 130 .
- the board-shaped base substrate 1 forms a glass plate. Etching can be accomplished by reactive gases or by wet etching.
- the board-shaped base substrate 1 made of a single layer of glass is exposed to focused laser pulses at predetermined perforation points 10 with a radiation intensity that causes each a local non-thermal destruction of the glass along a filamentary channel 11 , and the filamentary channels 11 are widened by etching to the desired diameter of the holes 12 which get a generally cylindrical shape with inner cylindrical walls having typical roughness as from etching.
- the edges between the inner cylindrical walls of the holes and the outer substrate surfaces are rounded and form transition zones that make it easier to fill into the holes conductive material that bonds with the hole roughnesses.
- the base substrate 1 made of a single layer of glass can have a thickness in the range between 10 ⁇ m and 3 mm.
- the holes 12 in the substrate can have diameters that range from 1 ⁇ m to 1 mm.
- the holes can have a small distance form on another, or adjacent holes can even merge so that bigger holes are cut out using holes arranged along a circle, or webs are formed with remaining base substrate material so as to form a web structure.
- substrates for interposers are envisaged as substrates for interposers of reduced size.
- substrates in interposers for heavy duty applications can be made in thicknesses of 0.7 mm, 1.0 mm, 2.0 mm, 2.8 mm and 3.0 mm.
- substrates of 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm and 0.6 mm can be used.
- the glass plate As a basic material for the glass plate that can be used as a substrate for producing interposers, also photosensitive glasses can be used.
- preparatory steps are preferably applied before the substrate is exposed to focused laser pulses so as to produce the filamentary channels 11 .
- the preparatory steps consists in exposing to ultra violet radiation the glass about the predetermined perforation points 10 with the desired diameters of the holes 12 , and in tempering the glass. Thereafter, strong focused laser pulses are directed at the predetermined perforation points 10 which make the substrate brittle along the filamentary channels 11 .
- the filamentary channels offer a path wherein etching means can enter quickly and deeply. This favors forming of well defined inner cylindrical walls of the holes 12 .
- a preferred etching solution includes KOH highly concentrated, and HF. Concentration: 6 mol/L KOH; HF 3-10. wt % Etching parameter: KOH at 100° C. for 4 hours; HF at room temperature for 2 hours.
- the glass plate as such can be used as a component in an interposer, or the glass plate is ceramized to get a glass-ceramic plate useful in making an interposer
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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Abstract
Description
- This application is a continuation of application Ser. No. 13/807,386 filed Apr. 8, 2013, which is US National Stage application under 35 USC § 371 of PCT/EP2011/003300 filed Jul. 4, 2011, which claims benefit under 35 USC § 119(a) of German Application No. 10 2010 025 966.7 filed Jul. 2, 2010, the entire contents of all of which are incorporated herein by reference.
- The invention relates to interposers for electrically connecting the terminals of a CPU chip and a circuit board, and further relates to methods used in a critical manufacturing step of interposers.
- A CPU chip, as a processor core, typically has several hundred contact points on its bottom surface, which are closely spaced to one another and distributed over a relatively small area. Due to this close spacing, these contact points cannot be mounted directly to a circuit board, the so called motherboard. Therefore, an intermediate part is employed which permits to enlarge the connection base. As an intermediate part, often, a glass fiber mat encased in epoxy material is employed, which is provided with a number of holes. Conductive paths running on one surface of the glass fiber mat extend into respective holes to fill them and to lead to the terminals of the processor core at the other surface of the glass fiber mat. For this purpose, an underfill is applied both around the processor core and between the processor core and the glass fiber mat, which protects the wires and mechanically joins the processor core and the glass fiber mat. However, the processor core and the glass fiber mat exhibit different thermal expansions. For example, the glass fiber mat has an expansion coefficient from 15 to 17×10−6/K, while the silicon-based core processor has a thermal expansion factor from 3.2 to 3.3×10−6/K. Therefore, in case of heating there are differential expansions between the core processor and the glass fiber mat and hence mechanical stresses arise between these two components. This can be detrimental to the contact connections, especially when the two components are not completely joined face to face. In this case the contact points may break easily.
- Another drawback of using a glass fiber mat is related to the mechanical drilling of holes into the glass fiber mat. The hole diameter is limited to 250 to 450 μm.
- Another possibility of designing and manufacturing connecting structures which could be used as a type of interposer is described in WO 02/058135 A2. Wafer technology is employed, including the generation of holes and trenches in dielectric material, such as silicon dioxide, and filling of the holes and trenches with conductive layers. However, this method of producing contact connections is very expensive.
- A similar technology is taught in DE 103 01 291 B3. Recesses are etched into substrates and filled with metal conductive paths, and contacts extending through holes are also provided. This technique is complex and expensive.
- U.S. 2002/0180015 A1 discloses a multi-chip module which includes semiconductor devices and a wiring substrate for mounting the semiconductor devices. The wiring substrate comprises a glass substrate having holes which were formed by a sand blasting treatment. A wiring layer is formed on the surface of the glass substrate. Furthermore, the glass substrate has wirings and an insulation layer. It is aimed at selecting the coefficient of thermal expansion of the glass substrate close to the coefficient of silicon.
- U.S. Pat. No. 5,216,207 discloses ceramic multilayer circuit boards including silver conductors. The layers are fired at low temperatures. The circuit boards have a coefficient of thermal expansion close to that of silicon.
- U.S. 2009/0321114 A1 discloses an electrical testing substrate unit including a multilayer ceramic substrate. Although the materials used have a coefficient of thermal expansion close to the value of the invention, they are not pure glasses.
- U.S. Pat. No. 7,550,321 B1 discloses a substrate having a coefficient of thermal expansion with a gradient in the thickness direction.
- The paper “Femtosecond laser-assisted three-dimensional microfabrication in silica” in Optics Letters, Vol. 26, No. 5, Mar. 1, 2001, pages 277-279 describes direct three-dimensional microfabrication in a silicate glass. The fabrication process is accomplished in two steps. First, the intended patterns are mapped out in the glass using focused femtosecond laser pulses. Then these patterns are etched.
- An object of the invention is to provide an interposer for electrical connection between a CPU chip and a circuit board, which is economical to produce and enables to produce microholes with a hole diameter in the order of 20 μm and 200 μm, and wherein the interposer body exhibits a thermal expansion similar to that of the CPU chip material.
- The novel interposer should be able to meet the following requirements: Multiple small holes (10 to 10,000) are to be accommodated in each interposer, with close tolerances of the holes to each other. It has to be possible to ensure a hole spacing down to 30 μm. Hole diameters down to a size of 20 μm should be possible. A ratio of the thickness of the interposer to the hole diameter, the so-called aspect ratio, from 1 to 10 should be possible. A center-to-center distance of the holes in a range from 120 μm and 400 μm should be possible. The hole should have a conical or crater-shaped inlet and outlet to the hole, but the inner walls of the hole in the center should be of cylindrical shape. The hole should have smooth walls (fire-polished). Optionally, a bead may be produced around the edge of the hole, having a height of not more than 5 mm.
- The interposer according to the invention is characterized in that its board-shaped base substrate is made of glass having a coefficient of thermal expansion ranging from 3.1×10−6/K to 3.4×10−6/K. Silicon-based chip boards exhibit an expansion coefficient between 3.2×10−6/K and 3.3×10−6/K. Therefore, large mechanical stresses between the interposer and the CPU chip due to different thermal expansion behavior are not to be expected.
- The number of holes in the interposer is selected according to the particular requirements and may amount up to 10,000 holes per cm2. A usual number of holes ranges from 1000 to 3000. The center-to-center spacing of the holes ranges from 50 μm to 700 μm. To meet the requirements of miniaturization of components, holes are provided which have a diameter ranging from 20 μm to 200 μm. To establish an electrical connection between the CPU chip and its circuit board, conductive paths extend on one of the surfaces of the interposer board to and into the holes and therethrough to form connection points for the CPU chip.
- The glass of the base substrate should have an alkali content of less than 700 ppm. Such a glass has a low coefficient of thermal expansion, as required, and exhibits very good signal-insulating properties, due to the high dielectric value. Furthermore, the risk of contamination of silicon processors with alkalis is largely avoided.
- For reasons of environmental protection, an arsenic or antimony content of the glass composition is less than 50 ppm.
- Interposer boards have a thickness of less than 1 mm, but not below 30 μm. The number of holes of an interposer is chosen according to the needs, and is in the order from 1000 to 3000 holes per cm2. The invention targets to offer interposers on the market having microholes smaller than 100 μm. Hence, the holes are closely packed, with a center-to-center distance of the holes that may range from 150 μm to 400 μm. However, the edge-to-edge distance of the holes should not be less than 30 μm. The holes need not all have the same diameter, it is possible that holes of different diameters are provided in the board-shaped base substrate. The ratio of the thickness of the glass board to the hole diameter, the so-called aspect ratio, may be selected in a wide range from 0.1 to 25, an aspect ratio from 1 to 10 being preferred. The holes generally have a thin cylindrical shape, but may have rounded-broken edges at the inlet and outlet of the hole.
- In order to accurately position the holes, which may have a diameter ranging from 20 μm to 200 μm, focused laser pulses are used in a wavelength range of transparency of the glass, so that the laser beams penetrate into the glass and are not already absorbed in the surface layers of the glass. The laser radiation used has a very high radiation intensity, so as to result in local non-thermal destruction of the glass along filamentary channels. These filamentary channels are subsequently widened to the desired diameter of the holes, for which purpose dielectric breakdowns may be employed which cause electro-thermal heating and evaporation of the material of the hole edges, and/or the filamentary channels are widened by supplying reactive gases.
- It is also possible to precisely mark the intended perforation points using RF coupling material which is printed onto the base substrate in form of dots. Such marked points are heated by RF energy to lower the breakdown strength to electrical high voltage in the region of the intended holes, and to finally cause dielectric breakdowns at these points. The perforations may be widened by supplied etching gas.
- The manufacturing of the conductive paths on the board-shaped glass substrate and through the holes is accomplished by known method patterns and need not be further described here.
- Exemplary embodiments of the invention will be described with reference to the drawings, wherein:
-
FIG. 1 schematically illustrates, in a longitudinal sectional view, one way of producing an interposer, -
FIG. 2 illustrates a second way of producing an interposer, and -
FIG. 3 an interposer, schematically. - In a first method step, perforation points 10 on a board-shaped
glass substrate 1 are marked by focused laser pulses 41 emanating from anarray 4 oflasers 40. The radiation intensity of these lasers is so strong that it causes local non-thermal destruction in the glass along afilamentary channel 11. - In a second method step,
filamentary channels 11 are widened intoholes 12. For this purpose, opposingelectrodes 6 and 7 may be employed, to which high voltage energy is applied, resulting in dielectric breakdowns across the glass substrate alongfilamentary channels 11. These breakthroughs are widened by electro-thermal heating and evaporation of the perforation material until the process is stopped by switching off the power supply when the desired hole diameter is achieved. - Alternatively or additionally, the
filamentary channels 11 may be widened using reactive gases, as illustrated bynozzles - In the next method step,
conductive paths 13 to the perforation points 10 are applied on the upper surface ofglass board 1, and theholes 12 are filled withconductive material 14 to complete the connections to the contact points of a CPU chip or the like at the bottom surface of the board. (For mounting on the motherboard,glass board 1 is turned around.) -
FIG. 2 shows another way of producing microholes. Perforation points 10 are marked by precisely imprinted RF coupling material. At thesepoints 10 high frequency energy is applied by means ofelectrodes narrow channels 11. By continuing the supply of high-voltage energy, thesenarrow channels 11 may be widened to the size ofholes 12. - However, it is also possible, for widening the
narrow channels 11 resulting from dielectric breakdowns, to use reactive gas which is supplied throughnozzles - Finally,
conductive paths 13 to theholes 12 are applied on the upper surface of the glass substrate, and the holes are filled withconductive material 14 in order to establish the connections for the CPU chip, with theglass board 1 turned around. - It should be noted that interposers need not to be produced separately, rather glass substrate boards for a plurality of interposers may be processed, and the large-sized glass substrate boards may be cut to obtain the individual interposers. Glass substrate boards of a size with edge lengths of 0.2 m by 3 m (or less) can be processed. Round board formats may have dimensions of up to 1 m.
- Glasses were melted at 1620° C. in Pt/Ir crucibles from conventional, essentially alkali-free raw materials, apart from unavoidable impurities. The melt was refined for one and a half hour at this temperature, then poured into inductively heated platinum crucibles and stirred for 30 minutes at 1550° C. for homogenization.
- The table shows fifteen examples of suitable glasses and their compositions (in wt. % based on oxide) and their main features. The refining agents SnO2 (Examples 1-8, 11, 12, 14, 15) and AsZO3(Examples 9, 10, 13) with a proportion of 0.3 wt. % is not listed. The following properties are specified:
- the coefficient of thermal expansion α20/300 (10−6/K)
-
- the dilatometric glass transition temperature Tg (° C.) according to DIN 52324
- the temperature at a viscosity of 104 dPa·s (referred to as T4 [° C.])
- the temperature at a viscosity of 102 dPa·s (referred to as T2 [° C.]), calculated from the Vogel-Fulcher-Tammann equation
- an “HCl” acid resistance as weight loss (material removal value) of glass boards measuring 50 mm×50 mm×2 mm and polished on all sides after treatment with 5% hydrochloric acid for 24 hours at 95° C. (mg/cm2).
- a “BHF” resistance to buffered hydrofluoric acid as a weight loss (material removal value) of glass boards measuring 50 mm×50 mm×2 mm and polished on all sides after treatment with 10% NH4F NH4F.HF for 20 min at 23° C. (mg/cm2)
- the refractive index nd.
- Compositions (in wt. % based on oxide), and essential properties of glasses according to the invention
-
1 2 3 4 5 6 SiO2 60.0 60.0 59.9 58.9 59.9 61.0 B2O3 7.5 7.5 7.5 8.5 7.5 9.5 Al2O3 21.5 21.5 21.5 21.5 21.5 18.4 MgO 2.9 2.9 2.0 2.0 2.9 2.2 CaO 3.8 2.8 3.8 3.8 4.8 4.1 BaO 4.0 5.0 5.0 5.0 3.1 4.5 ZnO — — — — — — α20/300 (10−6/K) 3.07 3.00 3.01 3.08 3.13 3.11 (g/cm3) 2.48 2.48 2.48 2.48 2.47 2.45 Tg (° C.) 747 748 752 741 743 729 T 4 (° C.) 1312 1318 1315 1308 1292 1313 T 2 (° C.) 1672 1678 1691 1668 1662 1700 nd 1.520 1.518 1.519 1.519 1.521 1.515 HCl (mg/cm2) 1.05 n.m. 0.85 n.m. 1.1 n.m. BHF (mg/cm2) 0.57 0.58 0.55 0.55 0.56 0.49 7 8 9 10 11 12 SiO2 58.5 62.8 63.5 63.5 59.7 59.0 B2O3 7.7 8.2 10.0 10.0 10.0 9.0 Al2O3 22.7 16.5 15.4 15.4 18.5 17.2 MgO 2.8 0.5 2.0 1.0 2.0 CaO 2.0 4.2 5.6 6.6 8.3 9.0 BaO 5.0 7.5 3.2 3.2 3.2 3.5 ZnO 1.0 — — — — — α20/300 (10−6/K) 2.89 3.19 3.24 3.34 3.44 3.76 (g/cm3) 2.50 2.49 2.42 2.43 2.46 2.50 Tg (° C.) 748 725 711 719 714 711 T 4 (° C.) 1314 1325 1320 1327 1281 1257 T 2 (° C.) 1674 1699 n.m. n.m. 1650 1615 nd 1.520 1.513 1.511 1.512 1.520 1.526 HCl (mg/cm2) n.m. 0.30 0.89 n.m. n.m. 0.72 BHF (mg/cm2) 0.62 0.45 0.43 0.40 0.44 0.49 13 14 15 SiO2 61.4 59.5 63.9 B2O3 8.2 10.0 10.4 Al2O3 16.0 16.7 14.6 MgO 2.8 0.7 2.9 CaO 7.9 8.5 4.8 BaO 3.4 3.8 3.1 ZnO — 0.5 — α20/300 (10−6/K) 3.75 3.60 3.21 (g/cm3) 2.48 2.48 2.41 Tg (° C.) 709 702 701 T 4 (° C.) 1273 1260 1311 T 2 (° C.) 1629 1629 n.m. nd 1.523 1.522 n.m. HCl (mg/cm2) 0.41 0.97 n.m. BHF (mg/cm2) 0.74 0.47 n.m. n.m. = not measured - As the exemplary embodiments illustrate, the glasses have the following advantageous properties:
- a thermal expansion α20/300 of between 2.8×10−6/K and 3.8×10−6/K, in preferred embodiments ≤3.6×10−6/K, in particularly preferred embodiments <3.2×10−6/K, and thus matched to the expansion behavior of both amorphous silicon and also increasingly polycrystalline silicon.
- with Tg>700° C., a high glass transition temperature, i.e. a high temperature resistance. This is essential for a lowest possible production-related shrinkage (“compaction”) and for use of the glasses as substrates for coatings of amorphous Si layers and subsequent annealing thereof.
-
- a temperature at a viscosity of 104 dPa·s (working point VA) of not more than 1350° C., and a temperature at a viscosity of 102 dPa·s of not more than 1720° C., which is a suitable viscosity characteristic in terms of hot-shaping and meltability.
- with nd≤1.526 a low refractive index.
- a high chemical resistance, as is evident inter alia from good resistance to buffered hydrofluoric acid solution.
- The glasses exhibit high thermal shock resistance and good devitrification stability. The glasses can be produced as flat glasses by various drawing methods, e.g. microsheet down-draw, up-draw, or overflow fusion methods, and, in a preferred embodiment, if they are free of As2O3 and Sb2O3, also by the float process.
- With these properties, the glasses are highly suitable for use as substrate glass for producing interposers.
- By using the base substrate of low-alkali glass and with a coefficient of thermal expansion very close to that of the chip of silicon material, difficulties resulting from different thermal expansions of the interposer and the CPU chip are largely avoided. If adjacent joint material layers or boards have an only slightly different heating behavior and a slightly different coefficient of thermal expansion, there will be fewer mechanical stresses between these joint layers or boards, and there will be no warpage or cracking between the layers or boards.
- Interposers which are occupied more densely with holes as compared to previous interposers, take smaller substrate sizes, thereby still further reducing the amount of different expansions and contractions of the involved layers or boards and thus the risk of warpage and hence cracking between the involved layers or boards.
- Finally, cost savings can also be expected because (with reduced interposer size and hole size) less glass material and less conductive material for filling the holes has to be used.
- In addition to the preceding description, a sectional view of an interposer is shown schematically in
FIG. 3 . - The interposer is mounted on a
circuit board 17 and carries aCPU chip 16. Contact points 15 of theCPU chip 16 schematically are shown in a firstlead distribution layer 150, and theconductive paths 13 are indicated in a secondlead distribution layer 130. The board-shapedbase substrate 1 forms a glass plate. Etching can be accomplished by reactive gases or by wet etching. - Referring to
FIGS. 1 and 2 , in the preferred method of producing holes in such interposer, the board-shapedbase substrate 1 made of a single layer of glass is exposed to focused laser pulses at predetermined perforation points 10 with a radiation intensity that causes each a local non-thermal destruction of the glass along afilamentary channel 11, and thefilamentary channels 11 are widened by etching to the desired diameter of theholes 12 which get a generally cylindrical shape with inner cylindrical walls having typical roughness as from etching. The edges between the inner cylindrical walls of the holes and the outer substrate surfaces are rounded and form transition zones that make it easier to fill into the holes conductive material that bonds with the hole roughnesses. - It has been found that the
base substrate 1 made of a single layer of glass can have a thickness in the range between 10 μm and 3 mm. Theholes 12 in the substrate can have diameters that range from 1 μm to 1 mm. The holes can have a small distance form on another, or adjacent holes can even merge so that bigger holes are cut out using holes arranged along a circle, or webs are formed with remaining base substrate material so as to form a web structure. - It is well known that glass is very robust and rigid as a material, therefore, even very thin glass plates can be used in interposers, compared to plastics. Thicknesses of 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm and 100 μm are envisaged as substrates for interposers of reduced size. But also substrates in interposers for heavy duty applications can be made in thicknesses of 0.7 mm, 1.0 mm, 2.0 mm, 2.8 mm and 3.0 mm. For medium duty applications, substrates of 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm and 0.6 mm can be used.
- Further examples No. 16 to 25 for glass compositions in wt % useful as a substrate for producing interposers are mentioned subsequently.
-
16 17 18 19 20 21 22 23 24 25 SiO2 61 64.0 69 ± 5 80 ± 5 60.5-61.5 78.575 71.660 80.437 73.884 78.909 B2O3 10 8.3 13 ± 5 0.200 0.750 Al2O3 18 4.0 2.5 ± 2 16.8-17 4.243 6.000 4.828 7.161 4.301 MgO 2.8 3.9-4.04 CaO 4.3 7 ± 2 BaO 3.3 2 ± 2 Na2O 6.5 8 ± 2 3.5 ± 2 12.1-12.3 1.711 2.000 2.725 1.700 K2O 7.0 8 ± 2 1 ± 1 4.0-4.1 3.963 6.000 3.576 4.137 4.201 ZnO 5.5 4 ± 2 1.001 2.000 0.491 0.960 TiO2 4.0 1 ± 1 Sb2O3 0.6 0.550 0.400 0.230 0.398 0.400 ZrO2 1-1.56 SnO2 0.07-0.3 CeO2 0.3-0.09 0.040 0.040 0.010 0.030 0.018 Fe2O3 0.01-0.012 F 0.07-0.15 SO3 0.017-0.013 Cl 0.1 0.011-0.006 Li2O 9.557 11.000 10.418 11.546 9.401 Ag2O 0.160 0.150 0.010 0.119 0.110 - As a basic material for the glass plate that can be used as a substrate for producing interposers, also photosensitive glasses can be used. In such a case, preparatory steps are preferably applied before the substrate is exposed to focused laser pulses so as to produce the
filamentary channels 11. The preparatory steps consists in exposing to ultra violet radiation the glass about the predetermined perforation points 10 with the desired diameters of theholes 12, and in tempering the glass. Thereafter, strong focused laser pulses are directed at the predetermined perforation points 10 which make the substrate brittle along thefilamentary channels 11. Thus, the filamentary channels offer a path wherein etching means can enter quickly and deeply. This favors forming of well defined inner cylindrical walls of theholes 12. Wet etching can be used also from both sides of the substrate to widen thefilamentary channels 11 to the desired diameters of theholes 12, where double conus shape of the holes is avoided. A preferred etching solution includes KOH highly concentrated, and HF. Concentration: 6 mol/L KOH; HF 3-10. wt % Etching parameter: KOH at 100° C. for 4 hours; HF at room temperature for 2 hours. - After widening of the
holes 12 in the glass plate, the glass plate as such can be used as a component in an interposer, or the glass plate is ceramized to get a glass-ceramic plate useful in making an interposer
Claims (23)
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DE102010025966A DE102010025966B4 (en) | 2010-07-02 | 2010-07-02 | Interposer and method for making holes in an interposer |
PCT/EP2011/003300 WO2012000685A2 (en) | 2010-07-02 | 2011-07-04 | Interposer and method for producing holes in an interposer |
US201313807386A | 2013-04-08 | 2013-04-08 | |
US16/256,093 US20190157218A1 (en) | 2010-07-02 | 2019-01-24 | Interposer and method for producing holes in an interposer |
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US13/807,386 Continuation-In-Part US20130210245A1 (en) | 2010-07-02 | 2011-07-04 | Interposer and method for producing holes in an interposer |
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Cited By (2)
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US20210340050A1 (en) * | 2017-01-27 | 2021-11-04 | Schott Ag | Structured plate-like glass element and process for the production thereof |
US11975998B2 (en) * | 2017-05-19 | 2024-05-07 | Schott Ag | Components made of glass or glass ceramic having predamage along predetermined dividing lines |
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US6399892B1 (en) * | 2000-09-19 | 2002-06-04 | International Business Machines Corporation | CTE compensated chip interposer |
US20020180015A1 (en) * | 2001-05-31 | 2002-12-05 | Yoshihide Yamaguchi | Semiconductor module |
US6952049B1 (en) * | 1999-03-30 | 2005-10-04 | Ngk Spark Plug Co., Ltd. | Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitor |
US20060202322A1 (en) * | 2003-09-24 | 2006-09-14 | Ibiden Co., Ltd. | Interposer, and multilayer printed wiring board |
US7545044B2 (en) * | 2003-02-24 | 2009-06-09 | Hamamatsu Photonics K.K. | Semiconductor device and radiation detector employing it |
US8674513B2 (en) * | 2010-05-13 | 2014-03-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structures for substrate |
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2019
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US6952049B1 (en) * | 1999-03-30 | 2005-10-04 | Ngk Spark Plug Co., Ltd. | Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitor |
US6399892B1 (en) * | 2000-09-19 | 2002-06-04 | International Business Machines Corporation | CTE compensated chip interposer |
US20020180015A1 (en) * | 2001-05-31 | 2002-12-05 | Yoshihide Yamaguchi | Semiconductor module |
US7545044B2 (en) * | 2003-02-24 | 2009-06-09 | Hamamatsu Photonics K.K. | Semiconductor device and radiation detector employing it |
US20060202322A1 (en) * | 2003-09-24 | 2006-09-14 | Ibiden Co., Ltd. | Interposer, and multilayer printed wiring board |
US8674513B2 (en) * | 2010-05-13 | 2014-03-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structures for substrate |
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US20210340050A1 (en) * | 2017-01-27 | 2021-11-04 | Schott Ag | Structured plate-like glass element and process for the production thereof |
US11975998B2 (en) * | 2017-05-19 | 2024-05-07 | Schott Ag | Components made of glass or glass ceramic having predamage along predetermined dividing lines |
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