US20190074826A1 - Over voltage protection for cascode switching power device - Google Patents
Over voltage protection for cascode switching power device Download PDFInfo
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- US20190074826A1 US20190074826A1 US15/697,381 US201715697381A US2019074826A1 US 20190074826 A1 US20190074826 A1 US 20190074826A1 US 201715697381 A US201715697381 A US 201715697381A US 2019074826 A1 US2019074826 A1 US 2019074826A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
- H03K17/0822—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/12—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to underload or no-load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/20—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage
- H02H3/202—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess voltage for dc systems
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/1203—Circuits independent of the type of conversion
- H02H7/1206—Circuits independent of the type of conversion specially adapted to conversion cells composed of a plurality of parallel or serial connected elements
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/043—Protection of over-voltage protection device by short-circuiting
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/3353—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having at least two simultaneously operating switches on the input side, e.g. "double forward" or "double (switched) flyback" converter
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
- H03K17/0814—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit
- H03K17/08142—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the output circuit in field-effect transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Definitions
- This disclosure relates in general to semiconductor devices and, in particular, to over voltage protection for power semiconductor devices.
- Integrated circuits such as microprocessors and memory devices, include many metal-oxide-semiconductor field-effect transistors (MOSFETs), which provide the basic switching functions to implement logic gates, data storage, power switching, and the like.
- MOSFETs metal-oxide-semiconductor field-effect transistors
- Power MOSFETs have typically been developed for applications requiring power switching and power amplification.
- flyback converters which generate a DC output from either an AC or DC input
- FIG. 1 depicts a conventional flyback converter.
- the MOSFET switch S turns on, energy from the input source V in is applied and a current flows through the primary windings energizing a transformer T. The current in primary side of the transformer T ramps up proportional to the input voltage V in .
- the output diode D is reverse-biased and off. The voltage applied to the diode D is equal to the output voltage V out plus the reflected input voltage (i.e., V in *(N 2 /N 1 )).
- the output capacitor C supplies the load current I o during the on-time of the MOSFET switch S.
- the MOSFET switch S When enough energy is stored in the primary side of transformer T, the MOSFET switch S is turned off and the energy in the transformer T transfers to the secondary side and current flows through the diode D. The diode D is now forward-biased, replenishing the energy in the output capacitor C and supplying the load. The current in the secondary side of transformer T ramps down proportionally to output voltage V out . During this time, the primary side is considered an open circuit. The voltage applied to the MOSFET switch S is equal to the input voltage V in plus the reflected output voltage (i.e., V out *(N 1 /N 2 )).
- Flyback converters may be operated in different modes.
- a fly-back converter is designed with a fixed switching frequency and modulates the peak current to supply the load demands.
- a fly-back converter can be operated in quasi-resonant mode (QR), where the switching occurs on the very first and deepest resonant valley. QR delivers the maximum amount of power by adjusting both the peak current and the switching frequency to turn the MOSFET switch on at the first resonant valley where VDS is at or near zero for minimal turn-on losses.
- QR quasi-resonant mode
- flyback converters in the QR mode are reduced when used at high input voltage (e.g., over 300 V AC). This is due to the fact that higher reflected voltages require using a MOSFET with a correspondingly higher breakdown voltage rating.
- the use of a MOSFET with higher breakdown voltage increases the cost and inherently increases the drain-source on resistance (R ds-on ) and the switching capacitance of the MOSFET.
- Lower breakdown MOSFETS can be used however at low load and high line voltages but the zero voltage switching capability is compromised and not achieved over the full load range.
- One of the proposed methods uses a cascode switch to maximize reflected voltage and utilize a MOSFET voltage level which affords the QR operation.
- Cascode switches typically have two or more power transistors (e.g., MOSFETs) connected in series.
- the load voltage is distributed across all of the series connected power transistors.
- the use of the cascode switch increases the overall breakdown voltage without adding cost or appreciably compromising MOSFET performance.
- Overvoltages have been a challenging issue for power devices (e.g., switches in fly-back converters). Overvoltages including voltage spikes from parasitic capacitances and transformer inductances, surges and fast transients, often occur during a flyback converter's normal operation and start up. Overvoltages may cause problematic field failure results of the power transistors. It is thus desirable to identify fault conditions (e.g., fault current and fault voltage) during operation of power devices and to activate suitable remedial action.
- fault conditions e.g., fault current and fault voltage
- FIG. 1 is a circuit diagram illustrating a conventional flyback converter.
- FIG. 2 is a block diagram illustrating a power converter according to aspects of the present disclosure.
- FIG. 3 depicts the signal waveform of the drain-to-source voltage of the cascode switch of FIG. 2 corresponding to its drain current.
- FIG. 4 is a circuit diagram illustrating a controller employed in a power switch according to aspects of the present disclosure.
- FIG. 5 is a timing diagram illustrating signal waveforms associated with the operation of a controller of FIG. 4 .
- FIG. 6 is a circuit diagram illustrating a controller employed in a power switch according to aspects of the present disclosure.
- FIG. 7 is a timing diagram illustrating signal waveforms associated with the operation of a controller of FIG. 6 .
- aspects of the present disclosure describe a power converter using a cascode switch with an integrated overvoltage protection.
- One aspect of the present disclosure describes an overvoltage protection for the cascode switch by soft clamping the gate voltage of the low-side switch to control the breakdown leakage current of the high-side switch and soft turning off the low-side switch to prevent oscillation.
- One aspect of the present disclosure describes an overvoltage protection for the cascode switch by soft clamping the gate voltages of the low-side and high-side switches to control the on current and soft turning off the low-side and high-side switch to prevent oscillation.
- FIG. 2 is block diagram of circuit illustrating a power converter according to aspects of the present disclosure.
- the power converter 200 includes a cascode switch 210 coupled to a load 220 and a controller 230 coupled to the switch 210 .
- the cascode switch 210 includes a first power transistor 212 coupled to the load 220 and a second power transistor 214 coupled in series between the first power transistor 212 and ground.
- the power transistors 212 and 214 are switched on and off in order to switch the load current as demanded.
- the first transistor 212 is referred to herein as high-side transistor or switch and the second transistor 214 is referred to as low-side transistor or switch.
- the power transistors 212 and 214 may be power MOFETs.
- the power transistors 212 and 214 may be insulated gate bipolar transistors (IGBTs).
- cascode switches of the types described herein may be used in other application where higher voltages need to be supported, such as half-bridge configurations and forward converter topologies.
- the cascode switch 210 is coupled to a load 220 .
- the load 220 may be a transformer having a primary coil and a secondary coil electromagnetically coupled through a magnetically permeable core similar to the transformer T of FIG. 1 .
- the primary coil of the transformer (not shown) is connected to an input source and the secondary coil is connected to a load via an output diode.
- the drain of the high-side switch 212 is coupled to the primary coil of the transformer.
- the controller 230 in the power converter 200 is configured to provide normal control of the switching operation as demanded (e.g., flyback operation) and also to provide control of the gate voltages and turning on and off of the low-side and high-side switches 212 and 214 in the event of an overvoltage.
- the controller 230 includes a gate driving circuit 232 , an overvoltage protection circuit 234 and an overvoltage detection circuit 236 .
- the controller 230 is a QR controller.
- the gate driving circuit 232 in the controller 230 is configured to support normal flyback operation.
- the overvoltage detection circuit 236 is configured to detect fault occurrences or overvoltages, e.g., at the drain of the high-side switch 212 and activate overvoltage protection functions implemented by the overvoltage protection circuit 234 .
- the overvoltage protection design according to the present disclosure makes the energy induced in primary side inductor current to be consumed in the cascode switch 210 and the drain-to-source capacitor voltage of the switch 210 clamped in a level so that it does not increase over the damage level of the cascode switch 210 .
- the drain-to-source capacitor voltage is effectively the same as the drain-to-source voltage.
- the level is defined as set and reset voltages by the hysteresis band in the overvoltage detection circuit 236 .
- FIG. 3 depicts the signal waveform of the drain-to-source voltage of the cascode switch 210 corresponding to its drain current.
- the drain-to-source voltage of the cascode switch 210 reaches the set voltage.
- the drain current of the switch 210 begins to increase slowly by gate control. As a result, the flow direction of the primary side inductor current changes to the switch 210 and its drain-to-source voltage is clamped to a certain level.
- the drain current of the switch 210 equals to primary side inductor current.
- the drain-to-source capacitor (C DS ) of the switch starts to discharge and thus its drain-to-source voltage begins to fall.
- the falling slope is determined in accordance with the values of the drain current and the drain-to-source capacitance.
- the drain-to-source voltage of the switch 210 reaches the reset level.
- the drain current is decreasing by a soft gate control to obtain a safe shutdown of the switch 210 .
- the drain-to-source voltage of the switch 210 falls below the reset value.
- the switch 210 is turned off and the overvoltage protection is over. The remaining energy stored in the primary side of the transformer transfers to the secondary side and flows to the output diode supplying the load.
- the detailed description of the controller 230 and its gate voltage control is discussed below in connection with FIGS. 4-7 .
- FIG. 4 is a circuit diagram illustrating a controller employed in a power switch according to one aspect of the present disclosure.
- FIG. 5 is a timing diagram showing signal waveforms associated with the operation of a controller of FIG. 4 .
- the controller 400 includes an overvoltage protection for the cascode switch by clamping the gate voltage of the low-side switch 404 to control the breakdown leakage current of the high-side switch 402 and then turning off the low-side switch 404 .
- the controller 400 is coupled to the gate of the high-side switch 402 and the gate of the low-side switch 404 .
- the low-side switch 404 may be a power MOSFET with a relatively low rating and the high-side switch 402 may be a power MOSFET with a higher rating than the low-side switch 404 .
- the high-side switch 402 may be based on superjunction transistors capable of supporting up to 600 Volts.
- the controller 400 has a LS gate driver B 1 for driving the gate of the low-side switch 404 and a HS gate driver B 3 for driving the gate of the high-side switch 402 .
- the controller 400 also has a overvoltage protection circuit B 2 coupled between the LS gate driver B 1 and the gate of the low-side switch 404 .
- the controller 400 includes an overvoltage detection circuit B 5 for detecting fault occurrences at the drain of high-side switch 402 .
- the LS gate driver B 1 includes at least switches M 1 and M 2
- the HS gate driver B 3 includes switches M 6 and M 7 .
- switches M 1 , M 2 , M 6 and M 7 are MOSFET transistors.
- switches M 1 and M 2 of the LS gate driver B 1 and switches M 6 and M 7 of HS gate driver B 3 are turned on and off according to the main input signal V IN .
- combination of switch M 1 and a first impedance Z 1 in the LS gate driver B 1 is configured to make the desired turn-on switching performance of the low-side switch 404 .
- combination of switch M 2 and a second impedance Z 2 is configured to make an optimal turn-off of the low-side switch 404 .
- combination of switch M 6 and a third impedance Z 7 in the HS gate driver B 3 is configured to make the desired turn-on switching performance of the high-side switch 402 and combination of switch M 7 and a fourth impedance Z 8 is configured to make an optimal turn-off of the high-side switch 402 .
- the impedances Z 1 , Z 2 , Z 7 and Z 8 may be provided by resistors or combinations of resistors and capacitors.
- An overvoltage detection circuit B 5 of the controller 400 includes at least a detector element.
- the detector element is a hysteresis overvoltage detection device HOVD, which is a high gain comparator characterized by hysteresis band and fast response time.
- the detector HOVD may use band gap reference voltage (i.e., the set and reset voltages) to precisely control the voltage at the drain of the high-side switch 402 to stay in a safe level during fault conditions due to the voltage surge.
- the overvoltage detection circuit B 5 also includes a switch M 5 with a time control setting T 1 .
- Combination of the time control setting T 1 and switch M 5 is configured to provide a digital filter for entire PWM turn-on period and a transition from PWM on to off for avoiding malfunction of overvoltage protection due to noise coupling.
- a fifth impedance Z 6 in the overvoltage detection circuit B 5 between the detector HOVD and the drain of the high-side switch 402 provides ESD protection for switch M 5 and analog filter for detector HOVD.
- the fifth impedance Z 6 may be provided by resistor or a combination of a resistor and capacitor.
- the detector HOVD detects an overvoltage and sends a signal to deactivate switch M 2 (e.g., by NOR gate N 1 ) and activate the overvoltage protection circuit B 2 .
- switch M 1 is off because the main input signal V IN is low.
- the overvoltage protection circuit B 2 includes at least switches M 3 and M 4 .
- switches M 3 and M 4 are MOSFETs. Switches M 3 and M 4 are turned off during normal flyback operation. When the overvoltage protection circuit B 2 is activated by the overcharge detector B 5 , switches M 3 and M 4 are turned on simultaneously. Combination of switches M 3 and M 4 and impedances Z 3 and Z 4 allows a soft rise of the gate voltage of the low-side switch 404 beyond its threshold voltage.
- the maximum gate voltage of the low-side switch 404 is maintained or clamped by the overvoltage protection circuit B 2 (i.e., the switches M 3 and M 4 and the impedances Z 3 and Z 4 ) at a voltage level proportional to the resistance ratio of impedances Z 3 and Z 4 (i.e., Z 4 /(Z 3 +Z 4 )*V CC ).
- impedances Z 3 and Z 4 may be resistors or combinations of resistors and capacitors.
- the overvoltage protection circuit B 2 allows a soft clamping of the gate voltage of the low-side switch 404 (by using switches M 3 and M 4 and impedances impedances Z 3 and Z 4 ) so as to control the breakdown leakage current of the high-side switch 402 .
- switch M 3 is deactivated when the detector HOVD of the overvoltage detection circuit B 5 detects the drain voltage of the high-side switch 402 becomes lower than a reset level of the fault voltage (or when the time control setting T 3 expires whichever comes first).
- switch M 4 maintains turned on for a fixed amount of time to provide a soft turn-off of the low-side switch 404 .
- the low side switch 404 turns off when time control T 2 expires and the high side switch 402 is always off during over voltage event.
- the controller according to the present disclosure may control the sharing of the blocking voltage by adjusting the time control setting T 2 .
- switch M 4 turns off and switch M 2 turns back on to provide the strong pull low for the gate of the low-side switch 404 .
- M 3 will be turn on and turn off by ROV (not by one shot) because the time it takes for ROV goes above and below the OV set and OV reset threshold is shorter than one shot time.
- M 4 keeps on for additional time for M 3 rising edge.
- M 3 will turn on when OV_OUT goes low during over voltage events and is turned off either when OV_OUT goes high or by the oneshot whichever comes first during over voltage events. The overvoltage protection period is thus over and the overvoltage protection circuit B 2 is deactivated. At this time, the normal flyback operation resumes.
- the gate voltage of the low-side switch 404 can be clamped and precisely controlled without any overshoot phenomena that may occur in the conventional zener-diode clamping method.
- the controller according to the present disclosure does not need an additional voltage supply for the reference voltage because the voltage clamping for the low-side switch 404 is set by the ratio of Z 3 and Z 4 .
- the controller can also provide the gate voltage control capability irrespective of temperature variation due to the same temperature dependency of impedances Z 3 and Z 4 .
- the desired soft turn-off of the low-side switch 404 for the safe shutdown is obtained by combination of switch M 4 and impedance Z 4 . Therefore the overvoltage protection circuit can be simply integrated with the existing gate drive circuit.
- FIG. 6 is a circuit diagram illustrating a controller employed in a power switch according to one aspect of the present disclosure.
- FIG. 7 is a timing diagram showing signal waveforms associated with the operation of a controller of FIG. 6 .
- the controller 600 includes an overvoltage protection for the cascode switch by soft clamping the gate voltages of the low-side and high-side switches 604 and 602 to control the on current and soft turning off the low-side and high-side switch 604 and 602 to prevent oscillation.
- the controller 600 is coupled to the gate of the high-side switch 602 and the gate of the low-side switch 604 .
- the high-side switch 602 and the low-side switch 604 may be a power MOSFET with a lower breakdown voltage rating compared to conventional design without over voltage protection.
- the high-side switch 602 and low-side switch 604 may be characterized by the same breakdown voltage, e.g., 600 V.
- the controller 600 has a LS gate driver B 1 for driving the gate of the low-side switch 604 and a HS gate driver B 3 for driving the gate of the high-side switch 602 .
- the controller 600 also has a LS overvoltage protection circuit B 2 coupled between the LS gate driver B 1 and the gate of the low-side switch 604 and a HS overvoltage protection circuit B 4 coupled between the HS gate driver B 3 and the gate of the high-side switch 602 .
- the controller 600 includes an overvoltage detection circuit B 5 for detecting fault occurrences at the drain of high-side switch 602 .
- the LS gate driver B 1 includes at least switches M 1 and M 2
- the HS gate driver B 3 includes switches M 6 and M 7 .
- switches M 1 , M 2 , M 6 and M 7 are MOSFET transistors.
- switches M 1 and M 2 of the LS gate driver B 1 and switches M 6 and M 7 of HS gate driver B 3 are turned on and off according to the main input signal V IN .
- combination of switch M 1 and impedance Z 1 in the LS gate driver B 1 is configured to make the desired turn-on switching performance of the low-side switch 604 .
- combination of switch M 2 and impedance Z 2 is configured to make an optimal turn-off of the low-side switch 604 .
- combination of switch M 6 and impedance Z 7 in the HS gate driver B 3 is configured to make the desired turn-on switching performance of the high-side switch 602 and combination of switch M 7 and impedance Z 8 is configured to make an optimal turn-off of the high-side switch 602 .
- impedances Z 1 , Z 2 , Z 7 and Z 8 are resistors or combinations of resistors and capacitors.
- An overvoltage detection circuit B 5 of the controller 600 includes at least a detector.
- the detector is a hysteresis overvoltage detection device HOVD, which is a high gain comparator with hysteresis band and fast response time.
- the detector HOVD may use band gap reference voltage (i.e., the set and reset voltages) to precisely control the voltage at the drain of the high-side switch 602 to stay in a safe level during fault conditions due to the voltage surge.
- the overvoltage detection circuit B 5 also includes a switch M 5 with a time control setting T 1 .
- Combination of the time control setting T 1 and switch M 5 is configured to provide a digital filter for entire PWM turn-on period and a transition from PWM on to off for avoiding malfunction of overvoltage protection due to noise coupling.
- impedance Z 6 in the overvoltage detection circuit B 5 between the detector HOVD and the drain of the high-side switch 602 provides ESD protection for switch M 5 and analog filter for detector HOVD.
- the detector HOVD detects an overvoltage and sends a signal to deactivate switches M 2 and M 7 , and activate the overvoltage protection circuits B 2 and B 4 . At this time, switches M 1 and M 6 are off because the main input signal V IN is low.
- the overvoltage protection circuit B 2 includes at least switches M 3 and M 4 .
- the overvoltage protection circuit B 4 includes at least switch M 8 and M 9 .
- switches M 3 , M 4 , M 8 and M 9 are MOSFET transistors. Switches M 3 , M 4 , M 8 and M 9 are turned off in the normal flyback operation. When the overvoltage protection circuit B 2 is activated by the overcharge detector B 5 , switches M 3 and M 4 are turned on simultaneously. Combination of switches M 3 and M 4 and impedances Z 3 and Z 4 allows a soft rise of the gate voltage of the low-side switch 604 beyond its threshold voltage.
- the maximum gate voltage of the low-side switch 604 is maintained or clamped by the overvoltage protection circuit B 2 (i.e., the switches M 3 and M 4 and the Z 3 and Z 4 ) at a voltage level proportional to the resistance ratio of impedances Z 3 and Z 4 (i.e., Z 4 /(Z 3 +Z 4 )*V CC ).
- impedances Z 3 and Z 4 are resistors or combinations of resistors and capacitors.
- the overvoltage protection circuit B 4 is activated by the overcharge detector B 5 via the pulse generator, level shift, signal processor and logics switches. Switches M 8 and M 9 are thus turned on. The combination of switches M 8 and M 9 and impedances Z 9 and Z 10 allows a soft rise of the gate voltage of the high-side switch 602 beyond its threshold voltage.
- the maximum gate voltage of the high-side switch 604 is maintained or clamped by the overvoltage protection circuit B 4 (i.e., the switches M 8 and M 9 and the impedances Z 9 and Z 10 ) at a voltage level proportional to the resistance ratio of impedances Z 9 and Z 10 (i.e., Z 10 /(Z 9 +Z 10 )*(V CC ⁇ V DIODE )).
- impedances Z 9 and Z 10 are resistors or combinations of resistors and capacitors.
- the overvoltage protection circuits B 2 and B 4 allow a soft clamping of the gate voltage of the low-side switch 604 and high-side switch 602 (by using switches M 3 , M 4 , M 8 and M 9 , and impedances Z 3 , Z 4 , Z 9 and Z 10 ) so as to control the on current of both the HS switch 602 and LS switch 604 . Whichever has lower current will dominant since HS switch 602 and LS switch 604 are in series.
- switches M 3 and M 8 are deactivated either when the detector HOVD of the overvoltage detection circuit B 5 detects the drain voltage of the high-side switch 602 becomes lower than a reset level of the fault voltage or when the time control setting T 3 expires whichever comes first.
- switches M 4 and M 9 respectively maintain turned on for a fixed amount of time to provide a soft turn-off of the low-side switch 604 and the high-side switch 602 . Soft turn-off may prevent gate and line oscillation.
- the controller according to the present disclosure may control the sharing of the blocking voltage by adjusting the time control settings T 2 and T 4 .
- switches M 4 and M 9 turn off and switches M 2 and M 7 turn back on to provide the strong pull low for the gate of the low-side switch 604 and the high-side switch 602 respectively.
- M 3 and M 8 will be turned on and turn off by ROV (not by one shot) because the time it takes for ROV goes above and below the OV set and OV reset threshold is shorter than one shot time.
- M 4 and M 9 keeps on for additional time for M 3 rising edge. The overvoltage protection period is thus over and the overvoltage protection circuit B 2 is deactivated. At this time, the normal flyback operation resumes.
- M 3 and M 8 will turn on when OV_OUT goes low during over voltage events and will be turned off either when OV_OUT goes high or by the oneshot whichever comes first during over voltage events.
- the gate voltage of the low-side switch 604 and the high-side switch 602 can be clamped and precisely controlled without any overshoot phenomena that may occur in the conventional zener-diode clamping method.
- the controller according to the present disclosure does not need an additional voltage supply for the reference voltage because the voltage clamping for the low-side and high-side switch 604 and 602 is set by the ratio of Z 3 and Z 4 and the ratio of Z 9 and Z 10 respectively.
- the controller can also provide the gate voltage control capability irrespective of temperature variation due to the same temperature dependency of impedances Z 3 , Z 4 , Z 9 and Z 10 .
- the desired soft turn-off of the low-side switch 604 and the high-side switch 602 for the safe shutdown is obtained by combination of switches M 4 and M 9 and impedances Z 4 and Z 10 . Therefore the overvoltage protection circuit can be simply integrated with the existing gate drive circuit.
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- Engineering & Computer Science (AREA)
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Abstract
Description
- This disclosure relates in general to semiconductor devices and, in particular, to over voltage protection for power semiconductor devices.
- Integrated circuits, such as microprocessors and memory devices, include many metal-oxide-semiconductor field-effect transistors (MOSFETs), which provide the basic switching functions to implement logic gates, data storage, power switching, and the like. Power MOSFETs have typically been developed for applications requiring power switching and power amplification.
- In one application, flyback converters, which generate a DC output from either an AC or DC input, are a simple switch mode power supply using a power MOSFET.
FIG. 1 depicts a conventional flyback converter. When the MOSFET switch S turns on, energy from the input source Vin is applied and a current flows through the primary windings energizing a transformer T. The current in primary side of the transformer T ramps up proportional to the input voltage Vin. During this time, the output diode D is reverse-biased and off. The voltage applied to the diode D is equal to the output voltage Vout plus the reflected input voltage (i.e., Vin*(N2/N1)). The output capacitor C supplies the load current Io during the on-time of the MOSFET switch S. - When enough energy is stored in the primary side of transformer T, the MOSFET switch S is turned off and the energy in the transformer T transfers to the secondary side and current flows through the diode D. The diode D is now forward-biased, replenishing the energy in the output capacitor C and supplying the load. The current in the secondary side of transformer T ramps down proportionally to output voltage Vout. During this time, the primary side is considered an open circuit. The voltage applied to the MOSFET switch S is equal to the input voltage Vin plus the reflected output voltage (i.e., Vout*(N1/N2)).
- Flyback converters may be operated in different modes. In one example, a fly-back converter is designed with a fixed switching frequency and modulates the peak current to supply the load demands. In another example, a fly-back converter can be operated in quasi-resonant mode (QR), where the switching occurs on the very first and deepest resonant valley. QR delivers the maximum amount of power by adjusting both the peak current and the switching frequency to turn the MOSFET switch on at the first resonant valley where VDS is at or near zero for minimal turn-on losses.
- However, the benefits of flyback converters in the QR mode are reduced when used at high input voltage (e.g., over 300 V AC). This is due to the fact that higher reflected voltages require using a MOSFET with a correspondingly higher breakdown voltage rating. The use of a MOSFET with higher breakdown voltage increases the cost and inherently increases the drain-source on resistance (Rds-on) and the switching capacitance of the MOSFET. Lower breakdown MOSFETS can be used however at low load and high line voltages but the zero voltage switching capability is compromised and not achieved over the full load range. One of the proposed methods uses a cascode switch to maximize reflected voltage and utilize a MOSFET voltage level which affords the QR operation. Cascode switches typically have two or more power transistors (e.g., MOSFETs) connected in series. The load voltage is distributed across all of the series connected power transistors. As such, the use of the cascode switch increases the overall breakdown voltage without adding cost or appreciably compromising MOSFET performance.
- Overvoltages have been a challenging issue for power devices (e.g., switches in fly-back converters). Overvoltages including voltage spikes from parasitic capacitances and transformer inductances, surges and fast transients, often occur during a flyback converter's normal operation and start up. Overvoltages may cause problematic field failure results of the power transistors. It is thus desirable to identify fault conditions (e.g., fault current and fault voltage) during operation of power devices and to activate suitable remedial action.
- It is within this context that embodiments of the present invention arise.
- Objects and advantages of aspects of the present disclosure will become apparent upon reading the following detailed description and upon reference to the accompanying drawings in which:
-
FIG. 1 is a circuit diagram illustrating a conventional flyback converter. -
FIG. 2 is a block diagram illustrating a power converter according to aspects of the present disclosure. -
FIG. 3 depicts the signal waveform of the drain-to-source voltage of the cascode switch ofFIG. 2 corresponding to its drain current. -
FIG. 4 is a circuit diagram illustrating a controller employed in a power switch according to aspects of the present disclosure. -
FIG. 5 is a timing diagram illustrating signal waveforms associated with the operation of a controller ofFIG. 4 . -
FIG. 6 is a circuit diagram illustrating a controller employed in a power switch according to aspects of the present disclosure. -
FIG. 7 is a timing diagram illustrating signal waveforms associated with the operation of a controller ofFIG. 6 . - In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced.
- Aspects of the present disclosure describe a power converter using a cascode switch with an integrated overvoltage protection. One aspect of the present disclosure describes an overvoltage protection for the cascode switch by soft clamping the gate voltage of the low-side switch to control the breakdown leakage current of the high-side switch and soft turning off the low-side switch to prevent oscillation. One aspect of the present disclosure describes an overvoltage protection for the cascode switch by soft clamping the gate voltages of the low-side and high-side switches to control the on current and soft turning off the low-side and high-side switch to prevent oscillation.
-
FIG. 2 is block diagram of circuit illustrating a power converter according to aspects of the present disclosure. Thepower converter 200 includes acascode switch 210 coupled to aload 220 and acontroller 230 coupled to theswitch 210. - The
cascode switch 210 includes afirst power transistor 212 coupled to theload 220 and asecond power transistor 214 coupled in series between thefirst power transistor 212 and ground. Thepower transistors first transistor 212 is referred to herein as high-side transistor or switch and thesecond transistor 214 is referred to as low-side transistor or switch. In one implementation, thepower transistors power transistors - The
cascode switch 210 is coupled to aload 220. By way of example and not by way of limitation, theload 220 may be a transformer having a primary coil and a secondary coil electromagnetically coupled through a magnetically permeable core similar to the transformer T ofFIG. 1 . In such an implementation, the primary coil of the transformer (not shown) is connected to an input source and the secondary coil is connected to a load via an output diode. The drain of the high-side switch 212 is coupled to the primary coil of the transformer. - The
controller 230 in thepower converter 200 is configured to provide normal control of the switching operation as demanded (e.g., flyback operation) and also to provide control of the gate voltages and turning on and off of the low-side and high-side switches controller 230 includes agate driving circuit 232, anovervoltage protection circuit 234 and anovervoltage detection circuit 236. In one embodiment, thecontroller 230 is a QR controller. Thegate driving circuit 232 in thecontroller 230 is configured to support normal flyback operation. Theovervoltage detection circuit 236 is configured to detect fault occurrences or overvoltages, e.g., at the drain of the high-side switch 212 and activate overvoltage protection functions implemented by theovervoltage protection circuit 234. The overvoltage protection design according to the present disclosure makes the energy induced in primary side inductor current to be consumed in thecascode switch 210 and the drain-to-source capacitor voltage of theswitch 210 clamped in a level so that it does not increase over the damage level of thecascode switch 210. The drain-to-source capacitor voltage is effectively the same as the drain-to-source voltage. The level is defined as set and reset voltages by the hysteresis band in theovervoltage detection circuit 236.FIG. 3 depicts the signal waveform of the drain-to-source voltage of thecascode switch 210 corresponding to its drain current. At time t1, the drain-to-source voltage of thecascode switch 210 reaches the set voltage. The drain current of theswitch 210 begins to increase slowly by gate control. As a result, the flow direction of the primary side inductor current changes to theswitch 210 and its drain-to-source voltage is clamped to a certain level. At time t2, the drain current of theswitch 210 equals to primary side inductor current. The drain-to-source capacitor (CDS) of the switch starts to discharge and thus its drain-to-source voltage begins to fall. The falling slope is determined in accordance with the values of the drain current and the drain-to-source capacitance. At time t3, the drain-to-source voltage of theswitch 210 reaches the reset level. At this time, the drain current is decreasing by a soft gate control to obtain a safe shutdown of theswitch 210. As shown inFIG. 3 , during the current falling interval time (i.e., time t3-t4) the drain-to-source voltage of theswitch 210 falls below the reset value. At time t4, theswitch 210 is turned off and the overvoltage protection is over. The remaining energy stored in the primary side of the transformer transfers to the secondary side and flows to the output diode supplying the load. The detailed description of thecontroller 230 and its gate voltage control is discussed below in connection withFIGS. 4-7 . -
FIG. 4 is a circuit diagram illustrating a controller employed in a power switch according to one aspect of the present disclosure.FIG. 5 is a timing diagram showing signal waveforms associated with the operation of a controller ofFIG. 4 . In this embodiment, thecontroller 400 includes an overvoltage protection for the cascode switch by clamping the gate voltage of the low-side switch 404 to control the breakdown leakage current of the high-side switch 402 and then turning off the low-side switch 404. - The
controller 400 is coupled to the gate of the high-side switch 402 and the gate of the low-side switch 404. In this embodiment, the low-side switch 404 may be a power MOSFET with a relatively low rating and the high-side switch 402 may be a power MOSFET with a higher rating than the low-side switch 404. In one example, the high-side switch 402 may be based on superjunction transistors capable of supporting up to 600 Volts. Thecontroller 400 has a LS gate driver B1 for driving the gate of the low-side switch 404 and a HS gate driver B3 for driving the gate of the high-side switch 402. Thecontroller 400 also has a overvoltage protection circuit B2 coupled between the LS gate driver B1 and the gate of the low-side switch 404. In addition, thecontroller 400 includes an overvoltage detection circuit B5 for detecting fault occurrences at the drain of high-side switch 402. - The LS gate driver B1 includes at least switches M1 and M2, and the HS gate driver B3 includes switches M6 and M7. In one embodiment, switches M1, M2, M6 and M7 are MOSFET transistors. During the normal flyback operation, switches M1 and M2 of the LS gate driver B1 and switches M6 and M7 of HS gate driver B3 are turned on and off according to the main input signal VIN. Specifically, combination of switch M1 and a first impedance Z1 in the LS gate driver B1 is configured to make the desired turn-on switching performance of the low-
side switch 404. In addition, combination of switch M2 and a second impedance Z2 is configured to make an optimal turn-off of the low-side switch 404. Similarly, combination of switch M6 and a third impedance Z7 in the HS gate driver B3 is configured to make the desired turn-on switching performance of the high-side switch 402 and combination of switch M7 and a fourth impedance Z8 is configured to make an optimal turn-off of the high-side switch 402. By way of example and not by way of limitation, the impedances Z1, Z2, Z7 and Z8 may be provided by resistors or combinations of resistors and capacitors. - An overvoltage detection circuit B5 of the
controller 400 includes at least a detector element. In one embodiment, the detector element is a hysteresis overvoltage detection device HOVD, which is a high gain comparator characterized by hysteresis band and fast response time. The detector HOVD may use band gap reference voltage (i.e., the set and reset voltages) to precisely control the voltage at the drain of the high-side switch 402 to stay in a safe level during fault conditions due to the voltage surge. The overvoltage detection circuit B5 also includes a switch M5 with a time control setting T1. Combination of the time control setting T1 and switch M5 is configured to provide a digital filter for entire PWM turn-on period and a transition from PWM on to off for avoiding malfunction of overvoltage protection due to noise coupling. In addition, a fifth impedance Z6 in the overvoltage detection circuit B5 between the detector HOVD and the drain of the high-side switch 402 provides ESD protection for switch M5 and analog filter for detector HOVD. The fifth impedance Z6 may be provided by resistor or a combination of a resistor and capacitor. - Once the voltage at the drain of high-side switch is higher than a set level of a fault voltage, the detector HOVD detects an overvoltage and sends a signal to deactivate switch M2 (e.g., by NOR gate N1) and activate the overvoltage protection circuit B2. At this time, switch M1 is off because the main input signal VIN is low.
- The overvoltage protection circuit B2 includes at least switches M3 and M4. In one embodiment, switches M3 and M4 are MOSFETs. Switches M3 and M4 are turned off during normal flyback operation. When the overvoltage protection circuit B2 is activated by the overcharge detector B5, switches M3 and M4 are turned on simultaneously. Combination of switches M3 and M4 and impedances Z3 and Z4 allows a soft rise of the gate voltage of the low-
side switch 404 beyond its threshold voltage. The maximum gate voltage of the low-side switch 404 is maintained or clamped by the overvoltage protection circuit B2 (i.e., the switches M3 and M4 and the impedances Z3 and Z4) at a voltage level proportional to the resistance ratio of impedances Z3 and Z4 (i.e., Z4/(Z3+Z4)*VCC). By way of example, and not by way of limitation, impedances Z3 and Z4 may be resistors or combinations of resistors and capacitors. At this time, the drain current of the low-side switch 404 starts to ramp up discharging its drain voltage until the drain-source voltage of the high-side switch 402 reaches its breakdown voltage. When the high-side switch 402 reaches its breakdown voltage, the high-side switch 402 produces leakage current which in turn discharges the drain voltage of the high-side switch 402. The overvoltage protection circuit B2 allows a soft clamping of the gate voltage of the low-side switch 404 (by using switches M3 and M4 and impedances impedances Z3 and Z4) so as to control the breakdown leakage current of the high-side switch 402. - Next, switch M3 is deactivated when the detector HOVD of the overvoltage detection circuit B5 detects the drain voltage of the high-
side switch 402 becomes lower than a reset level of the fault voltage (or when the time control setting T3 expires whichever comes first). With a time control setting T2, switch M4 maintains turned on for a fixed amount of time to provide a soft turn-off of the low-side switch 404. In the illustrated example, thelow side switch 404 turns off when time control T2 expires and thehigh side switch 402 is always off during over voltage event. The controller according to the present disclosure may control the sharing of the blocking voltage by adjusting the time control setting T2. When the time control T2 expires, switch M4 turns off and switch M2 turns back on to provide the strong pull low for the gate of the low-side switch 404. M3 will be turn on and turn off by ROV (not by one shot) because the time it takes for ROV goes above and below the OV set and OV reset threshold is shorter than one shot time. M4 keeps on for additional time for M3 rising edge. M3 will turn on when OV_OUT goes low during over voltage events and is turned off either when OV_OUT goes high or by the oneshot whichever comes first during over voltage events. The overvoltage protection period is thus over and the overvoltage protection circuit B2 is deactivated. At this time, the normal flyback operation resumes. - According to aspects of the present disclosure, the gate voltage of the low-
side switch 404 can be clamped and precisely controlled without any overshoot phenomena that may occur in the conventional zener-diode clamping method. The controller according to the present disclosure does not need an additional voltage supply for the reference voltage because the voltage clamping for the low-side switch 404 is set by the ratio of Z3 and Z4. The controller can also provide the gate voltage control capability irrespective of temperature variation due to the same temperature dependency of impedances Z3 and Z4. The desired soft turn-off of the low-side switch 404 for the safe shutdown is obtained by combination of switch M4 and impedance Z4. Therefore the overvoltage protection circuit can be simply integrated with the existing gate drive circuit. -
FIG. 6 is a circuit diagram illustrating a controller employed in a power switch according to one aspect of the present disclosure.FIG. 7 is a timing diagram showing signal waveforms associated with the operation of a controller ofFIG. 6 . In this embodiment, the controller 600 includes an overvoltage protection for the cascode switch by soft clamping the gate voltages of the low-side and high-side switches 604 and 602 to control the on current and soft turning off the low-side and high-side switch 604 and 602 to prevent oscillation. - The controller 600 is coupled to the gate of the high-side switch 602 and the gate of the low-side switch 604. In this embodiment, the high-side switch 602 and the low-side switch 604 may be a power MOSFET with a lower breakdown voltage rating compared to conventional design without over voltage protection. By way of example, the high-side switch 602 and low-side switch 604 may be characterized by the same breakdown voltage, e.g., 600 V. The controller 600 has a LS gate driver B1 for driving the gate of the low-side switch 604 and a HS gate driver B3 for driving the gate of the high-side switch 602. The controller 600 also has a LS overvoltage protection circuit B2 coupled between the LS gate driver B1 and the gate of the low-side switch 604 and a HS overvoltage protection circuit B4 coupled between the HS gate driver B3 and the gate of the high-side switch 602. In addition, the controller 600 includes an overvoltage detection circuit B5 for detecting fault occurrences at the drain of high-side switch 602.
- The LS gate driver B1 includes at least switches M1 and M2, and the HS gate driver B3 includes switches M6 and M7. In one embodiment, switches M1, M2, M6 and M7 are MOSFET transistors. During the normal flyback operation, switches M1 and M2 of the LS gate driver B1 and switches M6 and M7 of HS gate driver B3 are turned on and off according to the main input signal VIN. Specifically, combination of switch M1 and impedance Z1 in the LS gate driver B1 is configured to make the desired turn-on switching performance of the low-side switch 604. In addition, combination of switch M2 and impedance Z2 is configured to make an optimal turn-off of the low-side switch 604. Similarly, combination of switch M6 and impedance Z7 in the HS gate driver B3 is configured to make the desired turn-on switching performance of the high-side switch 602 and combination of switch M7 and impedance Z8 is configured to make an optimal turn-off of the high-side switch 602. In one embodiment impedances Z1, Z2, Z7 and Z8 are resistors or combinations of resistors and capacitors.
- An overvoltage detection circuit B5 of the controller 600 includes at least a detector. In one embodiment, the detector is a hysteresis overvoltage detection device HOVD, which is a high gain comparator with hysteresis band and fast response time. The detector HOVD may use band gap reference voltage (i.e., the set and reset voltages) to precisely control the voltage at the drain of the high-side switch 602 to stay in a safe level during fault conditions due to the voltage surge. The overvoltage detection circuit B5 also includes a switch M5 with a time control setting T1. Combination of the time control setting T1 and switch M5 is configured to provide a digital filter for entire PWM turn-on period and a transition from PWM on to off for avoiding malfunction of overvoltage protection due to noise coupling. In addition, impedance Z6 in the overvoltage detection circuit B5 between the detector HOVD and the drain of the high-side switch 602 provides ESD protection for switch M5 and analog filter for detector HOVD.
- Once the voltage at the drain of high-side switch is higher than a set level of a fault voltage, the detector HOVD detects an overvoltage and sends a signal to deactivate switches M2 and M7, and activate the overvoltage protection circuits B2 and B4. At this time, switches M1 and M6 are off because the main input signal VIN is low.
- The overvoltage protection circuit B2 includes at least switches M3 and M4. The overvoltage protection circuit B4 includes at least switch M8 and M9. In one embodiment, switches M3, M4, M8 and M9 are MOSFET transistors. Switches M3, M4, M8 and M9 are turned off in the normal flyback operation. When the overvoltage protection circuit B2 is activated by the overcharge detector B5, switches M3 and M4 are turned on simultaneously. Combination of switches M3 and M4 and impedances Z3 and Z4 allows a soft rise of the gate voltage of the low-side switch 604 beyond its threshold voltage. The maximum gate voltage of the low-side switch 604 is maintained or clamped by the overvoltage protection circuit B2 (i.e., the switches M3 and M4 and the Z3 and Z4) at a voltage level proportional to the resistance ratio of impedances Z3 and Z4 (i.e., Z4/(Z3+Z4)*VCC). In one embodiment impedances Z3 and Z4 are resistors or combinations of resistors and capacitors.
- The overvoltage protection circuit B4 is activated by the overcharge detector B5 via the pulse generator, level shift, signal processor and logics switches. Switches M8 and M9 are thus turned on. The combination of switches M8 and M9 and impedances Z9 and Z10 allows a soft rise of the gate voltage of the high-side switch 602 beyond its threshold voltage. The maximum gate voltage of the high-side switch 604 is maintained or clamped by the overvoltage protection circuit B4 (i.e., the switches M8 and M9 and the impedances Z9 and Z10) at a voltage level proportional to the resistance ratio of impedances Z9 and Z10 (i.e., Z10/(Z9+Z10)*(VCC−VDIODE)). In one embodiment impedances Z9 and Z10 are resistors or combinations of resistors and capacitors.
- When the gate voltages of the low-side and high-side switches are clamped, the low-side and high-side drain current starts to ramp up discharging the low-side and high-side drain voltage. The overvoltage protection circuits B2 and B4 allow a soft clamping of the gate voltage of the low-side switch 604 and high-side switch 602 (by using switches M3, M4, M8 and M9, and impedances Z3, Z4, Z9 and Z10) so as to control the on current of both the HS switch 602 and LS switch 604. Whichever has lower current will dominant since HS switch 602 and LS switch 604 are in series.
- Next, switches M3 and M8 are deactivated either when the detector HOVD of the overvoltage detection circuit B5 detects the drain voltage of the high-side switch 602 becomes lower than a reset level of the fault voltage or when the time control setting T3 expires whichever comes first. With time control settings T2 and T4, switches M4 and M9 respectively maintain turned on for a fixed amount of time to provide a soft turn-off of the low-side switch 604 and the high-side switch 602. Soft turn-off may prevent gate and line oscillation. The controller according to the present disclosure may control the sharing of the blocking voltage by adjusting the time control settings T2 and T4. When the time control T2 and T4 expires, switches M4 and M9 turn off and switches M2 and M7 turn back on to provide the strong pull low for the gate of the low-side switch 604 and the high-side switch 602 respectively. M3 and M8 will be turned on and turn off by ROV (not by one shot) because the time it takes for ROV goes above and below the OV set and OV reset threshold is shorter than one shot time. M4 and M9 keeps on for additional time for M3 rising edge. The overvoltage protection period is thus over and the overvoltage protection circuit B2 is deactivated. At this time, the normal flyback operation resumes. M3 and M8 will turn on when OV_OUT goes low during over voltage events and will be turned off either when OV_OUT goes high or by the oneshot whichever comes first during over voltage events.
- According to aspects of the present disclosure, the gate voltage of the low-side switch 604 and the high-side switch 602 can be clamped and precisely controlled without any overshoot phenomena that may occur in the conventional zener-diode clamping method. The controller according to the present disclosure does not need an additional voltage supply for the reference voltage because the voltage clamping for the low-side and high-side switch 604 and 602 is set by the ratio of Z3 and Z4 and the ratio of Z9 and Z10 respectively. The controller can also provide the gate voltage control capability irrespective of temperature variation due to the same temperature dependency of impedances Z3, Z4, Z9 and Z10. The desired soft turn-off of the low-side switch 604 and the high-side switch 602 for the safe shutdown is obtained by combination of switches M4 and M9 and impedances Z4 and Z10. Therefore the overvoltage protection circuit can be simply integrated with the existing gate drive circuit.
- While the above is a complete description of the preferred embodiments of the present invention, it is possible to use various alternatives, modifications, and equivalents. Therefore, the scope of the present invention should be determined not with reference to the above description but should, instead be determined with reference to the appended claims, along with their full scope of equivalents. Any feature, whether preferred or not, may be combined with any other feature, whether preferred or not. In the claims that follow, the indefinite article “A”, or “An” refers to a quantity of one or more of the item following the article, except where expressly stated otherwise. The appended claims are not to be interpreted as including means-plus-function limitations, unless such a limitation is explicitly recited in a given claim using the phrase “means for.” Any element in a claim that does not explicitly state “means for” performing a specified function, is not to be interpreted as a “means” or “step” clause as specified in 35 USC § 112, ¶ 6.
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CN201810931004.XA CN109462323B (en) | 2017-09-06 | 2018-08-15 | Power semiconductor device coupled to load capable of flowing load current |
TW107129356A TWI687030B (en) | 2017-09-06 | 2018-08-22 | A power semiconducter device coupled to a load operable to draw a load current |
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EP3944438A1 (en) * | 2020-07-23 | 2022-01-26 | Future Systems Besitz GmbH | Method and apparatus for protection of an electrical load against overvoltage |
WO2022018234A1 (en) * | 2020-07-23 | 2022-01-27 | Future Systems Besitz Gmbh | Method and apparatus for protection of an electrical load against overvoltage |
CN113972709A (en) * | 2020-07-24 | 2022-01-25 | 未来系统产业有限公司 | Method and apparatus for protecting a load from an overcurrent |
Also Published As
Publication number | Publication date |
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CN109462323B (en) | 2021-01-12 |
TW201914183A (en) | 2019-04-01 |
US10243551B1 (en) | 2019-03-26 |
TWI687030B (en) | 2020-03-01 |
CN109462323A (en) | 2019-03-12 |
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