US20190068521A1 - Technologies for automated network congestion management - Google Patents

Technologies for automated network congestion management Download PDF

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Publication number
US20190068521A1
US20190068521A1 US15/858,288 US201715858288A US2019068521A1 US 20190068521 A1 US20190068521 A1 US 20190068521A1 US 201715858288 A US201715858288 A US 201715858288A US 2019068521 A1 US2019068521 A1 US 2019068521A1
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Prior art keywords
sleds
sled
bandwidth
network
resource manager
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US15/858,288
Inventor
Mohan J. Kumar
Murugasamy K. Nachimuthu
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Intel Corp
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Intel Corp
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Priority to US15/858,288 priority Critical patent/US20190068521A1/en
Assigned to INTEL CORPORATION reassignment INTEL CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KUMAR, MOHAN J., NACHIMUTHU, MURUGASAMY K.
Priority to DE102018005850.7A priority patent/DE102018005850A1/en
Priority to CN201810843475.5A priority patent/CN109428841A/en
Publication of US20190068521A1 publication Critical patent/US20190068521A1/en
Abandoned legal-status Critical Current

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    • G06Q10/06Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling
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    • G06Q10/0631Resource planning, allocation, distributing or scheduling for enterprises or organisations
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    • G06Q30/00Commerce
    • G06Q30/02Marketing; Price estimation or determination; Fundraising
    • G06Q30/0283Price estimation or determination
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
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    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/04Network management architectures or arrangements
    • H04L41/044Network management architectures or arrangements comprising hierarchical management structures
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/14Network analysis or design
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/16Threshold monitoring
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • H04L47/2441Traffic characterised by specific attributes, e.g. priority or QoS relying on flow classification, e.g. using integrated services [IntServ]
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00Network architectures or network communication protocols for network security
    • H04L63/04Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
    • H04L63/0428Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks

Definitions

  • Datacenters and other large computer networks typically include multiple layers of switches.
  • servers may be installed in racks, and each server in a rack may be connected to a top-of-rack switch.
  • Multiple top-of-rack switches may be connected to an upstream switch, and so on. Therefore, communicating between servers or other nodes in different racks may require traversing multiple switch layers. Traversing each layer of switches may introduce queuing latency.
  • FIG. 1 is a simplified diagram of at least one embodiment of a data center for executing workloads with disaggregated resources
  • FIG. 2 is a simplified diagram of at least one embodiment of a pod of the data center of FIG. 1 ;
  • FIG. 3 is a perspective view of at least one embodiment of a rack that may be included in the pod of FIG. 2 ;
  • FIG. 4 is a side plan elevation view of the rack of FIG. 3 ;
  • FIG. 5 is a perspective view of the rack of FIG. 3 having a sled mounted therein;
  • FIG. 6 is a is a simplified block diagram of at least one embodiment of a top side of the sled of FIG. 5 ;
  • FIG. 7 is a simplified block diagram of at least one embodiment of a bottom side of the sled of FIG. 6 ;
  • FIG. 8 is a simplified block diagram of at least one embodiment of a compute sled usable in the data center of FIG. 1 ;
  • FIG. 9 is a top perspective view of at least one embodiment of the compute sled of FIG. 8 ;
  • FIG. 10 is a simplified block diagram of at least one embodiment of an accelerator sled usable in the data center of FIG. 1 ;
  • FIG. 11 is a top perspective view of at least one embodiment of the accelerator sled of FIG. 10 ;
  • FIG. 12 is a simplified block diagram of at least one embodiment of a storage sled usable in the data center of FIG. 1 ;
  • FIG. 13 is a top perspective view of at least one embodiment of the storage sled of FIG. 12 ;
  • FIG. 14 is a simplified block diagram of at least one embodiment of a memory sled usable in the data center of FIG. 1 ;
  • FIG. 15 is a simplified block diagram of a system that may be established within the data center of FIG. 1 to execute workloads with managed nodes composed of disaggregated resources.
  • FIG. 16 is a simplified block diagram of an at least one embodiment of a system for bandwidth allocation
  • FIG. 17 is a simplified block diagram of at least one embodiment of a computing device of FIG. 16 ;
  • FIG. 18 is a simplified block diagram of at least one embodiment of an environment of the resource manager of FIGS. 16 and 17 ;
  • FIG. 19 is a simplified block diagram of at least one embodiment of an environment of a sled of FIGS. 16 and 17 ;
  • FIG. 20 is a simplified flow diagram of at least one embodiment of a method for bandwidth allocation that may be executed by the resource manager server of FIGS. 16-18 ;
  • FIG. 21 is a simplified flow diagram of at least one embodiment of a method for bandwidth allocation that may be executed by the sled of FIGS. 16-17 and 19 .
  • references in the specification to “one embodiment,” “an embodiment,” “an illustrative embodiment,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may or may not necessarily include that particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
  • items included in a list in the form of “at least one A, B, and C” can mean (A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C).
  • items listed in the form of “at least one of A, B, or C” can mean (A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C).
  • the disclosed embodiments may be implemented, in some cases, in hardware, firmware, software, or any combination thereof.
  • the disclosed embodiments may also be implemented as instructions carried by or stored on a transitory or non-transitory machine-readable (e.g., computer-readable) storage medium, which may be read and executed by one or more processors.
  • a machine-readable storage medium may be embodied as any storage device, mechanism, or other physical structure for storing or transmitting information in a form readable by a machine (e.g., a volatile or non-volatile memory, a media disc, or other media device).
  • a data center 100 in which disaggregated resources may cooperatively execute one or more workloads includes multiple pods 110 , 120 , 130 , 140 , each of which includes one or more rows of racks.
  • each rack houses multiple sleds, which each may be embodied as a compute device, such as a server, that is primarily equipped with a particular type of resource (e.g., memory devices, data storage devices, accelerator devices, general purpose processors).
  • the sleds in each pod 110 , 120 , 130 , 140 are connected to multiple pod switches (e.g., switches that route data communications to and from sleds within the pod).
  • the pod switches connect with spine switches 150 that switch communications among pods (e.g., the pods 110 , 120 , 130 , 140 ) in the data center 100 .
  • the sleds may be connected with a fabric using Intel Omni-Path technology.
  • resources within sleds in the data center 100 may be allocated to a group (referred to herein as a “managed node”) containing resources from one or more other sleds to be collectively utilized in the execution of a workload.
  • the workload can execute as if the resources belonging to the managed node were located on the same sled.
  • the resources in a managed node may even belong to sleds belonging to different racks, and even to different pods 110 , 120 , 130 , 140 .
  • Some resources of a single sled may be allocated to one managed node while other resources of the same sled are allocated to a different managed node (e.g., one processor assigned to one managed node and another processor of the same sled assigned to a different managed node).
  • the data center 100 By disaggregating resources to sleds comprised predominantly of a single type of resource (e.g., compute sleds comprising primarily compute resources, memory sleds containing primarily memory resources), and selectively allocating and deallocating the disaggregated resources to form a managed node assigned to execute a workload, the data center 100 provides more efficient resource usage over typical data centers comprised of hyperconverged servers containing compute, memory, storage and perhaps additional resources). As such, the data center 100 may provide greater performance (e.g., throughput, operations per second, latency, etc.) than a typical data center that has the same number of resources.
  • compute sleds comprising primarily compute resources
  • the data center 100 may provide greater performance (e.g., throughput, operations per second, latency, etc.) than a typical data center that has the same number of resources.
  • the pod 110 in the illustrative embodiment, includes a set of rows 200 , 210 , 220 , 230 of racks 240 .
  • Each rack 240 may house multiple sleds (e.g., sixteen sleds) and provide power and data connections to the housed sleds, as described in more detail herein.
  • the racks in each row 200 , 210 , 220 , 230 are connected to multiple pod switches 250 , 260 .
  • the pod switch 250 includes a set of ports 252 to which the sleds of the racks of the pod 110 are connected and another set of ports 254 that connect the pod 110 to the spine switches 150 to provide connectivity to other pods in the data center 100 .
  • the pod switch 260 includes a set of ports 262 to which the sleds of the racks of the pod 110 are connected and a set of ports 264 that connect the pod 110 to the spine switches 150 . As such, the use of the pair of switches 250 , 260 provides an amount of redundancy to the pod 110 .
  • the switches 150 , 250 , 260 may be embodied as dual-mode optical switches, capable of routing both Ethernet protocol communications carrying Internet Protocol (IP) packets and communications according to a second, high-performance link-layer protocol (e.g., Intel's Omni-Path Architecture's, Infiniband) via optical signaling media of an optical fabric.
  • IP Internet Protocol
  • a second, high-performance link-layer protocol e.g., Intel's Omni-Path Architecture's, Infiniband
  • each of the other pods 120 , 130 , 140 may be similarly structured as, and have components similar to, the pod 110 shown in and described in regard to FIG. 2 (e.g., each pod may have rows of racks housing multiple sleds as described above). Additionally, while two pod switches 250 , 260 are shown, it should be understood that in other embodiments, each pod 110 , 120 , 130 , 140 may be connected to different number of pod switches (e.g., providing even more failover capacity).
  • each illustrative rack 240 of the data center 100 includes two elongated support posts 302 , 304 , which are arranged vertically.
  • the elongated support posts 302 , 304 may extend upwardly from a floor of the data center 100 when deployed.
  • the rack 240 also includes one or more horizontal pairs 310 of elongated support arms 312 (identified in FIG. 3 via a dashed ellipse) configured to support a sled of the data center 100 as discussed below.
  • One elongated support arm 312 of the pair of elongated support arms 312 extends outwardly from the elongated support post 302 and the other elongated support arm 312 extends outwardly from the elongated support post 304 .
  • each sled of the data center 100 is embodied as a chassis-less sled. That is, each sled has a chassis-less circuit board substrate on which physical resources (e.g., processors, memory, accelerators, storage, etc.) are mounted as discussed in more detail below.
  • the rack 240 is configured to receive the chassis-less sleds.
  • each pair 310 of elongated support arms 312 defines a sled slot 320 of the rack 240 , which is configured to receive a corresponding chassis-less sled.
  • each illustrative elongated support arm 312 includes a circuit board guide 330 configured to receive the chassis-less circuit board substrate of the sled.
  • Each circuit board guide 330 is secured to, or otherwise mounted to, a top side 332 of the corresponding elongated support arm 312 .
  • each circuit board guide 330 is mounted at a distal end of the corresponding elongated support arm 312 relative to the corresponding elongated support post 302 , 304 .
  • not every circuit board guide 330 may be referenced in each Figure.
  • Each circuit board guide 330 includes an inner wall that defines a circuit board slot 380 configured to receive the chassis-less circuit board substrate of a sled 400 when the sled 400 is received in the corresponding sled slot 320 of the rack 240 .
  • a user aligns the chassis-less circuit board substrate of an illustrative chassis-less sled 400 to a sled slot 320 .
  • the user, or robot may then slide the chassis-less circuit board substrate forward into the sled slot 320 such that each side edge 414 of the chassis-less circuit board substrate is received in a corresponding circuit board slot 380 of the circuit board guides 330 of the pair 310 of elongated support arms 312 that define the corresponding sled slot 320 as shown in FIG. 4 .
  • each type of resource can be upgraded independently of each other and at their own optimized refresh rate.
  • the sleds are configured to blindly mate with power and data communication cables in each rack 240 , enhancing their ability to be quickly removed, upgraded, reinstalled, and/or replaced.
  • the data center 100 may operate (e.g., execute workloads, undergo maintenance and/or upgrades, etc.) without human involvement on the data center floor.
  • a human may facilitate one or more maintenance or upgrade operations in the data center 100 .
  • each circuit board guide 330 is dual sided. That is, each circuit board guide 330 includes an inner wall that defines a circuit board slot 380 on each side of the circuit board guide 330 . In this way, each circuit board guide 330 can support a chassis-less circuit board substrate on either side. As such, a single additional elongated support post may be added to the rack 240 to turn the rack 240 into a two-rack solution that can hold twice as many sled slots 320 as shown in FIG. 3 .
  • the illustrative rack 240 includes seven pairs 310 of elongated support arms 312 that define a corresponding seven sled slots 320 , each configured to receive and support a corresponding sled 400 as discussed above.
  • the rack 240 may include additional or fewer pairs 310 of elongated support arms 312 (i.e., additional or fewer sled slots 320 ). It should be appreciated that because the sled 400 is chassis-less, the sled 400 may have an overall height that is different than typical servers. As such, in some embodiments, the height of each sled slot 320 may be shorter than the height of a typical server (e.g., shorter than a single rank unit, “1U”).
  • each of the elongated support posts 302 , 304 may have a length of six feet or less.
  • the rack 240 may have different dimensions.
  • the rack 240 does not include any walls, enclosures, or the like. Rather, the rack 240 is an enclosure-less rack that is opened to the local environment.
  • an end plate may be attached to one of the elongated support posts 302 , 304 in those situations in which the rack 240 forms an end-of-row rack in the data center 100 .
  • each elongated support post 302 , 304 includes an inner wall that defines an inner chamber in which the interconnect may be located.
  • the interconnects routed through the elongated support posts 302 , 304 may be embodied as any type of interconnects including, but not limited to, data or communication interconnects to provide communication connections to each sled slot 320 , power interconnects to provide power to each sled slot 320 , and/or other types of interconnects.
  • the rack 240 in the illustrative embodiment, includes a support platform on which a corresponding optical data connector (not shown) is mounted.
  • Each optical data connector is associated with a corresponding sled slot 320 and is configured to mate with an optical data connector of a corresponding sled 400 when the sled 400 is received in the corresponding sled slot 320 .
  • optical connections between components (e.g., sleds, racks, and switches) in the data center 100 are made with a blind mate optical connection.
  • a door on each cable may prevent dust from contaminating the fiber inside the cable.
  • the door is pushed open when the end of the cable enters the connector mechanism. Subsequently, the optical fiber inside the cable enters a gel within the connector mechanism and the optical fiber of one cable comes into contact with the optical fiber of another cable within the gel inside the connector mechanism.
  • the illustrative rack 240 also includes a fan array 370 coupled to the cross-support arms of the rack 240 .
  • the fan array 370 includes one or more rows of cooling fans 372 , which are aligned in a horizontal line between the elongated support posts 302 , 304 .
  • the fan array 370 includes a row of cooling fans 372 for each sled slot 320 of the rack 240 .
  • each sled 400 does not include any on-board cooling system in the illustrative embodiment and, as such, the fan array 370 provides cooling for each sled 400 received in the rack 240 .
  • Each rack 240 also includes a power supply associated with each sled slot 320 .
  • Each power supply is secured to one of the elongated support arms 312 of the pair 310 of elongated support arms 312 that define the corresponding sled slot 320 .
  • the rack 240 may include a power supply coupled or secured to each elongated support arm 312 extending from the elongated support post 302 .
  • Each power supply includes a power connector configured to mate with a power connector of the sled 400 when the sled 400 is received in the corresponding sled slot 320 .
  • the sled 400 does not include any on-board power supply and, as such, the power supplies provided in the rack 240 supply power to corresponding sleds 400 when mounted to the rack 240 .
  • each sled 400 in the illustrative embodiment, is configured to be mounted in a corresponding rack 240 of the data center 100 as discussed above.
  • each sled 400 may be optimized or otherwise configured for performing particular tasks, such as compute tasks, acceleration tasks, data storage tasks, etc.
  • the sled 400 may be embodied as a compute sled 800 as discussed below in regard to FIGS. 8-9 , an accelerator sled 1000 as discussed below in regard to FIGS. 10-11 , a storage sled 1200 as discussed below in regard to FIGS. 12-13 , or as a sled optimized or otherwise configured to perform other specialized tasks, such as a memory sled 1400 , discussed below in regard to FIG. 14 .
  • the illustrative sled 400 includes a chassis-less circuit board substrate 602 , which supports various physical resources (e.g., electrical components) mounted thereon.
  • the circuit board substrate 602 is “chassis-less” in that the sled 400 does not include a housing or enclosure. Rather, the chassis-less circuit board substrate 602 is open to the local environment.
  • the chassis-less circuit board substrate 602 may be formed from any material capable of supporting the various electrical components mounted thereon.
  • the chassis-less circuit board substrate 602 is formed from an FR-4 glass-reinforced epoxy laminate material. Of course, other materials may be used to form the chassis-less circuit board substrate 602 in other embodiments.
  • the chassis-less circuit board substrate 602 includes multiple features that improve the thermal cooling characteristics of the various electrical components mounted on the chassis-less circuit board substrate 602 .
  • the chassis-less circuit board substrate 602 does not include a housing or enclosure, which may improve the airflow over the electrical components of the sled 400 by reducing those structures that may inhibit air flow.
  • the chassis-less circuit board substrate 602 is not positioned in an individual housing or enclosure, there is no backplane (e.g., a backplate of the chassis) to the chassis-less circuit board substrate 602 , which could inhibit air flow across the electrical components.
  • the chassis-less circuit board substrate 602 has a geometric shape configured to reduce the length of the airflow path across the electrical components mounted to the chassis-less circuit board substrate 602 .
  • the illustrative chassis-less circuit board substrate 602 has a width 604 that is greater than a depth 606 of the chassis-less circuit board substrate 602 .
  • the chassis-less circuit board substrate 602 has a width of about 21 inches and a depth of about 9 inches, compared to a typical server that has a width of about 17 inches and a depth of about 39 inches.
  • an airflow path 608 that extends from a front edge 610 of the chassis-less circuit board substrate 602 toward a rear edge 612 has a shorter distance relative to typical servers, which may improve the thermal cooling characteristics of the sled 400 .
  • the various physical resources mounted to the chassis-less circuit board substrate 602 are mounted in corresponding locations such that no two substantively heat-producing electrical components shadow each other as discussed in more detail below.
  • no two electrical components which produce appreciable heat during operation (i.e., greater than a nominal heat sufficient enough to adversely impact the cooling of another electrical component), are mounted to the chassis-less circuit board substrate 602 linearly in-line with each other along the direction of the airflow path 608 (i.e., along a direction extending from the front edge 610 toward the rear edge 612 of the chassis-less circuit board substrate 602 ).
  • the illustrative sled 400 includes one or more physical resources 620 mounted to a top side 650 of the chassis-less circuit board substrate 602 .
  • the physical resources 620 may be embodied as any type of processor, controller, or other compute circuit capable of performing various tasks such as compute functions and/or controlling the functions of the sled 400 depending on, for example, the type or intended functionality of the sled 400 .
  • the physical resources 620 may be embodied as high-performance processors in embodiments in which the sled 400 is embodied as a compute sled, as accelerator co-processors or circuits in embodiments in which the sled 400 is embodied as an accelerator sled, storage controllers in embodiments in which the sled 400 is embodied as a storage sled, or a set of memory devices in embodiments in which the sled 400 is embodied as a memory sled.
  • the sled 400 also includes one or more additional physical resources 630 mounted to the top side 650 of the chassis-less circuit board substrate 602 .
  • the additional physical resources include a network interface controller (NIC) as discussed in more detail below.
  • NIC network interface controller
  • the physical resources 630 may include additional or other electrical components, circuits, and/or devices in other embodiments.
  • the physical resources 620 are communicatively coupled to the physical resources 630 via an input/output (I/O) subsystem 622 .
  • the I/O subsystem 622 may be embodied as circuitry and/or components to facilitate input/output operations with the physical resources 620 , the physical resources 630 , and/or other components of the sled 400 .
  • the I/O subsystem 622 may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, integrated sensor hubs, firmware devices, communication links (e.g., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.), and/or other components and subsystems to facilitate the input/output operations.
  • the I/O subsystem 622 is embodied as, or otherwise includes, a double data rate 4 (DDR4) data bus or a DDRS data bus.
  • DDR4 double data rate 4
  • the sled 400 may also include a resource-to-resource interconnect 624 .
  • the resource-to-resource interconnect 624 may be embodied as any type of communication interconnect capable of facilitating resource-to-resource communications.
  • the resource-to-resource interconnect 624 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622 ).
  • the resource-to-resource interconnect 624 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to resource-to-resource communications.
  • QPI QuickPath Interconnect
  • UPI UltraPath Interconnect
  • the sled 400 also includes a power connector 640 configured to mate with a corresponding power connector of the rack 240 when the sled 400 is mounted in the corresponding rack 240 .
  • the sled 400 receives power from a power supply of the rack 240 via the power connector 640 to supply power to the various electrical components of the sled 400 . That is, the sled 400 does not include any local power supply (i.e., an on-board power supply) to provide power to the electrical components of the sled 400 .
  • the exclusion of a local or on-board power supply facilitates the reduction in the overall footprint of the chassis-less circuit board substrate 602 , which may increase the thermal cooling characteristics of the various electrical components mounted on the chassis-less circuit board substrate 602 as discussed above.
  • power is provided to the processors 820 through vias directly under the processors 820 (e.g., through the bottom side 750 of the chassis-less circuit board substrate 602 ), providing an increased thermal budget, additional current and/or voltage, and better voltage control over typical boards.
  • the sled 400 may also include mounting features 642 configured to mate with a mounting arm, or other structure, of a robot to facilitate the placement of the sled 600 in a rack 240 by the robot.
  • the mounting features 642 may be embodied as any type of physical structures that allow the robot to grasp the sled 400 without damaging the chassis-less circuit board substrate 602 or the electrical components mounted thereto.
  • the mounting features 642 may be embodied as non-conductive pads attached to the chassis-less circuit board substrate 602 .
  • the mounting features may be embodied as brackets, braces, or other similar structures attached to the chassis-less circuit board substrate 602 .
  • the particular number, shape, size, and/or make-up of the mounting feature 642 may depend on the design of the robot configured to manage the sled 400 .
  • the sled 400 in addition to the physical resources 630 mounted on the top side 650 of the chassis-less circuit board substrate 602 , the sled 400 also includes one or more memory devices 720 mounted to a bottom side 750 of the chassis-less circuit board substrate 602 . That is, the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board.
  • the physical resources 620 are communicatively coupled to the memory devices 720 via the I/O subsystem 622 .
  • the physical resources 620 and the memory devices 720 may be communicatively coupled by one or more vias extending through the chassis-less circuit board substrate 602 .
  • Each physical resource 620 may be communicatively coupled to a different set of one or more memory devices 720 in some embodiments. Alternatively, in other embodiments, each physical resource 620 may be communicatively coupled to each memory devices 720 .
  • the memory devices 720 may be embodied as any type of memory device capable of storing data for the physical resources 620 during operation of the sled 400 , such as any type of volatile (e.g., dynamic random access memory (DRAM), etc.) or non-volatile memory.
  • Volatile memory may be a storage medium that requires power to maintain the state of data stored by the medium.
  • Non-limiting examples of volatile memory may include various types of random access memory (RAM), such as dynamic random access memory (DRAM) or static random access memory (SRAM).
  • RAM random access memory
  • DRAM dynamic random access memory
  • SRAM static random access memory
  • SDRAM synchronous dynamic random access memory
  • DRAM of a memory component may comply with a standard promulgated by JEDEC, such as JESD79F for DDR SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3 SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 for Low Power DDR (LPDDR), JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, and JESD209-4 for LPDDR4 (these standards are available at www.jedec.org).
  • LPDDR Low Power DDR
  • Such standards may be referred to as DDR-based standards and communication interfaces of the storage devices that implement such standards may be referred to as DDR-based interfaces.
  • the memory device is a block addressable memory device, such as those based on NAND or NOR technologies.
  • a memory device may also include next-generation nonvolatile devices, such as Intel 3D XPointTM memory or other byte addressable write-in-place nonvolatile memory devices.
  • the memory device may be or may include memory devices that use chalcogenide glass, multi-threshold level NAND flash memory, NOR flash memory, single or multi-level Phase Change Memory (PCM), a resistive memory, nanowire memory, ferroelectric transistor random access memory (FeTRAM), anti-ferroelectric memory, magnetoresistive random access memory (MRAM) memory that incorporates memristor technology, resistive memory including the metal oxide base, the oxygen vacancy base and the conductive bridge Random Access Memory (CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magnetic junction memory based device, a magnetic tunneling junction (MTJ) based device, a DW (Domain Wall) and SOT (Spin Orbit Transfer) based device, a thyristor based memory device, or a combination of any of the above, or other memory.
  • PCM Phase Change Memory
  • MRAM magnetoresistive random access memory
  • MRAM magnetoresistive random access memory
  • STT spin transfer torque
  • the memory device may refer to the die itself and/or to a packaged memory product.
  • the memory device may comprise a transistor-less stackable cross point architecture in which memory cells sit at the intersection of word lines and bit lines and are individually addressable and in which bit storage is based on a change in bulk resistance.
  • the sled 400 may be embodied as a compute sled 800 .
  • the compute sled 800 is optimized, or otherwise configured, to perform compute tasks.
  • the compute sled 800 may rely on other sleds, such as acceleration sleds and/or storage sleds, to perform such compute tasks.
  • the compute sled 800 includes various physical resources (e.g., electrical components) similar to the physical resources of the sled 400 , which have been identified in FIG. 8 using the same reference numbers.
  • the description of such components provided above in regard to FIGS. 6 and 7 applies to the corresponding components of the compute sled 800 and is not repeated herein for clarity of the description of the compute sled 800 .
  • the physical resources 620 are embodied as processors 820 . Although only two processors 820 are shown in FIG. 8 , it should be appreciated that the compute sled 800 may include additional processors 820 in other embodiments.
  • the processors 820 are embodied as high-performance processors 820 and may be configured to operate at a relatively high power rating. Although the processors 820 generate additional heat operating at power ratings greater than typical processors (which operate at around 155-230 W), the enhanced thermal cooling characteristics of the chassis-less circuit board substrate 602 discussed above facilitate the higher power operation.
  • the processors 820 are configured to operate at a power rating of at least 250 W. In some embodiments, the processors 820 may be configured to operate at a power rating of at least 350 W.
  • the compute sled 800 may also include a processor-to-processor interconnect 842 .
  • the processor-to-processor interconnect 842 may be embodied as any type of communication interconnect capable of facilitating processor-to-processor interconnect 842 communications.
  • the processor-to-processor interconnect 842 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622 ).
  • processor-to-processor interconnect 842 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • QPI QuickPath Interconnect
  • UPI UltraPath Interconnect
  • point-to-point interconnect dedicated to processor-to-processor communications.
  • the compute sled 800 also includes a communication circuit 830 .
  • the illustrative communication circuit 830 includes a network interface controller (NIC) 832 , which may also be referred to as a host fabric interface (HFI).
  • NIC network interface controller
  • HFI host fabric interface
  • the NIC 832 may be embodied as, or otherwise include, any type of integrated circuit, discrete circuits, controller chips, chipsets, add-in-boards, daughtercards, network interface cards, other devices that may be used by the compute sled 800 to connect with another compute device (e.g., with other sleds 400 ).
  • the NIC 832 may be embodied as part of a system-on-a-chip (SoC) that includes one or more processors, or included on a multichip package that also contains one or more processors.
  • the NIC 832 may include a local processor (not shown) and/or a local memory (not shown) that are both local to the NIC 832 .
  • the local processor of the NIC 832 may be capable of performing one or more of the functions of the processors 820 .
  • the local memory of the NIC 832 may be integrated into one or more components of the compute sled at the board level, socket level, chip level, and/or other levels.
  • the communication circuit 830 is communicatively coupled to an optical data connector 834 .
  • the optical data connector 834 is configured to mate with a corresponding optical data connector of the rack 240 when the compute sled 800 is mounted in the rack 240 .
  • the optical data connector 834 includes a plurality of optical fibers which lead from a mating surface of the optical data connector 834 to an optical transceiver 836 .
  • the optical transceiver 836 is configured to convert incoming optical signals from the rack-side optical data connector to electrical signals and to convert electrical signals to outgoing optical signals to the rack-side optical data connector.
  • the optical transceiver 836 may form a portion of the communication circuit 830 in other embodiments.
  • the compute sled 800 may also include an expansion connector 840 .
  • the expansion connector 840 is configured to mate with a corresponding connector of an expansion chassis-less circuit board substrate to provide additional physical resources to the compute sled 800 .
  • the additional physical resources may be used, for example, by the processors 820 during operation of the compute sled 800 .
  • the expansion chassis-less circuit board substrate may be substantially similar to the chassis-less circuit board substrate 602 discussed above and may include various electrical components mounted thereto. The particular electrical components mounted to the expansion chassis-less circuit board substrate may depend on the intended functionality of the expansion chassis-less circuit board substrate.
  • the expansion chassis-less circuit board substrate may provide additional compute resources, memory resources, and/or storage resources.
  • the additional physical resources of the expansion chassis-less circuit board substrate may include, but is not limited to, processors, memory devices, storage devices, and/or accelerator circuits including, for example, field programmable gate arrays (FPGA), application-specific integrated circuits (ASICs), security co-processors, graphics processing units (GPUs), machine learning circuits, or other specialized processors, controllers, devices, and/or circuits.
  • processors memory devices, storage devices, and/or accelerator circuits including, for example, field programmable gate arrays (FPGA), application-specific integrated circuits (ASICs), security co-processors, graphics processing units (GPUs), machine learning circuits, or other specialized processors, controllers, devices, and/or circuits.
  • FPGA field programmable gate arrays
  • ASICs application-specific integrated circuits
  • security co-processors graphics processing units (GPUs)
  • GPUs graphics processing units
  • machine learning circuits or other specialized processors, controllers, devices, and/or circuits.
  • the processors 820 , communication circuit 830 , and optical data connector 834 are mounted to the top side 650 of the chassis-less circuit board substrate 602 .
  • Any suitable attachment or mounting technology may be used to mount the physical resources of the compute sled 800 to the chassis-less circuit board substrate 602 .
  • the various physical resources may be mounted in corresponding sockets (e.g., a processor socket), holders, or brackets.
  • some of the electrical components may be directly mounted to the chassis-less circuit board substrate 602 via soldering or similar techniques.
  • the individual processors 820 and communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other.
  • the processors 820 and communication circuit 830 are mounted in corresponding locations on the top side 650 of the chassis-less circuit board substrate 602 such that no two of those physical resources are linearly in-line with others along the direction of the airflow path 608 .
  • the optical data connector 834 is in-line with the communication circuit 830 , the optical data connector 834 produces no or nominal heat during operation.
  • the memory devices 720 of the compute sled 800 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 400 . Although mounted to the bottom side 750 , the memory devices 720 are communicatively coupled to the processors 820 located on the top side 650 via the I/O subsystem 622 . Because the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board, the memory devices 720 and the processors 820 may be communicatively coupled by one or more vias, connectors, or other mechanisms extending through the chassis-less circuit board substrate 602 . Of course, each processor 820 may be communicatively coupled to a different set of one or more memory devices 720 in some embodiments.
  • each processor 820 may be communicatively coupled to each memory device 720 .
  • the memory devices 720 may be mounted to one or more memory mezzanines on the bottom side of the chassis-less circuit board substrate 602 and may interconnect with a corresponding processor 820 through a ball-grid array.
  • Each of the processors 820 includes a heatsink 850 secured thereto. Due to the mounting of the memory devices 720 to the bottom side 750 of the chassis-less circuit board substrate 602 (as well as the vertical spacing of the sleds 400 in the corresponding rack 240 ), the top side 650 of the chassis-less circuit board substrate 602 includes additional “free” area or space that facilitates the use of heatsinks 850 having a larger size relative to traditional heatsinks used in typical servers. Additionally, due to the improved thermal cooling characteristics of the chassis-less circuit board substrate 602 , none of the processor heatsinks 850 include cooling fans attached thereto. That is, each of the heatsinks 850 is embodied as a fan-less heatsinks.
  • the sled 400 may be embodied as an accelerator sled 1000 .
  • the accelerator sled 1000 is optimized, or otherwise configured, to perform specialized compute tasks, such as machine learning, encryption, hashing, or other computational-intensive task.
  • a compute sled 800 may offload tasks to the accelerator sled 1000 during operation.
  • the accelerator sled 1000 includes various components similar to components of the sled 400 and/or compute sled 800 , which have been identified in FIG. 10 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7, and 8 apply to the corresponding components of the accelerator sled 1000 and is not repeated herein for clarity of the description of the accelerator sled 1000 .
  • the physical resources 620 are embodied as accelerator circuits 1020 .
  • the accelerator sled 1000 may include additional accelerator circuits 1020 in other embodiments.
  • the accelerator sled 1000 may include four accelerator circuits 1020 in some embodiments.
  • the accelerator circuits 1020 may be embodied as any type of processor, co-processor, compute circuit, or other device capable of performing compute or processing operations.
  • the accelerator circuits 1020 may be embodied as, for example, field programmable gate arrays (FPGA), application-specific integrated circuits (ASICs), security co-processors, graphics processing units (GPUs), machine learning circuits, or other specialized processors, controllers, devices, and/or circuits.
  • FPGA field programmable gate arrays
  • ASICs application-specific integrated circuits
  • GPUs graphics processing units
  • machine learning circuits or other specialized processors, controllers, devices, and/or circuits.
  • the accelerator sled 1000 may also include an accelerator-to-accelerator interconnect 1042 . Similar to the resource-to-resource interconnect 624 of the sled 600 discussed above, the accelerator-to-accelerator interconnect 1042 may be embodied as any type of communication interconnect capable of facilitating accelerator-to-accelerator communications. In the illustrative embodiment, the accelerator-to-accelerator interconnect 1042 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622 ).
  • the accelerator-to-accelerator interconnect 1042 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • the accelerator circuits 1020 may be daisy-chained with a primary accelerator circuit 1020 connected to the NIC 832 and memory 720 through the I/O subsystem 622 and a secondary accelerator circuit 1020 connected to the NIC 832 and memory 720 through a primary accelerator circuit 1020 .
  • FIG. 11 an illustrative embodiment of the accelerator sled 1000 is shown.
  • the accelerator circuits 1020 , communication circuit 830 , and optical data connector 834 are mounted to the top side 650 of the chassis-less circuit board substrate 602 .
  • the individual accelerator circuits 1020 and communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other as discussed above.
  • the memory devices 720 of the accelerator sled 1000 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 600 .
  • each of the accelerator circuits 1020 may include a heatsink 1070 that is larger than a traditional heatsink used in a server. As discussed above with reference to the heatsinks 870 , the heatsinks 1070 may be larger than tradition heatsinks because of the “free” area provided by the memory devices 750 being located on the bottom side 750 of the chassis-less circuit board substrate 602 rather than on the top side 650 .
  • the sled 400 may be embodied as a storage sled 1200 .
  • the storage sled 1200 is optimized, or otherwise configured, to store data in a data storage 1250 local to the storage sled 1200 .
  • a compute sled 800 or an accelerator sled 1000 may store and retrieve data from the data storage 1250 of the storage sled 1200 .
  • the storage sled 1200 includes various components similar to components of the sled 400 and/or the compute sled 800 , which have been identified in FIG. 12 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7 , and 8 apply to the corresponding components of the storage sled 1200 and is not repeated herein for clarity of the description of the storage sled 1200 .
  • the physical resources 620 are embodied as storage controllers 1220 . Although only two storage controllers 1220 are shown in FIG. 12 , it should be appreciated that the storage sled 1200 may include additional storage controllers 1220 in other embodiments.
  • the storage controllers 1220 may be embodied as any type of processor, controller, or control circuit capable of controlling the storage and retrieval of data into the data storage 1250 based on requests received via the communication circuit 830 .
  • the storage controllers 1220 are embodied as relatively low-power processors or controllers.
  • the storage controllers 1220 may be configured to operate at a power rating of about 75 watts.
  • the storage sled 1200 may also include a controller-to-controller interconnect 1242 .
  • the controller-to-controller interconnect 1242 may be embodied as any type of communication interconnect capable of facilitating controller-to-controller communications.
  • the controller-to-controller interconnect 1242 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622 ).
  • controller-to-controller interconnect 1242 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • QPI QuickPath Interconnect
  • UPI UltraPath Interconnect
  • point-to-point interconnect dedicated to processor-to-processor communications.
  • the data storage 1250 is embodied as, or otherwise includes, a storage cage 1252 configured to house one or more solid state drives (SSDs) 1254 .
  • the storage cage 1252 includes a number of mounting slots 1256 , each of which is configured to receive a corresponding solid state drive 1254 .
  • Each of the mounting slots 1256 includes a number of drive guides 1258 that cooperate to define an access opening 1260 of the corresponding mounting slot 1256 .
  • the storage cage 1252 is secured to the chassis-less circuit board substrate 602 such that the access openings face away from (i.e., toward the front of) the chassis-less circuit board substrate 602 .
  • solid state drives 1254 are accessible while the storage sled 1200 is mounted in a corresponding rack 204 .
  • a solid state drive 1254 may be swapped out of a rack 240 (e.g., via a robot) while the storage sled 1200 remains mounted in the corresponding rack 240 .
  • the storage cage 1252 illustratively includes sixteen mounting slots 1256 and is capable of mounting and storing sixteen solid state drives 1254 .
  • the storage cage 1252 may be configured to store additional or fewer solid state drives 1254 in other embodiments.
  • the solid state drivers are mounted vertically in the storage cage 1252 , but may be mounted in the storage cage 1252 in a different orientation in other embodiments.
  • Each solid state drive 1254 may be embodied as any type of data storage device capable of storing long term data. To do so, the solid state drives 1254 may include volatile and non-volatile memory devices discussed above.
  • the storage controllers 1220 , the communication circuit 830 , and the optical data connector 834 are illustratively mounted to the top side 650 of the chassis-less circuit board substrate 602 .
  • any suitable attachment or mounting technology may be used to mount the electrical components of the storage sled 1200 to the chassis-less circuit board substrate 602 including, for example, sockets (e.g., a processor socket), holders, brackets, soldered connections, and/or other mounting or securing techniques.
  • the individual storage controllers 1220 and the communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other.
  • the storage controllers 1220 and the communication circuit 830 are mounted in corresponding locations on the top side 650 of the chassis-less circuit board substrate 602 such that no two of those electrical components are linearly in-line with other along the direction of the airflow path 608 .
  • the memory devices 720 of the storage sled 1200 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 400 . Although mounted to the bottom side 750 , the memory devices 720 are communicatively coupled to the storage controllers 1220 located on the top side 650 via the I/O subsystem 622 . Again, because the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board, the memory devices 720 and the storage controllers 1220 may be communicatively coupled by one or more vias, connectors, or other mechanisms extending through the chassis-less circuit board substrate 602 . Each of the storage controllers 1220 includes a heatsink 1270 secured thereto.
  • each of the heatsinks 1270 includes cooling fans attached thereto. That is, each of the heatsinks 1270 is embodied as a fan-less heatsink.
  • the sled 400 may be embodied as a memory sled 1400 .
  • the storage sled 1400 is optimized, or otherwise configured, to provide other sleds 400 (e.g., compute sleds 800 , accelerator sleds 1000 , etc.) with access to a pool of memory (e.g., in two or more sets 1430 , 1432 of memory devices 720 ) local to the memory sled 1200 .
  • a compute sled 800 or an accelerator sled 1000 may remotely write to and/or read from one or more of the memory sets 1430 , 1432 of the memory sled 1200 using a logical address space that maps to physical addresses in the memory sets 1430 , 1432 .
  • the memory sled 1400 includes various components similar to components of the sled 400 and/or the compute sled 800 , which have been identified in FIG. 14 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7, and 8 apply to the corresponding components of the memory sled 1400 and is not repeated herein for clarity of the description of the memory sled 1400 .
  • the physical resources 620 are embodied as memory controllers 1420 . Although only two memory controllers 1420 are shown in FIG. 14 , it should be appreciated that the memory sled 1400 may include additional memory controllers 1420 in other embodiments.
  • the memory controllers 1420 may be embodied as any type of processor, controller, or control circuit capable of controlling the writing and reading of data into the memory sets 1430 , 1432 based on requests received via the communication circuit 830 .
  • each storage controller 1220 is connected to a corresponding memory set 1430 , 1432 to write to and read from memory devices 720 within the corresponding memory set 1430 , 1432 and enforce any permissions (e.g., read, write, etc.) associated with sled 400 that has sent a request to the memory sled 1400 to perform a memory access operation (e.g., read or write).
  • a memory access operation e.g., read or write
  • the memory sled 1400 may also include a controller-to-controller interconnect 1442 .
  • the controller-to-controller interconnect 1442 may be embodied as any type of communication interconnect capable of facilitating controller-to-controller communications.
  • the controller-to-controller interconnect 1442 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622 ).
  • the controller-to-controller interconnect 1442 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • a memory controller 1420 may access, through the controller-to-controller interconnect 1442 , memory that is within the memory set 1432 associated with another memory controller 1420 .
  • a scalable memory controller is made of multiple smaller memory controllers, referred to herein as “chiplets”, on a memory sled (e.g., the memory sled 1400 ).
  • the chiplets may be interconnected (e.g., using EMIB (Embedded Multi-Die Interconnect Bridge)).
  • the combined chiplet memory controller may scale up to a relatively large number of memory controllers and I/O ports, (e.g., up to 16 memory channels).
  • the memory controllers 1420 may implement a memory interleave (e.g., one memory address is mapped to the memory set 1430 , the next memory address is mapped to the memory set 1432 , and the third address is mapped to the memory set 1430 , etc.).
  • the interleaving may be managed within the memory controllers 1420 , or from CPU sockets (e.g., of the compute sled 800 ) across network links to the memory sets 1430 , 1432 , and may improve the latency associated with performing memory access operations as compared to accessing contiguous memory addresses from the same memory device.
  • the memory sled 1400 may be connected to one or more other sleds 400 (e.g., in the same rack 240 or an adjacent rack 240 ) through a waveguide, using the waveguide connector 1480 .
  • the waveguides are 64 millimeter waveguides that provide 16 Rx (i.e., receive) lanes and 16 Rt (i.e., transmit) lanes.
  • Each lane in the illustrative embodiment, is either 16 Ghz or 32 Ghz. In other embodiments, the frequencies may be different.
  • Using a waveguide may provide high throughput access to the memory pool (e.g., the memory sets 1430 , 1432 ) to another sled (e.g., a sled 400 in the same rack 240 or an adjacent rack 240 as the memory sled 1400 ) without adding to the load on the optical data connector 834 .
  • the memory pool e.g., the memory sets 1430 , 1432
  • another sled e.g., a sled 400 in the same rack 240 or an adjacent rack 240 as the memory sled 1400
  • the system 1510 includes an orchestrator server 1520 , which may be embodied as a managed node comprising a compute device (e.g., a compute sled 800 ) executing management software (e.g., a cloud operating environment, such as OpenStack) that is communicatively coupled to multiple sleds 400 including a large number of compute sleds 1530 (e.g., each similar to the compute sled 800 ), memory sleds 1540 (e.g., each similar to the memory sled 1400 ), accelerator sleds 1550 (e.g., each similar to the memory sled 1000 ), and storage sleds 1560 (e.g., each similar to the storage sled 1200 ).
  • a compute device e.g., a compute sled 800
  • management software e.g., a cloud operating environment, such as OpenStack
  • multiple sleds 400 including a large number of compute sleds 1530 (e.g., each
  • One or more of the sleds 1530 , 1540 , 1550 , 1560 may be grouped into a managed node 1570 , such as by the orchestrator server 1520 , to collectively perform a workload (e.g., an application 1532 executed in a virtual machine or in a container).
  • the managed node 1570 may be embodied as an assembly of physical resources 620 , such as processors 820 , memory resources 720 , accelerator circuits 1020 , or data storage 1250 , from the same or different sleds 400 .
  • the managed node may be established, defined, or “spun up” by the orchestrator server 1520 at the time a workload is to be assigned to the managed node or at any other time, and may exist regardless of whether any workloads are presently assigned to the managed node.
  • the orchestrator server 1520 may selectively allocate and/or deallocate physical resources 620 from the sleds 400 and/or add or remove one or more sleds 400 from the managed node 1570 as a function of quality of service (QoS) targets (e.g., performance targets associated with a throughput, latency, instructions per second, etc.) associated with a service level agreement for the workload (e.g., the application 1532 ).
  • QoS quality of service
  • the orchestrator server 1520 may receive telemetry data indicative of performance conditions (e.g., throughput, latency, instructions per second, etc.) in each sled 400 of the managed node 1570 and compare the telemetry data to the quality of service targets to determine whether the quality of service targets are being satisfied. If the so, the orchestrator server 1520 may additionally determine whether one or more physical resources may be deallocated from the managed node 1570 while still satisfying the QoS targets, thereby freeing up those physical resources for use in another managed node (e.g., to execute a different workload). Alternatively, if the QoS targets are not presently satisfied, the orchestrator server 1520 may determine to dynamically allocate additional physical resources to assist in the execution of the workload (e.g., the application 1532 ) while the workload is executing
  • performance conditions e.g., throughput, latency, instructions per second, etc.
  • the orchestrator server 1520 may identify trends in the resource utilization of the workload (e.g., the application 1532 ), such as by identifying phases of execution (e.g., time periods in which different operations, each having different resource utilizations characteristics, are performed) of the workload (e.g., the application 1532 ) and pre-emptively identifying available resources in the data center 100 and allocating them to the managed node 1570 (e.g., within a predefined time period of the associated phase beginning).
  • phases of execution e.g., time periods in which different operations, each having different resource utilizations characteristics, are performed
  • the orchestrator server 1520 may model performance based on various latencies and a distribution scheme to place workloads among compute sleds and other resources (e.g., accelerator sleds, memory sleds, storage sleds) in the data center 100 .
  • the orchestrator server 1520 may utilize a model that accounts for the performance of resources on the sleds 400 (e.g., FPGA performance, memory access latency, etc.) and the performance (e.g., congestion, latency, bandwidth) of the path through the network to the resource (e.g., FPGA).
  • the orchestrator server 1520 may determine which resource(s) should be used with which workloads based on the total latency associated with each potential resource available in the data center 100 (e.g., the latency associated with the performance of the resource itself in addition to the latency associated with the path through the network between the compute sled executing the workload and the sled 400 on which the resource is located).
  • the orchestrator server 1520 may generate a map of heat generation in the data center 100 using telemetry data (e.g., temperatures, fan speeds, etc.) reported from the sleds 400 and allocate resources to managed nodes as a function of the map of heat generation and predicted heat generation associated with different workloads, to maintain a target temperature and heat distribution in the data center 100 .
  • telemetry data e.g., temperatures, fan speeds, etc.
  • the orchestrator server 1520 may organize received telemetry data into a hierarchical model that is indicative of a relationship between the managed nodes (e.g., a spatial relationship such as the physical locations of the resources of the managed nodes within the data center 100 and/or a functional relationship, such as groupings of the managed nodes by the customers the managed nodes provide services for, the types of functions typically performed by the managed nodes, managed nodes that typically share or exchange workloads among each other, etc.). Based on differences in the physical locations and resources in the managed nodes, a given workload may exhibit different resource utilizations (e.g., cause a different internal temperature, use a different percentage of processor or memory capacity) across the resources of different managed nodes.
  • resource utilizations e.g., cause a different internal temperature, use a different percentage of processor or memory capacity
  • the orchestrator server 1520 may determine the differences based on the telemetry data stored in the hierarchical model and factor the differences into a prediction of future resource utilization of a workload if the workload is reassigned from one managed node to another managed node, to accurately balance resource utilization in the data center 100 .
  • the orchestrator server 1520 may send self- test information to the sleds 400 to enable each sled 400 to locally (e.g., on the sled 400 ) determine whether telemetry data generated by the sled 400 satisfies one or more conditions (e.g., an available capacity that satisfies a predefined threshold, a temperature that satisfies a predefined threshold, etc.). Each sled 400 may then report back a simplified result (e.g., yes or no) to the orchestrator server 1520 , which the orchestrator server 1520 may utilize in determining the allocation of resources to managed nodes.
  • a simplified result e.g., yes or no
  • a system 1600 for bandwidth allocation may be implemented in accordance with the data center 100 described above with reference to FIGS. 1-15 .
  • the system 1600 includes a resource manager server 1602 and multiple sleds 1610 , 1612 , 1614 , 1616 , 1618 , 1620 in communication over a network using multiple switches 1604 , 1606 , 1608 .
  • Each of the resource manager server 1602 and the sleds 1610 , 1612 , 1614 , 1616 , 1618 , 1620 may be embodied as server computer, a rack server, a blade server, a compute node, and/or a sled in a data center, such as a sled 400 as described above in connection with FIGS. 1-15 or another sled of the data center.
  • the network elements of the system 1600 are organized into a network topology.
  • the sleds 1610 , 1612 , 1614 may be organized into a rack and each connected to the switch 1606 , which may be embodied as a top-of-rack switch, middle-of-rack switch, end-of-row switch, or other switch device.
  • the sleds 1616 , 1618 , 1620 are connected to the switch 1608 .
  • the switches 1606 , 1608 are in turn connected to the switch 1604 , which may be embodied as a data center domain switch or other upstream switch.
  • the resource manager server 1602 is illustrated as being connected to the upstream switch 1604 , however, in other embodiments it may be connected to any other location in the network topology.
  • the switches 1604 , 1606 , 1608 are organized into multiple layers, and sending data across layers may add switching latency, queuing latency, or other latencies.
  • the resource manager server 1602 is illustrated as a single server computing device, in some embodiments, the resource manager server 1602 may be embodied as a “virtual server” formed from multiple computing devices distributed across the system 1600 and/or operating in a public or private cloud. Accordingly, although the resource manager server 1602 is illustrated in FIG. 16 and described below as embodied as a single server computing device, it should be appreciated that the resource manager server 1602 may be embodied as multiple devices cooperating together to facilitate the functionality described below.
  • the resource manager server 1602 may discover the network topology of the system 1600 and construct a model of resource oversubscription in the system 1600 .
  • Resource oversubscription may include network uplink oversubscription, storage resource oversubscription, or any other circumstance in which the aggregate bandwidth or other demand generated by the sleds exceeds the available bandwidth or other capacity of the system 1600 .
  • the resource manager server 1602 may determine bandwidth limits for each sled or other network element of the system 1600 and program those bandwidth limits to the network elements. Each network element enforces the programmed bandwidth limits, which may reduce network congestion. By reducing congestion, the system 1600 may eliminate or reduce queuing latency for each layer of switches.
  • bandwidth limits for a storage sled 1610 may ensure that non-volatile memory express (NVMe) over Ethernet data traffic generated by the storage sled 1610 (and other storage sleds) does not exceed available upstream bandwidth. Accordingly, the system 1600 may improve network latency and reduce network congestion, without implementing expensive bandwidth reservation mechanisms at the switch level.
  • NVMe non-volatile memory express
  • the computing device 1700 may be the resource manager server 1602 , a sled 400 , a storage sled 1200 , 1610 , 1614 , 1616 , 1620 , an accelerator sled 1000 , a memory sled 1400 , a compute sled 800 , 1612 , 1618 , and/or a similar server computing device. As shown in FIG. 17 , an illustrative computing device 1700 is shown.
  • the computing device 1700 may be the resource manager server 1602 , a sled 400 , a storage sled 1200 , 1610 , 1614 , 1616 , 1620 , an accelerator sled 1000 , a memory sled 1400 , a compute sled 800 , 1612 , 1618 , and/or a similar server computing device. As shown in FIG.
  • the computing device 1700 illustratively includes a processor 1720 , an input/output subsystem 1722 , a memory 1724 , a data storage device 1726 , a communication subsystem 1728 , and/or other components and devices commonly found in a sled 400 , a storage sled 1200 , 1610 , 1614 , 1616 , 1620 , an accelerator sled 1000 , a memory sled 1400 , a compute sled 800 , 1612 , 1618 , and/or a similar server computing device.
  • the computing device 1700 may include other or additional components, such as those commonly found in a server computer (e.g., various input/output devices), in other embodiments.
  • one or more of the illustrative components may be incorporated in, or otherwise form a portion of, another component.
  • the memory 1724 or portions thereof, may be incorporated in the processor 1720 in some embodiments.
  • the processor 1720 may be embodied as any type of processor capable of performing the functions described herein.
  • the processor 1720 may be embodied as a single or multi-core processor(s), digital signal processor, microcontroller, or other processor or processing/controlling circuit.
  • the memory 1724 may be embodied as any type of volatile or non-volatile memory or data storage capable of performing the functions described herein. In operation, the memory 1724 may store various data and software used during operation of the computing device 1700 such operating systems, applications, programs, libraries, and drivers.
  • the memory 1724 is communicatively coupled to the processor 1720 via the I/O subsystem 1722 , which may be embodied as circuitry and/or components to facilitate input/output operations with the processor 1720 , the memory 1724 , and other components of the computing device 1700 .
  • the I/O subsystem 1722 may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, sensor hubs, firmware devices, communication links (i.e., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.) and/or other components and subsystems to facilitate the input/output operations.
  • the I/O subsystem 1722 may form a portion of a system-on-a-chip (SoC) and be incorporated, along with the processor 1720 , the memory 1724 , and other components of the computing device 1700 , on a single integrated circuit chip.
  • SoC system-on-a-chip
  • the data storage device 1726 may be embodied as any type of device or devices configured for short-term or long-term storage of data such as, for example, memory devices and circuits, memory cards, hard disk drives, solid-state drives, non-volatile flash memory, or other data storage devices.
  • the computing device 1700 may also include a communications subsystem 1728 , which may be embodied as any communication circuit, device, or collection thereof, capable of enabling communications between the computing device 1700 and other remote devices over a computer network (not shown).
  • the communications subsystem 1728 may be configured to use any one or more communication technology (e.g., wired or wireless communications) and associated protocols (e.g., Ethernet, InfiniBand®, Bluetooth®, Wi-Fi®, WiMAX, 3G, 4G LTE, etc.) to effect such communication.
  • the communication subsystem 1728 may include a network interface controller (NIC) 1330 .
  • NIC network interface controller
  • the illustrative communications subsystem 1728 includes a network interface controller (NIC) 1330 .
  • the NIC 1730 may be embodied as one or more add-in-boards, daughtercards, controller chips, chipsets, circuits, or other devices that may be used by the computing device 1700 for network communications with remote devices.
  • the NIC 1730 may be embodied as an expansion card coupled to the I/O subsystem 1722 over an expansion bus such as PCI Express.
  • the NIC 1730 may be embodied as a network controller, host fabric interface, or other component integrated with the I/O subsystem 1722 , the processor 1720 , an SoC, and/or one or more other components of the computing device 1700 .
  • the computing device 1700 may also include one or more peripheral devices 1732 .
  • the peripheral devices 1732 may include any number of additional input/output devices, interface devices, and/or other peripheral devices.
  • the peripheral devices 1732 may include a display, touch screen, graphics circuitry, keyboard, mouse, speaker system, microphone, network interface, and/or other input/output devices, interface devices, and/or peripheral devices.
  • the resource manager server 1602 establishes an environment 1800 during operation.
  • the illustrative environment 1800 includes a topology manager 1802 , a model constructor 1804 , a bandwidth limit determiner 1806 , a bandwidth limit programmer 1808 , and a utilization manager 1810 .
  • the various components of the environment 1800 may be embodied as hardware, firmware, software, or a combination thereof.
  • one or more of the components of the environment 1800 may be embodied as circuitry or collection of electrical devices (e.g., topology manager circuitry 1802 , model constructor circuitry 1804 , bandwidth limit determiner circuitry 1806 , bandwidth limit programmer circuitry 1808 , and/or utilization manager circuitry 1810 ).
  • electrical devices e.g., topology manager circuitry 1802 , model constructor circuitry 1804 , bandwidth limit determiner circuitry 1806 , bandwidth limit programmer circuitry 1808 , and/or utilization manager circuitry 1810 ).
  • one or more of the topology manager circuitry 1802 , the model constructor circuitry 1804 , the bandwidth limit determiner circuitry 1806 , the bandwidth limit programmer circuitry 1808 , and/or the utilization manager circuitry 1810 may form a portion of the processor 1720 , the I/O subsystem 1722 , the NIC 1730 , and/or other components of the resource manager server 1602 . Additionally, in some embodiments, one or more of the illustrative components may form a portion of another component and/or one or more of the illustrative components may be independent of one another.
  • the topology manager 1802 is configured to discover the topology of the sleds coupled to a layer of switches that are communicatively coupled to the resource manager server 1602 .
  • the model constructor 1804 is configured to construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology. Constructing the model may include identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • the bandwidth limit determiner 1806 is configured to determine an oversubscription of the network based on the model of network connectivity. The oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the sleds. The bandwidth limit determiner 1806 may determine a network uplink oversubscription for the layer of switches or may determine a storage resource oversubscription of the sleds. The bandwidth limit determiner 1806 is further configured to determine a bandwidth limit for each sled based on the oversubscription. The bandwidth limit programmer 1808 is configured to program each sled with the corresponding bandwidth limit. The bandwidth limit programmer 1808 may communicate the bandwidth limit to the NIC 1730 of the corresponding sled.
  • the utilization manager 1810 is configured to monitor a bandwidth utilization of the sleds. Monitoring the bandwidth utilization may include receiving telemetry data from the sleds that is indicative of the bandwidth utilized by each sled. The utilization manager 1810 is further configured to determine whether the network is congested based on the bandwidth utilization of the plurality of sleds. For example, determining whether the network is congested may include determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time. In some embodiments, determining whether the network is congested may include monitoring bandwidth per class of network traffic, such as NVMe over Ethernet traffic, field-programmable gate array (FPGA) over Ethernet traffic, storage traffic, and/or other traffic classes.
  • FPGA field-programmable gate array
  • Each traffic class may be independently monitored with its own queue depth controls. Further, bandwidth may be limited at the source or target, or in some embodiments based on source and target pair combinations.
  • the utilization manager 1810 is further configured to modify a bandwidth limit in response to determining that the network is congested. The bandwidth limit may be reduced for each sled that is associated with a high input rate flow.
  • a storage sled 1610 establishes an environment 1900 during operation. It should be understood that the environment 1900 may also be established by other sleds of the system 1600 .
  • the illustrative environment 1900 includes a bandwidth limit manager 1904 , a bandwidth programmer 1906 , and a telemetry data manager 1908 .
  • the various components of the environment 1900 may be embodied as hardware, firmware, software, or a combination thereof. As such, in some embodiments, one or more of the components of the environment 1900 may be embodied as circuitry or collection of electrical devices (e.g., bandwidth limit manager circuitry 1904 , bandwidth programmer circuitry 1906 , and/or telemetry data manager circuitry 1908 ).
  • one or more of the bandwidth limit manager circuitry 1904 , the bandwidth programmer circuitry 1906 , and/or the telemetry data manager circuitry 1908 may form a portion of the processor 1720 , the I/O subsystem 1722 , the NIC 1730 , and/or other components of the storage sled 1610 . Additionally, in some embodiments, one or more of the illustrative components may form a portion of another component and/or one or more of the illustrative components may be independent of one another.
  • the bandwidth programmer 1906 is configured to receive a bandwidth limit for the sled from the resource manager server 1602 and to program the bandwidth limit to the NIC 1730 of the sled.
  • the bandwidth limit manager 1904 is configured to enforce, by the NIC 1730 , the bandwidth limit in response to programming the bandwidth limit.
  • the telemetry data manager 1908 is configured to send telemetry data indicative of utilization of the NIC 1730 to the resource manager server 1602 .
  • the telemetry data may be sent by the NIC 1730 .
  • the telemetry data may indicative of a NIC queue depth and/or or a network stack queue depth.
  • the resource manager server 1602 may execute a method 2000 for bandwidth allocation. It should be appreciated that, in some embodiments, the operations of the method 2000 may be performed by one or more components of the environment 1800 of the resource manager server 1602 as shown in FIG. 18 .
  • the method 2000 begins in block 2002 , in which the resource manager server 1602 discovers the network topology of the components of the system 1600 .
  • the topology may be predetermined at design time of the system 1600 or, in some embodiments, may be discovered using a topology discovery protocol or other discovery technique.
  • the resource manager server 1602 may discover sleds, racks, switches, and network connections of the system 1600 . For example, the resource manager server 1602 may identify that a sled is connected to a particular port of a switch. As another example, the resource manager server 1602 may identify that a port of a switch is connected to a particular port of an upstream switch.
  • the resource manager server 1602 constructs a model of network connectivity between the components of the system 1600 .
  • the model may identify network connections and the associated available bandwidth between sleds, switches, and other network elements of the system 1600 .
  • the resource manager server 1602 determines oversubscription of the system 1600 based on the model of network connectivity. As described above, the system 1600 may be organized in layers, and each layer may have a maximum amount of available bandwidth or other resources. Oversubscription may exist if the total maximum bandwidth or other resource demand of a layer exceeds the available bandwidth or other resources of a higher layer. In some embodiments, in block 2010 , the resource manager server 1602 may determine network uplink oversubscription. For example, as shown in FIG. 16 , the sleds 1610 , 1612 , 1614 are connected to the switch 1606 .
  • Oversubscription may exist if the maximum bandwidth used by the sleds 1610 , 1612 , 1614 in combination exceeds the available bandwidth of the uplink from the switch 1606 to the switch 1604 .
  • oversubscription may exist if the maximum bandwidth used by the sleds 1616 , 1618 , 1620 exceeds the available bandwidth of the uplink from the switch 1608 to the switch 1604 .
  • the resource manager server 1602 may determine storage resource oversubscription. For example, oversubscription may exist if demand for storage resources of a sled (e.g., the storage sled 1610 ) exceeds the available bandwidth or other resources of that sled.
  • the resource manager server 1602 determines bandwidth limits for each sled in the system 1600 based on the oversubscription.
  • the bandwidth limits may be determined in order to prevent or reduce network congestion in the system 1600 .
  • the bandwidth limits for sleds 1610 , 1612 , 1614 may be set so that the combined bandwidth limits are less than or equal to the uplink bandwidth from the switch 1606 to the switch 1604 .
  • the resource manager server 1602 programs each sled with the corresponding bandwidth limit. After being programmed, each sled enforces the bandwidth limits, as described further below in connection with FIG. 21 .
  • the resource manager server 1602 may use any technique to program the sled.
  • the resource manager server 1602 may program the NIC 1730 of the sled with the bandwidth limit. For example, the resource manager server 1602 may communicate out-of-band or otherwise communicate with the NIC 1730 without invoking the operating system or other software networking stack of the sled.
  • the resource manager server 1602 may receive bandwidth telemetry from the sleds of the system 1600 .
  • the bandwidth telemetry may indicate the current bandwidth usage of the sled and/or whether the associated network connection is congested.
  • the bandwidth telemetry may indicate queue depth of the NIC 1730 , the associated switch port, and/or the networking stack of the sled.
  • the resource manager server 1602 identifies network congestion based on the telemetry.
  • the resource manager server 1602 may use any appropriate algorithm to identify dropped packets, increased latency, or otherwise identify the network congestion.
  • the resource manager server 1602 may determine whether any queue depth in the system exceeds a predetermined threshold queue depth for longer than a predetermined time. For example, the resource manager server 1602 may analyze the queue depth of a NIC 1730 , a switch port, and/or a networking stack of a sled.
  • the resource manager server 1602 determines whether congestion has been detected. If not, the method 2000 loops back to block 2020 to continue monitoring network utilization. If congestion is detected, the method 2000 advances to block 2028 .
  • the resource manager server 1602 modifies one or more bandwidth limits to reduce or eliminate the congestion.
  • the resource manager server 1602 may identify one or more high-input rate flows in the system 1600 . For example, one or more storage sleds 1610 generating NVMe over Ethernet data may generate high-input rate flows. The resource manager server 1602 may reduce the input rate bandwidth limit associated with the high-input rate flows. Additionally or alternatively, in some embodiments the resource manager server 1602 may generate one or more alerts concerning the congestion, and a network administrator may provide modified bandwidth limits. In some embodiments, alternate network routes may be possible. If alternate routes are possible, based on the congestion telemetry data, different bandwidth limits may be set for different routes to reduce the congestion rate. After modifying the bandwidth limits, the method 2000 loops back to block 2016 to program the sleds with the modified bandwidth limits and continue monitoring network utilization.
  • a storage sled 1610 may execute a method 2100 for bandwidth allocation. It should be appreciated that, in some embodiments, the operations of the method 2100 may be performed by one or more components of the environment 1900 of the storage sled 1610 as shown in FIG. 19 .
  • the method 2100 begins in block 2102 , in which the storage sled 1610 determines whether an update to a bandwidth limit has been received from the resource manager server 1602 . As described above in connection with FIG. 20 , the resource manager server 1602 may program the bandwidth limit to the storage sled 1610 in response to modeling network connectivity and determining an oversubscription of the system 1600 and/or in response to detecting network congestion based on telemetry data. If an update to the bandwidth limit has not been received, the method 2100 branches ahead to block 2108 , described below. If an update to the bandwidth limit has been received, the method 2100 advances to block 2104 .
  • the storage sled 1610 programs one or more network interface controllers (NICs) 1330 of the storage sled with the new bandwidth limit.
  • the NIC 1730 may throttle or otherwise limit bandwidth used by the storage sled 1610 to below the bandwidth limit.
  • the storage sled 1610 may set a maximum input bandwidth for the NIC 1730 .
  • the bandwidth limits may limit the amount of data (e.g., NVMe over Ethernet data) generated by the storage sled 1610 and submitted to the switch 1606 .
  • bandwidth limits may be enforced by other components of the storage sled 1610 , such as an operating system, software networking stack, NVMe over Ethernet subsystem, or other component.
  • the storage sled 1610 determines whether to send telemetry data to the resource manager server 1602 .
  • the storage sled 1610 may be configured by an administrator to send telemetry data.
  • the storage sled 1610 may send telemetry data in response to certain events, for example in response to detected network congestion. If the storage sled 1610 determines not to send telemetry data, the method 2100 loops back to block 2102 to continue monitoring for updated bandwidth limits. If the storage sled 1610 determines to send telemetry data, the method 2100 advances to block 2110 .
  • the storage sled 1610 sends bandwidth telemetry data to the resource manager server 1602 .
  • the bandwidth telemetry may indicate the current bandwidth usage of the sled and/or whether the associated network connection is congested.
  • the bandwidth telemetry may indicate queue depth of the NIC 1730 , the associated switch port, and/or the network stack of the sled.
  • the storage sled 1610 may retrieve the telemetry data from the NIC 1730 of the storage sled 1610 .
  • an operating system, software networking stack, or other component of the storage sled 1610 may retrieve telemetry data from the NIC 1730 .
  • the storage sled 1610 may send the telemetry data from the NIC 1730 to the resource manager server 1602 .
  • the NIC 1730 may send the telemetry data out-of-band or otherwise without the involvement of the operating system, software networking stack, or other components of the storage sled 1610 .
  • the method 2100 loops back to block 2102 to continue monitoring for updated bandwidth limits.
  • An embodiment of the technologies disclosed herein may include any one or more, and any combination of, the examples described below.
  • Example 1 includes a resource manager server for bandwidth allocation, the resource manager server comprising: one or more processors; and one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the resource manager server to: discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; determine an oversubscription of a network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and program each sled of the plurality of sleds with the corresponding bandwidth limit.
  • the resource manager server comprising: one or more processors; and one or more memory devices having stored therein a plurality of instructions
  • Example 2 includes the subject matter of Example 1, and wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 3 includes the subject matter of any of Examples 1 and 2, and wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
  • Example 4 includes the subject matter of any of Examples 1-3, and wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
  • Example 5 includes the subject matter of any of Examples 1-4, and wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 6 includes the subject matter of any of Examples 1-5, and wherein the one or more memory devices have stored therein a plurality of instructions that, when executed by the one or more processors, further cause the resource manager server to: monitor a bandwidth utilization of the plurality of sleds; determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modify a bandwidth limit in response to a determination that the network is congested.
  • Example 7 includes the subject matter of any of Examples 1-6, and wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 8 includes the subject matter of any of Examples 1-7, and wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 9 includes the subject matter of any of Examples 1-8, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 10 includes the subject matter of any of Examples 1-9, and wherein to modify the bandwidth limit comprises to: identify a first sled of the plurality of sleds associated with a high input rate flow; and reduce an input rate of the bandwidth limit for the first sled.
  • Example 11 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server on a network, the sled comprising: one or more processors; and one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the sled to: receive a bandwidth limit for the sled from the resource manager server; program the bandwidth limit to a network interface controller of the sled; and enforce, by the network interface controller, the bandwidth limit in response to programming of the bandwidth limit.
  • Example 12 includes the subject matter of Example 11, and wherein the one or more memory devices have stored therein a plurality of instructions that, when executed by the one or more processors, further cause the sled to send telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 13 includes the subject matter of any of Examples 11 and 12, and wherein to send the telemetry data comprises to send the telemetry data by the network interface controller.
  • Example 14 includes the subject matter of any of Examples 11-13, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 15 includes a method for bandwidth allocation, the method comprising: discovering, by a resource manager server of a network, a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; constructing, by the resource manager server, a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; determining, by the resource manager server, an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; determining, by the resource manager server, a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and programming, by the resource manager server, each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 16 includes the subject matter of Example 15, and wherein constructing the model of network connectivity comprises identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 17 includes the subject matter of any of Examples 15 and 16, and wherein determining the oversubscription comprises determining a network uplink oversubscription for the layer of switches.
  • Example 18 includes the subject matter of any of Examples 15-17, and wherein determining the oversubscription comprises determining a storage resource oversubscription of the plurality of sleds.
  • Example 19 includes the subject matter of any of Examples 15-18, and wherein programming the bandwidth limit for each sled comprises communicating the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 20 includes the subject matter of any of Examples 15-19, and further comprising: monitoring, by the resource manager server, a bandwidth utilization of the plurality of sleds; determining, by the resource manager server, whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modifying, by the resource manager server, a bandwidth limit in response to determining that the network is congested.
  • Example 21 includes the subject matter of any of Examples 15-20, and wherein monitoring the bandwidth utilization of the plurality of sleds comprises receiving telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 22 includes the subject matter of any of Examples 15-21, and wherein determining whether the network is congested comprises determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 23 includes the subject matter of any of Examples 15-22, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 24 includes the subject matter of any of Examples 15-23, and wherein modifying the bandwidth limit comprises: identifying a first sled of the plurality of sleds associated with a high input rate flow; and reducing an input rate of the bandwidth limit for the first sled.
  • Example 25 includes a method for bandwidth allocation, the method comprising: receiving, by a sled of a plurality of sleds communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server in a network, a bandwidth limit for the sled from the resource manager server; programming, by the sled, the bandwidth limit to a network interface controller of the sled; and enforcing, by the network interface controller of the sled, the bandwidth limit in response to programming the bandwidth limit.
  • Example 26 includes the subject matter of Example 25, and further comprising sending, by the sled, telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 27 includes the subject matter of any of Examples 25 and 26, and wherein sending the telemetry data comprises sending the telemetry data by the network interface controller.
  • Example 28 includes the subject matter of any of Examples 25-27, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 29 includes a computing device comprising: a processor; and a memory having stored therein a plurality of instructions that when executed by the processor cause the computing device to perform the method of any of Examples 15-28.
  • Example 30 includes one or more non-transitory, computer readable storage media comprising a plurality of instructions stored thereon that in response to being executed result in a computing device performing the method of any of Examples 15-28.
  • Example 31 includes a computing device comprising means for performing the method of any of Examples 15-28.
  • Example 32 includes a resource manager server for bandwidth allocation, the resource manager server comprising: topology manager circuitry to discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; model constructer circuitry to construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; bandwidth limit determiner circuitry to (i) determine an oversubscription of a network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds, and (ii) determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and bandwidth limit programmer circuitry to program each sled of the plurality of sleds with the corresponding bandwidth limit.
  • topology manager circuitry to discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to
  • Example 33 includes the subject matter of Example 32, and wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 34 includes the subject matter of any of Examples 32 and 33, and wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
  • Example 35 includes the subject matter of any of Examples 32-34, and wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
  • Example 36 includes the subject matter of any of Examples 32-35, and wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 37 includes the subject matter of any of Examples 32-36, and further comprising utilization manager circuitry to: monitor a bandwidth utilization of the plurality of sleds; determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modify a bandwidth limit in response to a determination that the network is congested.
  • Example 38 includes the subject matter of any of Examples 32-37, and wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 39 includes the subject matter of any of Examples 32-38, and wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 40 includes the subject matter of any of Examples 32-39, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 41 includes the subject matter of any of Examples 32-40, and wherein to modify the bandwidth limit comprises to: identify a first sled of the plurality of sleds associated with a high input rate flow; and reduce an input rate of the bandwidth limit for the first sled.
  • Example 42 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that communicatively coupled to a resource manager server on a network, the sled comprising: bandwidth programmer circuitry to: (i) receive a bandwidth limit for the sled from the resource manager server, and (ii) program the bandwidth limit to a network interface controller of the sled; and bandwidth limit manager circuitry to enforce, by the network interface controller, the bandwidth limit in response to programming of the bandwidth limit.
  • Example 43 includes the subject matter of Example 42, and further comprising telemetry data manager circuitry to send telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 44 includes the subject matter of any of Examples 42 and 43, and wherein to send the telemetry data comprises to send the telemetry data by the network interface controller.
  • Example 45 includes the subject matter of any of Examples 42-44, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 46 includes a resource manager server for bandwidth allocation, the resource manager server comprising: means for discovering a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server in a network; means for constructing a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; means for determining an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; means for determining a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and means for programming each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 47 includes the subject matter of Example 46, and wherein the means for constructing the model of network connectivity comprises means for identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 48 includes the subject matter of any of Examples 46 and 47, and wherein the means for determining the oversubscription comprises means for determining a network uplink oversubscription for the layer of switches.
  • Example 49 includes the subject matter of any of Examples 46-48, and wherein the means for determining the oversubscription comprises means for determining a storage resource oversubscription of the plurality of sleds.
  • Example 50 includes the subject matter of any of Examples 46-49, and wherein the means for programming the bandwidth limit for each sled comprises circuitry for communicating the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 51 includes the subject matter of any of Examples 46-50, and further comprising: means for monitoring a bandwidth utilization of the plurality of sleds; means for determining whether the network is congested based on the bandwidth utilization of the plurality of sleds; and means for modifying a bandwidth limit in response to determining that the network is congested.
  • Example 52 includes the subject matter of any of Examples 46-51, and wherein the means for monitoring the bandwidth utilization of the plurality of sleds comprises circuitry for receiving telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 53 includes the subject matter of any of Examples 46-52, and wherein the means for determining whether the network is congested comprises means for determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 54 includes the subject matter of any of Examples 46-53, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 55 includes the subject matter of any of Examples 46-54, and wherein the means for modifying the bandwidth limit comprises: means for identifying a first sled of the plurality of sleds associated with a high input rate flow; and means for reducing an input rate of the bandwidth limit for the first sled.
  • Example 56 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server on a network, the sled comprising: circuitry for receiving a bandwidth limit for the sled from the resource manager server; means for programming the bandwidth limit to a network interface controller of the sled; and means for enforcing, by the network interface controller of the sled, the bandwidth limit in response to programming the bandwidth limit.
  • Example 57 includes the subject matter of Example 56, and further comprising means for sending telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 58 includes the subject matter of any of Examples 56 and 57, and wherein the means for sending the telemetry data comprises means for sending the telemetry data by the network interface controller.
  • Example 59 includes the subject matter of any of Examples 56-58, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.

Abstract

Technologies for congestion management include multiple storage sleds, compute sleds, and other computing devices in communication with a resource manager server. The resource manager server discovers the topology of the sleds and one or more layers of network switches that connect the sleds. The resource manager server constructs a model of network connectivity between the sleds and the switches based on the topology, and determines an oversubscription of the network based on the model. The oversubscription is based on available bandwidth for the layer of switches and maximum potential bandwidth used by the sleds. The resource manager server determines bandwidth limits for each sled and programs each sled with the corresponding bandwidth limit. Each sled enforces the programmed bandwidth limit. Other embodiments are described and claimed.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • The present application claims the benefit Indian Provisional Patent Application No. 2017410306 32, filed Aug. 30, 2017, and U.S. Provisional Patent Application No. 62/584,401, filed Nov. 10, 2017.
  • BACKGROUND
  • Datacenters and other large computer networks typically include multiple layers of switches. For example, servers may be installed in racks, and each server in a rack may be connected to a top-of-rack switch. Multiple top-of-rack switches may be connected to an upstream switch, and so on. Therefore, communicating between servers or other nodes in different racks may require traversing multiple switch layers. Traversing each layer of switches may introduce queuing latency.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The concepts described herein are illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. Where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements.
  • FIG. 1 is a simplified diagram of at least one embodiment of a data center for executing workloads with disaggregated resources;
  • FIG. 2 is a simplified diagram of at least one embodiment of a pod of the data center of FIG. 1;
  • FIG. 3 is a perspective view of at least one embodiment of a rack that may be included in the pod of FIG. 2;
  • FIG. 4 is a side plan elevation view of the rack of FIG. 3;
  • FIG. 5 is a perspective view of the rack of FIG. 3 having a sled mounted therein;
  • FIG. 6 is a is a simplified block diagram of at least one embodiment of a top side of the sled of FIG. 5;
  • FIG. 7 is a simplified block diagram of at least one embodiment of a bottom side of the sled of FIG. 6;
  • FIG. 8 is a simplified block diagram of at least one embodiment of a compute sled usable in the data center of FIG. 1;
  • FIG. 9 is a top perspective view of at least one embodiment of the compute sled of FIG. 8;
  • FIG. 10 is a simplified block diagram of at least one embodiment of an accelerator sled usable in the data center of FIG. 1;
  • FIG. 11 is a top perspective view of at least one embodiment of the accelerator sled of FIG. 10;
  • FIG. 12 is a simplified block diagram of at least one embodiment of a storage sled usable in the data center of FIG. 1;
  • FIG. 13 is a top perspective view of at least one embodiment of the storage sled of FIG. 12;
  • FIG. 14 is a simplified block diagram of at least one embodiment of a memory sled usable in the data center of FIG. 1; and
  • FIG. 15 is a simplified block diagram of a system that may be established within the data center of FIG. 1 to execute workloads with managed nodes composed of disaggregated resources.
  • FIG. 16 is a simplified block diagram of an at least one embodiment of a system for bandwidth allocation;
  • FIG. 17 is a simplified block diagram of at least one embodiment of a computing device of FIG. 16;
  • FIG. 18 is a simplified block diagram of at least one embodiment of an environment of the resource manager of FIGS. 16 and 17;
  • FIG. 19 is a simplified block diagram of at least one embodiment of an environment of a sled of FIGS. 16 and 17;
  • FIG. 20 is a simplified flow diagram of at least one embodiment of a method for bandwidth allocation that may be executed by the resource manager server of FIGS. 16-18; and
  • FIG. 21 is a simplified flow diagram of at least one embodiment of a method for bandwidth allocation that may be executed by the sled of FIGS. 16-17 and 19.
  • DETAILED DESCRIPTION OF THE DRAWINGS
  • While the concepts of the present disclosure are susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and will be described herein in detail. It should be understood, however, that there is no intent to limit the concepts of the present disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives consistent with the present disclosure and the appended claims.
  • References in the specification to “one embodiment,” “an embodiment,” “an illustrative embodiment,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may or may not necessarily include that particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. Additionally, it should be appreciated that items included in a list in the form of “at least one A, B, and C” can mean (A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C). Similarly, items listed in the form of “at least one of A, B, or C” can mean (A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and C).
  • The disclosed embodiments may be implemented, in some cases, in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented as instructions carried by or stored on a transitory or non-transitory machine-readable (e.g., computer-readable) storage medium, which may be read and executed by one or more processors. A machine-readable storage medium may be embodied as any storage device, mechanism, or other physical structure for storing or transmitting information in a form readable by a machine (e.g., a volatile or non-volatile memory, a media disc, or other media device).
  • In the drawings, some structural or method features may be shown in specific arrangements and/or orderings. However, it should be appreciated that such specific arrangements and/or orderings may not be required. Rather, in some embodiments, such features may be arranged in a different manner and/or order than shown in the illustrative figures. Additionally, the inclusion of a structural or method feature in a particular figure is not meant to imply that such feature is required in all embodiments and, in some embodiments, may not be included or may be combined with other features.
  • Referring now to FIG. 1, a data center 100 in which disaggregated resources may cooperatively execute one or more workloads (e.g., applications on behalf of customers) includes multiple pods 110, 120, 130, 140, each of which includes one or more rows of racks. As described in more detail herein, each rack houses multiple sleds, which each may be embodied as a compute device, such as a server, that is primarily equipped with a particular type of resource (e.g., memory devices, data storage devices, accelerator devices, general purpose processors). In the illustrative embodiment, the sleds in each pod 110, 120, 130, 140 are connected to multiple pod switches (e.g., switches that route data communications to and from sleds within the pod). The pod switches, in turn, connect with spine switches 150 that switch communications among pods (e.g., the pods 110, 120, 130, 140) in the data center 100. In some embodiments, the sleds may be connected with a fabric using Intel Omni-Path technology. As described in more detail herein, resources within sleds in the data center 100 may be allocated to a group (referred to herein as a “managed node”) containing resources from one or more other sleds to be collectively utilized in the execution of a workload. The workload can execute as if the resources belonging to the managed node were located on the same sled. The resources in a managed node may even belong to sleds belonging to different racks, and even to different pods 110, 120, 130, 140. Some resources of a single sled may be allocated to one managed node while other resources of the same sled are allocated to a different managed node (e.g., one processor assigned to one managed node and another processor of the same sled assigned to a different managed node). By disaggregating resources to sleds comprised predominantly of a single type of resource (e.g., compute sleds comprising primarily compute resources, memory sleds containing primarily memory resources), and selectively allocating and deallocating the disaggregated resources to form a managed node assigned to execute a workload, the data center 100 provides more efficient resource usage over typical data centers comprised of hyperconverged servers containing compute, memory, storage and perhaps additional resources). As such, the data center 100 may provide greater performance (e.g., throughput, operations per second, latency, etc.) than a typical data center that has the same number of resources.
  • Referring now to FIG. 2, the pod 110, in the illustrative embodiment, includes a set of rows 200, 210, 220, 230 of racks 240. Each rack 240 may house multiple sleds (e.g., sixteen sleds) and provide power and data connections to the housed sleds, as described in more detail herein. In the illustrative embodiment, the racks in each row 200, 210, 220, 230 are connected to multiple pod switches 250, 260. The pod switch 250 includes a set of ports 252 to which the sleds of the racks of the pod 110 are connected and another set of ports 254 that connect the pod 110 to the spine switches 150 to provide connectivity to other pods in the data center 100. Similarly, the pod switch 260 includes a set of ports 262 to which the sleds of the racks of the pod 110 are connected and a set of ports 264 that connect the pod 110 to the spine switches 150. As such, the use of the pair of switches 250, 260 provides an amount of redundancy to the pod 110. For example, if either of the switches 250, 260 fails, the sleds in the pod 110 may still maintain data communication with the remainder of the data center 100 (e.g., sleds of other pods) through the other switch 250, 260. Furthermore, in the illustrative embodiment, the switches 150, 250, 260 may be embodied as dual-mode optical switches, capable of routing both Ethernet protocol communications carrying Internet Protocol (IP) packets and communications according to a second, high-performance link-layer protocol (e.g., Intel's Omni-Path Architecture's, Infiniband) via optical signaling media of an optical fabric.
  • It should be appreciated that each of the other pods 120, 130, 140 (as well as any additional pods of the data center 100) may be similarly structured as, and have components similar to, the pod 110 shown in and described in regard to FIG. 2 (e.g., each pod may have rows of racks housing multiple sleds as described above). Additionally, while two pod switches 250, 260 are shown, it should be understood that in other embodiments, each pod 110, 120, 130, 140 may be connected to different number of pod switches (e.g., providing even more failover capacity).
  • Referring now to FIGS. 3-5, each illustrative rack 240 of the data center 100 includes two elongated support posts 302, 304, which are arranged vertically. For example, the elongated support posts 302, 304 may extend upwardly from a floor of the data center 100 when deployed. The rack 240 also includes one or more horizontal pairs 310 of elongated support arms 312 (identified in FIG. 3 via a dashed ellipse) configured to support a sled of the data center 100 as discussed below. One elongated support arm 312 of the pair of elongated support arms 312 extends outwardly from the elongated support post 302 and the other elongated support arm 312 extends outwardly from the elongated support post 304.
  • In the illustrative embodiments, each sled of the data center 100 is embodied as a chassis-less sled. That is, each sled has a chassis-less circuit board substrate on which physical resources (e.g., processors, memory, accelerators, storage, etc.) are mounted as discussed in more detail below. As such, the rack 240 is configured to receive the chassis-less sleds. For example, each pair 310 of elongated support arms 312 defines a sled slot 320 of the rack 240, which is configured to receive a corresponding chassis-less sled. To do so, each illustrative elongated support arm 312 includes a circuit board guide 330 configured to receive the chassis-less circuit board substrate of the sled. Each circuit board guide 330 is secured to, or otherwise mounted to, a top side 332 of the corresponding elongated support arm 312. For example, in the illustrative embodiment, each circuit board guide 330 is mounted at a distal end of the corresponding elongated support arm 312 relative to the corresponding elongated support post 302, 304. For clarity of the Figures, not every circuit board guide 330 may be referenced in each Figure.
  • Each circuit board guide 330 includes an inner wall that defines a circuit board slot 380 configured to receive the chassis-less circuit board substrate of a sled 400 when the sled 400 is received in the corresponding sled slot 320 of the rack 240. To do so, as shown in FIG. 4, a user (or robot) aligns the chassis-less circuit board substrate of an illustrative chassis-less sled 400 to a sled slot 320. The user, or robot, may then slide the chassis-less circuit board substrate forward into the sled slot 320 such that each side edge 414 of the chassis-less circuit board substrate is received in a corresponding circuit board slot 380 of the circuit board guides 330 of the pair 310 of elongated support arms 312 that define the corresponding sled slot 320 as shown in FIG. 4. By having robotically accessible and robotically manipulable sleds comprising disaggregated resources, each type of resource can be upgraded independently of each other and at their own optimized refresh rate. Furthermore, the sleds are configured to blindly mate with power and data communication cables in each rack 240, enhancing their ability to be quickly removed, upgraded, reinstalled, and/or replaced. As such, in some embodiments, the data center 100 may operate (e.g., execute workloads, undergo maintenance and/or upgrades, etc.) without human involvement on the data center floor. In other embodiments, a human may facilitate one or more maintenance or upgrade operations in the data center 100.
  • It should be appreciated that each circuit board guide 330 is dual sided. That is, each circuit board guide 330 includes an inner wall that defines a circuit board slot 380 on each side of the circuit board guide 330. In this way, each circuit board guide 330 can support a chassis-less circuit board substrate on either side. As such, a single additional elongated support post may be added to the rack 240 to turn the rack 240 into a two-rack solution that can hold twice as many sled slots 320 as shown in FIG. 3. The illustrative rack 240 includes seven pairs 310 of elongated support arms 312 that define a corresponding seven sled slots 320, each configured to receive and support a corresponding sled 400 as discussed above. Of course, in other embodiments, the rack 240 may include additional or fewer pairs 310 of elongated support arms 312 (i.e., additional or fewer sled slots 320). It should be appreciated that because the sled 400 is chassis-less, the sled 400 may have an overall height that is different than typical servers. As such, in some embodiments, the height of each sled slot 320 may be shorter than the height of a typical server (e.g., shorter than a single rank unit, “1U”). That is, the vertical distance between each pair 310 of elongated support arms 312 may be less than a standard rack unit “1U.” Additionally, due to the relative decrease in height of the sled slots 320, the overall height of the rack 240 in some embodiments may be shorter than the height of traditional rack enclosures. For example, in some embodiments, each of the elongated support posts 302, 304 may have a length of six feet or less. Again, in other embodiments, the rack 240 may have different dimensions. Further, it should be appreciated that the rack 240 does not include any walls, enclosures, or the like. Rather, the rack 240 is an enclosure-less rack that is opened to the local environment. Of course, in some cases, an end plate may be attached to one of the elongated support posts 302, 304 in those situations in which the rack 240 forms an end-of-row rack in the data center 100.
  • In some embodiments, various interconnects may be routed upwardly or downwardly through the elongated support posts 302, 304. To facilitate such routing, each elongated support post 302, 304 includes an inner wall that defines an inner chamber in which the interconnect may be located. The interconnects routed through the elongated support posts 302, 304 may be embodied as any type of interconnects including, but not limited to, data or communication interconnects to provide communication connections to each sled slot 320, power interconnects to provide power to each sled slot 320, and/or other types of interconnects.
  • The rack 240, in the illustrative embodiment, includes a support platform on which a corresponding optical data connector (not shown) is mounted. Each optical data connector is associated with a corresponding sled slot 320 and is configured to mate with an optical data connector of a corresponding sled 400 when the sled 400 is received in the corresponding sled slot 320. In some embodiments, optical connections between components (e.g., sleds, racks, and switches) in the data center 100 are made with a blind mate optical connection. For example, a door on each cable may prevent dust from contaminating the fiber inside the cable. In the process of connecting to a blind mate optical connector mechanism, the door is pushed open when the end of the cable enters the connector mechanism. Subsequently, the optical fiber inside the cable enters a gel within the connector mechanism and the optical fiber of one cable comes into contact with the optical fiber of another cable within the gel inside the connector mechanism.
  • The illustrative rack 240 also includes a fan array 370 coupled to the cross-support arms of the rack 240. The fan array 370 includes one or more rows of cooling fans 372, which are aligned in a horizontal line between the elongated support posts 302, 304. In the illustrative embodiment, the fan array 370 includes a row of cooling fans 372 for each sled slot 320 of the rack 240. As discussed above, each sled 400 does not include any on-board cooling system in the illustrative embodiment and, as such, the fan array 370 provides cooling for each sled 400 received in the rack 240. Each rack 240, in the illustrative embodiment, also includes a power supply associated with each sled slot 320. Each power supply is secured to one of the elongated support arms 312 of the pair 310 of elongated support arms 312 that define the corresponding sled slot 320. For example, the rack 240 may include a power supply coupled or secured to each elongated support arm 312 extending from the elongated support post 302. Each power supply includes a power connector configured to mate with a power connector of the sled 400 when the sled 400 is received in the corresponding sled slot 320. In the illustrative embodiment, the sled 400 does not include any on-board power supply and, as such, the power supplies provided in the rack 240 supply power to corresponding sleds 400 when mounted to the rack 240.
  • Referring now to FIG. 6, the sled 400, in the illustrative embodiment, is configured to be mounted in a corresponding rack 240 of the data center 100 as discussed above. In some embodiments, each sled 400 may be optimized or otherwise configured for performing particular tasks, such as compute tasks, acceleration tasks, data storage tasks, etc. For example, the sled 400 may be embodied as a compute sled 800 as discussed below in regard to FIGS. 8-9, an accelerator sled 1000 as discussed below in regard to FIGS. 10-11, a storage sled 1200 as discussed below in regard to FIGS. 12-13, or as a sled optimized or otherwise configured to perform other specialized tasks, such as a memory sled 1400, discussed below in regard to FIG. 14.
  • As discussed above, the illustrative sled 400 includes a chassis-less circuit board substrate 602, which supports various physical resources (e.g., electrical components) mounted thereon. It should be appreciated that the circuit board substrate 602 is “chassis-less” in that the sled 400 does not include a housing or enclosure. Rather, the chassis-less circuit board substrate 602 is open to the local environment. The chassis-less circuit board substrate 602 may be formed from any material capable of supporting the various electrical components mounted thereon. For example, in an illustrative embodiment, the chassis-less circuit board substrate 602 is formed from an FR-4 glass-reinforced epoxy laminate material. Of course, other materials may be used to form the chassis-less circuit board substrate 602 in other embodiments.
  • As discussed in more detail below, the chassis-less circuit board substrate 602 includes multiple features that improve the thermal cooling characteristics of the various electrical components mounted on the chassis-less circuit board substrate 602. As discussed, the chassis-less circuit board substrate 602 does not include a housing or enclosure, which may improve the airflow over the electrical components of the sled 400 by reducing those structures that may inhibit air flow. For example, because the chassis-less circuit board substrate 602 is not positioned in an individual housing or enclosure, there is no backplane (e.g., a backplate of the chassis) to the chassis-less circuit board substrate 602, which could inhibit air flow across the electrical components. Additionally, the chassis-less circuit board substrate 602 has a geometric shape configured to reduce the length of the airflow path across the electrical components mounted to the chassis-less circuit board substrate 602. For example, the illustrative chassis-less circuit board substrate 602 has a width 604 that is greater than a depth 606 of the chassis-less circuit board substrate 602. In one particular embodiment, for example, the chassis-less circuit board substrate 602 has a width of about 21 inches and a depth of about 9 inches, compared to a typical server that has a width of about 17 inches and a depth of about 39 inches. As such, an airflow path 608 that extends from a front edge 610 of the chassis-less circuit board substrate 602 toward a rear edge 612 has a shorter distance relative to typical servers, which may improve the thermal cooling characteristics of the sled 400. Furthermore, although not illustrated in FIG. 6, the various physical resources mounted to the chassis-less circuit board substrate 602 are mounted in corresponding locations such that no two substantively heat-producing electrical components shadow each other as discussed in more detail below. That is, no two electrical components, which produce appreciable heat during operation (i.e., greater than a nominal heat sufficient enough to adversely impact the cooling of another electrical component), are mounted to the chassis-less circuit board substrate 602 linearly in-line with each other along the direction of the airflow path 608 (i.e., along a direction extending from the front edge 610 toward the rear edge 612 of the chassis-less circuit board substrate 602).
  • As discussed above, the illustrative sled 400 includes one or more physical resources 620 mounted to a top side 650 of the chassis-less circuit board substrate 602. Although two physical resources 620 are shown in FIG. 6, it should be appreciated that the sled 400 may include one, two, or more physical resources 620 in other embodiments. The physical resources 620 may be embodied as any type of processor, controller, or other compute circuit capable of performing various tasks such as compute functions and/or controlling the functions of the sled 400 depending on, for example, the type or intended functionality of the sled 400. For example, as discussed in more detail below, the physical resources 620 may be embodied as high-performance processors in embodiments in which the sled 400 is embodied as a compute sled, as accelerator co-processors or circuits in embodiments in which the sled 400 is embodied as an accelerator sled, storage controllers in embodiments in which the sled 400 is embodied as a storage sled, or a set of memory devices in embodiments in which the sled 400 is embodied as a memory sled.
  • The sled 400 also includes one or more additional physical resources 630 mounted to the top side 650 of the chassis-less circuit board substrate 602. In the illustrative embodiment, the additional physical resources include a network interface controller (NIC) as discussed in more detail below. Of course, depending on the type and functionality of the sled 400, the physical resources 630 may include additional or other electrical components, circuits, and/or devices in other embodiments.
  • The physical resources 620 are communicatively coupled to the physical resources 630 via an input/output (I/O) subsystem 622. The I/O subsystem 622 may be embodied as circuitry and/or components to facilitate input/output operations with the physical resources 620, the physical resources 630, and/or other components of the sled 400. For example, the I/O subsystem 622 may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, integrated sensor hubs, firmware devices, communication links (e.g., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.), and/or other components and subsystems to facilitate the input/output operations. In the illustrative embodiment, the I/O subsystem 622 is embodied as, or otherwise includes, a double data rate 4 (DDR4) data bus or a DDRS data bus.
  • In some embodiments, the sled 400 may also include a resource-to-resource interconnect 624. The resource-to-resource interconnect 624 may be embodied as any type of communication interconnect capable of facilitating resource-to-resource communications. In the illustrative embodiment, the resource-to-resource interconnect 624 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622). For example, the resource-to-resource interconnect 624 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to resource-to-resource communications.
  • The sled 400 also includes a power connector 640 configured to mate with a corresponding power connector of the rack 240 when the sled 400 is mounted in the corresponding rack 240. The sled 400 receives power from a power supply of the rack 240 via the power connector 640 to supply power to the various electrical components of the sled 400. That is, the sled 400 does not include any local power supply (i.e., an on-board power supply) to provide power to the electrical components of the sled 400. The exclusion of a local or on-board power supply facilitates the reduction in the overall footprint of the chassis-less circuit board substrate 602, which may increase the thermal cooling characteristics of the various electrical components mounted on the chassis-less circuit board substrate 602 as discussed above. In some embodiments, power is provided to the processors 820 through vias directly under the processors 820 (e.g., through the bottom side 750 of the chassis-less circuit board substrate 602), providing an increased thermal budget, additional current and/or voltage, and better voltage control over typical boards.
  • In some embodiments, the sled 400 may also include mounting features 642 configured to mate with a mounting arm, or other structure, of a robot to facilitate the placement of the sled 600 in a rack 240 by the robot. The mounting features 642 may be embodied as any type of physical structures that allow the robot to grasp the sled 400 without damaging the chassis-less circuit board substrate 602 or the electrical components mounted thereto. For example, in some embodiments, the mounting features 642 may be embodied as non-conductive pads attached to the chassis-less circuit board substrate 602. In other embodiments, the mounting features may be embodied as brackets, braces, or other similar structures attached to the chassis-less circuit board substrate 602. The particular number, shape, size, and/or make-up of the mounting feature 642 may depend on the design of the robot configured to manage the sled 400.
  • Referring now to FIG. 7, in addition to the physical resources 630 mounted on the top side 650 of the chassis-less circuit board substrate 602, the sled 400 also includes one or more memory devices 720 mounted to a bottom side 750 of the chassis-less circuit board substrate 602. That is, the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board. The physical resources 620 are communicatively coupled to the memory devices 720 via the I/O subsystem 622. For example, the physical resources 620 and the memory devices 720 may be communicatively coupled by one or more vias extending through the chassis-less circuit board substrate 602. Each physical resource 620 may be communicatively coupled to a different set of one or more memory devices 720 in some embodiments. Alternatively, in other embodiments, each physical resource 620 may be communicatively coupled to each memory devices 720.
  • The memory devices 720 may be embodied as any type of memory device capable of storing data for the physical resources 620 during operation of the sled 400, such as any type of volatile (e.g., dynamic random access memory (DRAM), etc.) or non-volatile memory. Volatile memory may be a storage medium that requires power to maintain the state of data stored by the medium. Non-limiting examples of volatile memory may include various types of random access memory (RAM), such as dynamic random access memory (DRAM) or static random access memory (SRAM). One particular type of DRAM that may be used in a memory module is synchronous dynamic random access memory (SDRAM). In particular embodiments, DRAM of a memory component may comply with a standard promulgated by JEDEC, such as JESD79F for DDR SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3 SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 for Low Power DDR (LPDDR), JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, and JESD209-4 for LPDDR4 (these standards are available at www.jedec.org). Such standards (and similar standards) may be referred to as DDR-based standards and communication interfaces of the storage devices that implement such standards may be referred to as DDR-based interfaces.
  • In one embodiment, the memory device is a block addressable memory device, such as those based on NAND or NOR technologies. A memory device may also include next-generation nonvolatile devices, such as Intel 3D XPoint™ memory or other byte addressable write-in-place nonvolatile memory devices. In one embodiment, the memory device may be or may include memory devices that use chalcogenide glass, multi-threshold level NAND flash memory, NOR flash memory, single or multi-level Phase Change Memory (PCM), a resistive memory, nanowire memory, ferroelectric transistor random access memory (FeTRAM), anti-ferroelectric memory, magnetoresistive random access memory (MRAM) memory that incorporates memristor technology, resistive memory including the metal oxide base, the oxygen vacancy base and the conductive bridge Random Access Memory (CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magnetic junction memory based device, a magnetic tunneling junction (MTJ) based device, a DW (Domain Wall) and SOT (Spin Orbit Transfer) based device, a thyristor based memory device, or a combination of any of the above, or other memory. The memory device may refer to the die itself and/or to a packaged memory product. In some embodiments, the memory device may comprise a transistor-less stackable cross point architecture in which memory cells sit at the intersection of word lines and bit lines and are individually addressable and in which bit storage is based on a change in bulk resistance.
  • Referring now to FIG. 8, in some embodiments, the sled 400 may be embodied as a compute sled 800. The compute sled 800 is optimized, or otherwise configured, to perform compute tasks. Of course, as discussed above, the compute sled 800 may rely on other sleds, such as acceleration sleds and/or storage sleds, to perform such compute tasks. The compute sled 800 includes various physical resources (e.g., electrical components) similar to the physical resources of the sled 400, which have been identified in FIG. 8 using the same reference numbers. The description of such components provided above in regard to FIGS. 6 and 7 applies to the corresponding components of the compute sled 800 and is not repeated herein for clarity of the description of the compute sled 800.
  • In the illustrative compute sled 800, the physical resources 620 are embodied as processors 820. Although only two processors 820 are shown in FIG. 8, it should be appreciated that the compute sled 800 may include additional processors 820 in other embodiments. Illustratively, the processors 820 are embodied as high-performance processors 820 and may be configured to operate at a relatively high power rating. Although the processors 820 generate additional heat operating at power ratings greater than typical processors (which operate at around 155-230 W), the enhanced thermal cooling characteristics of the chassis-less circuit board substrate 602 discussed above facilitate the higher power operation. For example, in the illustrative embodiment, the processors 820 are configured to operate at a power rating of at least 250 W. In some embodiments, the processors 820 may be configured to operate at a power rating of at least 350 W.
  • In some embodiments, the compute sled 800 may also include a processor-to-processor interconnect 842. Similar to the resource-to-resource interconnect 624 of the sled 400 discussed above, the processor-to-processor interconnect 842 may be embodied as any type of communication interconnect capable of facilitating processor-to-processor interconnect 842 communications. In the illustrative embodiment, the processor-to-processor interconnect 842 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622). For example, the processor-to-processor interconnect 842 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • The compute sled 800 also includes a communication circuit 830. The illustrative communication circuit 830 includes a network interface controller (NIC) 832, which may also be referred to as a host fabric interface (HFI). The NIC 832 may be embodied as, or otherwise include, any type of integrated circuit, discrete circuits, controller chips, chipsets, add-in-boards, daughtercards, network interface cards, other devices that may be used by the compute sled 800 to connect with another compute device (e.g., with other sleds 400). In some embodiments, the NIC 832 may be embodied as part of a system-on-a-chip (SoC) that includes one or more processors, or included on a multichip package that also contains one or more processors. In some embodiments, the NIC 832 may include a local processor (not shown) and/or a local memory (not shown) that are both local to the NIC 832. In such embodiments, the local processor of the NIC 832 may be capable of performing one or more of the functions of the processors 820. Additionally or alternatively, in such embodiments, the local memory of the NIC 832 may be integrated into one or more components of the compute sled at the board level, socket level, chip level, and/or other levels.
  • The communication circuit 830 is communicatively coupled to an optical data connector 834. The optical data connector 834 is configured to mate with a corresponding optical data connector of the rack 240 when the compute sled 800 is mounted in the rack 240. Illustratively, the optical data connector 834 includes a plurality of optical fibers which lead from a mating surface of the optical data connector 834 to an optical transceiver 836. The optical transceiver 836 is configured to convert incoming optical signals from the rack-side optical data connector to electrical signals and to convert electrical signals to outgoing optical signals to the rack-side optical data connector. Although shown as forming part of the optical data connector 834 in the illustrative embodiment, the optical transceiver 836 may form a portion of the communication circuit 830 in other embodiments.
  • In some embodiments, the compute sled 800 may also include an expansion connector 840. In such embodiments, the expansion connector 840 is configured to mate with a corresponding connector of an expansion chassis-less circuit board substrate to provide additional physical resources to the compute sled 800. The additional physical resources may be used, for example, by the processors 820 during operation of the compute sled 800. The expansion chassis-less circuit board substrate may be substantially similar to the chassis-less circuit board substrate 602 discussed above and may include various electrical components mounted thereto. The particular electrical components mounted to the expansion chassis-less circuit board substrate may depend on the intended functionality of the expansion chassis-less circuit board substrate. For example, the expansion chassis-less circuit board substrate may provide additional compute resources, memory resources, and/or storage resources. As such, the additional physical resources of the expansion chassis-less circuit board substrate may include, but is not limited to, processors, memory devices, storage devices, and/or accelerator circuits including, for example, field programmable gate arrays (FPGA), application-specific integrated circuits (ASICs), security co-processors, graphics processing units (GPUs), machine learning circuits, or other specialized processors, controllers, devices, and/or circuits.
  • Referring now to FIG. 9, an illustrative embodiment of the compute sled 800 is shown. As shown, the processors 820, communication circuit 830, and optical data connector 834 are mounted to the top side 650 of the chassis-less circuit board substrate 602. Any suitable attachment or mounting technology may be used to mount the physical resources of the compute sled 800 to the chassis-less circuit board substrate 602. For example, the various physical resources may be mounted in corresponding sockets (e.g., a processor socket), holders, or brackets. In some cases, some of the electrical components may be directly mounted to the chassis-less circuit board substrate 602 via soldering or similar techniques.
  • As discussed above, the individual processors 820 and communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other. In the illustrative embodiment, the processors 820 and communication circuit 830 are mounted in corresponding locations on the top side 650 of the chassis-less circuit board substrate 602 such that no two of those physical resources are linearly in-line with others along the direction of the airflow path 608. It should be appreciated that, although the optical data connector 834 is in-line with the communication circuit 830, the optical data connector 834 produces no or nominal heat during operation.
  • The memory devices 720 of the compute sled 800 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 400. Although mounted to the bottom side 750, the memory devices 720 are communicatively coupled to the processors 820 located on the top side 650 via the I/O subsystem 622. Because the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board, the memory devices 720 and the processors 820 may be communicatively coupled by one or more vias, connectors, or other mechanisms extending through the chassis-less circuit board substrate 602. Of course, each processor 820 may be communicatively coupled to a different set of one or more memory devices 720 in some embodiments. Alternatively, in other embodiments, each processor 820 may be communicatively coupled to each memory device 720. In some embodiments, the memory devices 720 may be mounted to one or more memory mezzanines on the bottom side of the chassis-less circuit board substrate 602 and may interconnect with a corresponding processor 820 through a ball-grid array.
  • Each of the processors 820 includes a heatsink 850 secured thereto. Due to the mounting of the memory devices 720 to the bottom side 750 of the chassis-less circuit board substrate 602 (as well as the vertical spacing of the sleds 400 in the corresponding rack 240), the top side 650 of the chassis-less circuit board substrate 602 includes additional “free” area or space that facilitates the use of heatsinks 850 having a larger size relative to traditional heatsinks used in typical servers. Additionally, due to the improved thermal cooling characteristics of the chassis-less circuit board substrate 602, none of the processor heatsinks 850 include cooling fans attached thereto. That is, each of the heatsinks 850 is embodied as a fan-less heatsinks.
  • Referring now to FIG. 10, in some embodiments, the sled 400 may be embodied as an accelerator sled 1000. The accelerator sled 1000 is optimized, or otherwise configured, to perform specialized compute tasks, such as machine learning, encryption, hashing, or other computational-intensive task. In some embodiments, for example, a compute sled 800 may offload tasks to the accelerator sled 1000 during operation. The accelerator sled 1000 includes various components similar to components of the sled 400 and/or compute sled 800, which have been identified in FIG. 10 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7, and 8 apply to the corresponding components of the accelerator sled 1000 and is not repeated herein for clarity of the description of the accelerator sled 1000.
  • In the illustrative accelerator sled 1000, the physical resources 620 are embodied as accelerator circuits 1020. Although only two accelerator circuits 1020 are shown in FIG. 10, it should be appreciated that the accelerator sled 1000 may include additional accelerator circuits 1020 in other embodiments. For example, as shown in FIG. 11, the accelerator sled 1000 may include four accelerator circuits 1020 in some embodiments. The accelerator circuits 1020 may be embodied as any type of processor, co-processor, compute circuit, or other device capable of performing compute or processing operations. For example, the accelerator circuits 1020 may be embodied as, for example, field programmable gate arrays (FPGA), application-specific integrated circuits (ASICs), security co-processors, graphics processing units (GPUs), machine learning circuits, or other specialized processors, controllers, devices, and/or circuits.
  • In some embodiments, the accelerator sled 1000 may also include an accelerator-to-accelerator interconnect 1042. Similar to the resource-to-resource interconnect 624 of the sled 600 discussed above, the accelerator-to-accelerator interconnect 1042 may be embodied as any type of communication interconnect capable of facilitating accelerator-to-accelerator communications. In the illustrative embodiment, the accelerator-to-accelerator interconnect 1042 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622). For example, the accelerator-to-accelerator interconnect 1042 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications. In some embodiments, the accelerator circuits 1020 may be daisy-chained with a primary accelerator circuit 1020 connected to the NIC 832 and memory 720 through the I/O subsystem 622 and a secondary accelerator circuit 1020 connected to the NIC 832 and memory 720 through a primary accelerator circuit 1020.
  • Referring now to FIG. 11, an illustrative embodiment of the accelerator sled 1000 is shown. As discussed above, the accelerator circuits 1020, communication circuit 830, and optical data connector 834 are mounted to the top side 650 of the chassis-less circuit board substrate 602. Again, the individual accelerator circuits 1020 and communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other as discussed above. The memory devices 720 of the accelerator sled 1000 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 600. Although mounted to the bottom side 750, the memory devices 720 are communicatively coupled to the accelerator circuits 1020 located on the top side 650 via the I/O subsystem 622 (e.g., through vias). Further, each of the accelerator circuits 1020 may include a heatsink 1070 that is larger than a traditional heatsink used in a server. As discussed above with reference to the heatsinks 870, the heatsinks 1070 may be larger than tradition heatsinks because of the “free” area provided by the memory devices 750 being located on the bottom side 750 of the chassis-less circuit board substrate 602 rather than on the top side 650.
  • Referring now to FIG. 12, in some embodiments, the sled 400 may be embodied as a storage sled 1200. The storage sled 1200 is optimized, or otherwise configured, to store data in a data storage 1250 local to the storage sled 1200. For example, during operation, a compute sled 800 or an accelerator sled 1000 may store and retrieve data from the data storage 1250 of the storage sled 1200. The storage sled 1200 includes various components similar to components of the sled 400 and/or the compute sled 800, which have been identified in FIG. 12 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7, and 8 apply to the corresponding components of the storage sled 1200 and is not repeated herein for clarity of the description of the storage sled 1200.
  • In the illustrative storage sled 1200, the physical resources 620 are embodied as storage controllers 1220. Although only two storage controllers 1220 are shown in FIG. 12, it should be appreciated that the storage sled 1200 may include additional storage controllers 1220 in other embodiments. The storage controllers 1220 may be embodied as any type of processor, controller, or control circuit capable of controlling the storage and retrieval of data into the data storage 1250 based on requests received via the communication circuit 830. In the illustrative embodiment, the storage controllers 1220 are embodied as relatively low-power processors or controllers. For example, in some embodiments, the storage controllers 1220 may be configured to operate at a power rating of about 75 watts.
  • In some embodiments, the storage sled 1200 may also include a controller-to-controller interconnect 1242. Similar to the resource-to-resource interconnect 624 of the sled 400 discussed above, the controller-to-controller interconnect 1242 may be embodied as any type of communication interconnect capable of facilitating controller-to-controller communications. In the illustrative embodiment, the controller-to-controller interconnect 1242 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622). For example, the controller-to-controller interconnect 1242 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications.
  • Referring now to FIG. 13, an illustrative embodiment of the storage sled 1200 is shown. In the illustrative embodiment, the data storage 1250 is embodied as, or otherwise includes, a storage cage 1252 configured to house one or more solid state drives (SSDs) 1254. To do so, the storage cage 1252 includes a number of mounting slots 1256, each of which is configured to receive a corresponding solid state drive 1254. Each of the mounting slots 1256 includes a number of drive guides 1258 that cooperate to define an access opening 1260 of the corresponding mounting slot 1256. The storage cage 1252 is secured to the chassis-less circuit board substrate 602 such that the access openings face away from (i.e., toward the front of) the chassis-less circuit board substrate 602. As such, solid state drives 1254 are accessible while the storage sled 1200 is mounted in a corresponding rack 204. For example, a solid state drive 1254 may be swapped out of a rack 240 (e.g., via a robot) while the storage sled 1200 remains mounted in the corresponding rack 240.
  • The storage cage 1252 illustratively includes sixteen mounting slots 1256 and is capable of mounting and storing sixteen solid state drives 1254. Of course, the storage cage 1252 may be configured to store additional or fewer solid state drives 1254 in other embodiments. Additionally, in the illustrative embodiment, the solid state drivers are mounted vertically in the storage cage 1252, but may be mounted in the storage cage 1252 in a different orientation in other embodiments. Each solid state drive 1254 may be embodied as any type of data storage device capable of storing long term data. To do so, the solid state drives 1254 may include volatile and non-volatile memory devices discussed above.
  • As shown in FIG. 13, the storage controllers 1220, the communication circuit 830, and the optical data connector 834 are illustratively mounted to the top side 650 of the chassis-less circuit board substrate 602. Again, as discussed above, any suitable attachment or mounting technology may be used to mount the electrical components of the storage sled 1200 to the chassis-less circuit board substrate 602 including, for example, sockets (e.g., a processor socket), holders, brackets, soldered connections, and/or other mounting or securing techniques.
  • As discussed above, the individual storage controllers 1220 and the communication circuit 830 are mounted to the top side 650 of the chassis-less circuit board substrate 602 such that no two heat-producing, electrical components shadow each other. For example, the storage controllers 1220 and the communication circuit 830 are mounted in corresponding locations on the top side 650 of the chassis-less circuit board substrate 602 such that no two of those electrical components are linearly in-line with other along the direction of the airflow path 608.
  • The memory devices 720 of the storage sled 1200 are mounted to the bottom side 750 of the of the chassis-less circuit board substrate 602 as discussed above in regard to the sled 400. Although mounted to the bottom side 750, the memory devices 720 are communicatively coupled to the storage controllers 1220 located on the top side 650 via the I/O subsystem 622. Again, because the chassis-less circuit board substrate 602 is embodied as a double-sided circuit board, the memory devices 720 and the storage controllers 1220 may be communicatively coupled by one or more vias, connectors, or other mechanisms extending through the chassis-less circuit board substrate 602. Each of the storage controllers 1220 includes a heatsink 1270 secured thereto. As discussed above, due to the improved thermal cooling characteristics of the chassis-less circuit board substrate 602 of the storage sled 1200, none of the heatsinks 1270 include cooling fans attached thereto. That is, each of the heatsinks 1270 is embodied as a fan-less heatsink.
  • Referring now to FIG. 14, in some embodiments, the sled 400 may be embodied as a memory sled 1400. The storage sled 1400 is optimized, or otherwise configured, to provide other sleds 400 (e.g., compute sleds 800, accelerator sleds 1000, etc.) with access to a pool of memory (e.g., in two or more sets 1430, 1432 of memory devices 720) local to the memory sled 1200. For example, during operation, a compute sled 800 or an accelerator sled 1000 may remotely write to and/or read from one or more of the memory sets 1430, 1432 of the memory sled 1200 using a logical address space that maps to physical addresses in the memory sets 1430, 1432. The memory sled 1400 includes various components similar to components of the sled 400 and/or the compute sled 800, which have been identified in FIG. 14 using the same reference numbers. The description of such components provided above in regard to FIGS. 6, 7, and 8 apply to the corresponding components of the memory sled 1400 and is not repeated herein for clarity of the description of the memory sled 1400.
  • In the illustrative memory sled 1400, the physical resources 620 are embodied as memory controllers 1420. Although only two memory controllers 1420 are shown in FIG. 14, it should be appreciated that the memory sled 1400 may include additional memory controllers 1420 in other embodiments. The memory controllers 1420 may be embodied as any type of processor, controller, or control circuit capable of controlling the writing and reading of data into the memory sets 1430, 1432 based on requests received via the communication circuit 830. In the illustrative embodiment, each storage controller 1220 is connected to a corresponding memory set 1430, 1432 to write to and read from memory devices 720 within the corresponding memory set 1430, 1432 and enforce any permissions (e.g., read, write, etc.) associated with sled 400 that has sent a request to the memory sled 1400 to perform a memory access operation (e.g., read or write).
  • In some embodiments, the memory sled 1400 may also include a controller-to-controller interconnect 1442. Similar to the resource-to-resource interconnect 624 of the sled 400 discussed above, the controller-to-controller interconnect 1442 may be embodied as any type of communication interconnect capable of facilitating controller-to-controller communications. In the illustrative embodiment, the controller-to-controller interconnect 1442 is embodied as a high-speed point-to-point interconnect (e.g., faster than the I/O subsystem 622). For example, the controller-to-controller interconnect 1442 may be embodied as a QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or other high-speed point-to-point interconnect dedicated to processor-to-processor communications. As such, in some embodiments, a memory controller 1420 may access, through the controller-to-controller interconnect 1442, memory that is within the memory set 1432 associated with another memory controller 1420. In some embodiments, a scalable memory controller is made of multiple smaller memory controllers, referred to herein as “chiplets”, on a memory sled (e.g., the memory sled 1400). The chiplets may be interconnected (e.g., using EMIB (Embedded Multi-Die Interconnect Bridge)). The combined chiplet memory controller may scale up to a relatively large number of memory controllers and I/O ports, (e.g., up to 16 memory channels). In some embodiments, the memory controllers 1420 may implement a memory interleave (e.g., one memory address is mapped to the memory set 1430, the next memory address is mapped to the memory set 1432, and the third address is mapped to the memory set 1430, etc.). The interleaving may be managed within the memory controllers 1420, or from CPU sockets (e.g., of the compute sled 800) across network links to the memory sets 1430, 1432, and may improve the latency associated with performing memory access operations as compared to accessing contiguous memory addresses from the same memory device.
  • Further, in some embodiments, the memory sled 1400 may be connected to one or more other sleds 400 (e.g., in the same rack 240 or an adjacent rack 240) through a waveguide, using the waveguide connector 1480. In the illustrative embodiment, the waveguides are 64 millimeter waveguides that provide 16 Rx (i.e., receive) lanes and 16 Rt (i.e., transmit) lanes. Each lane, in the illustrative embodiment, is either 16 Ghz or 32 Ghz. In other embodiments, the frequencies may be different. Using a waveguide may provide high throughput access to the memory pool (e.g., the memory sets 1430, 1432) to another sled (e.g., a sled 400 in the same rack 240 or an adjacent rack 240 as the memory sled 1400) without adding to the load on the optical data connector 834.
  • Referring now to FIG. 15, a system for executing one or more workloads (e.g., applications) may be implemented in accordance with the data center 100. In the illustrative embodiment, the system 1510 includes an orchestrator server 1520, which may be embodied as a managed node comprising a compute device (e.g., a compute sled 800) executing management software (e.g., a cloud operating environment, such as OpenStack) that is communicatively coupled to multiple sleds 400 including a large number of compute sleds 1530 (e.g., each similar to the compute sled 800), memory sleds 1540 (e.g., each similar to the memory sled 1400), accelerator sleds 1550 (e.g., each similar to the memory sled 1000), and storage sleds 1560 (e.g., each similar to the storage sled 1200). One or more of the sleds 1530, 1540, 1550, 1560 may be grouped into a managed node 1570, such as by the orchestrator server 1520, to collectively perform a workload (e.g., an application 1532 executed in a virtual machine or in a container). The managed node 1570 may be embodied as an assembly of physical resources 620, such as processors 820, memory resources 720, accelerator circuits 1020, or data storage 1250, from the same or different sleds 400. Further, the managed node may be established, defined, or “spun up” by the orchestrator server 1520 at the time a workload is to be assigned to the managed node or at any other time, and may exist regardless of whether any workloads are presently assigned to the managed node. In the illustrative embodiment, the orchestrator server 1520 may selectively allocate and/or deallocate physical resources 620 from the sleds 400 and/or add or remove one or more sleds 400 from the managed node 1570 as a function of quality of service (QoS) targets (e.g., performance targets associated with a throughput, latency, instructions per second, etc.) associated with a service level agreement for the workload (e.g., the application 1532). In doing so, the orchestrator server 1520 may receive telemetry data indicative of performance conditions (e.g., throughput, latency, instructions per second, etc.) in each sled 400 of the managed node 1570 and compare the telemetry data to the quality of service targets to determine whether the quality of service targets are being satisfied. If the so, the orchestrator server 1520 may additionally determine whether one or more physical resources may be deallocated from the managed node 1570 while still satisfying the QoS targets, thereby freeing up those physical resources for use in another managed node (e.g., to execute a different workload). Alternatively, if the QoS targets are not presently satisfied, the orchestrator server 1520 may determine to dynamically allocate additional physical resources to assist in the execution of the workload (e.g., the application 1532) while the workload is executing
  • Additionally, in some embodiments, the orchestrator server 1520 may identify trends in the resource utilization of the workload (e.g., the application 1532), such as by identifying phases of execution (e.g., time periods in which different operations, each having different resource utilizations characteristics, are performed) of the workload (e.g., the application 1532) and pre-emptively identifying available resources in the data center 100 and allocating them to the managed node 1570 (e.g., within a predefined time period of the associated phase beginning). In some embodiments, the orchestrator server 1520 may model performance based on various latencies and a distribution scheme to place workloads among compute sleds and other resources (e.g., accelerator sleds, memory sleds, storage sleds) in the data center 100. For example, the orchestrator server 1520 may utilize a model that accounts for the performance of resources on the sleds 400 (e.g., FPGA performance, memory access latency, etc.) and the performance (e.g., congestion, latency, bandwidth) of the path through the network to the resource (e.g., FPGA). As such, the orchestrator server 1520 may determine which resource(s) should be used with which workloads based on the total latency associated with each potential resource available in the data center 100 (e.g., the latency associated with the performance of the resource itself in addition to the latency associated with the path through the network between the compute sled executing the workload and the sled 400 on which the resource is located).
  • In some embodiments, the orchestrator server 1520 may generate a map of heat generation in the data center 100 using telemetry data (e.g., temperatures, fan speeds, etc.) reported from the sleds 400 and allocate resources to managed nodes as a function of the map of heat generation and predicted heat generation associated with different workloads, to maintain a target temperature and heat distribution in the data center 100. Additionally or alternatively, in some embodiments, the orchestrator server 1520 may organize received telemetry data into a hierarchical model that is indicative of a relationship between the managed nodes (e.g., a spatial relationship such as the physical locations of the resources of the managed nodes within the data center 100 and/or a functional relationship, such as groupings of the managed nodes by the customers the managed nodes provide services for, the types of functions typically performed by the managed nodes, managed nodes that typically share or exchange workloads among each other, etc.). Based on differences in the physical locations and resources in the managed nodes, a given workload may exhibit different resource utilizations (e.g., cause a different internal temperature, use a different percentage of processor or memory capacity) across the resources of different managed nodes. The orchestrator server 1520 may determine the differences based on the telemetry data stored in the hierarchical model and factor the differences into a prediction of future resource utilization of a workload if the workload is reassigned from one managed node to another managed node, to accurately balance resource utilization in the data center 100.
  • To reduce the computational load on the orchestrator server 1520 and the data transfer load on the network, in some embodiments, the orchestrator server 1520 may send self- test information to the sleds 400 to enable each sled 400 to locally (e.g., on the sled 400) determine whether telemetry data generated by the sled 400 satisfies one or more conditions (e.g., an available capacity that satisfies a predefined threshold, a temperature that satisfies a predefined threshold, etc.). Each sled 400 may then report back a simplified result (e.g., yes or no) to the orchestrator server 1520, which the orchestrator server 1520 may utilize in determining the allocation of resources to managed nodes.
  • Referring now to FIG. 16, a system 1600 for bandwidth allocation may be implemented in accordance with the data center 100 described above with reference to FIGS. 1-15. As shown, the system 1600 includes a resource manager server 1602 and multiple sleds 1610, 1612, 1614, 1616, 1618, 1620 in communication over a network using multiple switches 1604, 1606, 1608. Each of the resource manager server 1602 and the sleds 1610, 1612, 1614, 1616, 1618, 1620 may be embodied as server computer, a rack server, a blade server, a compute node, and/or a sled in a data center, such as a sled 400 as described above in connection with FIGS. 1-15 or another sled of the data center.
  • The network elements of the system 1600 are organized into a network topology. As shown, the sleds 1610, 1612, 1614 may be organized into a rack and each connected to the switch 1606, which may be embodied as a top-of-rack switch, middle-of-rack switch, end-of-row switch, or other switch device. Similarly, the sleds 1616, 1618, 1620 are connected to the switch 1608. The switches 1606, 1608 are in turn connected to the switch 1604, which may be embodied as a data center domain switch or other upstream switch. The resource manager server 1602 is illustrated as being connected to the upstream switch 1604, however, in other embodiments it may be connected to any other location in the network topology. Thus, as shown in FIG. 16, the switches 1604, 1606, 1608 are organized into multiple layers, and sending data across layers may add switching latency, queuing latency, or other latencies.
  • Additionally, although the resource manager server 1602 is illustrated as a single server computing device, in some embodiments, the resource manager server 1602 may be embodied as a “virtual server” formed from multiple computing devices distributed across the system 1600 and/or operating in a public or private cloud. Accordingly, although the resource manager server 1602 is illustrated in FIG. 16 and described below as embodied as a single server computing device, it should be appreciated that the resource manager server 1602 may be embodied as multiple devices cooperating together to facilitate the functionality described below.
  • In use, as described further below, the resource manager server 1602 may discover the network topology of the system 1600 and construct a model of resource oversubscription in the system 1600. Resource oversubscription may include network uplink oversubscription, storage resource oversubscription, or any other circumstance in which the aggregate bandwidth or other demand generated by the sleds exceeds the available bandwidth or other capacity of the system 1600. The resource manager server 1602 may determine bandwidth limits for each sled or other network element of the system 1600 and program those bandwidth limits to the network elements. Each network element enforces the programmed bandwidth limits, which may reduce network congestion. By reducing congestion, the system 1600 may eliminate or reduce queuing latency for each layer of switches. For example, bandwidth limits for a storage sled 1610 may ensure that non-volatile memory express (NVMe) over Ethernet data traffic generated by the storage sled 1610 (and other storage sleds) does not exceed available upstream bandwidth. Accordingly, the system 1600 may improve network latency and reduce network congestion, without implementing expensive bandwidth reservation mechanisms at the switch level.
  • Referring now to FIG. 17, an illustrative computing device 1700 is shown. The computing device 1700 may be the resource manager server 1602, a sled 400, a storage sled 1200, 1610, 1614, 1616, 1620, an accelerator sled 1000, a memory sled 1400, a compute sled 800, 1612, 1618, and/or a similar server computing device. As shown in FIG. 17, the computing device 1700 illustratively includes a processor 1720, an input/output subsystem 1722, a memory 1724, a data storage device 1726, a communication subsystem 1728, and/or other components and devices commonly found in a sled 400, a storage sled 1200, 1610, 1614, 1616, 1620, an accelerator sled 1000, a memory sled 1400, a compute sled 800, 1612, 1618, and/or a similar server computing device. Of course, the computing device 1700 may include other or additional components, such as those commonly found in a server computer (e.g., various input/output devices), in other embodiments. Additionally, in some embodiments, one or more of the illustrative components may be incorporated in, or otherwise form a portion of, another component. For example, the memory 1724, or portions thereof, may be incorporated in the processor 1720 in some embodiments.
  • The processor 1720 may be embodied as any type of processor capable of performing the functions described herein. For example, the processor 1720 may be embodied as a single or multi-core processor(s), digital signal processor, microcontroller, or other processor or processing/controlling circuit. Similarly, the memory 1724 may be embodied as any type of volatile or non-volatile memory or data storage capable of performing the functions described herein. In operation, the memory 1724 may store various data and software used during operation of the computing device 1700 such operating systems, applications, programs, libraries, and drivers. The memory 1724 is communicatively coupled to the processor 1720 via the I/O subsystem 1722, which may be embodied as circuitry and/or components to facilitate input/output operations with the processor 1720, the memory 1724, and other components of the computing device 1700. For example, the I/O subsystem 1722 may be embodied as, or otherwise include, memory controller hubs, input/output control hubs, sensor hubs, firmware devices, communication links (i.e., point-to-point links, bus links, wires, cables, light guides, printed circuit board traces, etc.) and/or other components and subsystems to facilitate the input/output operations. In some embodiments, the I/O subsystem 1722 may form a portion of a system-on-a-chip (SoC) and be incorporated, along with the processor 1720, the memory 1724, and other components of the computing device 1700, on a single integrated circuit chip.
  • The data storage device 1726 may be embodied as any type of device or devices configured for short-term or long-term storage of data such as, for example, memory devices and circuits, memory cards, hard disk drives, solid-state drives, non-volatile flash memory, or other data storage devices. The computing device 1700 may also include a communications subsystem 1728, which may be embodied as any communication circuit, device, or collection thereof, capable of enabling communications between the computing device 1700 and other remote devices over a computer network (not shown). The communications subsystem 1728 may be configured to use any one or more communication technology (e.g., wired or wireless communications) and associated protocols (e.g., Ethernet, InfiniBand®, Bluetooth®, Wi-Fi®, WiMAX, 3G, 4G LTE, etc.) to effect such communication. As shown, the communication subsystem 1728 may include a network interface controller (NIC) 1330.
  • The illustrative communications subsystem 1728 includes a network interface controller (NIC) 1330. The NIC 1730 may be embodied as one or more add-in-boards, daughtercards, controller chips, chipsets, circuits, or other devices that may be used by the computing device 1700 for network communications with remote devices. For example, the NIC 1730 may be embodied as an expansion card coupled to the I/O subsystem 1722 over an expansion bus such as PCI Express. As another example, in some embodiments the NIC 1730 may be embodied as a network controller, host fabric interface, or other component integrated with the I/O subsystem 1722, the processor 1720, an SoC, and/or one or more other components of the computing device 1700.
  • As shown, the computing device 1700 may also include one or more peripheral devices 1732. The peripheral devices 1732 may include any number of additional input/output devices, interface devices, and/or other peripheral devices. For example, in some embodiments, the peripheral devices 1732 may include a display, touch screen, graphics circuitry, keyboard, mouse, speaker system, microphone, network interface, and/or other input/output devices, interface devices, and/or peripheral devices.
  • Referring now to FIG. 18, in an illustrative embodiment, the resource manager server 1602 establishes an environment 1800 during operation. The illustrative environment 1800 includes a topology manager 1802, a model constructor 1804, a bandwidth limit determiner 1806, a bandwidth limit programmer 1808, and a utilization manager 1810. The various components of the environment 1800 may be embodied as hardware, firmware, software, or a combination thereof. As such, in some embodiments, one or more of the components of the environment 1800 may be embodied as circuitry or collection of electrical devices (e.g., topology manager circuitry 1802, model constructor circuitry 1804, bandwidth limit determiner circuitry 1806, bandwidth limit programmer circuitry 1808, and/or utilization manager circuitry 1810). It should be appreciated that, in such embodiments, one or more of the topology manager circuitry 1802, the model constructor circuitry 1804, the bandwidth limit determiner circuitry 1806, the bandwidth limit programmer circuitry 1808, and/or the utilization manager circuitry 1810 may form a portion of the processor 1720, the I/O subsystem 1722, the NIC 1730, and/or other components of the resource manager server 1602. Additionally, in some embodiments, one or more of the illustrative components may form a portion of another component and/or one or more of the illustrative components may be independent of one another.
  • The topology manager 1802 is configured to discover the topology of the sleds coupled to a layer of switches that are communicatively coupled to the resource manager server 1602. The model constructor 1804 is configured to construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology. Constructing the model may include identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • The bandwidth limit determiner 1806 is configured to determine an oversubscription of the network based on the model of network connectivity. The oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the sleds. The bandwidth limit determiner 1806 may determine a network uplink oversubscription for the layer of switches or may determine a storage resource oversubscription of the sleds. The bandwidth limit determiner 1806 is further configured to determine a bandwidth limit for each sled based on the oversubscription. The bandwidth limit programmer 1808 is configured to program each sled with the corresponding bandwidth limit. The bandwidth limit programmer 1808 may communicate the bandwidth limit to the NIC 1730 of the corresponding sled.
  • The utilization manager 1810 is configured to monitor a bandwidth utilization of the sleds. Monitoring the bandwidth utilization may include receiving telemetry data from the sleds that is indicative of the bandwidth utilized by each sled. The utilization manager 1810 is further configured to determine whether the network is congested based on the bandwidth utilization of the plurality of sleds. For example, determining whether the network is congested may include determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time. In some embodiments, determining whether the network is congested may include monitoring bandwidth per class of network traffic, such as NVMe over Ethernet traffic, field-programmable gate array (FPGA) over Ethernet traffic, storage traffic, and/or other traffic classes. Each traffic class may be independently monitored with its own queue depth controls. Further, bandwidth may be limited at the source or target, or in some embodiments based on source and target pair combinations. The utilization manager 1810 is further configured to modify a bandwidth limit in response to determining that the network is congested. The bandwidth limit may be reduced for each sled that is associated with a high input rate flow.
  • Referring now to FIG. 19, in an illustrative embodiment, a storage sled 1610 establishes an environment 1900 during operation. It should be understood that the environment 1900 may also be established by other sleds of the system 1600. The illustrative environment 1900 includes a bandwidth limit manager 1904, a bandwidth programmer 1906, and a telemetry data manager 1908. The various components of the environment 1900 may be embodied as hardware, firmware, software, or a combination thereof. As such, in some embodiments, one or more of the components of the environment 1900 may be embodied as circuitry or collection of electrical devices (e.g., bandwidth limit manager circuitry 1904, bandwidth programmer circuitry 1906, and/or telemetry data manager circuitry 1908). It should be appreciated that, in such embodiments, one or more of the bandwidth limit manager circuitry 1904, the bandwidth programmer circuitry 1906, and/or the telemetry data manager circuitry 1908 may form a portion of the processor 1720, the I/O subsystem 1722, the NIC 1730, and/or other components of the storage sled 1610. Additionally, in some embodiments, one or more of the illustrative components may form a portion of another component and/or one or more of the illustrative components may be independent of one another.
  • The bandwidth programmer 1906 is configured to receive a bandwidth limit for the sled from the resource manager server 1602 and to program the bandwidth limit to the NIC 1730 of the sled. The bandwidth limit manager 1904 is configured to enforce, by the NIC 1730, the bandwidth limit in response to programming the bandwidth limit.
  • The telemetry data manager 1908 is configured to send telemetry data indicative of utilization of the NIC 1730 to the resource manager server 1602. The telemetry data may be sent by the NIC 1730. The telemetry data may indicative of a NIC queue depth and/or or a network stack queue depth.
  • Referring now to FIG. 20, in use, the resource manager server 1602 may execute a method 2000 for bandwidth allocation. It should be appreciated that, in some embodiments, the operations of the method 2000 may be performed by one or more components of the environment 1800 of the resource manager server 1602 as shown in FIG. 18. The method 2000 begins in block 2002, in which the resource manager server 1602 discovers the network topology of the components of the system 1600. The topology may be predetermined at design time of the system 1600 or, in some embodiments, may be discovered using a topology discovery protocol or other discovery technique. In some embodiments, in block 2004 the resource manager server 1602 may discover sleds, racks, switches, and network connections of the system 1600. For example, the resource manager server 1602 may identify that a sled is connected to a particular port of a switch. As another example, the resource manager server 1602 may identify that a port of a switch is connected to a particular port of an upstream switch.
  • In block 2006, the resource manager server 1602 constructs a model of network connectivity between the components of the system 1600. The model may identify network connections and the associated available bandwidth between sleds, switches, and other network elements of the system 1600.
  • In block 2008, the resource manager server 1602 determines oversubscription of the system 1600 based on the model of network connectivity. As described above, the system 1600 may be organized in layers, and each layer may have a maximum amount of available bandwidth or other resources. Oversubscription may exist if the total maximum bandwidth or other resource demand of a layer exceeds the available bandwidth or other resources of a higher layer. In some embodiments, in block 2010, the resource manager server 1602 may determine network uplink oversubscription. For example, as shown in FIG. 16, the sleds 1610, 1612, 1614 are connected to the switch 1606. Oversubscription may exist if the maximum bandwidth used by the sleds 1610, 1612, 1614 in combination exceeds the available bandwidth of the uplink from the switch 1606 to the switch 1604. Similarly, oversubscription may exist if the maximum bandwidth used by the sleds 1616, 1618, 1620 exceeds the available bandwidth of the uplink from the switch 1608 to the switch 1604. In some embodiments, in block 2012, the resource manager server 1602 may determine storage resource oversubscription. For example, oversubscription may exist if demand for storage resources of a sled (e.g., the storage sled 1610) exceeds the available bandwidth or other resources of that sled.
  • In block 2014, the resource manager server 1602 determines bandwidth limits for each sled in the system 1600 based on the oversubscription. The bandwidth limits may be determined in order to prevent or reduce network congestion in the system 1600. For example, again referring to FIG. 16, the bandwidth limits for sleds 1610, 1612, 1614 may be set so that the combined bandwidth limits are less than or equal to the uplink bandwidth from the switch 1606 to the switch 1604.
  • In block 2016, the resource manager server 1602 programs each sled with the corresponding bandwidth limit. After being programmed, each sled enforces the bandwidth limits, as described further below in connection with FIG. 21. The resource manager server 1602 may use any technique to program the sled. In some embodiments, in block 2018 the resource manager server 1602 may program the NIC 1730 of the sled with the bandwidth limit. For example, the resource manager server 1602 may communicate out-of-band or otherwise communicate with the NIC 1730 without invoking the operating system or other software networking stack of the sled.
  • In block 2020, the resource manager server 1602 may receive bandwidth telemetry from the sleds of the system 1600. The bandwidth telemetry may indicate the current bandwidth usage of the sled and/or whether the associated network connection is congested. For example, the bandwidth telemetry may indicate queue depth of the NIC 1730, the associated switch port, and/or the networking stack of the sled.
  • In block 2022, the resource manager server 1602 identifies network congestion based on the telemetry. The resource manager server 1602 may use any appropriate algorithm to identify dropped packets, increased latency, or otherwise identify the network congestion. In some embodiments, in block 2024, the resource manager server 1602 may determine whether any queue depth in the system exceeds a predetermined threshold queue depth for longer than a predetermined time. For example, the resource manager server 1602 may analyze the queue depth of a NIC 1730, a switch port, and/or a networking stack of a sled. In block 2026, the resource manager server 1602 determines whether congestion has been detected. If not, the method 2000 loops back to block 2020 to continue monitoring network utilization. If congestion is detected, the method 2000 advances to block 2028.
  • In block 2028, the resource manager server 1602 modifies one or more bandwidth limits to reduce or eliminate the congestion. In some embodiments, in block 2030, the resource manager server 1602 may identify one or more high-input rate flows in the system 1600. For example, one or more storage sleds 1610 generating NVMe over Ethernet data may generate high-input rate flows. The resource manager server 1602 may reduce the input rate bandwidth limit associated with the high-input rate flows. Additionally or alternatively, in some embodiments the resource manager server 1602 may generate one or more alerts concerning the congestion, and a network administrator may provide modified bandwidth limits. In some embodiments, alternate network routes may be possible. If alternate routes are possible, based on the congestion telemetry data, different bandwidth limits may be set for different routes to reduce the congestion rate. After modifying the bandwidth limits, the method 2000 loops back to block 2016 to program the sleds with the modified bandwidth limits and continue monitoring network utilization.
  • Referring now to FIG. 21, in use, a storage sled 1610 may execute a method 2100 for bandwidth allocation. It should be appreciated that, in some embodiments, the operations of the method 2100 may be performed by one or more components of the environment 1900 of the storage sled 1610 as shown in FIG. 19. The method 2100 begins in block 2102, in which the storage sled 1610 determines whether an update to a bandwidth limit has been received from the resource manager server 1602. As described above in connection with FIG. 20, the resource manager server 1602 may program the bandwidth limit to the storage sled 1610 in response to modeling network connectivity and determining an oversubscription of the system 1600 and/or in response to detecting network congestion based on telemetry data. If an update to the bandwidth limit has not been received, the method 2100 branches ahead to block 2108, described below. If an update to the bandwidth limit has been received, the method 2100 advances to block 2104.
  • In block 2104, the storage sled 1610 programs one or more network interface controllers (NICs) 1330 of the storage sled with the new bandwidth limit. After being programmed, the NIC 1730 may throttle or otherwise limit bandwidth used by the storage sled 1610 to below the bandwidth limit. In particular, in some embodiments in block 2106 the storage sled 1610 may set a maximum input bandwidth for the NIC 1730. Thus, the bandwidth limits may limit the amount of data (e.g., NVMe over Ethernet data) generated by the storage sled 1610 and submitted to the switch 1606. Although illustrated as being enforced by the NIC 1730, it should be understood that in some embodiments, the bandwidth limits may be enforced by other components of the storage sled 1610, such as an operating system, software networking stack, NVMe over Ethernet subsystem, or other component.
  • In block 2108, the storage sled 1610 determines whether to send telemetry data to the resource manager server 1602. For example, the storage sled 1610 may be configured by an administrator to send telemetry data. In some embodiments, the storage sled 1610 may send telemetry data in response to certain events, for example in response to detected network congestion. If the storage sled 1610 determines not to send telemetry data, the method 2100 loops back to block 2102 to continue monitoring for updated bandwidth limits. If the storage sled 1610 determines to send telemetry data, the method 2100 advances to block 2110.
  • In block 2110, the storage sled 1610 sends bandwidth telemetry data to the resource manager server 1602. As described above, the bandwidth telemetry may indicate the current bandwidth usage of the sled and/or whether the associated network connection is congested. For example, the bandwidth telemetry may indicate queue depth of the NIC 1730, the associated switch port, and/or the network stack of the sled. In some embodiments, in block 2112 the storage sled 1610 may retrieve the telemetry data from the NIC 1730 of the storage sled 1610. For example, an operating system, software networking stack, or other component of the storage sled 1610 may retrieve telemetry data from the NIC 1730. In some embodiments, in block 2114 the storage sled 1610 may send the telemetry data from the NIC 1730 to the resource manager server 1602. The NIC 1730 may send the telemetry data out-of-band or otherwise without the involvement of the operating system, software networking stack, or other components of the storage sled 1610. After sending the telemetry data, the method 2100 loops back to block 2102 to continue monitoring for updated bandwidth limits.
  • EXAMPLES
  • Illustrative examples of the technologies disclosed herein are provided below. An embodiment of the technologies may include any one or more, and any combination of, the examples described below.
  • Example 1 includes a resource manager server for bandwidth allocation, the resource manager server comprising: one or more processors; and one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the resource manager server to: discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; determine an oversubscription of a network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and program each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 2 includes the subject matter of Example 1, and wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 3 includes the subject matter of any of Examples 1 and 2, and wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
  • Example 4 includes the subject matter of any of Examples 1-3, and wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
  • Example 5 includes the subject matter of any of Examples 1-4, and wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 6 includes the subject matter of any of Examples 1-5, and wherein the one or more memory devices have stored therein a plurality of instructions that, when executed by the one or more processors, further cause the resource manager server to: monitor a bandwidth utilization of the plurality of sleds; determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modify a bandwidth limit in response to a determination that the network is congested.
  • Example 7 includes the subject matter of any of Examples 1-6, and wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 8 includes the subject matter of any of Examples 1-7, and wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 9 includes the subject matter of any of Examples 1-8, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 10 includes the subject matter of any of Examples 1-9, and wherein to modify the bandwidth limit comprises to: identify a first sled of the plurality of sleds associated with a high input rate flow; and reduce an input rate of the bandwidth limit for the first sled.
  • Example 11 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server on a network, the sled comprising: one or more processors; and one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the sled to: receive a bandwidth limit for the sled from the resource manager server; program the bandwidth limit to a network interface controller of the sled; and enforce, by the network interface controller, the bandwidth limit in response to programming of the bandwidth limit.
  • Example 12 includes the subject matter of Example 11, and wherein the one or more memory devices have stored therein a plurality of instructions that, when executed by the one or more processors, further cause the sled to send telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 13 includes the subject matter of any of Examples 11 and 12, and wherein to send the telemetry data comprises to send the telemetry data by the network interface controller.
  • Example 14 includes the subject matter of any of Examples 11-13, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 15 includes a method for bandwidth allocation, the method comprising: discovering, by a resource manager server of a network, a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; constructing, by the resource manager server, a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; determining, by the resource manager server, an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; determining, by the resource manager server, a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and programming, by the resource manager server, each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 16 includes the subject matter of Example 15, and wherein constructing the model of network connectivity comprises identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 17 includes the subject matter of any of Examples 15 and 16, and wherein determining the oversubscription comprises determining a network uplink oversubscription for the layer of switches.
  • Example 18 includes the subject matter of any of Examples 15-17, and wherein determining the oversubscription comprises determining a storage resource oversubscription of the plurality of sleds.
  • Example 19 includes the subject matter of any of Examples 15-18, and wherein programming the bandwidth limit for each sled comprises communicating the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 20 includes the subject matter of any of Examples 15-19, and further comprising: monitoring, by the resource manager server, a bandwidth utilization of the plurality of sleds; determining, by the resource manager server, whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modifying, by the resource manager server, a bandwidth limit in response to determining that the network is congested.
  • Example 21 includes the subject matter of any of Examples 15-20, and wherein monitoring the bandwidth utilization of the plurality of sleds comprises receiving telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 22 includes the subject matter of any of Examples 15-21, and wherein determining whether the network is congested comprises determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 23 includes the subject matter of any of Examples 15-22, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 24 includes the subject matter of any of Examples 15-23, and wherein modifying the bandwidth limit comprises: identifying a first sled of the plurality of sleds associated with a high input rate flow; and reducing an input rate of the bandwidth limit for the first sled.
  • Example 25 includes a method for bandwidth allocation, the method comprising: receiving, by a sled of a plurality of sleds communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server in a network, a bandwidth limit for the sled from the resource manager server; programming, by the sled, the bandwidth limit to a network interface controller of the sled; and enforcing, by the network interface controller of the sled, the bandwidth limit in response to programming the bandwidth limit.
  • Example 26 includes the subject matter of Example 25, and further comprising sending, by the sled, telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 27 includes the subject matter of any of Examples 25 and 26, and wherein sending the telemetry data comprises sending the telemetry data by the network interface controller.
  • Example 28 includes the subject matter of any of Examples 25-27, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 29 includes a computing device comprising: a processor; and a memory having stored therein a plurality of instructions that when executed by the processor cause the computing device to perform the method of any of Examples 15-28.
  • Example 30 includes one or more non-transitory, computer readable storage media comprising a plurality of instructions stored thereon that in response to being executed result in a computing device performing the method of any of Examples 15-28.
  • Example 31 includes a computing device comprising means for performing the method of any of Examples 15-28.
  • Example 32 includes a resource manager server for bandwidth allocation, the resource manager server comprising: topology manager circuitry to discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server; model constructer circuitry to construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; bandwidth limit determiner circuitry to (i) determine an oversubscription of a network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds, and (ii) determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and bandwidth limit programmer circuitry to program each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 33 includes the subject matter of Example 32, and wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 34 includes the subject matter of any of Examples 32 and 33, and wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
  • Example 35 includes the subject matter of any of Examples 32-34, and wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
  • Example 36 includes the subject matter of any of Examples 32-35, and wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 37 includes the subject matter of any of Examples 32-36, and further comprising utilization manager circuitry to: monitor a bandwidth utilization of the plurality of sleds; determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and modify a bandwidth limit in response to a determination that the network is congested.
  • Example 38 includes the subject matter of any of Examples 32-37, and wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 39 includes the subject matter of any of Examples 32-38, and wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 40 includes the subject matter of any of Examples 32-39, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 41 includes the subject matter of any of Examples 32-40, and wherein to modify the bandwidth limit comprises to: identify a first sled of the plurality of sleds associated with a high input rate flow; and reduce an input rate of the bandwidth limit for the first sled.
  • Example 42 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that communicatively coupled to a resource manager server on a network, the sled comprising: bandwidth programmer circuitry to: (i) receive a bandwidth limit for the sled from the resource manager server, and (ii) program the bandwidth limit to a network interface controller of the sled; and bandwidth limit manager circuitry to enforce, by the network interface controller, the bandwidth limit in response to programming of the bandwidth limit.
  • Example 43 includes the subject matter of Example 42, and further comprising telemetry data manager circuitry to send telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 44 includes the subject matter of any of Examples 42 and 43, and wherein to send the telemetry data comprises to send the telemetry data by the network interface controller.
  • Example 45 includes the subject matter of any of Examples 42-44, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.
  • Example 46 includes a resource manager server for bandwidth allocation, the resource manager server comprising: means for discovering a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server in a network; means for constructing a model of network connectivity between the plurality of sleds and the layer of switches based on the topology; means for determining an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds; means for determining a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and means for programming each sled of the plurality of sleds with the corresponding bandwidth limit.
  • Example 47 includes the subject matter of Example 46, and wherein the means for constructing the model of network connectivity comprises means for identifying which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
  • Example 48 includes the subject matter of any of Examples 46 and 47, and wherein the means for determining the oversubscription comprises means for determining a network uplink oversubscription for the layer of switches.
  • Example 49 includes the subject matter of any of Examples 46-48, and wherein the means for determining the oversubscription comprises means for determining a storage resource oversubscription of the plurality of sleds.
  • Example 50 includes the subject matter of any of Examples 46-49, and wherein the means for programming the bandwidth limit for each sled comprises circuitry for communicating the bandwidth limit to a network interface controller of the corresponding sled.
  • Example 51 includes the subject matter of any of Examples 46-50, and further comprising: means for monitoring a bandwidth utilization of the plurality of sleds; means for determining whether the network is congested based on the bandwidth utilization of the plurality of sleds; and means for modifying a bandwidth limit in response to determining that the network is congested.
  • Example 52 includes the subject matter of any of Examples 46-51, and wherein the means for monitoring the bandwidth utilization of the plurality of sleds comprises circuitry for receiving telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
  • Example 53 includes the subject matter of any of Examples 46-52, and wherein the means for determining whether the network is congested comprises means for determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
  • Example 54 includes the subject matter of any of Examples 46-53, and wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
  • Example 55 includes the subject matter of any of Examples 46-54, and wherein the means for modifying the bandwidth limit comprises: means for identifying a first sled of the plurality of sleds associated with a high input rate flow; and means for reducing an input rate of the bandwidth limit for the first sled.
  • Example 56 includes a sled for bandwidth allocation, the sled communicatively coupled to a layer of switches that are communicatively coupled to a resource manager server on a network, the sled comprising: circuitry for receiving a bandwidth limit for the sled from the resource manager server; means for programming the bandwidth limit to a network interface controller of the sled; and means for enforcing, by the network interface controller of the sled, the bandwidth limit in response to programming the bandwidth limit.
  • Example 57 includes the subject matter of Example 56, and further comprising means for sending telemetry data indicative of a utilization of the network interface controller to the resource manager server of the network.
  • Example 58 includes the subject matter of any of Examples 56 and 57, and wherein the means for sending the telemetry data comprises means for sending the telemetry data by the network interface controller.
  • Example 59 includes the subject matter of any of Examples 56-58, and wherein the telemetry data is indicative of a network interface controller queue depth, or a network stack queue depth.

Claims (25)

1. A resource manager server for bandwidth allocation, the resource manager server comprising:
one or more processors; and
one or more memory devices having stored therein a plurality of instructions that, when executed by the one or more processors, cause the resource manager server to:
discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server;
construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology;
determine an oversubscription of a network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds;
determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and
program each sled of the plurality of sleds with the corresponding bandwidth limit.
2. The resource manager server of claim 1, wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
3. The resource manager server of claim 1, wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
4. The resource manager server of claim 1, wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
5. The resource manager server of claim 1, wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
6. The resource manager server of claim 1, wherein the one or more memory devices have stored therein a plurality of instructions that, when executed by the one or more processors, further cause the resource manager server to:
monitor a bandwidth utilization of the plurality of sleds;
determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and
modify a bandwidth limit in response to a determination that the network is congested.
7. The resource manager server of claim 6, wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
8. The resource manager server of claim 7, wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
9. The resource manager server of claim 8, wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
10. The resource manager server of claim 6, wherein to modify the bandwidth limit comprises to:
identify a first sled of the plurality of sleds associated with a high input rate flow; and
reduce an input rate of the bandwidth limit for the first sled.
11. One or more computer-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause a resource manager server to:
discover a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server in a network;
construct a model of network connectivity between the plurality of sleds and the layer of switches based on the topology;
determine an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds;
determine a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and
program each sled of the plurality of sleds with the corresponding bandwidth limit.
12. The one or more computer-readable storage media of claim 11, wherein to construct the model of network connectivity comprises to identify which sleds of the plurality of sleds are connected to a particular switch of the layer of switches.
13. The one or more computer-readable storage media of claim 11, wherein to determine the oversubscription comprises to determine a network uplink oversubscription for the layer of switches.
14. The one or more computer-readable storage media of claim 11, wherein to determine the oversubscription comprises to determine a storage resource oversubscription of the plurality of sleds.
15. The one or more computer-readable storage media of claim 11, wherein to program the bandwidth limit for each sled comprises to communicate the bandwidth limit to a network interface controller of the corresponding sled.
16. The one or more computer-readable storage media of claim 11, further comprising a plurality of instructions stored thereon that, in response to being executed, cause the resource manager server to:
monitor a bandwidth utilization of the plurality of sleds;
determine whether the network is congested based on the bandwidth utilization of the plurality of sleds; and
modify a bandwidth limit in response to determining that the network is congested.
17. The one or more computer-readable storage media of claim 16, wherein to monitor the bandwidth utilization of the plurality of sleds comprises to receive telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
18. The one or more computer-readable storage media of claim 17, wherein to determine whether the network is congested comprises to determine whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
19. The one or more computer-readable storage media of claim 18, wherein the queue depth comprises a switch port queue depth, a network interface controller queue depth, or a network stack queue depth.
20. The one or more computer-readable storage media of claim 16, wherein to modify the bandwidth limit comprises to:
identify a first sled of the plurality of sleds associated with a high input rate flow; and
reduce an input rate of the bandwidth limit for the first sled.
21. A resource manager server for bandwidth allocation, the resource manager server comprising:
means for discovering a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server in a network;
means for constructing a model of network connectivity between the plurality of sleds and the layer of switches based on the topology;
means for determining an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds;
means for determining a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and
means for programming each sled of the plurality of sleds with the corresponding bandwidth limit.
22. A method for bandwidth allocation, the method comprising:
discovering, by a resource manager server of a network, a topology of a plurality of sleds coupled to a layer of switches that are communicatively coupled to the resource manager server;
constructing, by the resource manager server, a model of network connectivity between the plurality of sleds and the layer of switches based on the topology;
determining, by the resource manager server, an oversubscription of the network based on the model of network connectivity, wherein the oversubscription is based on an available bandwidth for the layer of switches and a maximum bandwidth of the plurality of sleds;
determining, by the resource manager server, a bandwidth limit for each sled of the plurality of sleds based on the oversubscription; and
programming, by the resource manager server, each sled of the plurality of sleds with the corresponding bandwidth limit.
23. The method of claim 22, further comprising:
monitoring, by the resource manager server, a bandwidth utilization of the plurality of sleds;
determining, by the resource manager server, whether the network is congested based on the bandwidth utilization of the plurality of sleds; and
modifying, by the resource manage server, a bandwidth limit in response to determining that the network is congested.
24. The method of claim 23, wherein monitoring the bandwidth utilization of the plurality of sleds comprises receiving telemetry data from the plurality of sleds indicative of the bandwidth utilized by each sled.
25. The method of claim 24, wherein determining whether the network is congested comprises determining whether a queue depth of the network exceeds a predetermined queue depth limit for a predetermined amount of time.
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