US20180123624A1

US20180123624A1 - Power detectors for radio-frequency applications

Info

Publication number: US20180123624A1
Application number: US15/800,036
Authority: US
Inventors: Edward John Wemyss Whittaker
Original assignee: Skyworks Solutions Inc
Current assignee: Skyworks Solutions Inc
Priority date: 2014-05-27
Filing date: 2017-10-31
Publication date: 2018-05-03
Also published as: US20150349812A1; US9413398B2; US9806746B2; US20170041029A1

Abstract

Power detectors for radio-frequency applications. In some embodiments, an amplifier can include an amplification stage having an input and an output, and a detector coupled to the output of the amplification stage and configured to generate an input signal representative of power associated with an amplified signal provided by the amplification stage. The detector can be further configured to generate an output signal based at least in part on a compensation signal resulting from a combination of a first current representative of the input signal and a second current representative of an operating condition associated with the amplifier.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application is a continuation of U.S. application Ser. No. 15/231,707 filed Aug. 8, 2016, entitled CIRCUITS AND DEVICES RELATED TO COMPENSATED POWER DETECTORS, which is a continuation of U.S. application Ser. No. 14/721,217 filed May 26, 2015, entitled CIRCUITS AND METHODS RELATED TO POWER DETECTORS FOR RADIO-FREQUENCY APPLICATIONS, which claims priority to and the benefit of the filing date of U.S. Provisional Application No. 62/003,072 filed May 27, 2014, entitled CIRCUITS AND METHODS RELATED TO POWER DETECTORS FOR RADIO-FREQUENCY APPLICATIONS, the benefits of the filing dates of which are hereby claimed and the disclosures of which are hereby expressly incorporated by reference herein in their entirety.

BACKGROUND

Field

The present disclosure relates to power detectors for radio-frequency (RF) applications.

Description of the Related Art

In many radio-frequency (RF) applications an RF signal to be transmitted can be amplified by a power amplifier (PA). Such a PA can include a plurality of stages, such as a driver stage and an output stage. The amplified RF signal output by the PA can be transmitted through an antenna.

SUMMARY

According to a number of implementations, the present disclosure relates to a power amplifier (PA) system that includes a PA circuit having a driver stage and an output stage. The PA system further includes a detector configured to receive a portion of a radio-frequency (RF) signal from a path between the driver stage and the output stage. The detector is further configured to generate an output signal representative of power associated with the RF signal and compensated for variation in at least one operating condition associated with the PA circuit.
In some embodiments, the RF signal can be an output of the driver stage. The PA system can further include a control circuit configured to receive the output signal of the detector and adjust a transmit operation. The transmit operation can be performed by a transmitter circuit which can be part of a transceiver.
In some embodiments, the detector can include a detecting circuit configured to receive the portion of the RF signal and generate a slow-varying or DC voltage Vin representative of the power associated with the RF signal. The detector can further include a compensation circuit configured to receive Vin and generate a compensation signal representative of the variation in at least one operating condition associated with the PA circuit. The compensation signal can include a compensation current Iout resulting from a combination of a current Iin representative of Vin and an operating condition current representative of the at least one operating condition. The current Iin and the operating condition current can be combined by a current multiplier.
In some embodiments, the at least one operating condition can include a PA temperature and a supply voltage. In some embodiments, the detector can further include an output circuit configured to receive Vin and Iout, and generate an output signal having the compensation associated with Iout applied to Vin. The output signal can be an output voltage Vout. The output circuit can be configured such that Vout adds a voltage representative of Iout to Vin.
In some teachings, the present disclosure relates to a method for operating a power amplifier (PA) system. The method includes amplifying a radio-frequency (RF) signal with a PA circuit that includes a driver stage and an output stage. The method further includes obtaining a portion of the RF signal from a path between the driver stage and the output stage. The method further includes generating an output signal representative of power associated with the RF signal and compensated for variation in at least one operating condition associated with the PA circuit. In some embodiments, the at least one operating condition can include either or both of a PA temperature and a supply voltage.
In some implementations, the present disclosure relates to a radio-frequency (RF) module that includes a packaging substrate configured to receive a plurality of components, and a power amplifier (PA) system implemented on the packaging substrate. The PA system includes a PA circuit having a driver stage and an output stage. The PA system further includes a detector configured to receive a portion of a radio-frequency (RF) signal from a path between the driver stage and the output stage. The detector is further configured to generate an output signal representative of power associated with the RF signal and compensated for variation in at least one operating condition associated with the PA circuit.
In some embodiments, the PA circuit can be implemented on a first die, and the detector can be implemented on a second die. In some embodiments, at least some of the PA circuit and at least some of the detector can be implemented on a common die. In some embodiments, substantially all of the PA circuit and substantially all of the detector can be implemented on the common die. In some embodiments, the PA system can be configured to amplify an RF signal for a wireless local area network (WLAN).
In accordance with a number of implementations, the present disclosure relates to a wireless device that includes a transmitter circuit configured to generate a radio-frequency (RF) signal, and a power amplifier (PA) system in communication with the transmitter circuit. The PA system includes a PA circuit having a driver stage and an output stage, and a detector configured to receive a portion of a radio-frequency (RF) signal from a path between the driver stage and the output stage. The detector is further configured to generate an output signal representative of power associated with the RF signal and compensated for variation in at least one operating condition associated with the PA circuit. The wireless device further includes an antenna in communication with the PA system, with the antenna being configured to transmit the RF signal. In some embodiments, the antenna can be a wireless local area network (WLAN) antenna.
For purposes of summarizing the disclosure, certain aspects, advantages and novel features of the inventions have been described herein. It is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically depicts a radio-frequency (RF) system having a detector implemented to detect power along an RF amplification path between a driver stage and an output stage.

FIG. 2 shows an example of a control system that can be implemented with a detector that measures power associated with a partially amplified RF signal.

FIG. 3 shows an example configuration of a detector that can be implemented as the detector of FIGS. 1 and 2.

FIG. 4 shows an example of a detector that can be a more specific example of the detector of FIG. 3.

FIG. 5 shows examples of how the compensated Vout in FIG. 4 can have reduced sensitivity to variations in PA temperature and supply voltage.

FIG. 6 shows an example of a packaged module where a detector having one or more features as described herein can be implemented on a die that is separate from a die having a PA.

FIG. 7 shows an example of a packaged module where a detector having one or more features as described herein can be implemented on a die that also includes a PA.

FIG. 8 depicts an example wireless device having one or more advantageous features described herein.

DETAILED DESCRIPTION OF SOME EMBODIMENTS

The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed invention.
In many radio-frequency (RF) applications, it is desirable to measure power levels of power amplifiers (PAs). For example, an integrated power detector can be incorporated into a wireless local area network (WLAN) PA to allow a power output level to be set accurately. To provide good directivity, a detector can either utilize a directional coupler on an output stage of a PA, or be implemented to detect a signal at a driver stage of the PA.
Couplers are typically large and can result in loss of some PA power. Accordingly, such couplers are not desirable in some PA applications. In the context of detection at the driver stage, a power detector is typically sensitive to variations in the gain of the output stage which can occur with, for example, variations in supply voltage and/or temperature.
Disclosed herein are circuits, devices and method related to detection of power at an output of a driver stage of a PA. For the purpose of description, it will be understood that such an output of the driver stage can be between the first and last stages in an amplification path with two or more stages. It will also be understood that detection of power as described herein can be implemented on a partially amplified RF signal. Although described in such an example context, it will be understood that one or more features of the present disclosure can also be implemented in other portions of an amplification path of a PA. For the purpose of description, it will be understood that detection of power can include detection of current, voltage, or some combination thereof, associated with RF signals.
FIG. 1 schematically depicts an RF system 100 having a detector 114 implemented to detect power along an RF amplification path between a driver stage 104 and an output stage 106 of a PA 116. The PA 116 is shown to receive an RF signal to be transmitted from a transceiver 102. The amplified RF signal from the PA 116 can be routed to an antenna 110 through, for example, an antenna switching module (ASM) 108. In some embodiments, such an amplification configuration can be implemented in, for example, a wireless local area network (WLAN) PA system and/or other PA systems.
FIG. 1 further shows that in some embodiments, the detector 114 can be coupled to the transceiver 102. As described herein in greater detail, a control circuit in the transceiver 102 can receive an output signal representative of the detected power from the detector 114. Based on such an output signal, the RF signal generated by the transceiver 102 can be adjusted appropriately.
FIG. 2 shows an example of a control system 120 that can be implemented with a detector 114 that measures power associated with a partially amplified RF signal. For example, an RF signal generated by a transceiver 102 can be provided to a driver stage 104 of a PA 116 through path 122. A path 124 can be provided between the driver stage 104 and an output stage 106 to route the partially amplified RF signal from the driver stage 104 to the output stage 106. The output stage 106 is shown to yield an amplified RF signal through path 126.
As shown in FIG. 2, the detector 114 can measure the power level associated with the partially amplified RF signal through node 128 along the path 124. As further shown in FIG. 2, the detector 114 can generate and provide a detector signal to a control component 134 that is coupled through, for example, path 130 and node 132. In the example of FIG. 2, the control component 134 is depicted as being part of the transceiver 102; however, it will be understood that some or all of the control component 134 can be implemented at other locations.
FIG. 3 shows an example configuration of a detector 114 that can be implemented as the detector of FIGS. 1 and 2. In the example of FIG. 3, an input to the detector 114 can be representative of power associated with an RF signal, and such an input can be provided through an RF input (RFin) node 128. Such a node can be, for example, node 128 in FIG. 2. An output signal generated by the detector 114 can be provided as, for example, an output voltage (Vout) at node 132. Such a node can be, for example, node 132 in FIG. 2.
FIG. 3 shows that in some embodiments, the detector 114 can include a detecting circuit 140 configured to receive an input signal sampled from a partially amplified RF signal (e.g., an output of the driver stage). As described herein, the detecting circuit 140 can be configured to receive the input signal and generate a voltage Vin having a magnitude representative of the magnitude of the partially amplified RF signal.
The voltage Vin is shown to be provided to an output circuit 146, as well as to a compensation circuit 141. The compensation circuit 141 is shown to generate a compensation current Icomp based on Vin and one or more currents that correspond to operating condition(s). The compensation current Icomp is shown to be combined with Vin to yield an output voltage Vout that represents the power associated with the partially amplified RF signal, compensated for the one or more operating conditions.
In FIG. 3, the example operating conditions are depicted as temperature of the PA (e.g., PA die temperature) and supply voltage provided to the PA. A current generator 143 can be configured to generate Itemp which is a current representative of the PA temperature; and a current generator 144 can be configured to generate Isupply which is a current representative of the supply voltage. A current generator 142 can be configured to generate Iin which is a current representative of the input voltage Vin.
In some embodiments, the compensation circuit 141 can include a combiner 145 configured to combine Itemp, Isupply, and Iin to generate the compensation current Icomp. Examples of the current generators 142, 143, 144 are described herein in greater detail.
FIG. 4 shows an example of a detector 114 that can be a more specific example of the detector 114 described in reference to FIG. 3. As described herein, the input to the detector 114 can be representative of the power associated with an output of the driver stage. In some embodiments, such an in input can be processed with a diode detection technique. For example, a diode D1 (e.g., a Schottky diode) can receive a sampled RF signal representative of the partially amplified RF signal at the output of the driver stage, and yield a slow-varying or DC current or voltage having a magnitude that is approximately proportional to the magnitude of the sampled RF signal. To achieve such proportionality, the rectified signal at node 150 can charge a capacitance (e.g., a capacitor) C1 to a voltage that is approximately proportional to the sampled RF signal amplitude.
The capacitance C1 is shown to couple node 150 to a signal ground. A current source 11 implemented between node 150 and the signal ground allows a discharge path for the capacitor C1 so that the voltage on node 150 follows the modulation of the RF envelope with most of the RF carrier signal removed. This voltage on node 150 can be passed through a low pass filter 154 (e.g., a 2 MHz low pass filter) to remove or reduce higher frequency components of the modulation to yield an input voltage Vin at node 156. The low pass filter 154 can include, for example, an RF filter in which a resistance R1 is provided between nodes 150 and 156, and a capacitance C1 couples node 156 to the signal ground.
The input voltage Vin resulting from the foregoing diode detector circuit and the low pass filter can be sensitive to variations in the gain of the output stage which can occur when the PA supply voltage and/or the PA temperature are changed. Thus, Vin can be compensated for one or more of such operating conditions. Although described in the context of PA supply voltage and PA temperature, it will be understood that compensation can be based on other operating and/or environmental conditions.
In the example of FIG. 4, compensation for the PA supply voltage variation and the PA temperature variation can be achieved in terms of currents representative of such variations. For example, a current generator 12 can receive a supply voltage Vcc from node 174 and generate a current that corresponds to a change in PA temperature. In some embodiments, the current generator 12 can be configured so that its output current increases when the PA temperature increases. Such an output current can be generated based on, for example, current proportional to absolute temperature.
In another example, a current generator 13 can receive the supply voltage Vcc from node 174 and generate a current that corresponds to a change in the supply voltage itself. For example, the current generator 13 can be configured so that its output current is proportional to the supply voltage. In some embodiments, such a current generator can be configured and operated in a known manner.
As shown in FIG. 4, an op amp 170 combined with first field-effect transistor (FET) M1 (e.g., PFET) and a resistor R3 can cause a current to flow in R3 so that the voltages on the input terminals of the op amp 170 are matched. Thus, in such a configuration, the current in M1 is proportional to Vin. This current in M1 is shown to be mirrored by M2 to produce a current I_Aat node 175.
In some embodiments, the current sources 12 and 13 may be used as control elements for a current multiplier 180. As described herein, the current multiplier 180 modifies the current I_Ausing currents I_Band I_Cfrom their respective sources 12 and 13 to compensate for PA temperature and supply voltage variations.
In the example of FIG. 4, the currents I_A, I_Band I_Cgenerally correspond to the currents I_in, I_tempand I_supply, respectively, as described in reference to FIG. 3. In such a context, I_A, I_Band I_Care shown to be provided to the current multiplier 180 through their respective nodes 175, 176, 177. In some embodiments, the current multiplier 180 can be configured to generate an output of AB/C. Accordingly, an output current from the current multiplier 180 can be represented as Iout=I_AI_B/I_C=(Vin/R3)I_B/I_C.
It will be understood that the foregoing multiplier functionality of AB/C is an example, and that other functions can be implemented by the current multiplier 180. Accordingly, the output current can be represented in a more general form as Iout=(Vin/R3)×f(Vbat, temp), where f(Vbat, temp) is a function of Vbat and temperature.
In FIG. 4, such an output current Iout from the current multiplier 180 is shown to be provided to an inverting input of an op amp 160. Vin from node 156 is shown to be provided to a non-inverting input of the op amp 160. An output Vout of the op amp 160 is shown to be provided to an output node 132, as well as to the inverting input through a resistance R2 to form a negative feedback loop. Such a configuration can result in the output voltage Vout to be Vin plus Iout scaled by the feedback loop resistance R2. Accordingly, Vout can be expressed as Vout=Vin+(Iout)(R2). Since Iout=(Vin/R3)×f(Vbat, temp), Vout can be expressed as Vout=Vin[1+(R2/R3)f(Vbat, temp)].
It is noted that in some embodiments, all of the detector signal (e.g., at node 156) can be put through the compensation loop and not use the positive terminal of the op amp 160. However, such a configuration may be subjected to offset problems that can affect current multiplier circuits for variations in Vin that may not be too large. For example, voltage Vin can vary in the order of about 20% for temperature changes of −40 degree to +120 degree and supply voltage changes of 3V to 5V.
In the example of FIG. 4, Vout reflects compensation of the measured power associated with the input RF signal (RFin). As described herein, such a compensation can include either or both of PA temperature and supply voltage. It will be understood that compensation can also be performed for other operating conditions.
FIG. 5 shows examples of how the compensated Vout in FIG. 4 can have reduced sensitivity to PA temperature and supply voltage. In FIG. 5, various Vout curves are plotted as a function of PA temperature. Curves 200, 202, 204 are for Vout without compensation, and curves 210, 212, 214 are for Vout with compensation. For the uncompensated curves 200, 202, 204, Vout can be Vin (e.g., at node 156 in FIG. 4). For the compensated curves 210, 212, 214, Vout can be obtained from the output node 132 in FIG. 4.
In FIG. 5, the curve 200 is obtained at a supply voltage of 3.0V; the curve 202 is obtained at a supply voltage of 3.3V; and the curve 204 is obtained at a supply voltage of 3.6V. The curve 210 is obtained at a supply voltage of 3.6V; the curve 212 is obtained at a supply voltage of 3.3V; and the curve 214 is obtained at a supply voltage of 3.0V. From the two groups of curves (200, 202, 204 in the uncompensated configuration, and 210, 212, 214 in the compensated configuration), one can see that the uncompensated detector output has a significant dependence on the PA temperature, while the compensated detector output is essentially insensitive to PA temperature variation. One can also see that for the uncompensated configuration, variation in the supply voltage results in noticeable shifts of the detector output. For the compensated configuration, the detector output is again essentially insensitive to supply voltage variation.
In some embodiments, at least a portion of a detector having one or more features as described herein (e.g., 114 in FIGS. 1-4) can be implemented on a semiconductor die. Such a semiconductor die may or may not be the same die on which the PA (e.g., 116 in FIGS. 1 and 2) is implemented. For example, both of the detector 114 and the PA 116 can be implemented on a BiCMOS die. In another example, if the PA 116 is implemented on a GaAs die, it may not be desirable or practical to implement the detector 114 on the same die. Accordingly, the detector 114 can be implemented on a die that is different from the PA die.
FIG. 6 shows an example of a packaged module 300 where a detector 114 having one or more features as described herein can be implemented on a die 360 that is separate from a die 302 having a PA 116. In the example of FIG. 6, both of the die 360, 302 are shown to be mounted on a packaging substrate 350 that is configured to receive a plurality of components. Such components can include one or more die, such as the example die 360, 302, as well as one or more surface mounted devices (SMDs) such as passive components. In some embodiments, the packaging substrate 350 can include, for example, a laminate substrate.
In the example of FIG. 6, the die 360 can include a plurality of electrical contact pads 362 configured to allow formation of electrical connections 364 such as wirebonds between the die 360 and contact pads 366 formed on the packaging substrate 350. Similarly, the die 302 can include a plurality of electrical contact pads 352 configured to allow formation of electrical connections 354 such as wirebonds between the die 302 and contact pads 356 formed on the packaging substrate 350.
FIG. 7 shows an example of a packaged module 300 where a detector 114 having one or more features as described herein can be implemented on a die 370 that also includes a PA 116. In the example of FIG. 7, the die 370 is shown to be mounted on a packaging substrate 350 that is configured to receive a plurality of components. Such components can include one or more die, such as the example die 370, as well as one or more surface mounted devices (SMDs) such as passive components. In some embodiments, the packaging substrate 350 can include a laminate substrate. In the example of FIG. 7, the die 370 can include a plurality of electrical contact pads 352 configured to allow formation of electrical connections 354 such as wirebonds between the die 370 and contact pads 356 formed on the packaging substrate 350.
In some embodiments, each of the modules 300 of FIGS. 6 and 7 can also include one or more packaging structures to, for example, provide protection and facilitate easier handling of the module 300. Such a packaging structure can include an overmold formed over the packaging substrate 350 and dimensioned to substantially encapsulate the various circuits and components implemented on the packaging substrate. It will be understood that although the module 300 is described in the context of wirebond-based electrical connections, one or more features of the present disclosure can also be implemented in other packaging configurations, including flip-chip configurations.
In some embodiments, a die having the PA 116 with its detector 114 can implemented in a packaging configuration that does not necessarily rely on a laminate substrate. For example, such a die can be implemented directly in a QFN type package and not rely on a laminate.
It will also be understood that although the examples of FIGS. 6 and 7 are described in the context of wirebond die, one or more features of the present disclosure can be implemented in other types of die. For example, a flip chip PA die can include some or all of a detector 114 as described herein.
In some implementations, a device and/or a circuit having one or more features described herein can be included in an RF device such as a wireless device. Such a device and/or a circuit can be implemented directly in the wireless device, in a modular form as described herein, or in some combination thereof. In some embodiments, such a wireless device can include, for example, a base station configured to provide wireless services, a cellular phone, a smart-phone, a hand-held wireless device with or without phone functionality, a wireless tablet, etc.
FIG. 8 schematically depicts an example wireless device 400 having one or more advantageous features described herein. In the context of various configurations described herein, one or more modules having functionality depicted as 300 can be included in the wireless device 400. As described herein, such a module can include functionality associated with a detector 114 having one or more features as described herein, and functionality associated with a PA 116.
For example, a front-end module (FEM) 300 for WLAN/GPS operations can include a PA 116 and a detector 114 having one or more features as described herein. Such a PA can be configured to amplify a WLAN signal for transmission through an antenna 456. Such a WLAN signal can be generated by a baseband sub-system 408 and routed to the FEM 300 through a WLAN/Bluetooth system-on-chip (SOC) 460.
In the example of FIG. 8, transmission and reception of Bluetooth signals can be facilitated by an antenna 458. In the example shown, GPS functionality can be facilitated by the FEM 300 in communication with a GPS antenna 454 and a GPS receiver 450.
In another example, an RF PA module depicted as 300 can include one or more features as described herein. Such an RF PA module 300 can include one or more bands, and each band can include one or more amplification stages. One or more of such amplification stages can be in communication with one or more detectors (114) and benefit from the compensated power detection techniques as described herein.
In the example wireless device 400, the RF PA module 300 having a plurality of PAs can provide an amplified RF signal to a switch 414 (via duplexer 412), and the switch 414 can route the amplified RF signal to an antenna 416. The PA module 300 can receive an unamplified RF signal from a transceiver 410.
The transceiver 410 can also be configured to process received signals. Such received signals can be routed to an LNA (not shown) from the antenna 416, through the duplexer 412. As described herein, the transceiver 410 can also include a controller (e.g., 134 in FIG. 2) configured to receive the detected power signal and operate the transceiver 410 accordingly.
The transceiver 410 is shown to interact with a baseband sub-system 408 that is configured to provide conversion between data and/or voice signals suitable for a user and RF signals suitable for the transceiver 410. The transceiver 410 is also shown to be connected to a power management component 406 that is configured to manage power for the operation of the wireless device 400. Such a power management component can also control operations of the baseband sub-system 408, as well as other components.
The baseband sub-system 408 is shown to be connected to a user interface 402 to facilitate various input and output of voice and/or data provided to and received from the user. The baseband sub-system 408 can also be connected to a memory 404 that is configured to store data and/or instructions to facilitate the operation of the wireless device, and/or to provide storage of information for the user.
A number of other wireless device configurations can utilize one or more features described herein. For example, a wireless device does not need to be a multi-band device. In another example, a wireless device can include additional antennas such as diversity antenna, and additional connectivity features such as Wi-Fi, Bluetooth, and GPS.
Unless the context clearly requires otherwise, throughout the description and the claims, the words “comprise,” “comprising,” and the like are to be construed in an inclusive sense, as opposed to an exclusive or exhaustive sense; that is to say, in the sense of “including, but not limited to.” The word “coupled”, as generally used herein, refers to two or more elements that may be either directly connected, or connected by way of one or more intermediate elements. Additionally, the words “herein,” “above,” “below,” and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Where the context permits, words in the above Description using the singular or plural number may also include the plural or singular number respectively. The word “or” in reference to a list of two or more items, that word covers all of the following interpretations of the word: any of the items in the list, all of the items in the list, and any combination of the items in the list.
The above detailed description of embodiments of the invention is not intended to be exhaustive or to limit the invention to the precise form disclosed above. While specific embodiments of, and examples for, the invention are described above for illustrative purposes, various equivalent modifications are possible within the scope of the invention, as those skilled in the relevant art will recognize. For example, while processes or blocks are presented in a given order, alternative embodiments may perform routines having steps, or employ systems having blocks, in a different order, and some processes or blocks may be deleted, moved, added, subdivided, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of different ways. Also, while processes or blocks are at times shown as being performed in series, these processes or blocks may instead be performed in parallel, or may be performed at different times.
The teachings of the invention provided herein can be applied to other systems, not necessarily the system described above. The elements and acts of the various embodiments described above can be combined to provide further embodiments.
While some embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the disclosure.

Claims

1. An amplifier comprising:

an amplification stage having an input and an output; and

a detector coupled to the output of the amplification stage and configured to generate an input signal representative of power associated with an amplified signal provided by the amplification stage, the detector further configured to generate an output signal based at least in part on a compensation signal resulting from a combination of a first current representative of the input signal and a second current representative of an operating condition associated with the amplifier.

2. The amplifier of claim 1 wherein the amplification stage includes a driver stage.

3. The amplifier of claim 2 further comprising an output stage having an input coupled to the output of the driver stage, such that the detector is coupled to a node between the driver stage and the output stage.

4. The amplifier of claim 1 wherein the detector is further configured to communicate with a control circuit to provide the output signal to the control circuit to adjust an amplification operation.

5. The amplifier of claim 1 wherein the detector includes a detecting circuit configured to generate an input voltage as the input signal.

6. The amplifier of claim 5 wherein the detecting circuit includes a diode configured by rectify a portion of the amplified signal, and a capacitor circuit configured to provide the input voltage that is approximately proportional to an amplitude of the rectified signal.

7. The amplifier of claim 6 wherein the detector further includes a compensation circuit configured to generate a compensation current as the compensation signal by combining the first current with the second current.

8. The amplifier of claim 7 wherein the compensation circuit is configured such that the first current is proportional to the input voltage, and the second current is proportional to a value associated with the operating condition.

9. The amplifier of claim 8 wherein the value associated with the operating condition includes one or more of a current proportional to an amplifier temperature and a current proportional to a supply voltage.

10. The amplifier of claim 9 wherein the detector further includes an output circuit configured to receive the input voltage and the compensation current, and generate the output signal by combining the compensation current and the input voltage.

11. The amplifier of claim 10 wherein the output signal is substantially insensitive to a variation of the amplifier temperature within an operating range.

12. The amplifier of claim 1 wherein the amplifier is a power amplifier.

13. The amplifier of claim 1 wherein the detector is configured such that the input signal is a slow-varying or direct-current signal.

14. The amplifier of claim 1 wherein the detector is configured such that the output signal is generated based on the compensation signal and the input signal.

15. (canceled)

16. (canceled)

17. (canceled)

18. (canceled)

19. (canceled)

20. (canceled)

21. (canceled)

22. (canceled)

23. (canceled)

24. (canceled)

25. An amplifier die comprising:

a semiconductor substrate; and

an amplifier implemented on the semiconductor die and including an amplification stage having an input and an output, the amplifier further including a detector implemented on the die and coupled to the output of the amplification stage, the detector configured to generate an input signal representative of power associated with an amplified signal provided by the amplification stage, the detector further configured to generate an output signal based at least in part on a compensation signal resulting from a combination of a first current representative of the input signal and a second current representative of an operating condition associated with the amplifier.

26. A radio-frequency module comprising:

a packaging substrate configured to receive a plurality of components; and

an amplifier implemented on the packaging substrate and including an amplification stage having an input and an output, the amplifier further including a detector implemented on the packaging substrate and coupled to the output of the amplification stage, the detector configured to generate an input signal representative of power associated with an amplified signal provided by the amplification stage, the detector further configured to generate an output signal based at least in part on a compensation signal resulting from a combination of a first current representative of the input signal and a second current representative of an operating condition associated with the amplifier.

27. The radio-frequency module of claim 26 wherein the amplification stage is implemented on a first die, and the detector is implemented on a second die.

28. (canceled)

29. The radio-frequency module of claim 26 wherein the amplification stage is configured to amplify a wireless local area network (WLAN) signal.

30. The radio-frequency module of claim 26 wherein the amplifier is a power amplifier.

31. The radio-frequency module of claim 26 wherein the detector is configured such that the input signal is a slow-varying or direct-current signal.

32. (canceled)

33. (canceled)

34. (canceled)

35. (canceled)