US20170309739A1 - Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body - Google Patents
Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body Download PDFInfo
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- US20170309739A1 US20170309739A1 US15/646,496 US201715646496A US2017309739A1 US 20170309739 A1 US20170309739 A1 US 20170309739A1 US 201715646496 A US201715646496 A US 201715646496A US 2017309739 A1 US2017309739 A1 US 2017309739A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 97
- 230000005669 field effect Effects 0.000 claims abstract description 13
- 238000000034 method Methods 0.000 claims description 4
- 230000008569 process Effects 0.000 claims description 3
- 239000000758 substrate Substances 0.000 description 16
- 238000009413 insulation Methods 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- 230000008878 coupling Effects 0.000 description 10
- 238000010168 coupling process Methods 0.000 description 10
- 238000005859 coupling reaction Methods 0.000 description 10
- 210000000746 body region Anatomy 0.000 description 5
- 230000003071 parasitic effect Effects 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 238000006073 displacement reaction Methods 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 230000036413 temperature sense Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000009529 body temperature measurement Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7815—Vertical DMOS transistors, i.e. VDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
Definitions
- the semiconductor die in which a trench transistor is integrated, may include further circuitry to provide further functions besides its main function of being an electronic switch.
- the chip may further include a temperature sensor and respective sense circuitry to measure the temperature of the transistor and to generate a temperature signal (i.e. a current or a voltage signal representing the temperature present at the location of the temperature sensor).
- the temperature signal may be used, for example, in an over-temperature or an overload protection circuit, which may be needed in order to protect the transistor against thermal breakdown.
- Further circuitry may be included in the chip to provide other functions such as current sensing, over-current protection, a digital bus interface (e.g. Serial Peripheral Interface, SPI) etc.
- SPI Serial Peripheral Interface
- the semiconductor device includes a semiconductor body, at least one wiring layer disposed on the semiconductor body, and a field effect transistor integrated in the semiconductor body.
- the field effect transistor has a plurality of gate electrodes residing in corresponding gate trenches, which are formed in the semiconductor body.
- the semiconductor device further includes a temperature sensor integrated in the semiconductor body adjacent to the field effect transistor.
- a temperature sense circuit is integrated in the semiconductor body remote from the temperature sensor, and at least one additional trench is formed in the semiconductor body.
- the at least one additional trench includes at least one sense line, which electrically connects the temperature sensor and the temperature sense circuit.
- At least one conductive pad is formed in the at least one wiring layer, and the at least one conductive pad is arranged to at least partially cover the at least one additional trench to form a shielding of the sense line(s).
- FIG. 6 is a circuit diagram illustrating the bipolar transistor and a sense circuit used to operate the bipolar transistor as temperature sensor, wherein a four-terminal sensing technique is used to obtain a signal from the temperature sensor;
- FIG. 2 illustrates a cross-sectional view through a portion of a semiconductor die, which is formed by a semiconductor substrate 10 (i.e. the wafer) and (optionally) an epitaxial layer 11 disposed on the substrate 10 .
- FIG. 2 shows one example of how a bipolar transistor T S can be integrated in the semiconductor die and how this bipolar transistor may be contacted to be used as temperature sensor as shown in FIG. 1 .
- the substrate 10 and the epitaxial layer, 11 are collectively referred to as semiconductor body 100 .
- the semiconductor body is doped with n-type dopants.
- a p-doped base region 31 is formed in the semiconductor body 100 , e.g.
- trenches 70 , 70 ′, 70 ′′ are formed in the semiconductor body, wherein the trenches extend substantially parallel to each other in a direction perpendicular to the sectional plane of the depicted cross-section.
- the sense lines 81 , 82 are arranged in two adjacent trenches, which are the two trenches 70 in the middle of the cross-section in FIG. 4 .
- the sense lines 81 , 82 may be formed of metal or polycrystalline silicon and are isolated from the surrounding semiconductor material by an isolation layer 73 (e.g. silicon oxide layer).
- an isolation layer 73 e.g. silicon oxide layer
- the temperature sensor can be regarded as a first circuit and the sense circuit can be regarded as second circuit, wherein first and second circuit are connected via connecting lines arranged in at least one trench (analogously to the sense and the force lines described with reference to the embodiments discussed herein) and shielded by a conductive pad covering the respective trench(es).
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
A semiconductor device includes at least one wiring layer disposed on a semiconductor body, a field effect transistor integrated in the semiconductor body, the field effect transistor having a plurality of gate electrodes residing in corresponding gate trenches formed in the semiconductor body, a first circuit integrated in the semiconductor body adjacent to the field effect transistor, and a second circuit integrated in the semiconductor body and remote from the first circuit. The semiconductor device further includes a first additional trench formed in the semiconductor body and at least one conductive pad formed in the at least one wiring layer. The first additional trench includes at least one connecting line which electrically connects the first circuit and the second circuit. The at least one conductive pad is arranged to at least partially cover the first additional trench to form a shielding of the at least one connecting line.
Description
- This application is a Continuation of U.S. application Ser. No. 14/840,925 filed on 31 Aug. 2015, which in turn claims priority to German Patent Application No. 10 2014 112 823.0 filed on 5 Sep. 2014, the content of both of said applications incorporated herein by reference in their entirety.
- The present disclosure relates to the field of power semiconductor switches with an integrated temperature sensor.
- Power transistors such as power MOS field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs) or the like are often implemented as so-called vertical transistors. The term “vertical” refers to the direction of load current flow through the semiconductor die, which is vertically with respect to a top surface of the semiconductor die. Furthermore, such power transistors are usually composed of a plurality of transistor cells and, for each cell, the gate electrode is arranged in a so-called “trench”, which extends from the top surface vertically into the semiconductor die. This class of power transistors is usually referred to as “trench transistors”.
- The semiconductor die (chip), in which a trench transistor is integrated, may include further circuitry to provide further functions besides its main function of being an electronic switch. For example, the chip may further include a temperature sensor and respective sense circuitry to measure the temperature of the transistor and to generate a temperature signal (i.e. a current or a voltage signal representing the temperature present at the location of the temperature sensor). The temperature signal may be used, for example, in an over-temperature or an overload protection circuit, which may be needed in order to protect the transistor against thermal breakdown. Further circuitry may be included in the chip to provide other functions such as current sensing, over-current protection, a digital bus interface (e.g. Serial Peripheral Interface, SPI) etc.
- Common manufacturing technologies allow two wiring layers arranged on top of the semiconductor body, wherein the first wiring layer is usually formed by polycrystalline silicon and the second wiring layer is usually formed by a metal (e.g. aluminum). The two wiring layers are used to interconnect the individual circuit components integrated in the semiconductor die to form the desired electronic circuit. On top of the wiring layers (and isolated therefrom) a further metal layer is provided, which is comparably thick and sometimes referred to as “power metal layer”. This metal layer is used as contact layer (also acting as bond pad) to contact an external load terminal (e.g. source or collector terminal of the power transistor) with the chip.
- The mentioned temperature sensors are usually arranged close to or within (e.g. in the center of) an array of transistor cells, which compose the power transistor, and usually the temperature sensor is connected to the respective sense circuit via strip lines (sense lines) formed the mentioned wiring layers on top of the semiconductor body. As the sense circuit may be formed in the semiconductor chip aside from the array of transistor cells the strip lines between sense circuit and temperature sensor may be comparably long, e.g. 300 μm or even more.
- As the (patterned) wiring layers and the top metal layer forming the contact layer for an external load terminal are substantial parallel (coplanar) and separated by comparably thin insulation layers, a significant capacitive coupling occurs, particularly between the contact layer and the subjacent wiring layer. This capacitive coupling (due to parasitic capacitances between the wiring layers and the contact layer) results in a significant sensitivity to “direct power injection” (DPI). Particularly, when the power transistor is an n-channel device operated as high-side switch the electric potential (and thus the voltage) of the (power) contact layer will (during a switching operation) rapidly change from zero (ground potential) to approximately the upper supply potential and vice versa. This will cause displacement currents in the sense lines and have a negative impact on the temperature sensing as displacement currents may result in distortions of the temperature signal.
- In view of the above, there is a need for an improved semiconductor switch with an integrated temperature sensor.
- A semiconductor device is described herein. In accordance with one example of the invention the semiconductor device includes a semiconductor body, at least one wiring layer disposed on the semiconductor body, and a field effect transistor integrated in the semiconductor body. The field effect transistor has a plurality of gate electrodes residing in corresponding gate trenches, which are formed in the semiconductor body. The semiconductor device further includes a temperature sensor integrated in the semiconductor body adjacent to the field effect transistor. A temperature sense circuit is integrated in the semiconductor body remote from the temperature sensor, and at least one additional trench is formed in the semiconductor body. The at least one additional trench includes at least one sense line, which electrically connects the temperature sensor and the temperature sense circuit. At least one conductive pad is formed in the at least one wiring layer, and the at least one conductive pad is arranged to at least partially cover the at least one additional trench to form a shielding of the sense line(s).
- In accordance with another example of the invention, the semiconductor device includes a semiconductor body, at least one wiring layer disposed on the semiconductor body, and a field effect transistor integrated in the semiconductor body. The field effect transistor has a plurality of gate electrodes residing in corresponding gate trenches formed in the semiconductor body. A first circuit is integrated in the semiconductor body adjacent to the field effect transistor, and a second circuit integrated in the semiconductor body remote from the first circuit. At least a first additional trench is formed in the semiconductor body, wherein the first additional trench includes at least one connecting line, which electrically connects the first circuit and the second circuit. Furthermore, the semiconductor device includes at least one conductive pad formed in the at least one wiring layer. The at least one conductive pad is arranged to at least partially cover the first additional trench to form a shielding of the connecting line(s).
- Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
- The invention can be better understood with reference to the following drawings and description. The components in the figures are not necessarily to scale, instead emphasis being placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts. In the drawings:
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FIG. 1 is a circuit diagram illustrating the power transistor and a bipolar transistor, which is used as temperature sensor; -
FIG. 2 is a cross-sectional view of a semiconductor die showing one example of the bipolar transistor and the wiring layers, which may be used to contact the bipolar transistor; -
FIG. 3 is a top view of a semiconductor die illustrating the position of a temperature sensor embedded in an array of transistor cells; -
FIG. 4 is a cross-sectional view of a semiconductor die illustrating one example of how to route the sense lines through an array of transistor cells to contact a temperature sensor; -
FIG. 5 is a cross-sectional view of another example of how to route the sense lines in a single trench; -
FIG. 6 is a circuit diagram illustrating the bipolar transistor and a sense circuit used to operate the bipolar transistor as temperature sensor, wherein a four-terminal sensing technique is used to obtain a signal from the temperature sensor; -
FIG. 7 is a cross-sectional view of a semiconductor die showing one example of the bipolar transistor and the wiring layers, which may be used to contact the bipolar transistor for four-terminal sensing; -
FIG. 8 illustrates a longitudinal section through a trench in which a sense line is arranged; and -
FIG. 9 is a top view illustrating the structure of a wiring layer arranged on the semiconductor body. -
FIG. 1 is a circuit diagram illustrating—on a circuit level—one example of a power transistor including a temperature sensor. In the present example, a MOSFET is used as power transistor. However, other types of transistors (e.g. an IGBT) may be used instead. The semiconductor chip has (amongst other electric terminals) two load terminals which are labelled SUP and OUT in the present example. The two load terminals SUP and OUT are coupled via the load current path (i.e. the drain-source current path in case of a MOSFET) of the power transistor MP, wherein the drain electrode D of the transistor MP is connected to the first load terminal SUP and the source electrode S of the transistor MP is connected to the second load terminal OUT. In the present example, the transistor MP is an n-channel transistor, which is operated as a high-side switch and, therefore, a supply voltage VBB is applied to the first load terminal SUP, wherein the second load terminal OUT is connected with a load (not shown), which may be connected between the load terminal OUT and ground potential. In the present example, a gate voltage VG is applied to the gate electrode of the power transistor MP. The output voltage present at the output terminal OUT is denoted as VOUT. - As mentioned, the power transistor MP is a vertical n-channel MOSFET and, therefore, the electric potential present at the drain electrode of the transistor MP is the same as the potential present in the semiconductor substrate. In other words, there is a low resistance electric connection between the load terminal SUP and the semiconductor substrate, and the substrate voltage thus equals the supply voltage VBB.
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FIG. 1 also illustrates a bipolar transistor TS (temperature sense transistor) which may be used to sense the temperature in the semiconductor body. One terminal of the bipolar transistor TS is usually electrically connected to the substrate. As any bipolar transistor, the transistor TS has a base B, a collector C and an emitter E. In the present example, the collector C of the bipolar transistor TS is connected to the substrate, and thus the supply voltage VBB is also applied to the collector C of the bipolar transistor TS. The base-emitter diode may be used as temperature sensitive element as the forward voltage VBE of the base-emitter diode (when forward biased) as well as the leakage current of the base-emitter diode are temperature dependent. Therefore, the base B as well as the emitter E of the bipolar transistor TS are connected to atemperature sense circuit 40 viasense lines FIG. 4 . -
FIG. 2 illustrates a cross-sectional view through a portion of a semiconductor die, which is formed by a semiconductor substrate 10 (i.e. the wafer) and (optionally) anepitaxial layer 11 disposed on thesubstrate 10.FIG. 2 shows one example of how a bipolar transistor TS can be integrated in the semiconductor die and how this bipolar transistor may be contacted to be used as temperature sensor as shown inFIG. 1 . For the further discussion thesubstrate 10 and the epitaxial layer, 11 (if present) are collectively referred to assemiconductor body 100. In the present example, the semiconductor body is doped with n-type dopants. A p-dopedbase region 31 is formed in thesemiconductor body 100, e.g. using ion implantation or diffusion of dopants. Thebase region 31 extends from the top surface into thesemiconductor body 100. Within the p-dopedbase region 31, an n-dopedemitter region 32 is formed. The emitter region 32 (emitter well) extends from the top surface of thesemiconductor body 100 into thebase region 31 and is embedded therein. The n-doped region of the semiconductor body vertically below thebase region 31 acts as collector region. As can be seen fromFIG. 2 , an npn structure (i.e. a bipolar transistor) is formed by the n-doped collector region (semiconductor body 100), the p-dopedbase region 31, and the n-dopedemitter region 32. The collector region is formed by the n-doped portion of the semiconductor body (substrate 10 and epitaxial layer 11) and thus is at the same potential as the substrate (see alsoFIG. 1 ). -
FIG. 2 further shows twowiring layers semiconductor body 100 and isolated from the semiconductor body and from each other byinsulation layers semiconductor body 100 or interconnections between the wiring layers. Thelower wiring layer 33 may be formed by polycrystalline silicon (polysilicon) and isolated from the top surface of thesemiconductor body 100 by insulation layer 36 (e.g. silicon oxide layer). Theupper wiring layer 34 may be formed by a metal (e.g. aluminum) and isolated from thelower wiring layer 33 byinsulation layer 37. In the present example, theemitter region 32 is contacted by a line in thewiring layer 33 whereas thebase region 31 is contacted by a line in thewiring layer 34. On top of the wiring layers 33, 34 a comparably thick metal layer is disposed ascontact layer 35, which forms a contact pad for contacting a power electrode (the source electrode of the power MOSFET MP in the present example, see alsoFIG. 1 ). Thecontact layer 35 is isolated from the wiring layers 33 and 34 byinsulation layer 38, which may be composed of a silicon oxide layer, a silicon nitride layer, or both. The strip lines and other structures formed in the wiring layers 33 and 34 as well as thecontact layer 35 are capacitively coupled. The coupling capacitances may have undesired effects and may be regarded as parasitic capacitances.FIG. 2 includes a schematic illustration of a parasitic capacitor CP between the portion ofwiring layer 34, which is connected to the base of the temperature sensing transistor TS, andcontact layer 35. -
FIG. 3 is a top view of a portion of thesemiconductor body 100 with the metal stack (i.e. a stack of wiring layers) on top, which includes the bipolar transistor TS. As mentioned above, the temperature sensor is usually included in an array of transistor cells, which compose the power MOS transistor MP (seeFIG. 1 ). The position of the transistor TS as well as the path of the sense lines 81, 82 (cf.FIG. 1 ) are sketched using dashed lines. As can be seen fromFIG. 3 , the sense lines 81, 82, are routed through the surrounding array of transistor cells along a comparably long path of several hundred micrometers. -
FIG. 4 is a cross-sectional view of thesemiconductor body 100 shown inFIG. 3 . The sectional plane of the depicted cross-section does not run through the temperature sensor (transistor TS) but perpendicularly through the sense lines 81, 82 sketched inFIG. 3 , which are implemented in trenches in accordance with the depicted example (and different from the previous example ofFIG. 2 ). -
Several trenches trenches 70 in the middle of the cross-section inFIG. 4 . The sense lines 81, 82 may be formed of metal or polycrystalline silicon and are isolated from the surrounding semiconductor material by an isolation layer 73 (e.g. silicon oxide layer). Different from the example ofFIG. 2 , wiring layers 33 and 34 are not needed for the routing of the sense lines 81, 82. These layers can, however, be used for the wiring of other circuitry. As the sense lines 81, 82 are routed through an array of transistor cells, thetrenches 70′ on the left side and the right side of the sense lines 81, 82, are part of an edge termination of the power MOS transistor. That is, thetrenches 70′ includesfield plates 75, which may be electrically connected to source potential. Such an edge termination is as such known and thus not further discussed here in more detail. Theouter trenches 70″ inFIG. 4 are also part of the array of transistor cells.Gate electrodes 71 are arranged intrenches 70″ and isolated from the adjacent walls of the trench by gate oxide layers 72.Field plates 75′ may be arranged in the trenched 70″ under thegate electrodes 71. Thefield plates 75′ are isolated from the surroundingsemiconductor body 100 by anoxide layer 73 which is usually thicker than thegate oxide layer 72. - In the present example of an n-channel MOSFET, the
semiconductor body 100 is doped with n-type dopants (e.g. phosphor, arsenic, antimony). So-calledbody regions 62, which are doped with p-type dopants (e.g. aluminum, gallium, indium, boron), are arranged in thesemiconductor body 100 adjacent to thegate electrodes 71. Thebody regions 62 extend vertically into thesemiconductor body 100 from the top surface of thesemiconductor body 100, thus forming a so-called p-doped well (p-well). These p-wells may be omitted in inactive regions of the transistor. Such an inactive region is, for example, the region adjoining thetrenches 70, which include the sense lines 81, 82. In active regions of the transistor,source regions 61 are embedded in thebody regions 62 adjoining thetrenches 71, which include thegate electrodes 71. Theregion 63 subjacent to thebody regions 62 is referred to as drift region. At the bottom surface (not shown) of the semiconductor body 100 a drain electrode contacts the substrate 10 (which forms the drain of the power transistor). - Analogously to the previous example of
FIG. 2 , twowiring layers semiconductor body 100. Thewiring layer 33 is isolated from the semiconductor body by theinsulation layer 36 and from theother wiring layer 34 by theinsulation layer 37.Insulation layer 38 separates thecontact layer 35 from theupper wiring layer 34, wherein theinsulation layer 38 may be composed of two sub-layers, e.g. one oxide layer and anitride layer 38′. In the present example, the lower wiring layer 33 (polysilicon layer) is not used to contact the transistor cells. In the present example,body regions 62 andsource regions 61 are electrically connected to the upper wiring layer 34 (metal layer) by means ofvias 52. The respective metal pads in thewiring layer 34 are labelled aspads 51, which are electrically connected to thecontact layer 35 by means ofvias 35′ through theinsulation layer 38. - As mentioned above, the sense lines 81, 82 are routed in two (e.g. neighboring)
trenches 70. Placing the sense lines in thetrenches 70 results in a strong capacitive coupling between the sense lines and the surrounding semiconductor body 100 (symbolized inFIG. 4 by capacitor CS) as well as in lower (parasitic) capacitances between the contact layer 35 (seeFIG. 1 , terminal OUT) and the sense lines 81, 82. Particularly, when the power MOSFET MP is operated as high-side switch, the electric potential of the contact layer 35 (i.e. the source potential of the power MOSFET MP) may vary rapidly between ground potential (e.g. 0 volts) and supply voltage VBB (seeFIG. 1 ) due to the switching operation of the power MOSFET MP. The capacitive coupling caused by the mentioned parasitic capacitances (similar to capacitance CP illustrated inFIG. 2 as well as capacitance CS) forms a capacitive voltage divider and results in reduced displacement currents injected from the load current path (which includes the drain-source current path of the power MOSFET MP) into the sense lines 81, 82, as compared to the planar wiring illustrated in the previous example ofFIG. 2 . This effect (displacement currents) caused by switching of the power transistor MP and direct power injection (DPI) due to transient, pulse-shaped disturbances may deteriorate the sensed signals as well as the measurement result obtained therefrom. To further improve the situation, at least onemetal pad 50 is provided in the wiring layers 33 or 34 (or in both) between (in a vertical direction) thecontact layer 35 and thetrenches 70, in which the sense lines 81, 82 are routed. Themetal pad 50 is connected to a constant voltage such as the supply voltage VBB (substrate voltage, see alsoFIG. 1 ), thus inhibiting the capacitive coupling between the sense lines 81, 82 and the contact layer 35 (output/source terminal OUT). The capacitances between the shielding 50 and the sense lines 81 and 82 are labelled CSH inFIG. 4 . - In the example of
FIG. 4 , the twosense lines separate trenches 70. The capacitive coupling (capacitances CS) between the sense lines 81, 82 and the substrate (which is at supply voltage VBB in the present example, seeFIG. 1 ) may be tuned by appropriate adjustment of the thickness ofinsulation layer 73′ (oxide layer), which separates the sense lines from the surroundingsemiconductor body 100. The example ofFIG. 5 is essentially identical to the previous example ofFIG. 4 except that both senselines single trench 70, which allows to reduce the inactive area in the array of transistor cells. In the present example the sense lines 81, 82 are routed in thetrench 70 one above the other. However, the sense lines 81, 82, may also be routed side by side within a single trench. Similar to the previous example the capacitive coupling between the semiconductor body 100 (at substrate voltage VBB) and the sense lines 81, 82, may be controlled by appropriate dimensioning of the thickness of theinsulation layer 73′ which separates the sense lines 81 and 82 from the surrounding semiconductor body. The thickness of theinsulation layer 73′ may be different betweensense line 81 and semiconductor body and betweensense line 82 and semiconductor body. The remaining components and features of the present example ofFIG. 5 have already been discussed with reference toFIG. 4 and are thus not repeated here. -
FIG. 6 illustrates—similar toFIG. 1 —the bipolar transistor TS, which is connected to asense circuit 40 for four-terminal sensing of temperature. According to the present example, the base-emitter diode of the bipolar transistor TS is supplied with an operating current iSENSE (force current) via a pair of so-calledforce lines 81′, 82′ (sensor supply lines), whereas the resulting base-emitter voltage VBE (i.e. the signal carrying the temperature information) is sensed via a separate pair ofsense lines sense circuit 40. The current source may be a stabilized constant-current source. The voltage VBE is sensed usingseparate sense lines FIG. 6 by measurement circuit M, which receives the voltage VBE and derives therefrom a signal STEMP representing the temperatures. Measurement circuit M may include, for example, operational amplifiers and further signal processing circuitry. -
FIG. 7 is a cross-sectional view of thesemiconductor body 100 similar to the previous example ofFIG. 4 . The present example ofFIG. 7 is essentially identical to the previous example ofFIG. 4 except thatforce lines 81′, 82′ are routed in thetrenches 70 in addition tosense lines force line 81′ (connected to the base of bipolar transistor TS) is arranged above thecorresponding sense line 81 in thesame trench 70. Analogously,force line 82′ (connected to the emitter of bipolar transistor TS) is arranged above thecorresponding sense line 82 in the neighboring trench. Similar to the previous examples, the thickness of theinsulation layer 73′ between the sense andforce lines semiconductor body 100 is achieved. -
FIG. 8 illustrates a longitudinal section corresponding to the cross section ofFIG. 7 . Accordingly,FIG. 8 illustrates thetrench 70, in which thesense line 81 and the correspondingforce line 81′ reside. At one end (right inFIG. 8 ) thesense line 81 and theforce line 81′ are electrically connected to thepads wiring layer 34 by means ofvias FIG. 9 ), thesense line 81 and theforce line 81′ are electrically connected to pad 56 formed in thewiring layer 34 by means ofvias 91″ and 91′″. Thetrench 70, thepads vias FIG. 9 , which illustrates the structure of thewiring layer 34 arranged on the semiconductor body 100 (see alsoFIG. 7 ). Thecontact pads FIG. 6 ) whereas thecontact pad 56 is wired with the base of the bipolar transistor TS.FIG. 8 also illustrates thepad 50, which shields the sense andforce lines force lines contact layer 35, which is electrically connected to the source potential of the power MOSFET MP. The remaining components shown inFIG. 8 are also present in the previous sectional views ofFIGS. 4 and 7 and are thus not repeated here. - It is now referred to
FIG. 9 , which is a top view illustrating the layout of thewiring layer 34 arranged on the semiconductor body. The sectional plane A-A′ defining the section of preciousFIG. 8 is also depicted inFIG. 8 .FIG. 9 includes (dashed lines) twoadjacent trenches 70, in which the sense lines 81, 82 and the correspondingforce lines 81′, 82′ are routed. The above-mentionedvias vias force lines FIG. 9 anothertrench 80 is shown, which encloses the bipolar transistor TS. Further vias are used to electrically contact the emitter E and the base B of the bipolar transistor TS. Thecontact pads circuit 40. Analogously, thecontact pads force lines 81′ and 82′, respectively, are also routed to sensecircuit 40 as shown inFIG. 6 . Contactpads conductive pad 50 which form a shielding between thecontact layer 35 and the sense lines 81, 82 and (if present) theforce lines 81′, 82′ (seeFIGS. 4, 5, and 7 ) is also shown inFIG. 9 . The shielding 50 may be implemented as one single conductive pad. However, two or more separate pads may be used for the same purpose. - The examples described herein relate to a temperature sensing application, in which sense lines (
e.g. lines 81, 82) connecting a temperature sensor (e.g. bipolar transistor TS) and a sense circuit, which his configured to process a sensor signal tapped at the sensor, are routed through at least one trench (e.g. trench 70) and shielded by a conductive pad (e.g., shielding 50). arranged in a wiring layer (e.g., layer 34). It is understood, however, that this concept can be generalized and also applied for purposes other than temperature sensing. Generally, the temperature sensor can be regarded as a first circuit and the sense circuit can be regarded as second circuit, wherein first and second circuit are connected via connecting lines arranged in at least one trench (analogously to the sense and the force lines described with reference to the embodiments discussed herein) and shielded by a conductive pad covering the respective trench(es). - While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the invention. Accordingly, the invention is not to be restricted except in light of the attached claims and their equivalents. With regard to the various functions performed by the above described components or structures (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention.
- As used herein, the terms “having”, “containing”, “including”, “comprising” and the like are open ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles “a”, “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
- It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.
- Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
Claims (5)
1. A semiconductor device, comprising:
a semiconductor body;
at least one wiring layer disposed on the semiconductor body;
a field effect transistor integrated in the semiconductor body, the field effect transistor having a plurality of gate electrodes residing in corresponding gate trenches formed in the semiconductor body;
a first circuit integrated in the semiconductor body adjacent to the field effect transistor;
a second circuit integrated in the semiconductor body and remote from the first circuit;
a first additional trench formed in the semiconductor body, the first additional trench including at least one connecting line which electrically connects the first circuit and the second circuit; and
at least one conductive pad formed in the at least one wiring layer, the at least one conductive pad being arranged to at least partially cover the first additional trench to form a shielding of the at least one connecting line.
2. The semiconductor device of claim 1 , wherein the first circuit is a two-terminal circuit.
3. The semiconductor device of claim 1 , wherein the first circuit includes a sensor.
4. The semiconductor device of claim 3 , wherein the second circuit is configured to process a sensor signal tapped at the sensor.
5. The semiconductor device of claim 1 , wherein the second circuit is configured to process a signal tapped at the first circuit.
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US15/646,496 US20170309739A1 (en) | 2014-09-05 | 2017-07-11 | Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body |
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DE102014112823.0 | 2014-09-05 | ||
DE102014112823.0A DE102014112823B4 (en) | 2014-09-05 | 2014-09-05 | Semiconductor switch with integrated temperature sensor |
US14/840,925 US9735264B2 (en) | 2014-09-05 | 2015-08-31 | Semiconductor switch with integrated temperature sensor |
US15/646,496 US20170309739A1 (en) | 2014-09-05 | 2017-07-11 | Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body |
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US14/840,925 Continuation US9735264B2 (en) | 2014-09-05 | 2015-08-31 | Semiconductor switch with integrated temperature sensor |
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US20170309739A1 true US20170309739A1 (en) | 2017-10-26 |
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US15/646,496 Abandoned US20170309739A1 (en) | 2014-09-05 | 2017-07-11 | Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body |
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DE102014019788B3 (en) * | 2014-09-05 | 2019-08-08 | Infineon Technologies Ag | Trench transistor with trenches routed wiring |
DE102014112823B4 (en) * | 2014-09-05 | 2016-07-21 | Infineon Technologies Ag | Semiconductor switch with integrated temperature sensor |
DE102016103384B4 (en) * | 2016-02-25 | 2024-02-08 | Infineon Technologies Austria Ag | Semiconductor device with needle-shaped field plate structures in a transistor cell region and in an inner termination region |
JP6589845B2 (en) * | 2016-12-21 | 2019-10-16 | 株式会社デンソー | Semiconductor device |
CN106784018B (en) * | 2016-12-31 | 2019-10-01 | 江苏宏微科技股份有限公司 | The temperature sensing diode structure and preparation method thereof being integrated on transistor |
DE102017205625A1 (en) * | 2017-04-03 | 2018-10-04 | Bayerische Motoren Werke Aktiengesellschaft | Method and electronic assembly for determining a temperature of at least one electronic switching element |
EP3598505B1 (en) * | 2018-07-19 | 2023-02-15 | Mitsubishi Electric R&D Centre Europe B.V. | Temperature estimation of a power semiconductor device |
EP3664151A1 (en) * | 2018-12-06 | 2020-06-10 | Nexperia B.V. | Bipolar transistor with polysilicon emitter and method of manufacturing |
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US5363550A (en) * | 1992-12-23 | 1994-11-15 | International Business Machines Corporation | Method of Fabricating a micro-coaxial wiring structure |
US20070215920A1 (en) * | 2006-03-07 | 2007-09-20 | Infineon Technologies Ag | Semiconductor component arrangement comprising a trench transistor |
US9735264B2 (en) * | 2014-09-05 | 2017-08-15 | Infineon Technologies Ag | Semiconductor switch with integrated temperature sensor |
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GB2261321B (en) * | 1991-11-06 | 1995-10-11 | Motorola Inc | Power semiconductor device with temperature sensor |
US7544545B2 (en) * | 2005-12-28 | 2009-06-09 | Vishay-Siliconix | Trench polysilicon diode |
JP4087416B2 (en) * | 2006-04-06 | 2008-05-21 | シャープ株式会社 | Power IC device and manufacturing method thereof |
US7443225B2 (en) * | 2006-06-30 | 2008-10-28 | Alpha & Omega Semiconductor, Ltd. | Thermally stable semiconductor power device |
JP5112096B2 (en) * | 2008-02-04 | 2013-01-09 | 株式会社小糸製作所 | Discharge lamp lighting circuit |
US7683685B2 (en) * | 2008-02-05 | 2010-03-23 | Sony Corporation | System and method for implementing a digital phase-locked loop |
US9245888B2 (en) * | 2012-09-29 | 2016-01-26 | Infineon Technologies Ag | Reverse polarity protection for n-substrate high-side switches |
CN202798631U (en) * | 2012-09-29 | 2013-03-13 | 贵州贵航汽车零部件股份有限公司 | Automobile electronic power switch circuit |
-
2014
- 2014-09-05 DE DE102014112823.0A patent/DE102014112823B4/en active Active
-
2015
- 2015-08-31 US US14/840,925 patent/US9735264B2/en active Active
- 2015-09-02 CN CN201510557883.0A patent/CN105406850B/en active Active
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2017
- 2017-07-11 US US15/646,496 patent/US20170309739A1/en not_active Abandoned
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US5363550A (en) * | 1992-12-23 | 1994-11-15 | International Business Machines Corporation | Method of Fabricating a micro-coaxial wiring structure |
US20070215920A1 (en) * | 2006-03-07 | 2007-09-20 | Infineon Technologies Ag | Semiconductor component arrangement comprising a trench transistor |
US9735264B2 (en) * | 2014-09-05 | 2017-08-15 | Infineon Technologies Ag | Semiconductor switch with integrated temperature sensor |
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DE102014112823B4 (en) | 2016-07-21 |
US20160071972A1 (en) | 2016-03-10 |
CN105406850B (en) | 2018-09-21 |
DE102014112823A1 (en) | 2016-03-10 |
CN105406850A (en) | 2016-03-16 |
US9735264B2 (en) | 2017-08-15 |
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