US20170170783A1 - Coupled inductor-based resonator - Google Patents
Coupled inductor-based resonator Download PDFInfo
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- US20170170783A1 US20170170783A1 US14/965,760 US201514965760A US2017170783A1 US 20170170783 A1 US20170170783 A1 US 20170170783A1 US 201514965760 A US201514965760 A US 201514965760A US 2017170783 A1 US2017170783 A1 US 2017170783A1
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- H03B1/04—Reducing undesired oscillations, e.g. harmonics
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
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- H—ELECTRICITY
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- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1209—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier having two current paths operating in a differential manner and a current source or degeneration circuit in common to both paths, e.g. a long-tailed pair.
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- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
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- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
- H03B5/1215—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
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- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
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- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
- H03B5/124—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance
- H03B5/1243—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance the means comprising voltage variable capacitance diodes
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- H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
- H03B2200/003—Circuit elements of oscillators
- H03B2200/004—Circuit elements of oscillators including a variable capacitance, e.g. a varicap, a varactor or a variable capacitance of a diode or transistor
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
- H03B2200/006—Functional aspects of oscillators
- H03B2200/0088—Reduction of noise
- H03B2200/009—Reduction of phase noise
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- H—ELECTRICITY
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- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2202/00—Aspects of oscillators relating to reduction of undesired oscillations
- H03B2202/01—Reduction of undesired oscillations originated from distortion in one of the circuit elements of the oscillator
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2202/00—Aspects of oscillators relating to reduction of undesired oscillations
- H03B2202/05—Reduction of undesired oscillations through filtering or through special resonator characteristics
Definitions
- the present disclosure relates to electronic circuits and, more particularly, to inductor-based resonators for voltage controlled oscillators.
- VCO phase noise is often a major contributor to the overall phase noise in circuits utilizing an electronic oscillator such as phase locked loop (PLL) circuit.
- PLL phase locked loop
- Conventional VCO designs may require significant power and area to meet typical specifications of wireless communication systems.
- the presence of higher harmonic components in an active transconductance (gm) device can cause a frequency drift of an inductor-capacitor (LC) tank resonance if the LC tank impedance at the higher harmonics is not high.
- This phenomenon named the Groszkowski effect, is a contributor to noise in LC VCOs. Any technique that improves phase noise, while at the same time does not consume large area and power, is desirable.
- a two-walled coupled inductor in one aspect, includes: a first electrically conductive wall having a first end, a second end and a first width and a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, where the second width is different from the first width.
- the two-walled coupled inductor further includes a first node where the first ends of the first and second electrically conductive walls are coupled; and a second node where the second ends of the first and second electrically conductive walls are coupled.
- One of the first and second walls is configured to be coupled to a power supply and the first and second nodes are configured to be coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.
- VCO voltage controlled oscillator
- a method of designing a two-walled coupled inductor includes: simulating electromagnetic coupling of at least a differential mode and a common mode in the two-walled coupled inductor, the two-walled coupled inductor comprising: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled.
- One of the first and second walls is coupled to a power supply and the first and second nodes are coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.
- VCO voltage controlled oscillator
- the method further includes: estimating, based on the simulated electromagnetic coupling, phase noises of the two-walled coupled inductor for a plurality of combinations of the first width and the second width; and sizing the first width and the second width based on the estimated phase noises to reduce the phase noise of the two-walled coupled inductor.
- a method of reducing phase noise in a voltage controlled oscillator includes: flowing common mode current through a first wall of a two-walled coupled inductor, and flowing differential mode current through the first wall and a second wall of the two-walled inductor, the first and second wall being separated at least partially by a slit.
- an apparatus in one aspect, includes: a first means for conducting electrical current comprising a first end, a second end and a first width; a second means for conducting electrical current comprising a first end, a second end and a second width, where the first width is different from the second width, the second means for conducting electrical current and first means for conducting electrical current separated by a slit.
- the apparatus further includes first means for coupling the first ends of the first and second means for conducting electrical current; and second means for coupling the second ends of the first and second means for conducting electrical current.
- the apparatus further includes means for supplying electrical current coupled to one of the first and second means for conducting electrical current such that a common mode current flows through the one of the first and second means for conducting electrical current and a differential mode current flows through both the first and second means for conducting electrical current.
- a voltage controlled oscillator includes: a two-walled coupled inductor that includes: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, wherein the second width is different from the first width.
- the two-walled coupled inductor further includes: a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled.
- the VCO further includes VCO circuitry coupled to the first node and the second node.
- One of the first and second walls is configured to be coupled to a power supply such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.
- FIG. 1 is block diagram of a voltage controlled oscillator (VCO) that utilizes a two-walled coupled inductor;
- VCO voltage controlled oscillator
- FIG. 2 is a schematic diagram of an example of voltage controlled oscillator circuitry including the two-walled coupled inductor that can be used in the VCO of FIG. 1 ;
- FIG. 3 is a block diagram of the VCO of FIG. 1 showing flow paths of a differential mode current through the two-walled coupled inductor in the VCO of FIG. 1 ;
- FIG. 4 is a block diagram of the VCO of FIG. 1 showing flow paths of a common mode current through the two-walled coupled inductor in the VCO of FIG. 1 ;
- FIG. 5 is a set of graphs showing phase noise estimates versus stub inductance determined in a process for designing the two-walled coupled inductor in the VCO of FIG. 1 ;
- FIG. 6 is a set of graphs showing phase noise estimates versus a ratio of inner wall width to outer wall width determined in the process for designing the two-walled coupled inductor used in the VCO of FIG. 1 ;
- FIG. 7 is a flowchart block diagram of the process for designing the two-walled coupled inductor in the VCO of FIG. 1 .
- An inductor-based resonator that provides for increased tank impedance at the second harmonic (common mode) is described.
- the inductor-based resonator has a configuration that allows this increase of impedance at the common mode frequency without requiring increased resonator area.
- the inductor-based resonator takes advantage of being able to fine tune inductances of both the common mode and a differential mode (first harmonic at the desired VCO frequency) independently.
- the ratio of the common mode inductance and the differential mode inductance, L CM /L diff is ⁇ 1 ⁇ 4. Since the common mode resonance frequency is twice the differential mode frequency, the ratio of VCO circuit capacitances at the common mode and the differential mode, C CM /C diff , needs to be ⁇ 1. Since capacitance distribution is a function of VCO circuit parasitics and may be hard to control, a resonator configuration that enables a way to increase the L CM /L diff ratio above 1 ⁇ 4 is desired.
- the main harmonic to be suppressed is the second harmonic of the common mode current.
- the desired harmonic is the first harmonic of the differential mode current.
- a two-walled coupled inductor that includes an outer wall and an inner wall separated by a slit is provided. The two-walled coupled inductor is configured such that the common mode current flows through the outer wall and the differential mode current flows through both the outer wall and the inner wall.
- a stub is connected to the outer wall such that the common mode current also flows through the stub, but the differential mode does not. The dimensions of the stub and the outer wall determine the inductance of the common mode while the combined widths of the outer and inner walls determine the inductance of the differential mode. As long as the combined width of the outer and inner walls is the same, the inductance of the differential mode stays essentially the same.
- Table 1 shows the effect on inductance of the differential and common modes by adding the slit to separate the outer and inner walls.
- the addition of the slit to form inner an outer walls increases the inductance of the common mode by about 23% while the inductance of the differential mode is only changed by about 1.3%.
- the second harmonic of the common mode can be suppressed without, at least substantially, affecting the differential mode inductance and without increasing the power and area requirements.
- FIG. 1 is a block diagram of a VCO 100 with a two-walled coupled inductor 102 having an electrically conductive outer wall 104 (referred to from hereon as the outer wall 104 ) and an electrically conductive inner wall 106 (referred to from hereon as the inner wall 106 ).
- the configuration of the outer wall 104 and the inner wall 106 define a slit 108 such that the inner wall 106 is separated from the outer wall 104 by the slit 108 , and an electrically conductive stub 110 (referred to from hereon as the stub 110 ) extending from the outer wall 104 .
- the outer wall 104 and the inner wall 106 are formed as two concentric rings or loops that each comprise respective first and second ends coupled at first and second nodes 122 and 124 respectively.
- the outer wall 104 and the inner wall 106 are electrically connected to VCO circuitry 115 via the first and second nodes 122 and 124 .
- the outer wall 104 in this example, is coupled to a power supply 120 .
- the VCO circuitry 115 may include all of the circuitry needed for controlling an oscillating electrical waveform produced by the two-walled coupled inductor 102 .
- the VCO circuitry 115 may include PMOS and NMOS transistors, an amplifier, capacitors (variable and/or fixed), a delay circuit, a buffer, a divider circuit, etc.
- the stub 110 is electrically connected to the power supply 120 (e.g., a voltage source, a current source, etc.) that provides power to the components of the VCO 100 .
- the outer wall 104 , the inner wall 106 and the stub 110 may all be formed of a low-loss metal, a more lossy metal or some other conductive material.
- a width W 1 of the outer wall 104 , a width W 2 of the inner wall 106 , a width W slit of the slit 108 , a width W stub of the stub 110 and a length £ stub of the stub 110 are sized to provide proper inductances for the common mode and the differential mode of the VCO 100 .
- the inductances are chosen to tune desired resonant frequencies of the differential mode and the common mode, and to increase an inductance of the common mode compared to an inductance of the differential mode.
- the combined width of the two-walled coupled inductor 102 , W res , the sum of the widths W 1 , W 2 and W slit as W res is shown in the following formula:
- FIG. 2 is a schematic diagram of an example of the VCO circuitry 115 and the two-walled coupled inductor 102 that can be used in the VCO 100 of FIG. 1 .
- the two-walled coupled inductor 102 of FIG. 1 is represented in FIG. 2 by an inductor labeled L that is coupled to the VCO circuitry 115 at the nodes 122 and 124 .
- the VCO circuitry 115 includes a pair of cross coupled NMOS transistors labeled M 1 and M 2 and a pair of cross coupled PMOS transistors labeled M 3 and M 4 , and a varactor diode or A-MOS variable capacitance comprising two variable capacitors, labeled C var , controlled by a control or tuning voltage V tunc .
- the VCO circuitry 115 also includes a fixed capacitor labeled C.
- the VCO circuitry 115 of FIG. 2 is exemplary and other VCO circuitry may be used. For example, a switched capacitor bank may be coupled to the VCO circuitry 115 .
- FIG. 3 is a block diagram of the VCO 100 showing a path that a differential mode current (the first harmonic of the two-walled coupled inductor 102 ) follows through the two-walled coupled inductor 102 .
- the differential mode current flows along a first differential mode path 202 from the VCO circuitry 115 , up a first side of the outer wall 104 , around the entire outer wall 104 and down a second side of the outer wall 104 back to the VCO circuitry 115 .
- a second differential mode current flows through the inner wall 106 along a second differential mode path 204 flowing from the VCO circuitry 115 , up a first side of the inner wall 106 , around the entire inner wall 106 and down a second side of the inner wall 106 back to the VCO circuitry 115 .
- the first and second paths 202 and 204 that flow though the outer wall 104 and the inner wall 106 , respectively, are parallel and therefore provide two parallel inductors.
- a parameter ⁇ is used to vary the combined inductance of the two parallel inductors of the outer and inner walls 104 and 106 , where a is defined as follows:
- W 2 is the width of the inner wall 106 and W 1 is the width of the outer wall 104 .
- W res when ⁇ is small the inductance of the inner wall 106 is greater than the inductance of the outer wall 104 , and when ⁇ is large, the inductance of the inner wall 106 is less than the inductance of the outer wall 104 .
- the total combined inductance of the differential mode flowing through the outer and inner walls 104 and 106 , respectively, can be minimized when ⁇ is very small or very large.
- FIG. 4 is a block diagram of the VCO 100 showing a path that a common mode current (the second harmonic of the two-walled coupled inductor 102 ) follows through the two-walled coupled inductor 102 .
- the common mode current flows through the outer wall along a common mode path 302 flowing from the power supply 120 down the electrically conductive stub 110 and down first and second sides of the outer wall 104 to the VCO circuitry 115 .
- the electrically conductive stub 110 is coupled to the outer wall 104 such that the common mode current flows through the stub 110 and the outer wall 104 but the differential mode current does not flow through the stub 110 and the inductance of the common mode may be increased or decreased without changing the inductance of the differential mode significantly.
- the inductance L CM of the common mode may be selectively increased as the length £ stub of the stub 110 is increased, and/or as the width W stub of the stub 110 is decreased, and vice-versa.
- the width W stub and the length £ stub of the stub 110 can be changed without significantly affecting the inductance of the differential mode.
- the width W 1 of the outer wall 104 can be increased to decrease the inductance of the common mode and decreased to increase the inductance of the common mode.
- the dimensions of the outer wall 104 , the inner wall 106 and the stub 110 can be chosen to provide inductances of the common mode and the differential mode, L CM and L diff , respectively, and these dimensions can be fine-tuned in order to minimize phase noise, e.g., of a phase locked loop system that employs the VCO 100 .
- the electromagnetic coupling of the differential mode and the common mode can thus be fine-tuned by varying the values of the outer and inner wall widths W 1 and W 2 and by varying the inductance L stub of the stub 110 .
- the ratio of common mode inductance L CM and the differential mode inductance L diff can be approximated by the following equation:
- L CM L diff ( L stub + ⁇ * L diff )
- L diff L stub L diff + ⁇ ( 3 )
- the ratio of L CM /L diff s can be increased.
- the dimensions of the outer wall 104 , the inner wall 106 and the stub 110 can be chosen to provide inductances of the common mode and the differential mode, L CM and L diff , respectively, which can minimize phase noise of the oscillator circuitry (e.g., the VCO circuitry 115 ).
- Methods of estimating phase noise known to those skilled in the art can be employed to arrive at the proper ratio of L CM /L diff that minimizes the phase noise.
- FIG. 5 is a set of graphs showing phase noise estimates determined in a process described below for designing the two-walled coupled inductor 102 .
- the phase noise estimates illustrated in FIG. 5 are determined at various frequency offsets from a center VCO frequency for a typical 12 GHz VCO circuit for various values of stub inductance L stub .
- a first graph 510 shows phase noise estimates at a 10 kHz offset
- a second graph 520 shows phase noise estimates at a 100 kHz offset
- a third graph 530 shows phase noise estimates at a 1 MHz offset
- a fourth graph 540 shows phase noise estimates at a 100 MHz offset
- a fifth graph 550 shows estimates of swing of a perturbation projection vector (PPV).
- PSV perturbation projection vector
- PPV is an established technique for oscillator phase noise analysis.
- the phase noise at a 10 kHz offset from the center frequency of the VCO can be minimized at a stub inductance L stub of ⁇ 161 pH.
- FIG. 6 is a set of graphs showing phase noise estimates versus the ratio ⁇ determined in the process for designing the two-walled coupled inductor 102 .
- the phase noise estimates are determined at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various inner and outer wall widths of the resonator circuit.
- FIG. 6 shows estimated phase noise at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various values of ⁇ given by equation (2) above where ⁇ determines the position of the slit 108 between between the outer wall 104 of width W 1 and the inner wall 106 of width W 2 .
- a first graph 610 shows phase noise estimates at a 10 kHz offset
- a second graph 620 shows phase noise estimates at a 100 kHz offset
- a third graph 630 shows phase noise estimates at a 1 MHz offset
- a fourth graph 640 shows estimates of swing of a PPV.
- the width of the slit was not considered.
- the slit width W slit was kept constant in the analyses. In various examples of the two-walled coupled inductor 102 , the slit width may be about one-half to about one-third of the combined widths of the inner and outer walls. However, slit width W slit may be added as a variable for further fine tuning the electromagnetic coupling of the inner and outer walls.
- FIG. 7 is a flowchart block diagram of a process 700 for designing a two-walled coupled inductor.
- the process 700 may be used to size portions of the two-walled coupled inductor 102 illustrated in FIGS. 1, 3 and 4 .
- the process 700 of FIG. 3 may be performed with any suitable inductor-based resonator circuit; however, to provide a specific example, the process 700 will be described with reference to VCO 100 and the two-walled coupled inductor 102 illustrated in FIGS. 1, 3 and 4 .
- the process 700 simulates electromagnetic coupling of at least a differential mode and a common mode in a two-walled coupled inductor 102 , such as, for example the two-walled coupled inductor 102 of FIGS. 1, 3 and 4 .
- the simulation of block 710 models current flow through the electrically conductive outer wall 104 having a first width W 1 and through the electrically conductive inner wall 106 separated from the outer wall by the slit 108 of width W slit , the inner wall having a second width W 2 .
- the simulation of block 710 also couples the inner wall 106 and the outer wall 104 at the first and second nodes 122 and 124 .
- the simulation at block 710 models the common mode current flowing through the outer wall 104 and the differential mode current flowing through both the outer wall 104 and the inner wall 106 .
- the simulation of block 710 can change the various dimensions of the outer wall 104 , the inner wall 106 and the slit 108 .
- the process estimates, based on the simulated electromagnetic coupling of block 710 , phase noises of the two-walled coupled inductor 102 for a plurality of combinations of the outer wall width W 1 , the inner wall width W 2 by varying the location of the slit 108 by varying, for example, the ⁇ ratio of equation (2).
- the combined widths of the outer wall 104 and the inner wall 106 may be held constant by varying the ⁇ ratio in order to vary the inductance of the common mode while keeping the differential mode inductance essentially constant.
- the process 700 sizes the width of the outer wall (W 1 ) and the width of the inner wall (W 2 ) based on the phase noises estimated at block 720 to reduce the phase noise of the two-walled coupled inductor 102 .
- the sizing at block 730 includes choosing the combination of outer wall width W 1 and inner wall width W 2 that resulted in a minimum phase noise estimate for the plurality of combinations of outer wall width W 1 and inner wall width W 2 analyzed at block 720 .
- the simulation of block 710 models the electrically conductive stub 110 coupled to the outer wall 104 .
- the common mode current flows through the electrically conductive stub 110 and the outer wall 104 and the differential mode current does not flow through the electrically conductive stub 110 .
- the dimensions of the stub 110 may also be varied.
- the process 700 estimates phase noises of the inductor-based resonator, based on the simulated electromagnetic coupling of block 710 , for a plurality of electrically conductive stubs of varying dimensions.
- the process 700 sizes the dimensions of the electrically conductive stub 110 , based on the estimated phase noises, to reduce phase noise of the two-walled inductor 102 .
- the sizing at block 750 may include choosing the dimensions of one of the plurality of electrically conductive stubs that resulted in a minimum estimated phase noise at block 740 .
- the outer wall 104 , the inner wall 106 and, in some examples, the stub 110 may be formed on a substrate using known techniques, based on the sizing performed at blocks 730 and/or 750 .
- the outer wall 104 , the inner wall 106 and the stub 110 may, for example, be formed on a substrate to be coupled to the power supply 120 and the VCO circuitry 115 to form the VCO 100 of FIGS. 1-3 .
- the process 700 of FIG. 7 may be modified, for example, by adding or altering blocks. Additionally, the blocks may be performed concurrently.
- the simulation of the electromagnetic coupling of the two-walled coupled inductor 102 of block 710 may also simulate current flowing from the power supply 120 coupled to the electrically conductive stub 110 . Further, the simulation of the electromagnetic coupling of the two-walled coupled inductor 102 of block 710 may also simulate current flowing from the first and second nodes 122 and 124 of the two-walled coupled inductor 102 through voltage controlled oscillator (VCO) circuitry 115 coupled to the first and second nodes 122 and 124 .
- VCO voltage controlled oscillator
- the electrically conductive stub 110 may be coupled to the inner wall 106 rather than the outer wall 104 such that the common mode current flows through the inner wall 106 and not the outer wall 104 .
- the simulation of the electromagnetic coupling at block 710 would simulate this scenario.
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Abstract
Description
- Field
- The present disclosure relates to electronic circuits and, more particularly, to inductor-based resonators for voltage controlled oscillators.
- Background
- Voltage controlled oscillator (VCO) phase noise is often a major contributor to the overall phase noise in circuits utilizing an electronic oscillator such as phase locked loop (PLL) circuit. Conventional VCO designs may require significant power and area to meet typical specifications of wireless communication systems. The presence of higher harmonic components in an active transconductance (gm) device can cause a frequency drift of an inductor-capacitor (LC) tank resonance if the LC tank impedance at the higher harmonics is not high. This phenomenon, named the Groszkowski effect, is a contributor to noise in LC VCOs. Any technique that improves phase noise, while at the same time does not consume large area and power, is desirable.
- In one aspect, a two-walled coupled inductor is provided. The two-walled coupled inductor includes: a first electrically conductive wall having a first end, a second end and a first width and a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, where the second width is different from the first width. The two-walled coupled inductor further includes a first node where the first ends of the first and second electrically conductive walls are coupled; and a second node where the second ends of the first and second electrically conductive walls are coupled. One of the first and second walls is configured to be coupled to a power supply and the first and second nodes are configured to be coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.
- In one aspect, a method of designing a two-walled coupled inductor is provided. The method includes: simulating electromagnetic coupling of at least a differential mode and a common mode in the two-walled coupled inductor, the two-walled coupled inductor comprising: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled. One of the first and second walls is coupled to a power supply and the first and second nodes are coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall. The method further includes: estimating, based on the simulated electromagnetic coupling, phase noises of the two-walled coupled inductor for a plurality of combinations of the first width and the second width; and sizing the first width and the second width based on the estimated phase noises to reduce the phase noise of the two-walled coupled inductor.
- In one aspect, a method of reducing phase noise in a voltage controlled oscillator is provided. The method includes: flowing common mode current through a first wall of a two-walled coupled inductor, and flowing differential mode current through the first wall and a second wall of the two-walled inductor, the first and second wall being separated at least partially by a slit.
- In one aspect, an apparatus is provided. The apparatus includes: a first means for conducting electrical current comprising a first end, a second end and a first width; a second means for conducting electrical current comprising a first end, a second end and a second width, where the first width is different from the second width, the second means for conducting electrical current and first means for conducting electrical current separated by a slit. The apparatus further includes first means for coupling the first ends of the first and second means for conducting electrical current; and second means for coupling the second ends of the first and second means for conducting electrical current. The apparatus further includes means for supplying electrical current coupled to one of the first and second means for conducting electrical current such that a common mode current flows through the one of the first and second means for conducting electrical current and a differential mode current flows through both the first and second means for conducting electrical current.
- In one aspect, a voltage controlled oscillator (VCO) is provided. The VCO includes: a two-walled coupled inductor that includes: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, wherein the second width is different from the first width. The two-walled coupled inductor further includes: a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled. The VCO further includes VCO circuitry coupled to the first node and the second node. One of the first and second walls is configured to be coupled to a power supply such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.
- Other features and advantages of the present disclosure should be apparent from the following description which illustrates, by way of example, aspects of the disclosure.
- The details of the present disclosure, both as to its structure and operation, may be gleaned in part by study of the accompanying drawings, in which like reference numerals refer to like parts, and in which:
-
FIG. 1 is block diagram of a voltage controlled oscillator (VCO) that utilizes a two-walled coupled inductor; -
FIG. 2 is a schematic diagram of an example of voltage controlled oscillator circuitry including the two-walled coupled inductor that can be used in the VCO ofFIG. 1 ; -
FIG. 3 is a block diagram of the VCO ofFIG. 1 showing flow paths of a differential mode current through the two-walled coupled inductor in the VCO ofFIG. 1 ; -
FIG. 4 is a block diagram of the VCO ofFIG. 1 showing flow paths of a common mode current through the two-walled coupled inductor in the VCO ofFIG. 1 ; -
FIG. 5 is a set of graphs showing phase noise estimates versus stub inductance determined in a process for designing the two-walled coupled inductor in the VCO ofFIG. 1 ; -
FIG. 6 is a set of graphs showing phase noise estimates versus a ratio of inner wall width to outer wall width determined in the process for designing the two-walled coupled inductor used in the VCO ofFIG. 1 ; and -
FIG. 7 is a flowchart block diagram of the process for designing the two-walled coupled inductor in the VCO ofFIG. 1 . - The detailed description set forth below, in connection with the accompanying drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in simplified form in order to avoid obscuring such concepts.
- An inductor-based resonator that provides for increased tank impedance at the second harmonic (common mode) is described. The inductor-based resonator has a configuration that allows this increase of impedance at the common mode frequency without requiring increased resonator area. The inductor-based resonator takes advantage of being able to fine tune inductances of both the common mode and a differential mode (first harmonic at the desired VCO frequency) independently.
- In an exemplary LC VCO, the ratio of the common mode inductance and the differential mode inductance, LCM/Ldiff, is ˜¼. Since the common mode resonance frequency is twice the differential mode frequency, the ratio of VCO circuit capacitances at the common mode and the differential mode, CCM/Cdiff, needs to be ˜1. Since capacitance distribution is a function of VCO circuit parasitics and may be hard to control, a resonator configuration that enables a way to increase the LCM/Ldiff ratio above ¼ is desired.
- In various examples, the main harmonic to be suppressed is the second harmonic of the common mode current. The desired harmonic is the first harmonic of the differential mode current. In various examples, a two-walled coupled inductor that includes an outer wall and an inner wall separated by a slit is provided. The two-walled coupled inductor is configured such that the common mode current flows through the outer wall and the differential mode current flows through both the outer wall and the inner wall. In various examples, a stub is connected to the outer wall such that the common mode current also flows through the stub, but the differential mode does not. The dimensions of the stub and the outer wall determine the inductance of the common mode while the combined widths of the outer and inner walls determine the inductance of the differential mode. As long as the combined width of the outer and inner walls is the same, the inductance of the differential mode stays essentially the same.
- Table 1 shows the effect on inductance of the differential and common modes by adding the slit to separate the outer and inner walls.
-
TABLE 1 Diff. Mode Induct. Common Mode Induct. Configuration picohenries (pH) (pH) No Slit 251.8 65.3 With Slit 255.1 80.5 - As can be seen, the addition of the slit to form inner an outer walls increases the inductance of the common mode by about 23% while the inductance of the differential mode is only changed by about 1.3%. Thus, by positioning the slit to change the thicknesses of the outer and inner walls, while keeping the combined thickness of the inner and outer walls the same, the second harmonic of the common mode can be suppressed without, at least substantially, affecting the differential mode inductance and without increasing the power and area requirements.
-
FIG. 1 is a block diagram of aVCO 100 with a two-walled coupledinductor 102 having an electrically conductive outer wall 104 (referred to from hereon as the outer wall 104) and an electrically conductive inner wall 106 (referred to from hereon as the inner wall 106). The configuration of theouter wall 104 and theinner wall 106 define aslit 108 such that theinner wall 106 is separated from theouter wall 104 by theslit 108, and an electrically conductive stub 110 (referred to from hereon as the stub 110) extending from theouter wall 104. Theouter wall 104 and theinner wall 106, in this example, are formed as two concentric rings or loops that each comprise respective first and second ends coupled at first andsecond nodes outer wall 104 and theinner wall 106 are electrically connected toVCO circuitry 115 via the first andsecond nodes outer wall 104, in this example, is coupled to apower supply 120. - Other configurations of the
outer wall 104 and theinner wall 106 may also be used. For example, thestub 110 and thepower supply 120 may be coupled to theinner wall 106. TheVCO circuitry 115 may include all of the circuitry needed for controlling an oscillating electrical waveform produced by the two-walled coupledinductor 102. For example, theVCO circuitry 115 may include PMOS and NMOS transistors, an amplifier, capacitors (variable and/or fixed), a delay circuit, a buffer, a divider circuit, etc. - The
stub 110 is electrically connected to the power supply 120 (e.g., a voltage source, a current source, etc.) that provides power to the components of theVCO 100. Theouter wall 104, theinner wall 106 and thestub 110 may all be formed of a low-loss metal, a more lossy metal or some other conductive material. A width W1 of theouter wall 104, a width W2 of theinner wall 106, a width Wslit of theslit 108, a width Wstub of thestub 110 and a length £stub of thestub 110 are sized to provide proper inductances for the common mode and the differential mode of theVCO 100. In various embodiments, the inductances are chosen to tune desired resonant frequencies of the differential mode and the common mode, and to increase an inductance of the common mode compared to an inductance of the differential mode. The combined width of the two-walled coupledinductor 102, Wres, the sum of the widths W1, W2 and Wslit as Wres, is shown in the following formula: -
W res =W 1 +W 2 +W slit (1) -
FIG. 2 is a schematic diagram of an example of theVCO circuitry 115 and the two-walled coupledinductor 102 that can be used in theVCO 100 ofFIG. 1 . The two-walled coupledinductor 102 ofFIG. 1 is represented inFIG. 2 by an inductor labeled L that is coupled to theVCO circuitry 115 at thenodes VCO circuitry 115, in this example, includes a pair of cross coupled NMOS transistors labeled M1 and M2 and a pair of cross coupled PMOS transistors labeled M3 and M4, and a varactor diode or A-MOS variable capacitance comprising two variable capacitors, labeled Cvar, controlled by a control or tuning voltage Vtunc. TheVCO circuitry 115 also includes a fixed capacitor labeled C. TheVCO circuitry 115 ofFIG. 2 is exemplary and other VCO circuitry may be used. For example, a switched capacitor bank may be coupled to theVCO circuitry 115. -
FIG. 3 is a block diagram of theVCO 100 showing a path that a differential mode current (the first harmonic of the two-walled coupled inductor 102) follows through the two-walled coupledinductor 102. The differential mode current flows along a firstdifferential mode path 202 from theVCO circuitry 115, up a first side of theouter wall 104, around the entireouter wall 104 and down a second side of theouter wall 104 back to theVCO circuitry 115. A second differential mode current flows through theinner wall 106 along a seconddifferential mode path 204 flowing from theVCO circuitry 115, up a first side of theinner wall 106, around the entireinner wall 106 and down a second side of theinner wall 106 back to theVCO circuitry 115. - As illustrated in
FIG. 3 the first andsecond paths outer wall 104 and theinner wall 106, respectively, are parallel and therefore provide two parallel inductors. A parameter α is used to vary the combined inductance of the two parallel inductors of the outer andinner walls -
α=W 2 /W 1 (2) - where W2 is the width of the
inner wall 106 and W1 is the width of theouter wall 104. For a fixed combined wall width Wres when α is small, the inductance of theinner wall 106 is greater than the inductance of theouter wall 104, and when α is large, the inductance of theinner wall 106 is less than the inductance of theouter wall 104. The total combined inductance of the differential mode flowing through the outer andinner walls -
FIG. 4 is a block diagram of theVCO 100 showing a path that a common mode current (the second harmonic of the two-walled coupled inductor 102) follows through the two-walled coupledinductor 102. The common mode current flows through the outer wall along acommon mode path 302 flowing from thepower supply 120 down the electricallyconductive stub 110 and down first and second sides of theouter wall 104 to theVCO circuitry 115. The electricallyconductive stub 110 is coupled to theouter wall 104 such that the common mode current flows through thestub 110 and theouter wall 104 but the differential mode current does not flow through thestub 110 and the inductance of the common mode may be increased or decreased without changing the inductance of the differential mode significantly. - The inductance LCM of the common mode may be selectively increased as the length £stub of the
stub 110 is increased, and/or as the width Wstub of thestub 110 is decreased, and vice-versa. The width Wstub and the length £stub of thestub 110 can be changed without significantly affecting the inductance of the differential mode. In addition, the width W1 of theouter wall 104 can be increased to decrease the inductance of the common mode and decreased to increase the inductance of the common mode. - The dimensions of the
outer wall 104, theinner wall 106 and thestub 110 can be chosen to provide inductances of the common mode and the differential mode, LCM and Ldiff, respectively, and these dimensions can be fine-tuned in order to minimize phase noise, e.g., of a phase locked loop system that employs theVCO 100. The electromagnetic coupling of the differential mode and the common mode can thus be fine-tuned by varying the values of the outer and inner wall widths W1 and W2 and by varying the inductance Lstub of thestub 110. The ratio of common mode inductance LCM and the differential mode inductance Ldiff can be approximated by the following equation: -
- As described above, in order to minimize phase noise of oscillator circuitry (e.g., the VCO circuitry 115) coupled to the two-walled coupled
inductor 102, the ratio of LCM/Ldiff s can be increased. The dimensions of theouter wall 104, theinner wall 106 and thestub 110 can be chosen to provide inductances of the common mode and the differential mode, LCM and Ldiff, respectively, which can minimize phase noise of the oscillator circuitry (e.g., the VCO circuitry 115). Methods of estimating phase noise known to those skilled in the art can be employed to arrive at the proper ratio of LCM/Ldiff that minimizes the phase noise. - As described below, methods can be employed to identify the stub inductance Lstub and the wall width ratio α that can minimize the phase noise in an oscillator circuit such as the
VCO circuitry 115 of theVCO 100. -
FIG. 5 is a set of graphs showing phase noise estimates determined in a process described below for designing the two-walled coupledinductor 102. The phase noise estimates illustrated inFIG. 5 are determined at various frequency offsets from a center VCO frequency for a typical 12 GHz VCO circuit for various values of stub inductance Lstub. Afirst graph 510 shows phase noise estimates at a 10 kHz offset, asecond graph 520 shows phase noise estimates at a 100 kHz offset, athird graph 530 shows phase noise estimates at a 1 MHz offset, afourth graph 540 shows phase noise estimates at a 100 MHz offset and afifth graph 550 shows estimates of swing of a perturbation projection vector (PPV). PPV is an established technique for oscillator phase noise analysis. As can be seen from thefirst graph 510, the phase noise at a 10 kHz offset from the center frequency of the VCO can be minimized at a stub inductance Lstub of ˜161 pH. This phase noise is about 10 dB lower than the phase noise would be without the stub 110 (see the phase noise at Lstub=0). -
FIG. 6 is a set of graphs showing phase noise estimates versus the ratio α determined in the process for designing the two-walled coupledinductor 102. The phase noise estimates are determined at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various inner and outer wall widths of the resonator circuit.FIG. 6 shows estimated phase noise at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various values of α given by equation (2) above where α determines the position of theslit 108 between between theouter wall 104 of width W1 and theinner wall 106 of width W2. Afirst graph 610 shows phase noise estimates at a 10 kHz offset, asecond graph 620 shows phase noise estimates at a 100 kHz offset, athird graph 630 shows phase noise estimates at a 1 MHz offset and afourth graph 640 shows estimates of swing of a PPV. As can be seen, the phase noise at 10 kHz offset from the center frequency of the VCO can be minimized at an α=˜0.14. This phase noise is about 10 dB lower than the phase noise would be without the slit 108 (see the phase noise at α=˜1000). - In the analyses for which phase noise estimates are presented in
FIGS. 5 and 6 , the width of the slit was not considered. The slit width Wslit was kept constant in the analyses. In various examples of the two-walled coupledinductor 102, the slit width may be about one-half to about one-third of the combined widths of the inner and outer walls. However, slit width Wslit may be added as a variable for further fine tuning the electromagnetic coupling of the inner and outer walls. -
FIG. 7 is a flowchart block diagram of aprocess 700 for designing a two-walled coupled inductor. For example, theprocess 700 may be used to size portions of the two-walled coupledinductor 102 illustrated inFIGS. 1, 3 and 4 . Theprocess 700 ofFIG. 3 may be performed with any suitable inductor-based resonator circuit; however, to provide a specific example, theprocess 700 will be described with reference toVCO 100 and the two-walled coupledinductor 102 illustrated inFIGS. 1, 3 and 4 . - In
block 710, theprocess 700 simulates electromagnetic coupling of at least a differential mode and a common mode in a two-walled coupledinductor 102, such as, for example the two-walled coupledinductor 102 ofFIGS. 1, 3 and 4 . The simulation ofblock 710 models current flow through the electrically conductiveouter wall 104 having a first width W1 and through the electrically conductiveinner wall 106 separated from the outer wall by theslit 108 of width Wslit, the inner wall having a second width W2. The simulation ofblock 710 also couples theinner wall 106 and theouter wall 104 at the first andsecond nodes block 710 models the common mode current flowing through theouter wall 104 and the differential mode current flowing through both theouter wall 104 and theinner wall 106. - The simulation of
block 710 can change the various dimensions of theouter wall 104, theinner wall 106 and theslit 108. Atblock 720, the process estimates, based on the simulated electromagnetic coupling ofblock 710, phase noises of the two-walled coupledinductor 102 for a plurality of combinations of the outer wall width W1, the inner wall width W2 by varying the location of theslit 108 by varying, for example, the α ratio of equation (2). The combined widths of theouter wall 104 and theinner wall 106 may be held constant by varying the α ratio in order to vary the inductance of the common mode while keeping the differential mode inductance essentially constant. - At
block 730, theprocess 700 sizes the width of the outer wall (W1) and the width of the inner wall (W2) based on the phase noises estimated atblock 720 to reduce the phase noise of the two-walled coupledinductor 102. In various examples, the sizing atblock 730 includes choosing the combination of outer wall width W1 and inner wall width W2 that resulted in a minimum phase noise estimate for the plurality of combinations of outer wall width W1 and inner wall width W2 analyzed atblock 720. - In various examples, the simulation of
block 710 models the electricallyconductive stub 110 coupled to theouter wall 104. In these example simulations, the common mode current flows through the electricallyconductive stub 110 and theouter wall 104 and the differential mode current does not flow through the electricallyconductive stub 110. In these example simulations, the dimensions of thestub 110, stub length £stub and stub width Wstub, may also be varied. Atblock 740, theprocess 700 estimates phase noises of the inductor-based resonator, based on the simulated electromagnetic coupling ofblock 710, for a plurality of electrically conductive stubs of varying dimensions. - At
block 750, theprocess 700 sizes the dimensions of the electricallyconductive stub 110, based on the estimated phase noises, to reduce phase noise of the two-walled inductor 102. The sizing atblock 750 may include choosing the dimensions of one of the plurality of electrically conductive stubs that resulted in a minimum estimated phase noise atblock 740. - Upon sizing the dimensions of the various components of the two-walled coupled
inductor 102 atblock 730 and/or block 750, theouter wall 104, theinner wall 106 and, in some examples, thestub 110 may be formed on a substrate using known techniques, based on the sizing performed atblocks 730 and/or 750. Theouter wall 104, theinner wall 106 and thestub 110 may, for example, be formed on a substrate to be coupled to thepower supply 120 and theVCO circuitry 115 to form theVCO 100 ofFIGS. 1-3 . - The
process 700 of FIG.7 may be modified, for example, by adding or altering blocks. Additionally, the blocks may be performed concurrently. For example, the simulation of the electromagnetic coupling of the two-walled coupledinductor 102 ofblock 710 may also simulate current flowing from thepower supply 120 coupled to the electricallyconductive stub 110. Further, the simulation of the electromagnetic coupling of the two-walled coupledinductor 102 ofblock 710 may also simulate current flowing from the first andsecond nodes inductor 102 through voltage controlled oscillator (VCO)circuitry 115 coupled to the first andsecond nodes conductive stub 110 may be coupled to theinner wall 106 rather than theouter wall 104 such that the common mode current flows through theinner wall 106 and not theouter wall 104. In this example, the simulation of the electromagnetic coupling atblock 710 would simulate this scenario. - Although particular embodiments are described above, many variations of the disclosure are possible, including, for example, those with different transistor types, with different biasing arrangements, or with additional amplification stages. Additionally embodiments have been described for CMOS technology but similar circuits may be used with other technologies. Additionally, features of the various embodiments may be combined in combinations that differ from those described above.
- The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles described herein can be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, it is to be understood that the description and drawings presented herein represent presently preferred embodiments of the disclosure and are therefore representative of the subject matter which is broadly contemplated by the present disclosure. It is further understood that the scope of the present disclosure fully encompasses other embodiments that may become obvious to those skilled in the art and that the scope of the present disclosure is accordingly limited by nothing other than the appended claims
Claims (30)
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CN112737510A (en) * | 2021-03-30 | 2021-04-30 | 深圳大学 | Voltage-controlled oscillator, voltage-controlled oscillation processing method and electronic equipment |
CN113555202A (en) * | 2021-07-06 | 2021-10-26 | 杭州电子科技大学 | Adjustable differential active inductance circuit |
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JP4010818B2 (en) | 2002-02-01 | 2007-11-21 | Necエレクトロニクス株式会社 | Semiconductor integrated circuit |
US7154349B2 (en) | 2004-08-11 | 2006-12-26 | Qualcomm, Incorporated | Coupled-inductor multi-band VCO |
US7786836B2 (en) | 2005-07-19 | 2010-08-31 | Lctank Llc | Fabrication of inductors in transformer based tank circuitry |
DE102006023352A1 (en) | 2006-05-17 | 2007-11-22 | Atmel Duisburg Gmbh | Integrated tunable resonant circuit |
US7764127B2 (en) | 2006-11-30 | 2010-07-27 | Qualcomm, Incorporated | High resolution digitally controlled oscillator |
JP4991784B2 (en) * | 2009-03-31 | 2012-08-01 | 株式会社日立製作所 | Oscillator, frequency generation circuit using the same, and radio communication system |
US8102216B1 (en) | 2009-05-06 | 2012-01-24 | Qualcomm Atheros, Inc. | Voltage controlled oscillator having reduced phase noise |
JP2010272815A (en) | 2009-05-25 | 2010-12-02 | Renesas Electronics Corp | Variable inductor |
US8842410B2 (en) | 2009-08-31 | 2014-09-23 | Qualcomm Incorporated | Switchable inductor network |
US9473152B2 (en) | 2013-11-08 | 2016-10-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Coupling structure for inductive device |
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CN113555202A (en) * | 2021-07-06 | 2021-10-26 | 杭州电子科技大学 | Adjustable differential active inductance circuit |
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