US20170047854A1 - Adjustable blanking time for overload protection for switch-mode power supplies - Google Patents
Adjustable blanking time for overload protection for switch-mode power supplies Download PDFInfo
- Publication number
- US20170047854A1 US20170047854A1 US14/823,860 US201514823860A US2017047854A1 US 20170047854 A1 US20170047854 A1 US 20170047854A1 US 201514823860 A US201514823860 A US 201514823860A US 2017047854 A1 US2017047854 A1 US 2017047854A1
- Authority
- US
- United States
- Prior art keywords
- time interval
- blanking time
- voltage
- feedback
- voltage level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 36
- 238000007599 discharging Methods 0.000 claims description 31
- 238000000034 method Methods 0.000 claims description 20
- 230000000977 initiatory effect Effects 0.000 claims description 18
- 238000010586 diagram Methods 0.000 description 10
- -1 RCS2 Proteins 0.000 description 2
- 101150030566 CCS1 gene Proteins 0.000 description 1
- 101150110971 CIN7 gene Proteins 0.000 description 1
- 101100332461 Coffea arabica DXMT2 gene Proteins 0.000 description 1
- 101150087322 DCPS gene Proteins 0.000 description 1
- 101001074602 Homo sapiens Protein PIMREG Proteins 0.000 description 1
- 101000686031 Homo sapiens Proto-oncogene tyrosine-protein kinase ROS Proteins 0.000 description 1
- 101150110298 INV1 gene Proteins 0.000 description 1
- 102100036258 Protein PIMREG Human genes 0.000 description 1
- 102100023347 Proto-oncogene tyrosine-protein kinase ROS Human genes 0.000 description 1
- 101100386725 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DCS1 gene Proteins 0.000 description 1
- 101100116191 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) DCS2 gene Proteins 0.000 description 1
- 101100341123 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) IRA2 gene Proteins 0.000 description 1
- 102100029469 WD repeat and HMG-box DNA-binding protein 1 Human genes 0.000 description 1
- 101710097421 WD repeat and HMG-box DNA-binding protein 1 Proteins 0.000 description 1
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 101150104736 ccsB gene Proteins 0.000 description 1
- 102100033718 m7GpppX diphosphatase Human genes 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
- H02H3/093—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means
- H02H3/0935—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means the timing being determined by numerical means
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33538—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type
- H02M3/33546—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
Definitions
- This disclosure relates to switch-mode power supplies, and more specifically to blanking time for overload protection for a switch-mode power supply controller.
- Blanking time for overload protection is often used by SMPS designers.
- a millisecond level blanking time is often be used to protect the system against an over load condition (OLP) and also effectively to avoid OLP mistriggering caused by noise.
- a blanking time for a switch-mode power supply controller includes a first blanking time interval and a second blanking time interval.
- the first blanking time interval the time to charge the feedback voltage at the feedback input of the switch-mode power supply is measured, and a timer setting time is stored based on the measured time.
- a series of charge cycles is used.
- the feedback voltage is discharged and then allowed to charge. If, after being discharged, the feedback voltage reaches a voltage threshold during the timer setting time, a counter value is incremented and the next cycle begins. If the feedback voltage does not reach the voltage threshold within the timer setting time, the blanking time ends. If the counter value reaches a count threshold, a shutdown mode is initiated.
- a device for overload protection comprises: a switch-mode power supply controller, including: a feedback pin that is coupled to a feedback node; a logic circuit that is arranged to determine whether a fault condition has ended by the end of a first blanking time interval; a capacitor size counter that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, measure a time that is based on an external component that is coupled to the feedback pin; a preset timer setting circuit that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, store a preset timer setting that is based on the measured time, wherein the logic circuit is further arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during a second blanking time interval that proceeds the first blanking time interval, perform a charge cycle sequence such that the duration of the second blanking time interval is based on the timer
- a method for overload protection comprises: determining whether a fault condition has ended by the end of a first blanking time interval; and if it is determined that the fault condition has not ended by the end of the first blanking time interval: during the first blanking time interval, measuring a time that is based on an external component that is coupled to the feedback pin; storing a preset timer setting that is based on the measured time; and during a second blanking time interval that proceeds the first blanking time interval, performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- a device for overload protection comprises: means for determining whether a fault condition has ended by the end of a first blanking time interval; means for measuring a time that is based on an external component that is coupled to the feedback pin during the first time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval; storing a preset timer setting that is based on the measured time if it is determined that the fault condition has not ended by the end of the first blanking time interval; and means for performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time during a second blanking time interval that proceeds the first blanking time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval, wherein the means for performing the charge cycle sequence includes: means for determining whether a fault condition has ended during the second time interval; means for controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node if
- FIG. 1 is a block diagram illustrating an example of a switch-mode power supply controller.
- FIG. 2 is a flowchart illustrating an example of a process that may be employed by an example of the switch-mode power supply controller of FIG. 1 .
- FIG. 3 is a block diagram of an example of a switch-mode power supply (SMPS) that includes an example of the switch-mode power supply controller of FIG. 1 .
- SMPS switch-mode power supply
- FIG. 4 is a block diagram illustrating an example of the switch-mode power supply controller of FIG 1 .
- FIG. 5 is a block diagram illustrating a portion of the switch-mode power supply controller of FIG. 4 .
- FIGS. 6A-6E are timing diagrams illustrating waveforms of example signals of examples of the SMPS 300 of FIG. 3 in which the circuit of FIG. 5 is an example of a portion of the SMPS controller of FIG. 3 .
- the term “or” is an inclusive “or” operator, and is equivalent to the term “and/or,” unless the context clearly dictates otherwise.
- the term “based, in part, on”, “based, at least in part, on”, or “based on” is not exclusive and allows for being based on additional factors not described, unless the context clearly dictates otherwise.
- gate is intended to be a generic term covering both “gate” and “base”; the term “source” is intended to be a generic term covering both “source” and “emitter”; and the term “drain” is intended to be a generic term covering both “drain” and “collector.”
- coupled means at least either a direct electrical connection between the items connected, or an indirect connection through one or more passive or active intermediary devices.
- signal means at least one current, voltage, charge, temperature, data, or other signal.
- FIG. 1 is a block diagram illustrating an example of switch-mode power supply (SMPS) controller 101 .
- Switch-mode power supply controller 101 includes feedback pin FB, capacitor size counter 120 , preset timer setting circuit 121 , and logic circuit 130 .
- feedback pin FB is coupled to a feedback node N FB .
- Capacitor size counter 120 is arranged to, if logic circuit 120 determines that the fault condition has not ended by the end of the first blanking time interval (t 1 ), during t 1 , measure a time that is based on an external component (not shown in FIG. 1 ) that is coupled to feedback pin FB.
- Preset timer setting circuit 121 is arranged to, logic circuit 120 determines that the fault condition has not ended by the end of the first blanking time interval (t 1 ), store a timer setting time (TOLP_R) such that the timer setting time (TOLP_R) is based on the time measured by capacitor size counter 120 .
- Logic circuit is further arranged to, if logic circuit 130 determines that the fault condition has not ended by the end of the first blanking time interval (t 1 ), during a second blanking time interval (t 2 ) that proceeds the first blanking time interval (t 1 ), perform a charge cycle sequence such that the duration of the second blanking time interval (t 2 ) is based on the timer setting time (TOLP_R), and wherein performing the charge cycle sequence includes determining whether a fault condition has ended during the second time interval, and further includes: controlling ending the second blanking time interval (t 2 ) and restarting controlling regulation of an output voltage (not shown in FIG.
- logic circuit 130 may be further arranged to, during the first blanking time interval (t 1 ), control discharging of feedback voltage VFB to a first voltage level (VFBL).
- Logic circuit 130 may be further arranged to, after discharging feedback voltage VFB to the first voltage level (VFBL) during the first blanking time interval (t 1 ), control ending the first blanking time interval (t 1 ) and restarting controlling regulation of the output voltage (not shown in FIG. 1 ) based on feedback voltage VFB if feedback voltage VFB did not reach the second voltage level (VFBH) during the first blanking time interval (t 1 ).
- logic circuit 130 is arranged to determine whether the fault condition has ended by the end of the first blanking time interval (t 1 ) by determining whether feedback voltage VFB reaches the second voltage level (VFBH) during the first blanking time interval (t 1 ) after being discharged to the first voltage level (VFBL).
- capacitor size counter 121 is arranged to measure the time based on an external component by measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level.
- logic circuit 130 is arranged to performing the charge cycle sequence as follows.
- logic circuit 130 may be arranged to begin a first charge cycle of the second blanking interval (t 2 ), and to control, during each charge cycle of the second blanking time interval (t 2 ), the following actions.
- logic circuit 130 controls discharging VFB to the first voltage level (VFBL).
- logic circuit 130 controls determining whether VFB reaches the second voltage level (VFBH) within the timer setting time (TOLP_R) after VFB was last discharged to the first voltage level (VFBL).
- Logic circuit 130 is further arranged such that, if VFB fails to reach the second voltage level (VFBH) within the timer setting time (TOLP_R) after VFB was last discharged to the first voltage level (VFBL), logic circuit 130 controls ending the second blanking time interval and restarting controlling regulation of an output voltage VO (not shown in FIG. 1 ) based on VFB.
- Logic circuit 130 may be further arranged to control, if VFB reaches the second voltage level within the timer setting time after VFB was last discharged to the first voltage level (VFBL), incrementing a charge cycle counter value. Logic circuit 130 is further arranged such that, after the charge cycle counter value is incremented, if the charge cycle counter has reached a charge cycle count threshold (NOLP_E), logic circuit 130 controls initiating of a shutdown mode. In various examples, the shutdown mode may be a complete shutdown or a partial shutdown. Logic circuit 130 is further arranged such that, after the charge cycle counter value is incremented, if the charge cycle counter has failed to reach the charge cycle count threshold (NOLP_E), a next charge cycle of the second blanking time interval (t 2 ) begins.
- NOLP_E charge cycle count threshold
- FIG. 2 is a flowchart illustrating an example of process 240 , which may be employed by an example of switch-mode power supply controller 101 of FIG. 1 .
- a logic circuit e.g., logic circuit 130 of FIG. 1
- a switch mode power supply controller e.g., switch-mode power supply controller 101
- VFBL first voltage level
- the logic circuit makes a determination is made as to whether, after controlling discharging of the feedback voltage (VFB) to the first voltage level (VFBL) during the first blanking time interval (t 1 ), the feedback voltage (VFB) reaches a second voltage level (VFBH) during the first blanking time interval t 1 ( 242 ). If not, the logic circuit controls ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage ( 243 ), and then the process then advances to a return block, where other processing is resumed.
- VFB feedback voltage
- VFBH second voltage level
- a capacitor size counter measures how much time occurs between VFB being at the first voltage level (VFBL) and VFB being at a second voltage level (VFBH) ( 244 ). Then, a timer setting circuit (e.g., timer setting circuit 121 of FIG. 1 ) stores a timer setting time (TOLP_R) such that the timer setting time (TOLP_R) is based on the measured time between VFB being at the first voltage level (VFBL) and VFB being at the second voltage level (VFBH) during the first blanking time interval (t 1 ) ( 245 ).
- TOLP_R timer setting time
- the logic circuit controls performing a charge cycle sequence such that the duration of the second blanking time interval (t 2 ) is based on timer setting time TOLP_R ( 246 ). The processing then proceeds to the return block, where other processing is resumed.
- controlling performing the charge cycle sequence includes determining Whether a fault condition has ended during t 2 , controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on feedback voltage VFB if a fault condition is determined to have ended during the second blanking time interval (t 2 ), and further includes initiating a shutdown mode if the fault condition is determined not to have ended by an end of the second blanking time interval (t 2 ).
- performing the charge cycle sequence includes beginning a first charge cycle of the second blanking time interval (t 2 ), where each charge cycle of the second blanking time interval (t 2 ) includes the following actions.
- feedback voltage VFB is discharged to the first voltage level (VFBL).
- VFBH the second voltage level
- TOLP_R timer setting time
- the logic circuit controls ending the second blanking time interval (t 2 ) and restarting controlling regulation of an output voltage based on feedback voltage VFB. If feedback voltage VFB reaches the second voltage level (VFBH) within the timer setting time (TOLP_R) after feedback voltage VFB was last discharged to the first voltage level (VFBL), the logic circuit increments a charge cycle counter value.
- the logic circuit After incrementing the charge cycle counter value, if the charge cycle counter has reached a charge cycle count threshold (NOLP_E), the logic circuit initiates a shutdown mode. After incrementing the charge cycle counter value, if the charge cycle counter has failed to reach the charge cycle count threshold (NOLP_E), the logic circuit controls beginning a next charge cycle of the second blanking time interval (t 2 ).
- FIG. 3 is a block diagram of an example of switch-mode power supply (SMPS) 300 , which includes SMPS controller 301 , which may be employed as an example of switch-mode power supply controller 101 of FIG. 1 .
- SMPS 300 further includes capacitors Cbus, CFB, CINS, CS, CCS 1 , CCS 2 , CO, CC 1 , CC 2 , and Cf; resistors RINS 1 , RINS 2 , RFMIN, RCS 1 , RCS 2 , RB 1 , RB 2 , RC 1 , Rc 2 , ROS 1 , and ROS 2 ; diodes DCS 1 , DCS 2 , DO 1 , and DO 2 ; three-terminal adjustable shunt regulator TL 431 ; inductor LF; opto-coupler OPTO_coupler; transformer WP/WSH/WSL; power transistors Q 1 and Q 2 ; and driver module 350 .
- SMPS switch-mode power supply
- the example SMPS 300 illustrated in FIG. 3 may operate in the conventional manner of a half-bridge resonant LLC switch-mode power supply, except for the blanking time, as follows in some examples.
- FIG. 3 specifically illustrates a half-bridge resonant LLC SMPS architecture, any suitable SMPS architecture may be employed for SMPS 300 within the scope and spirit of the disclosure.
- blanking time for SMPS 300 includes a first blanking time interval (t 1 ) and a second blanking time interval (t 2 ) that is immediately following and contiguous with ti, for a total blanking time of t 1 +t 2 , although the blanking time may end early, and in some instances the blanking time may end during t 1 if the fault condition ends during t 1 (in which case t 2 does not occur).
- first blanking time interval (t 1 ) the time to charge VFB is measured, and a timer setting time (TOLP_R) is stored based on the measured time.
- TOLP_R timer setting time
- a series of charge cycles is used. At each charge cycle, VFB is discharged and then allowed to charge.
- VFB If, after being discharged, VFB reaches a voltage threshold during the timer setting time, a counter value is incremented and the next cycle begins. If VFB does not reach the voltage threshold within the timer setting time, the blanking time ends. If the counter value reaches a count threshold (NOLP_E), a shutdown mode is initiated.
- NOLP_E a count threshold
- FIG. 4 is a block diagram illustrating an example of switch-mode power supply controller 401 , which may be employed as an example of SMPS controller 101 FIG. 1 .
- SMPS controller 401 further includes switch control circuit 451 .
- switch control circuit 451 is arranged to provide switch control signal(s) SCTL responsive to feedback voltage VFB so that switch control signals SCTL control regulation of output voltage VO (e.g., of FIG. 3 ).
- switch control circuit 451 determines that there is still a fault condition after the entire blanking dine (t 1 +t 2 )
- logic circuit 430 provides an indication to switch control circuit 451 to enter into a shutdown mode.
- Switch control circuit 451 may be arranged to provide one or more controls signals SCTL to control the opening and closing of one or more switches (e.g., transistors Q 1 and Q 2 of FIG. 3 ) external to SMPS controller 401 .
- switches e.g., transistors Q 1 and Q 2 of FIG. 3
- switch controls signals may go to one or more drivers which in turn drive the switches.
- the driver(s) may be either internal or external to SMPS controller 401 . In the example illustrated in FIG. 3 , the driver are external to the SMPS controller and included in driver module 350 .
- FIG. 5 is a block diagram illustrating a portion of switch-mode power supply controller 501 , which may be employed as an example of a portion of SMPS 401 of FIG. 4 , along with external components Cext and opto-coupler Opto_coupler.
- SMPS controller 501 further includes resistor RFB and transistor QFB.
- Logic circuit 530 includes timer TOLP, timer TOLP_R, comparators COMP 1 -COMP 3 , flip-flops FF 1 -FF 3 , counter 560 , switch SW 1 , inverter INV 1 , and AND gate AND 1 .
- SMPS controller 501 is integrated on an integrated circuit (IC).
- Capacitor size counter G 0 is an example of capacitor size counter 120 of FIG. 1 .
- Preset timer setting block G 1 is an example of preset timer setting circuit 121 of FIG. 1 .
- SMPS controller 501 may be included as part of any one (or more) of a large variety of different suitable applications, including, but not limited to, audio applications. As such, in some examples, SMPS controller 501 may be part of an audio device, or any other suitable device that contains a SMPS.
- Capacitor Cext may be used to provide for an adjustable blanking time (e.g., a total blanking time of t 1 +t 2 , where t 1 is fixed and t 2 varies based on external capacitor Cext). In these examples, with a larger capacitor value for Cext, the blanking time is longer.
- SMPS controller 501 rather than using an additional dedicated pin and external R-C network, SMPS controller 501 has a built-in feature to provide for an adjustable blanking time without adding any external component counts and without increasing the pin count. In these examples, the same feedback pin used for detecting the output voltage for voltage regulation is also used for the adjustable blanking time. Also, in some examples, the existing capacitor Cext, which is used for compensation of voltage VFB, is used by SMPS controller 501 to adjust the blanking time.
- SMPS controller 501 may allow for a stable and adjustable blanking time to fit different application requirements.
- both of the OLP blanking time and preset time are adaptive for relatively wide range of external capacitor Cext which is connected to FB pin, so that the customer can freely choose a preferred blanking time by choosing corresponding external capacitor Cext value, without any need for additional external components or any additional pin or pins.
- the FB pin is used not only for regulation, but also for overload protection blanking time.
- VFB in the case of an output overload condition, voltage VFB increases to its maximum level VFBH.
- VFBH is greater than three volts, such as 4.5V. If VFB voltage is higher than VFBH (e.g., 4.5V in one non-limiting example) and this condition lasts longer than a fixed blanking time of TOLP (e.g., 20 ms in one non-limiting example), SMPS controller 501 starts the extended blanking time (i.e., the second blanking time interval t 2 ).
- the extended blanking time may be realized by charging and discharging the fitter capacitor CFB via the pull-up resistor RFB (e.g., 20 kohm in one non-limiting example) and transistor QFB.
- logic circuit 530 controls will use internal switch QFB to discharge VFB to VFBL.
- VFBL has a magnitude of less than one volt.
- VFBL is 0.5 V.
- logic circuit 530 causes CFB will be charged up by Vdd (e.g., 5V) through RFB.
- Vdd e.g., 5V
- t chg - ln ⁇ ( V dd - V FBH V dd - V FBL ) ⁇ R FB ⁇ C FB
- the charging time for capacitor Cext is about 439 us.
- blanking time is initiated when VFB remains higher than VFBH (e.g., 4.5 V) (when there is no explicit discharging performed by SMPS controller 501 ).
- Blanking may begin with a first blanking time interval, t 1 , that is initiated by timer tOLP.
- t 1 may be a fixed time interval, such as a fixed time interval of at least 10 ms, such as 20 ms. In other examples within the scope and spirit of the disclosure, t 1 may be a fixed or variable time period other than 20 ms.
- SMPS controller 501 causes feedback voltage VFB to be pulled down to VFBL (e.g., 0.5V) and then released for one time.
- internal power supply VDD! (as labeled in FIG. 5 ) may then charge external capacitor Cext through internal resistor RFB.
- logic circuit 530 may control counter 520 to measure how much time it takes for Cext to be charged from VFBL (e.g., 0.5V) to VFBH (e.g., 4.5V).
- VFBL e.g., 0.5V
- VFBH e.g., 4.5V
- logic circuit 530 controls SMPS controller 501 to resume to normal operation, and extended blanking time (t 2 ) is not performed.
- Preset setting circuit 521 may store a setting time TOLP_R that is based on the time determined by counter 520 .
- TOLP_R time may then be used during extended blanking time t 2 to judge whether system will resume to normal operation or not. For instance, in one example, if the timing for Cext to be charged from 0.5V to 4.5V is 300 ⁇ s (as measured by counter 520 ), then setting time TOLP_R is to be 400 ⁇ s.
- feedback voltage VFB may be pulled down to 0.5V and charged to 4.5V for up to a number of times given by the charge cycle count threshold NOLP_E (e.g., 512), unless the extended blanking time t 2 is exited.
- NOLP_E charge cycle count threshold
- the charge cycle count is at zero or is initialized to zero when t 2 begins.
- the extended blanking time t 2 is exited if, during any charging phase, the charging time is longer than preset time TOLP_R, at which point logic circuit 530 causes the charging and discharging to stop, and controls SMPS controller 501 to resume to normal operation.
- VFB after VFB reaches VFBH, an internal counter will increase by 1 and the capacitor is discharged to 0.5V by QFB again.
- the charging and discharging process of CFB may be repeated for NOLP_E (512) times if the fault condition still exists.
- NOLP_E the VFB voltage is pulled down to zero
- the charge cycle may stop switching after FB voltage rises to VFBH again.
- the charge cycle may operate with frequency that depends on preset timer value TOLP_R. If the charging time is shorter than preset time TOLP_R for each timing phase and a number of charge cycles occur equal to the charge cycle count threshold NOLP_E, SMPS controller 101 may enter into shutdown mode.
- FIGS. 6A-6E are timing diagrams illustrating waveforms of examples of signals of examples of SMPS 300 of FIG. 3 in which the circuit of FIG. 5 is an example of a portion of SMPS controller 301 of FIG. 3 .
- FIGS. 6A-6E refer to times t 0 -t 9 , but these times are different than times t 1 and t 2 referenced elsewhere in this document.
- t 2 -t 6 of FIGS. 6A-6E represent the first blanking time interval (referred to as the first blanking time interval t 1 elsewhere in this document)
- t 6 -t 8 of FIGS. 6A-6E represent the second blanking time interval (referred to as the second blanking time interval t 2 or the extended blanking time t 2 elsewhere in this document) for one example
- t 6 -t 9 represents the second blanking time interval for another example.
- FIG. 6A illustrates a waveform of an example of load current Iload over time.
- FIG. 6B illustrates a waveform of an example of the fault timer 560 output, that is, the charge cycle counter value, over time.
- FIG. 6C illustrates a waveform of an example of feedback voltage VFB over time, where FIG. 6C is based on the same example as FIG. 6B .
- FIG. 6D illustrates a waveform of an example of the fault timer 560 output, that is, the charge cycle counter value, over time, where FIG. 6D illustrates an example in which CFB has a greater capacitance than CFB does for the example illustrated in FIG. 6B and FIG. 6C .
- FIG. 6E illustrates a waveform of an example of feedback voltage VFB over time, where FIG. 6E is based on the sample example as FIG. 6D .
- SMPS 300 is operating in accordance with normal operation, and is performing voltage regulation to provide output voltage V O in accordance with the normal operation of SMPS 300 .
- an overload condition occurs in which load current Iload increases.
- feedback voltage VFB reaches 4.5V, and the first blanking time interval begins, where timer T OLP begins timing 20 ms starting with time t 2 .
- feedback voltage VFB is discharged to 0.5V.
- feedback voltage VFB of the example of FIG. 6C reaches 4.5V.
- feedback voltage VFB of the example of FIG. 6E reaches 4.5V.
- 20 ms has occurred since the time t 2 , as timed by timer T OLP , and so first blanking time interval ends, and the second blanking time interval begins.
- feedback voltage VFB of the example of FIG. 6C fails to reach 4.5V within the timer setting time after feedback voltage VFB was last discharged to 0.5 V (time t 7 ). Accordingly, at time t 8 , the blanking period ends and normal operation resumes for the example of FIG. 6C .
- feedback voltage VFB of the example of FIG. 6E fails to reach 4.5V within the timer setting time after feedback voltage VFB was last discharged to 0.5 V (time t 7 ). Accordingly, at time t 9 , the blanking period ends and normal operation resumes for the example of FIG. 6E .
- a device for overload protection comprising: a switch-mode power supply controller, including: a feedback pin that is coupled to a feedback node; a logic circuit that is arranged to determine whether a fault condition has ended by the end of a first blanking time interval; a capacitor size counter that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during the first blanking time interval, measure a time that is based on an external component that is coupled to the feedback pin; a preset timer setting circuit that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, store a preset timer setting that is based on the measured time, wherein the logic circuit is further arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during a second blanking time interval that proceeds the first blanking time interval, perform a charge cycle sequence such that the duration of the second blanking time interval is
- the logic circuit is arranged to during the first blanking time interval, control discharging of the feedback voltage to a first voltage level, wherein the logic circuit is arranged to determine whether the fault condition has ended by the end of a first blanking time interval by determining whether the feedback voltage reaches a second voltage level during the first blanking time interval after being discharged to the first voltage level; after discharging the feedback voltage to the first voltage level during the first blanking time interval, control ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage if the feedback voltage did not reach a second voltage level during the first blanking time interval, wherein the capacitor size counter is arranged to, if the feedback voltage reached the second voltage level during the first blanking interval, measure the time that is based on a size of an external component that is coupled to the feedback pin by measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level, and wherein the logic circuit is arranged to performing the charge cycle sequence
- the switch-mode power supply controller further includes a transistor that is coupled to the feedback pin and a pull-up resistor that is coupled to the feedback pin, wherein the logic circuit is arranged to control discharging of the feedback voltage to a first voltage level during the first blanking interval by controlling the transistor, and wherein the logic circuit is further arranged to control charging of the feedback voltage via the transistor and the pull-up resistor.
- the device of any combination of examples 1-4 further comprising a compensation network that is external to the switch-mode power supply controller, wherein the compensation network includes a capacitor that is coupled to the feedback pin.
- switch-mode power supply is a half-bridge resonant LLC switch-mode power supply.
- a method for overload protection comprising: determining whether a fault condition has ended by the end of a first blanking time interval; and if it is determined that the fault condition has not ended by the end of the first blanking time interval: during the first time interval, measuring a time that is based on an external component that is coupled to the feedback pin; storing a preset timer setting that is based on the measured time; during a second blanking time interval that proceeds the first blanking time interval, performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- a device for overload protection comprising: means for determining whether a fault condition has ended by the end of a first blanking time interval; means for measuring a time that is based on an external component that is coupled to the feedback pin during the first time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval; storing a preset timer setting that is based on the measured time if it is determined that the fault condition has not ended by the end of the first blanking time interval; and means for performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time during a second blanking time interval that proceeds the first blanking time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval, wherein the means for performing the charge cycle sequence includes: means for determining whether a fault condition has ended during the second time interval; means for controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node if a fault condition
- the device of example 17, further comprising: means for controlling discharging of the feedback voltage to a first voltage level during the first blanking time interval, where the means for determining whether the fault condition has ended by the end of the first blanking time interval includes means for determining whether the feedback voltage reaches a second voltage level during the first blanking time interval after being discharged to the first voltage level; means for, after discharging the feedback voltage to the first voltage level during the first blanking time interval, controlling ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage if the feedback voltage did not reach a second voltage level during the first blanking time interval, wherein the means for measuring a time that is based on an external component that is coupled to the feedback pin includes means for measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level, and wherein the means for performing the charge cycle sequence includes means for beginning a first charge cycle of the second blanking time interval, and wherein the means for performing the charge cycle sequence includes: means
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Inverter Devices (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
Description
- This disclosure relates to switch-mode power supplies, and more specifically to blanking time for overload protection for a switch-mode power supply controller.
- Blanking time for overload protection (OLP) is often used by SMPS designers. For example, for LCD/LED TV applications, a millisecond level blanking time is often be used to protect the system against an over load condition (OLP) and also effectively to avoid OLP mistriggering caused by noise.
- In general, the disclosure is directed to a method and device in which a blanking time for a switch-mode power supply controller includes a first blanking time interval and a second blanking time interval. During the first blanking time interval, the time to charge the feedback voltage at the feedback input of the switch-mode power supply is measured, and a timer setting time is stored based on the measured time. During the second time interval, a series of charge cycles is used. At each charge cycle, the feedback voltage is discharged and then allowed to charge. If, after being discharged, the feedback voltage reaches a voltage threshold during the timer setting time, a counter value is incremented and the next cycle begins. If the feedback voltage does not reach the voltage threshold within the timer setting time, the blanking time ends. If the counter value reaches a count threshold, a shutdown mode is initiated.
- In some examples, a device for overload protection comprises: a switch-mode power supply controller, including: a feedback pin that is coupled to a feedback node; a logic circuit that is arranged to determine whether a fault condition has ended by the end of a first blanking time interval; a capacitor size counter that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, measure a time that is based on an external component that is coupled to the feedback pin; a preset timer setting circuit that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, store a preset timer setting that is based on the measured time, wherein the logic circuit is further arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during a second blanking time interval that proceeds the first blanking time interval, perform a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- In some examples, a method for overload protection comprises: determining whether a fault condition has ended by the end of a first blanking time interval; and if it is determined that the fault condition has not ended by the end of the first blanking time interval: during the first blanking time interval, measuring a time that is based on an external component that is coupled to the feedback pin; storing a preset timer setting that is based on the measured time; and during a second blanking time interval that proceeds the first blanking time interval, performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- In some examples, a device for overload protection comprises: means for determining whether a fault condition has ended by the end of a first blanking time interval; means for measuring a time that is based on an external component that is coupled to the feedback pin during the first time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval; storing a preset timer setting that is based on the measured time if it is determined that the fault condition has not ended by the end of the first blanking time interval; and means for performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time during a second blanking time interval that proceeds the first blanking time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval, wherein the means for performing the charge cycle sequence includes: means for determining whether a fault condition has ended during the second time interval; means for controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node if a fault condition is determined to have ended during the second blanking time interval; and means for initiating a shutdown mode if the fault condition is determined not to have ended by an end of the second blanking time interval.
- The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the disclosure will be apparent from the description and drawings, and from the claims.
- Non-limiting and non-exhaustive examples of the present disclosure are described with reference to the following drawings.
-
FIG. 1 is a block diagram illustrating an example of a switch-mode power supply controller. -
FIG. 2 is a flowchart illustrating an example of a process that may be employed by an example of the switch-mode power supply controller ofFIG. 1 . -
FIG. 3 is a block diagram of an example of a switch-mode power supply (SMPS) that includes an example of the switch-mode power supply controller ofFIG. 1 . -
FIG. 4 is a block diagram illustrating an example of the switch-mode power supply controller ofFIG 1 . -
FIG. 5 is a block diagram illustrating a portion of the switch-mode power supply controller ofFIG. 4 . -
FIGS. 6A-6E are timing diagrams illustrating waveforms of example signals of examples of theSMPS 300 ofFIG. 3 in which the circuit ofFIG. 5 is an example of a portion of the SMPS controller ofFIG. 3 . - Various examples of this disclosure will be described in detail with reference to the drawings, where like reference numerals represent like parts and assemblies throughout the several views. Reference to various examples does not limit the scope of this disclosure which is limited only by the scope of the claims attached hereto. Additionally, any examples set forth in this specification are not intended to be limiting and merely set forth some of the many possible examples of this disclosure.
- Throughout the specification and claims, the following terms take at least the meanings explicitly associated herein, unless the context dictates otherwise. The meanings identified below do not necessarily limit the terms, but merely provide illustrative examples for the terms. The meaning of “a,” “an,” and “the” includes plural reference, and the meaning of “in” includes “in” and “on.” The phrase “in one embodiment,” or “in one example,” as used herein does not necessarily refer to the same embodiment or example, although it may. Similarly, the phrase “in some embodiments,” or “in some examples,” as used herein, when used multiple times, does not necessarily refer to the same embodiments or examples, although it may. As used herein, the term “or” is an inclusive “or” operator, and is equivalent to the term “and/or,” unless the context clearly dictates otherwise. The term “based, in part, on”, “based, at least in part, on”, or “based on” is not exclusive and allows for being based on additional factors not described, unless the context clearly dictates otherwise. Where suitable, the term “gate” is intended to be a generic term covering both “gate” and “base”; the term “source” is intended to be a generic term covering both “source” and “emitter”; and the term “drain” is intended to be a generic term covering both “drain” and “collector.” The term “coupled” means at least either a direct electrical connection between the items connected, or an indirect connection through one or more passive or active intermediary devices. The term “signal” means at least one current, voltage, charge, temperature, data, or other signal.
-
FIG. 1 is a block diagram illustrating an example of switch-mode power supply (SMPS)controller 101. Switch-modepower supply controller 101 includes feedback pin FB,capacitor size counter 120, preset timer setting circuit 121, andlogic circuit 130. In the example ofFIG. 1 , feedback pin FB is coupled to a feedback node NFB. - Logic circuit that is arranged to determine whether a fault condition has ended by the end of a first blanking time interval (t1).
Capacitor size counter 120 is arranged to, iflogic circuit 120 determines that the fault condition has not ended by the end of the first blanking time interval (t1), during t1, measure a time that is based on an external component (not shown inFIG. 1 ) that is coupled to feedback pin FB. Preset timer setting circuit 121 is arranged to,logic circuit 120 determines that the fault condition has not ended by the end of the first blanking time interval (t1), store a timer setting time (TOLP_R) such that the timer setting time (TOLP_R) is based on the time measured bycapacitor size counter 120. - Logic circuit is further arranged to, if
logic circuit 130 determines that the fault condition has not ended by the end of the first blanking time interval (t1), during a second blanking time interval (t2) that proceeds the first blanking time interval (t1), perform a charge cycle sequence such that the duration of the second blanking time interval (t2) is based on the timer setting time (TOLP_R), and wherein performing the charge cycle sequence includes determining whether a fault condition has ended during the second time interval, and further includes: controlling ending the second blanking time interval (t2) and restarting controlling regulation of an output voltage (not shown inFIG. 1 ), based on a feedback voltage (VFB) at the feedback node (NFB) if a fault condition is determined to have ended during the second blanking time interval (t2), and initiating a shutdown mode if the fault condition is determined not to have ended by an end of the second blanking time interval (t2). - In some examples,
logic circuit 130 may be further arranged to, during the first blanking time interval (t1), control discharging of feedback voltage VFB to a first voltage level (VFBL).Logic circuit 130 may be further arranged to, after discharging feedback voltage VFB to the first voltage level (VFBL) during the first blanking time interval (t1), control ending the first blanking time interval (t1) and restarting controlling regulation of the output voltage (not shown inFIG. 1 ) based on feedback voltage VFB if feedback voltage VFB did not reach the second voltage level (VFBH) during the first blanking time interval (t1). In some examples,logic circuit 130 is arranged to determine whether the fault condition has ended by the end of the first blanking time interval (t1) by determining whether feedback voltage VFB reaches the second voltage level (VFBH) during the first blanking time interval (t1) after being discharged to the first voltage level (VFBL). - In some examples, capacitor size counter 121 is arranged to measure the time based on an external component by measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level.
- In some examples,
logic circuit 130 is arranged to performing the charge cycle sequence as follows. In particular,logic circuit 130 may be arranged to begin a first charge cycle of the second blanking interval (t2), and to control, during each charge cycle of the second blanking time interval (t2), the following actions. First,logic circuit 130 controls discharging VFB to the first voltage level (VFBL). Next,logic circuit 130 controls determining whether VFB reaches the second voltage level (VFBH) within the timer setting time (TOLP_R) after VFB was last discharged to the first voltage level (VFBL).Logic circuit 130 is further arranged such that, if VFB fails to reach the second voltage level (VFBH) within the timer setting time (TOLP_R) after VFB was last discharged to the first voltage level (VFBL),logic circuit 130 controls ending the second blanking time interval and restarting controlling regulation of an output voltage VO (not shown inFIG. 1 ) based on VFB. -
Logic circuit 130 may be further arranged to control, if VFB reaches the second voltage level within the timer setting time after VFB was last discharged to the first voltage level (VFBL), incrementing a charge cycle counter value.Logic circuit 130 is further arranged such that, after the charge cycle counter value is incremented, if the charge cycle counter has reached a charge cycle count threshold (NOLP_E),logic circuit 130 controls initiating of a shutdown mode. In various examples, the shutdown mode may be a complete shutdown or a partial shutdown.Logic circuit 130 is further arranged such that, after the charge cycle counter value is incremented, if the charge cycle counter has failed to reach the charge cycle count threshold (NOLP_E), a next charge cycle of the second blanking time interval (t2) begins. -
FIG. 2 is a flowchart illustrating an example ofprocess 240, which may be employed by an example of switch-modepower supply controller 101 ofFIG. 1 . After a start block during a first blanking time interval, a logic circuit (e.g.,logic circuit 130 ofFIG. 1 ) controls discharging feedback voltage VFB at a feedback pin (e.g., feedback pin 110 ofFIG. 1 ) of a switch mode power supply controller (e.g., switch-mode power supply controller 101) to a first voltage level (VFBL) (241). Next, the logic circuit makes a determination is made as to whether, after controlling discharging of the feedback voltage (VFB) to the first voltage level (VFBL) during the first blanking time interval (t1), the feedback voltage (VFB) reaches a second voltage level (VFBH) during the first blanking time interval t1 (242). If not, the logic circuit controls ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage (243), and then the process then advances to a return block, where other processing is resumed. - If instead VFB reaches VFBH during the first blanking time interval (t1), a capacitor size counter (e.g.,
capacitor size counter 120 ofFIG. 1 ) measures how much time occurs between VFB being at the first voltage level (VFBL) and VFB being at a second voltage level (VFBH) (244). Then, a timer setting circuit (e.g., timer setting circuit 121 ofFIG. 1 ) stores a timer setting time (TOLP_R) such that the timer setting time (TOLP_R) is based on the measured time between VFB being at the first voltage level (VFBL) and VFB being at the second voltage level (VFBH) during the first blanking time interval (t1) (245). Next, during a second blanking time interval (t2) that proceeds the first blanking time interval (t1), the logic circuit controls performing a charge cycle sequence such that the duration of the second blanking time interval (t2) is based on timer setting time TOLP_R (246). The processing then proceeds to the return block, where other processing is resumed. - In some examples, controlling performing the charge cycle sequence includes determining Whether a fault condition has ended during t2, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on feedback voltage VFB if a fault condition is determined to have ended during the second blanking time interval (t2), and further includes initiating a shutdown mode if the fault condition is determined not to have ended by an end of the second blanking time interval (t2).
- In some examples, performing the charge cycle sequence includes beginning a first charge cycle of the second blanking time interval (t2), where each charge cycle of the second blanking time interval (t2) includes the following actions.
- First, feedback voltage VFB is discharged to the first voltage level (VFBL). Next, a determination is made as to whether feedback voltage VFB reaches the second voltage level (VFBH) within the timer setting time (TOLP_R) after feedback voltage VFB was last discharged to the first voltage level (VFBL). If feedback voltage VFB fails to reach the second voltage level (VFBH) within the timer setting time (TOLP_R) after feedback voltage VFB was last discharged to the first voltage level (VFBL), the logic circuit controls ending the second blanking time interval (t2) and restarting controlling regulation of an output voltage based on feedback voltage VFB. If feedback voltage VFB reaches the second voltage level (VFBH) within the timer setting time (TOLP_R) after feedback voltage VFB was last discharged to the first voltage level (VFBL), the logic circuit increments a charge cycle counter value.
- After incrementing the charge cycle counter value, if the charge cycle counter has reached a charge cycle count threshold (NOLP_E), the logic circuit initiates a shutdown mode. After incrementing the charge cycle counter value, if the charge cycle counter has failed to reach the charge cycle count threshold (NOLP_E), the logic circuit controls beginning a next charge cycle of the second blanking time interval (t2).
-
FIG. 3 is a block diagram of an example of switch-mode power supply (SMPS) 300, which includesSMPS controller 301, which may be employed as an example of switch-modepower supply controller 101 ofFIG. 1 .SMPS 300 further includes capacitors Cbus, CFB, CINS, CS, CCS1, CCS2, CO, CC1, CC2, and Cf; resistors RINS1, RINS2, RFMIN, RCS1, RCS2, RB1, RB2, RC1, Rc2, ROS1, and ROS2; diodes DCS1, DCS2, DO1, and DO2; three-terminal adjustable shunt regulator TL431; inductor LF; opto-coupler OPTO_coupler; transformer WP/WSH/WSL; power transistors Q1 and Q2; anddriver module 350. Theexample SMPS 300 illustrated inFIG. 3 may operate in the conventional manner of a half-bridge resonant LLC switch-mode power supply, except for the blanking time, as follows in some examples. AlthoughFIG. 3 specifically illustrates a half-bridge resonant LLC SMPS architecture, any suitable SMPS architecture may be employed forSMPS 300 within the scope and spirit of the disclosure. - In some examples, blanking time for
SMPS 300 includes a first blanking time interval (t1) and a second blanking time interval (t2) that is immediately following and contiguous with ti, for a total blanking time of t1+t2, although the blanking time may end early, and in some instances the blanking time may end during t1 if the fault condition ends during t1 (in which case t2 does not occur). During the first blanking time interval (t1), the time to charge VFB is measured, and a timer setting time (TOLP_R) is stored based on the measured time. During the second time interval, a series of charge cycles is used. At each charge cycle, VFB is discharged and then allowed to charge. If, after being discharged, VFB reaches a voltage threshold during the timer setting time, a counter value is incremented and the next cycle begins. If VFB does not reach the voltage threshold within the timer setting time, the blanking time ends. If the counter value reaches a count threshold (NOLP_E), a shutdown mode is initiated. -
FIG. 4 is a block diagram illustrating an example of switch-modepower supply controller 401, which may be employed as an example ofSMPS controller 101FIG. 1 .SMPS controller 401 further includesswitch control circuit 451. - During normal operation,
switch control circuit 451 is arranged to provide switch control signal(s) SCTL responsive to feedback voltage VFB so that switch control signals SCTL control regulation of output voltage VO (e.g., ofFIG. 3 ). In some examples, if, during the second blanking time interval (t2), after VFB is discharged VFB does not reach the voltage threshold within the timer setting time, the blanking time ends, andlogic circuit 430 causes switchcontrol circuit 451 to resume normal operation and control regulation of output voltage VO via switch control signals SCTL. Further, in some examples, whenlogic circuit 430 determines that there is still a fault condition after the entire blanking dine (t1+t2),logic circuit 430 provides an indication to switchcontrol circuit 451 to enter into a shutdown mode. -
Switch control circuit 451 may be arranged to provide one or more controls signals SCTL to control the opening and closing of one or more switches (e.g., transistors Q1 and Q2 ofFIG. 3 ) external toSMPS controller 401. For example, with an SMPS topology such as the one illustrated inFIG. 3 , there are two switches controller byswitch control circuit 451, output from two pins HG and LG. However, in other examples, there may be more or less than two switches controlled bySMPS controller 401. As shown inFIG. 3 , switch controls signals may go to one or more drivers which in turn drive the switches. In various examples, the driver(s) may be either internal or external toSMPS controller 401. In the example illustrated inFIG. 3 , the driver are external to the SMPS controller and included indriver module 350. -
FIG. 5 is a block diagram illustrating a portion of switch-mode power supply controller 501, which may be employed as an example of a portion ofSMPS 401 ofFIG. 4 , along with external components Cext and opto-coupler Opto_coupler. SMPS controller 501 further includes resistor RFB and transistor QFB. Logic circuit 530 includes timer TOLP, timer TOLP_R, comparators COMP1-COMP3, flip-flops FF1-FF3,counter 560, switch SW1, inverter INV1, and AND gate AND1. In the example shown. SMPS controller 501 is integrated on an integrated circuit (IC). Capacitor size counter G0 is an example ofcapacitor size counter 120 ofFIG. 1 . Preset timer setting block G1 is an example of preset timer setting circuit 121 ofFIG. 1 . - SMPS controller 501 may be included as part of any one (or more) of a large variety of different suitable applications, including, but not limited to, audio applications. As such, in some examples, SMPS controller 501 may be part of an audio device, or any other suitable device that contains a SMPS.
- Capacitor Cext may be used to provide for an adjustable blanking time (e.g., a total blanking time of t1+t2, where t1 is fixed and t2 varies based on external capacitor Cext). In these examples, with a larger capacitor value for Cext, the blanking time is longer. In some examples, rather than using an additional dedicated pin and external R-C network, SMPS controller 501 has a built-in feature to provide for an adjustable blanking time without adding any external component counts and without increasing the pin count. In these examples, the same feedback pin used for detecting the output voltage for voltage regulation is also used for the adjustable blanking time. Also, in some examples, the existing capacitor Cext, which is used for compensation of voltage VFB, is used by SMPS controller 501 to adjust the blanking time.
- SMPS controller 501 may allow for a stable and adjustable blanking time to fit different application requirements. In some examples of SMPS controller 501, both of the OLP blanking time and preset time are adaptive for relatively wide range of external capacitor Cext which is connected to FB pin, so that the customer can freely choose a preferred blanking time by choosing corresponding external capacitor Cext value, without any need for additional external components or any additional pin or pins. The FB pin is used not only for regulation, but also for overload protection blanking time.
- In some examples, in the case of an output overload condition, voltage VFB increases to its maximum level VFBH. In some examples, VFBH is greater than three volts, such as 4.5V. If VFB voltage is higher than VFBH (e.g., 4.5V in one non-limiting example) and this condition lasts longer than a fixed blanking time of TOLP (e.g., 20 ms in one non-limiting example), SMPS controller 501 starts the extended blanking time (i.e., the second blanking time interval t2). The extended blanking time may be realized by charging and discharging the fitter capacitor CFB via the pull-up resistor RFB (e.g., 20 kohm in one non-limiting example) and transistor QFB.
- In some examples, after VFB voltage has been higher than VFBH for the fixed blanking time t1 (e.g., 20 ms), logic circuit 530 controls will use internal switch QFB to discharge VFB to VFBL. In some examples, VFBL has a magnitude of less than one volt. In some examples, VFBL is 0.5 V. In some examples, after logic circuit 530 releases switch QFB, logic circuit 530 causes CFB will be charged up by Vdd (e.g., 5V) through RFB. The time needed for CFB being charged to VFBH may be estimated as:
-
- For instance, according to one example, if CFB is 10 nF, the charging time for capacitor Cext is about 439 us.
- In some examples, blanking time is initiated when VFB remains higher than VFBH (e.g., 4.5 V) (when there is no explicit discharging performed by SMPS controller 501). Blanking may begin with a first blanking time interval, t1, that is initiated by timer tOLP. In some examples, t1 may be a fixed time interval, such as a fixed time interval of at least 10 ms, such as 20 ms. In other examples within the scope and spirit of the disclosure, t1 may be a fixed or variable time period other than 20 ms.
- Also, in some examples during t1, SMPS controller 501 causes feedback voltage VFB to be pulled down to VFBL (e.g., 0.5V) and then released for one time. After VFB is released, internal power supply VDD! (as labeled in
FIG. 5 ) may then charge external capacitor Cext through internal resistor RFB. While capacitor Cext is being charged, logic circuit 530 may control counter 520 to measure how much time it takes for Cext to be charged from VFBL (e.g., 0.5V) to VFBH (e.g., 4.5V). In some examples, If instead t1 completes and VFB is still below VFBH (e.g., 4.5V), logic circuit 530 controls SMPS controller 501 to resume to normal operation, and extended blanking time (t2) is not performed. - In some examples, if VFB does reach VFBH, blanking time operation continues. Preset setting circuit 521 may store a setting time TOLP_R that is based on the time determined by counter 520. TOLP_R time may then be used during extended blanking time t2 to judge whether system will resume to normal operation or not. For instance, in one example, if the timing for Cext to be charged from 0.5V to 4.5V is 300 μs (as measured by counter 520), then setting time TOLP_R is to be 400 μs. Later, in this example, during extended blanking time t2, when Cext is charged from 0.5V to 4.5V within 400 us during extended blanking time, this indicates that the system is still in the overload condition, and will continue to charge and discharge Cext for up to a number of times given by a charge cycle count threshold NOLP_E (e.g., 256, 512, or the like) if the system remains in the overload condition. In this example, when instead Cext does not charge from 0.5V all the way to 4.5V within 400 μs during extended blanking time t2, this indicates that the system is out of overload condition, and logic circuit 530 will cause the charging and discharging to stop and logic circuit 520 will control SMPS controller 501 to resume normal operation.
- As discussed above, during extended blanking time t2, feedback voltage VFB may be pulled down to 0.5V and charged to 4.5V for up to a number of times given by the charge cycle count threshold NOLP_E (e.g., 512), unless the extended blanking time t2 is exited. (In some examples, the charge cycle count is at zero or is initialized to zero when t2 begins.) The extended blanking time t2 is exited if, during any charging phase, the charging time is longer than preset time TOLP_R, at which point logic circuit 530 causes the charging and discharging to stop, and controls SMPS controller 501 to resume to normal operation.
- In some examples, after VFB reaches VFBH, an internal counter will increase by 1 and the capacitor is discharged to 0.5V by QFB again. The charging and discharging process of CFB may be repeated for NOLP_E (512) times if the fault condition still exists. After the last time of NOLP_E the VFB voltage is pulled down to zero, the charge cycle may stop switching after FB voltage rises to VFBH again. During the charging and discharging period, the charge cycle may operate with frequency that depends on preset timer value TOLP_R. If the charging time is shorter than preset time TOLP_R for each timing phase and a number of charge cycles occur equal to the charge cycle count threshold NOLP_E,
SMPS controller 101 may enter into shutdown mode. -
FIGS. 6A-6E are timing diagrams illustrating waveforms of examples of signals of examples ofSMPS 300 ofFIG. 3 in which the circuit ofFIG. 5 is an example of a portion ofSMPS controller 301 ofFIG. 3 .FIGS. 6A-6E refer to times t0-t9, but these times are different than times t1 and t2 referenced elsewhere in this document. In particular, t2-t6 ofFIGS. 6A-6E represent the first blanking time interval (referred to as the first blanking time interval t1 elsewhere in this document), and t6-t8 ofFIGS. 6A-6E represent the second blanking time interval (referred to as the second blanking time interval t2 or the extended blanking time t2 elsewhere in this document) for one example and t6-t9 represents the second blanking time interval for another example. -
FIG. 6A illustrates a waveform of an example of load current Iload over time.FIG. 6B illustrates a waveform of an example of thefault timer 560 output, that is, the charge cycle counter value, over time.FIG. 6C illustrates a waveform of an example of feedback voltage VFB over time, whereFIG. 6C is based on the same example asFIG. 6B .FIG. 6D illustrates a waveform of an example of thefault timer 560 output, that is, the charge cycle counter value, over time, whereFIG. 6D illustrates an example in which CFB has a greater capacitance than CFB does for the example illustrated inFIG. 6B andFIG. 6C .FIG. 6E illustrates a waveform of an example of feedback voltage VFB over time, whereFIG. 6E is based on the sample example asFIG. 6D . - At time t0,
SMPS 300 is operating in accordance with normal operation, and is performing voltage regulation to provide output voltage VO in accordance with the normal operation ofSMPS 300. At time t1, an overload condition occurs in which load current Iload increases. At time t2, feedback voltage VFB reaches 4.5V, and the first blanking time interval begins, where timer TOLP begins timing 20 ms starting with time t2. At time t3, feedback voltage VFB is discharged to 0.5V. At time t4, feedback voltage VFB of the example ofFIG. 6C reaches 4.5V. At time t5, feedback voltage VFB of the example ofFIG. 6E reaches 4.5V. At time t6, 20 ms has occurred since the time t2, as timed by timer TOLP, and so first blanking time interval ends, and the second blanking time interval begins. - At time t8, feedback voltage VFB of the example of
FIG. 6C fails to reach 4.5V within the timer setting time after feedback voltage VFB was last discharged to 0.5 V (time t7). Accordingly, at time t8, the blanking period ends and normal operation resumes for the example ofFIG. 6C . At time t9, feedback voltage VFB of the example ofFIG. 6E fails to reach 4.5V within the timer setting time after feedback voltage VFB was last discharged to 0.5 V (time t7). Accordingly, at time t9, the blanking period ends and normal operation resumes for the example ofFIG. 6E . - Some examples of the disclosure are described below.
- A device for overload protection, comprising: a switch-mode power supply controller, including: a feedback pin that is coupled to a feedback node; a logic circuit that is arranged to determine whether a fault condition has ended by the end of a first blanking time interval; a capacitor size counter that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during the first blanking time interval, measure a time that is based on an external component that is coupled to the feedback pin; a preset timer setting circuit that is arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, store a preset timer setting that is based on the measured time, wherein the logic circuit is further arranged to, if the logic circuit determines that the fault condition has not ended by the end of the first blanking time interval, during a second blanking time interval that proceeds the first blanking time interval, perform a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- The device of example 1, wherein the logic circuit is arranged to during the first blanking time interval, control discharging of the feedback voltage to a first voltage level, wherein the logic circuit is arranged to determine whether the fault condition has ended by the end of a first blanking time interval by determining whether the feedback voltage reaches a second voltage level during the first blanking time interval after being discharged to the first voltage level; after discharging the feedback voltage to the first voltage level during the first blanking time interval, control ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage if the feedback voltage did not reach a second voltage level during the first blanking time interval, wherein the capacitor size counter is arranged to, if the feedback voltage reached the second voltage level during the first blanking interval, measure the time that is based on a size of an external component that is coupled to the feedback pin by measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level, and wherein the logic circuit is arranged to performing the charge cycle sequence by beginning a first charge cycle of the second blanking time interval, wherein the logic circuit is arranged to control each charge cycle of the second blanking time interval such that each charge cycle of the second blanking time interval includes: discharging the feedback voltage to the first voltage level; determining whether the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level; if the feedback voltage fails to reach the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, ending the second blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage; if the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, incrementing a charge cycle counter value; after incrementing the charge cycle counter value, if the charge cycle counter has reached a charge cycle count threshold, initiating a shutdown mode; and after incrementing the charge cycle counter value, if the charge cycle counter has failed to reach the charge cycle count threshold, beginning a next charge cycle of the second blanking time interval.
- The device of examples 2, wherein the switch-mode power supply controller further includes a transistor that is coupled to the feedback pin and a pull-up resistor that is coupled to the feedback pin, wherein the logic circuit is arranged to control discharging of the feedback voltage to a first voltage level during the first blanking interval by controlling the transistor, and wherein the logic circuit is further arranged to control charging of the feedback voltage via the transistor and the pull-up resistor.
- The device of any combination of examples 2-3, wherein the charge cycle count threshold is at least 256.
- The device of any combination of examples 1-4, further comprising a compensation network that is external to the switch-mode power supply controller, wherein the compensation network includes a capacitor that is coupled to the feedback pin.
- The device of example 5, wherein the time that occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level is based on a size of the capacitor that is coupled to the feedback pin.
- The device of example 1, further comprising a switch-mode power supply that includes the switch-mode power supply controller.
- The device of example 7, wherein the switch-mode power supply is a half-bridge resonant LLC switch-mode power supply.
- The device of any combination of examples 7-8, further comprising an audio device that includes the switch-mode power supply.
- A method for overload protection, comprising: determining whether a fault condition has ended by the end of a first blanking time interval; and if it is determined that the fault condition has not ended by the end of the first blanking time interval: during the first time interval, measuring a time that is based on an external component that is coupled to the feedback pin; storing a preset timer setting that is based on the measured time; during a second blanking time interval that proceeds the first blanking time interval, performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time, and wherein performing the charge cycle sequence includes: determining whether a fault condition has ended during the second time interval; and if a fault condition is determined to have ended during the second blanking time interval, controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node; and if the fault condition is determined not to have ended during the second blanking time interval, initiating a shutdown mode.
- The method of example 10, further comprising: during the first blanking time interval, controlling discharging of the feedback voltage to a first voltage level, wherein determining whether a fault condition has ended by the end of a first blanking time interval includes determining whether the feedback voltage reaches a second voltage level during the first blanking time interval after being discharged to the first voltage level; after discharging the feedback voltage to the first voltage level during the first blanking time interval, controlling ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage if the feedback voltage did not reach the second voltage level during the first blanking time interval, wherein measuring a time that is based on an external component that is coupled to the feedback pin includes measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level, and wherein performing the charge cycle sequence includes beginning a first charge cycle of the second blanking time interval, and wherein performing the charge cycle sequence includes: beginning a first charge cycle of the second blanking time interval, wherein each charge cycle of the second blanking time interval includes: discharging the feedback voltage to the first voltage level; determining whether the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level; if the feedback voltage fails to reach the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, ending the second blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage; if the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, incrementing a charge cycle counter value; after incrementing the charge cycle counter value, if the charge cycle counter has reached a charge cycle count threshold, initiating a shutdown mode; and after incrementing the charge cycle counter value, if the charge cycle counter has failed to reach the charge cycle count threshold, beginning a next charge cycle of the second blanking time interval.
- The method of any combination of examples 11, wherein the external component is a capacitor that is coupled to the feedback pin, and wherein the time that occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level is based on a size of the capacitor.
- The method of any combination of examples 11-12, wherein the charge cycle count threshold is at least 256.
- The method of any combination of examples 11-13, wherein the first blanking time interval is a fixed time interval of at least ten milliseconds.
- The method of any combination of examples 11-14, wherein the first voltage level has a magnitude that is less than one volt.
- The method of any combination of examples 11-15, wherein the second voltage level is greater than 3 volts.
- A device for overload protection, comprising: means for determining whether a fault condition has ended by the end of a first blanking time interval; means for measuring a time that is based on an external component that is coupled to the feedback pin during the first time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval; storing a preset timer setting that is based on the measured time if it is determined that the fault condition has not ended by the end of the first blanking time interval; and means for performing a charge cycle sequence such that the duration of the second blanking time interval is based on the timer setting time during a second blanking time interval that proceeds the first blanking time interval if it is determined that the fault condition has not ended by the end of the first blanking time interval, wherein the means for performing the charge cycle sequence includes: means for determining whether a fault condition has ended during the second time interval; means for controlling ending the second blanking time interval and restarting controlling regulation of an output voltage based on a feedback voltage at the feedback node if a fault condition is determined to have ended during the second blanking time interval; and means for initiating a shutdown mode if the fault condition is determined not to have ended by an end of the second blanking time interval.
- The device of example 17, further comprising: means for controlling discharging of the feedback voltage to a first voltage level during the first blanking time interval, where the means for determining whether the fault condition has ended by the end of the first blanking time interval includes means for determining whether the feedback voltage reaches a second voltage level during the first blanking time interval after being discharged to the first voltage level; means for, after discharging the feedback voltage to the first voltage level during the first blanking time interval, controlling ending the first blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage if the feedback voltage did not reach a second voltage level during the first blanking time interval, wherein the means for measuring a time that is based on an external component that is coupled to the feedback pin includes means for measuring the time as how much time occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level, and wherein the means for performing the charge cycle sequence includes means for beginning a first charge cycle of the second blanking time interval, and wherein the means for performing the charge cycle sequence includes: means for beginning a first charge cycle of the second blanking time interval, wherein each charge cycle of the second blanking time interval includes: discharging the feedback voltage to the first voltage level; determining whether the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level; if the feedback voltage fails to reach the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, ending the second blanking time interval and restarting controlling regulation of an output voltage based on the feedback voltage; if the feedback voltage reaches the second voltage level within the timer setting time after the feedback voltage was last discharged to the first voltage level, incrementing a charge cycle counter value; after incrementing the charge cycle counter value, if the charge cycle counter has reached a charge cycle count threshold, initiating a shutdown mode; and after incrementing the charge cycle counter value, if the charge cycle counter has failed to reach the charge cycle count threshold, beginning a next charge cycle of the second blanking time interval.
- The device of example 18, wherein the charge cycle count threshold is at least 256.
- The device of any combination of examples 18-19, wherein the time that occurs between the feedback voltage being at the first voltage level and the feedback voltage being at a second voltage level is based on a size of a capacitor that is coupled to the feedback pin.
- Various examples have been described. These and other examples are within the scope of the following claims.
Claims (20)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/823,860 US9570994B1 (en) | 2015-08-11 | 2015-08-11 | Adjustable blanking time for overload protection for switch-mode power supplies |
DE102016113944.0A DE102016113944B4 (en) | 2015-08-11 | 2016-07-28 | Adjustable blanking time for overload protection for switching power supplies |
CN201610654210.1A CN106451340B (en) | 2015-08-11 | 2016-08-11 | For the adjustable blanking time of the overload protection for switched-mode power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/823,860 US9570994B1 (en) | 2015-08-11 | 2015-08-11 | Adjustable blanking time for overload protection for switch-mode power supplies |
Publications (2)
Publication Number | Publication Date |
---|---|
US9570994B1 US9570994B1 (en) | 2017-02-14 |
US20170047854A1 true US20170047854A1 (en) | 2017-02-16 |
Family
ID=57907990
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/823,860 Active US9570994B1 (en) | 2015-08-11 | 2015-08-11 | Adjustable blanking time for overload protection for switch-mode power supplies |
Country Status (3)
Country | Link |
---|---|
US (1) | US9570994B1 (en) |
CN (1) | CN106451340B (en) |
DE (1) | DE102016113944B4 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20170133939A1 (en) * | 2015-11-05 | 2017-05-11 | Silergy Semiconductor Technology (Hangzhou) Ltd | Voltage sampling control method and related control circuit for isolated switching power supply |
US20190140473A1 (en) * | 2017-11-06 | 2019-05-09 | Nxp B.V. | Power controller |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3083467B1 (en) * | 2013-12-19 | 2021-01-27 | Otis Elevator Company | System and method for limiting over-voltage in power supply system |
CN113394983B (en) * | 2021-07-01 | 2023-07-04 | 上海南芯半导体科技股份有限公司 | Voltage feedback circuit of flyback converter and control method thereof |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008137935A1 (en) * | 2007-05-07 | 2008-11-13 | Harman International Industries, Incorporated | Automatic zero voltage switching mode controller |
US8537572B2 (en) * | 2007-09-28 | 2013-09-17 | Enphase Energy, Inc. | Method and apparatus for providing power conversion using an interleaved flyback converter with automatic balancing |
JP5343341B2 (en) * | 2007-10-18 | 2013-11-13 | サンケン電気株式会社 | Switching power supply |
US7816902B2 (en) | 2007-10-31 | 2010-10-19 | Infineon Technologies Austria Ag | Integrated circuit including a controller for regulating a power supply |
US7558037B1 (en) | 2008-04-30 | 2009-07-07 | Infineon Technologies Ag | Over current protection circuit and method |
JP5526857B2 (en) * | 2010-02-24 | 2014-06-18 | ミツミ電機株式会社 | Semiconductor integrated circuit for power control and isolated DC power supply |
US8427848B2 (en) * | 2010-12-22 | 2013-04-23 | Power Integrations, Inc. | Variable time clamp for a power supply controller |
US8611116B2 (en) * | 2011-07-28 | 2013-12-17 | Power Integrations, Inc. | Varying switching frequency and period of a power supply controller |
-
2015
- 2015-08-11 US US14/823,860 patent/US9570994B1/en active Active
-
2016
- 2016-07-28 DE DE102016113944.0A patent/DE102016113944B4/en active Active
- 2016-08-11 CN CN201610654210.1A patent/CN106451340B/en active Active
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20170133939A1 (en) * | 2015-11-05 | 2017-05-11 | Silergy Semiconductor Technology (Hangzhou) Ltd | Voltage sampling control method and related control circuit for isolated switching power supply |
US9825538B2 (en) * | 2015-11-05 | 2017-11-21 | Silergy Semiconductor Technology (Hangzhou) Ltd | Voltage sampling control method and related control circuit for isolated switching power supply |
US20190140473A1 (en) * | 2017-11-06 | 2019-05-09 | Nxp B.V. | Power controller |
US11031804B2 (en) * | 2017-11-06 | 2021-06-08 | Nxp B.V. | Power controller |
Also Published As
Publication number | Publication date |
---|---|
CN106451340A (en) | 2017-02-22 |
US9570994B1 (en) | 2017-02-14 |
CN106451340B (en) | 2019-01-22 |
DE102016113944A1 (en) | 2017-02-16 |
DE102016113944B4 (en) | 2023-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10075081B2 (en) | Insulated synchronous rectification DC/DC converter | |
US9397577B2 (en) | Switching mode power supplies with primary side regulation and associated methods of control | |
US10924003B2 (en) | Switching power supply | |
US9444353B2 (en) | Isolated power converter and associated switching power supply | |
US10574145B2 (en) | BJT driver with dynamic adjustment of storage time versus input line voltage variations | |
US9614448B2 (en) | Switching power-supply device | |
US9985543B1 (en) | Switching power supply | |
US10193436B2 (en) | Switching power supply apparatus | |
US9564826B2 (en) | Current resonant power supply device | |
US9184653B2 (en) | Short sensing circuit, short sensing method and power supply device comprising the short sensing circuit | |
US9343971B2 (en) | Synchronous VCC generator for switching voltage regulator | |
US9570994B1 (en) | Adjustable blanking time for overload protection for switch-mode power supplies | |
US10491127B2 (en) | Power supply control unit and isolation type switching power supply device | |
US9742299B2 (en) | Insulated synchronous rectification DC/DC converter | |
US20170126140A1 (en) | Switch-mode power supply current monitoring with over current and overload protection | |
US9654014B1 (en) | Adaptive leading edge blanking time generation for current-mode switch-mode power supplies | |
US9525353B2 (en) | Switching power-supply device for performing control of output voltage switching operation | |
JP2017204921A (en) | Switching power supply unit | |
US20160105104A1 (en) | Switching controlling circuit, converter using the same, and switching controlling method | |
CN101958531A (en) | Start short-circuit protection device and method for DC-DC converter | |
US20160036312A1 (en) | Method and apparatus for peak switching to reduce losses in high frequency dc-dc converters | |
US20220321020A1 (en) | Flyback converter, synchronous rectification control circuit and control method thereof | |
KR102335419B1 (en) | Power circuit | |
US11336201B2 (en) | Integrated circuit and power supply circuit | |
CN107565807B (en) | Switching power supply control circuit, switching power supply circuit and starting method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: INFINEON TECHNOLOGIES AUSTRIA AG, AUSTRIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MAO, MINGPING;GONG, XIAOWU;REEL/FRAME:036302/0136 Effective date: 20150811 |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1551); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 4 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |