US20160043140A1 - Memory device and method for manufacturing the same - Google Patents
Memory device and method for manufacturing the same Download PDFInfo
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- US20160043140A1 US20160043140A1 US14/621,966 US201514621966A US2016043140A1 US 20160043140 A1 US20160043140 A1 US 20160043140A1 US 201514621966 A US201514621966 A US 201514621966A US 2016043140 A1 US2016043140 A1 US 2016043140A1
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- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 230000008859 change Effects 0.000 claims abstract description 79
- 229910052751 metal Inorganic materials 0.000 claims description 33
- 239000002184 metal Substances 0.000 claims description 33
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 229910052709 silver Inorganic materials 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 7
- 239000004332 silver Substances 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910017052 cobalt Inorganic materials 0.000 claims description 4
- 239000010941 cobalt Substances 0.000 claims description 4
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims 4
- 150000002739 metals Chemical class 0.000 claims 2
- 229910052757 nitrogen Inorganic materials 0.000 claims 2
- 229910052715 tantalum Inorganic materials 0.000 claims 2
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- 239000010410 layer Substances 0.000 description 69
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
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- 239000000463 material Substances 0.000 description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 6
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- 239000010937 tungsten Substances 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 5
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- HWEYZGSCHQNNEH-UHFFFAOYSA-N silicon tantalum Chemical compound [Si].[Ta] HWEYZGSCHQNNEH-UHFFFAOYSA-N 0.000 description 2
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Images
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
-
- H01L27/2463—
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- H01L45/1233—
-
- H01L45/1253—
-
- H01L45/148—
-
- H01L45/16—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
- H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/841—Electrodes
- H10N70/8416—Electrodes adapted for supplying ionic species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/884—Switching materials based on at least one element of group IIIA, IVA or VA, e.g. elemental or compound semiconductors
Definitions
- Embodiments described herein relate generally to a memory device and a method for manufacturing the same.
- each memory cell is preferably provided with a current limiting layer for preventing excessive flow of current.
- FIG. 1 is a perspective view showing a memory device according to a first embodiment
- FIGS. 2A to 12B show a method for manufacturing a memory device according to the first embodiment
- FIG. 13 is a sectional view showing an operation of the memory device according to the first embodiment
- FIG. 14A is a perspective view showing a memory device according to a comparative example
- FIG. 14B is a sectional view thereof.
- FIG. 15 is a sectional view showing a memory device according to a second embodiment.
- a memory device in general, includes a resistance change film, an insulating film provided on the resistance change film, a first wiring provided on the insulating film and being not in contact with the resistance change film, and a high resistance film having a higher resistivity than the first wiring.
- the high resistance film is provided on a side surface of a stacked body including the insulating film and the first wiring, and the high resistance film is electrically connected between the first wiring and the resistance change film.
- FIG. 1 is a perspective view showing a memory device according to the embodiment.
- the interlayer insulating film is not shown in FIG. 1 .
- the memory device 1 includes a silicon substrate 10 .
- X-direction Two directions parallel to the upper surface 10 a of the silicon substrate 10 and orthogonal to each other are referred to as “X-direction” and “Y-direction”.
- Z-direction The direction perpendicular to the upper surface 10 a is referred to as “Z-direction”.
- An interlayer insulating film 11 (see FIG. 12B ) is provided on the silicon substrate 10 .
- the interlayer insulating film 11 is formed from an insulating material such as silicon oxide (SiO 2 ).
- a plurality of word lines 12 extending in the X-direction are provided in the interlayer insulating film 11 .
- the word lines 12 are arranged periodically in the Y-direction.
- the word line 12 is formed from a conductive material such as tungsten (W).
- the plurality of word lines 12 placed on the same XY-plane constitute a word line wiring layer.
- a resistance change layer 13 is provided intermittently along the X-direction directly above each word line 12 .
- a plurality of resistance change layers 13 are arranged in a matrix along the X-direction and the Y-direction.
- the resistance change layer 13 is formed from e.g. amorphous silicon (a-Si) or silicon oxide (SiO 2 ).
- a metal layer 14 is provided directly above each resistance change layer 13 .
- the metal layer 14 is in contact with the resistance change layer 13 .
- the metal layer 14 contains a metal element, e.g. silver (Ag), cobalt (Co), nickel (Ni), or copper (Cu), the ion of which can migrate in the resistance change layer 13 .
- the metal layer 14 is formed from silver.
- the resistance change layer 13 and the metal layer 14 constitute a resistance change film.
- the resistance change film is a film with variable resistance.
- the electrode 15 is provided directly above each metal layer 14 .
- the electrode 15 is formed from a conductive material such as tungsten.
- the resistance change layer 13 , the metal layer 14 , and the electrode 15 form a pillar 16 extending in the Z-direction.
- the pillar 16 is shaped like e.g. a quadrangular column.
- a plurality of insulating films 17 extending in the Y-direction are provided on the electrode 15 .
- the insulating film 17 is formed from an insulating material, e.g., silicon oxide or silicon nitride (Si 3 N 4 ).
- Each insulating film 17 is shaped like a strip.
- Each insulating film 17 passes through the region directly above a plurality of pillars 16 arranged in a line along the Y-direction.
- the width or X-direction length of the insulating film 17 is narrower than the width or X-direction length of the electrode 15 .
- each insulating film 17 is placed in a central region in the region directly above the corresponding electrode 15 except both X-direction end parts, and in a region between the central regions of the electrodes 15 adjacent in the Y-direction.
- a bit line 18 extending in the Y-direction is provided directly above the insulating film 17 .
- the bit line 18 is formed from a conductive material such as tungsten.
- the plurality of bit lines 18 placed on the same XY-plane constitute a bit line wiring layer.
- the insulating film 17 and the bit line 18 constitute a stacked body 19 .
- the width or X-direction length of the stacked body 19 is narrower than the width or X-direction length of the pillar 16 .
- a high resistance film 20 is provided on both side surfaces 19 a directed in the X-direction of the stacked body 19 .
- the resistivity of the high resistance film 20 is higher than the resistivity of the word line 12 , the resistivity of the electrode 15 , and the resistivity of the bit line 18 , but lower than the resistivity of the insulating film 17 .
- the high resistance film 20 is formed from e.g. tantalum silicon nitride (TaSiN).
- the side surface of the high resistance film 20 is in contact with the side surface of the bit line 18 .
- the high resistance film 20 is connected to the bit line 18 .
- the lower end of the high resistance film 20 is in contact with the upper surface of the electrode 15 .
- the high resistance film 20 is connected to the electrode 15 .
- the bit line 18 is not in contact with the electrode 15 .
- the insulating film 17 is interposed between the bit line 18 and the electrode 15 .
- the bit line 18 is connected to the electrode 15 through the high resistance film 20 .
- the electrode 15 is connected to the word line 12 through the metal layer 14 and the resistance change layer 13 .
- the resistivity of the resistance change layer 13 is higher than the resistivity of the word line 12 , the resistivity of the electrode 15 , and the resistivity of the bit line 18 .
- FIGS. 2A to 12B show a method for manufacturing a memory device according to the embodiment.
- FIG. 2A is a plan view.
- FIG. 2B is a sectional view taken along line A-A′ shown in FIG. 2A .
- FIG. 2C is a sectional view taken along line B-B′ shown in FIG. 2A .
- FIG. 3A is a plan view.
- FIG. 3B is a sectional view taken along line A-A′ shown in FIG. 3A . This also similarly applies to FIGS. 4A to 12B .
- an interlayer insulating film 11 a is formed on a silicon substrate 10 (see FIG. 1 ).
- a word line film 12 a , a resistance change layer 13 a , a metal layer 14 a , and an electrode film 15 a are formed in this order.
- the stacked film composed of the word line film 12 a , the resistance change layer 13 a , the metal layer 14 a , and the electrode film 15 a is selectively removed and processed into a line-and-space pattern extending in the X-direction.
- a plurality of stacked bodies 31 a extending in the X-direction are formed.
- the word line film 12 a is divided into a plurality of word lines 12 extending in the X-direction.
- an interlayer insulating film 11 b is embedded between the stacked bodies 31 a .
- the interlayer insulating films 11 a and 11 b are shown integrally.
- the upper surface of the interlayer insulating film 11 b is subjected to CMP (chemical mechanical polishing) using the electrode film 15 a as a stopper.
- CMP chemical mechanical polishing
- an insulating film 17 a is formed by depositing an insulating material such as silicon oxide on the stacked body 31 a and the interlayer insulating film 11 b .
- a bit line film 18 a is formed by depositing a conductive material such as tungsten.
- bit line film 18 a and the insulating film 17 a are processed into strips extending in the Y-direction and constitute a plurality of bit lines 18 and insulating films 17 , respectively.
- the electrode film 15 a , the metal layer 14 a , and the resistance change layer 13 a are divided in a matrix along both the X-direction and the Y-direction and constitute an electrode 15 , a metal layer 14 , and a resistance change layer 13 , respectively.
- a pillar 16 is formed.
- an insulating material is deposited on the entire surface to form an interlayer insulating film 11 c.
- the interlayer insulating film 11 c covers the pillar 16 , the insulating film 17 , and the bit line 18 .
- the upper surface of the interlayer insulating film 11 c is subjected to CMP using the bit line 18 as a stopper.
- the upper surface of the interlayer insulating film 11 c is set to the same position in the Z-direction as the upper surface of the bit line 18 .
- the bit line 18 and the insulating film 17 are subjected to isotropic etching.
- the width or X-direction length of the stacked body 19 including the bit line 18 and the insulating film 17 is reduced.
- the regions 15 b on both X-direction end parts of the upper surface of the electrode 15 are exposed.
- the upper part of the electrode 15 and the upper part of the interlayer insulating film 11 c are also etched to some extent.
- a high resistance material such as tantalum silicon nitride (TaSiN) is deposited on the entire surface by e.g. sputtering technique to form a high resistance film 20 .
- the high resistance film 20 covers the upper surface and the side surface of the stacked body 19 .
- the high resistance film 20 is subjected to anisotropic etching such as RIE.
- anisotropic etching such as RIE.
- the high resistance film 20 is removed from above the upper surface of the interlayer insulating film 11 c and from above the upper surface of the stacked body 19 .
- the high resistance film 20 is left on the side surface 19 a of the stacked body 19 and on the region 15 b of the electrode 15 .
- an insulating material is deposited on the entire surface.
- an interlayer insulating film lld is formed on the interlayer insulating film 11 c so as to cover the stacked body 19 and the high resistance film 20 .
- the upper surface of the interlayer insulating film 11 d is subjected to CMP using the bit line 18 as a stopper.
- the upper surface of the interlayer insulating film 11 d is set to the same position in the Z-direction as the upper surface of the bit line 18 .
- the memory device 1 shown in FIG. 1 is manufactured.
- the interlayer insulating films 11 a - 11 d constitute part of the interlayer insulating film 11 .
- FIG. 13 is a sectional view showing the operation of the memory device according to the embodiment.
- the resistivity of the resistance change layer 13 is higher than the resistivity of the word line 12 and the bit line 18 .
- the resistance change layer 13 is in a high resistance state.
- a positive voltage with the bit line 18 serving as a positive electrode and the word line 12 serving as a negative electrode is applied between the bit line 18 and the word line 12 .
- the metal such as silver contained in the metal layer 14 is ionized into a cation (Ag + ) and migrates toward the word line 12 serving as a negative electrode.
- the cation is combined with an electron supplied from the word line 12 and precipitated as a silver atom.
- a filament 25 is formed in the resistance change layer 13 and constitutes a current path.
- the resistance of the resistance change layer 13 is decreased.
- the resistance change layer 13 turns to a low resistance state.
- the bit line 18 and the electrode 15 are separated from each other by the insulating film 17 and not in direct contact with each other.
- the bit line 18 is connected to the electrode 15 through the high resistance film 20 .
- a current path from the bit line 18 through the high resistance film 20 , the electrode 15 , the metal layer 14 , and the resistance change layer 13 (filament 25 ) to the word line 12 is formed between the bit line 18 and the word line 12 .
- the high resistance film 20 functions as a current limiting layer and suppresses the amount of current. Thus, no excessive current flows in the aforementioned current path. Accordingly, the pillar 16 is not destroyed by overcurrent.
- a negative voltage with the bit line 18 serving as a negative electrode and the word line 12 serving as a positive electrode may be applied between the bit line 18 and the word line 12 .
- the silver atom forming the filament 25 turns to a cation and migrates toward the bit line 18 serving as a negative electrode. This eliminates part of the filament 25 and breaks the current path. As a result, the resistance of the resistance change layer 13 is increased. Thus, the resistance change layer 13 returns to the high resistance state.
- one bit of data can be stored by realizing two levels of resistance states in the resistance change layer 13 . That is, a memory cell can be formed for each pillar 16 .
- the high resistance film 20 is connected between the bit line 18 and the electrode 15 .
- the high resistance film 20 functions as a current limiting layer. Accordingly, no excessive current flows in each pillar 16 .
- the high resistance film 20 is formed on the side surface 19 a of the stacked body 19 .
- the bit line film 18 a , the insulating film 17 a , the electrode film 15 a , the metal layer 14 a , and the resistance change layer 13 a are processed, the high resistance film 20 has not been formed yet. Accordingly, there is no need to process the high resistance film 20 .
- the aspect ratio of processing is lower. Accordingly, trouble due to processing failure is less likely to occur. As a result, the yield of the memory device 1 is increased.
- the high resistance film 20 is formed as a sidewall of the stacked body 19 .
- the width of the high resistance film 20 can be controlled by the amount of deposition of the high resistance material. This facilitates forming a thin high resistance film 20 .
- the current path formed in the high resistance film 20 can be provided with high resistance even if the current path is not lengthened by excessively thickening the insulating film 17 . This can also reduce the aspect ratio of processing shown in FIGS. 4A and 4B .
- FIG. 14A is a perspective view showing a memory device according to this comparative example.
- FIG. 14B is a sectional view thereof.
- the high resistance film 120 is shaped not like a sidewall, but like a strip extending in the Y-direction.
- the high resistance film 120 is placed between the bit line 18 and the electrode 15 .
- the memory device 101 does not include the insulating film 17 (see FIG. 1 ).
- the high resistance film 120 when the bit line 18 , the electrode 15 , the metal layer 14 , and the resistance change layer 13 are processed by anisotropic etching, the high resistance film 120 also needs to be processed. Thus, the aspect ratio of processing is higher. As a result, processing is made difficult. This decreases the yield of the memory device 101 .
- the high resistance film 120 may be thinned in order to reduce the aspect ratio of processing. However, in this case, it is difficult to provide a desired resistance to the high resistance film 120 .
- FIG. 15 is a sectional view showing a memory device according to the embodiment.
- an insulating film 37 shaped like a strip extending in the Y-direction is provided directly above the bit line 18 .
- the high resistance film 20 is provided on a side surface 39 a directed in the X-direction of the stacked body 39 composed of the insulating film 17 , the bit line 18 , and the insulating film 37 .
- an electrode 35 is provided on the insulating film 37 and the high resistance film 20 .
- the electrode 35 is provided directly above the electrode 15 .
- the electrode 35 is divided along both the X-direction and the Y-direction.
- a metal layer 34 , a resistance change layer 33 , and an electrode 31 are stacked in this order directly above the electrode 35 .
- the metal layer 34 and the resistance change layer 33 constitute a resistance change film.
- the electrode 35 , the metal layer 34 , the resistance change layer 33 , and the electrode 31 constitute a pillar 36 extending in the Z-direction.
- the pillar 36 is placed directly above the pillar 16 .
- the electrode 35 and the electrode 31 are formed from the same material as the electrode 15 , such as tungsten.
- the metal layer 34 is formed from the same material as the metal layer 14 .
- the metal layer 34 contains e.g. silver, cobalt, nickel, or copper.
- the metal layer 34 is formed from e.g. silver.
- the resistance change layer 33 is formed from the same material as the resistance change layer 13 .
- the resistance change layer 33 is formed from e.g. amorphous silicon or silicon oxide.
- a word line 32 extending in the X-direction is provided on the electrode 31 .
- the word lines 32 are provided in a plurality and arranged periodically along the Y-direction. Each word line 32 is placed directly above the word line 12 .
- the word line 32 is formed from the same material as the word line 12 , such as tungsten.
- the word line 32 is provided on the bit line 18 .
- the pillar 36 is connected between the bit line 18 and the word line 32 .
- the pillar 36 can also constitute a memory cell.
- the memory cells can be integrated in three dimensions. This can further increase the memory density per unit area.
- the configuration, manufacturing method, operation, and effect of the embodiment other than the foregoing are similar to those of the above first embodiment.
- another pillar including a resistance change film may be provided on the word line 32 , and a bit line extending in the Y-direction may be provided on the pillar.
- word line wiring layers each including a plurality of word lines extending in the X-direction and bit line wiring layers each including a plurality of bit lines extending in the Y-direction may be alternately stacked on the silicon substrate 10 .
- a pillar including a resistance change film may be connected between each word line and each bit line. This can realize a memory device including a plurality of word line wiring layers and bit line wiring layers in which memory cells are stacked in three or more stages.
- an insulating film is provided on the upper surface and the lower surface of each bit line.
- a high resistance film is provided on the side surface of the stacked body composed of each bit line and two insulating films provided on the upper and lower surfaces of the bit line. The high resistance film is connected to the electrode by bringing the end surface of the high resistance film into contact with the electrode. Thus, the bit line is connected to the electrode through the high resistance film without bringing the bit line into contact with the electrode.
- the resistance change film is connected between the word line and the high resistance film.
- the resistance change film is a stacked film including a resistance change layer and a metal layer.
- the resistance change film is not limited thereto.
- the resistance change film may be a monolayer film made of metal oxide.
- the embodiments described above can realize a memory device being easy to manufacture, and a method for manufacturing the same.
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Abstract
A memory device according to one embodiment includes a resistance change film, an insulating film provided on the resistance change film, a first wiring provided on the insulating film and being not in contact with the resistance change film, and a high resistance film having a higher resistivity than the first wiring. The high resistance film is provided on a side surface of a stacked body including the insulating film and the first wiring, and the high resistance film is electrically connected between the first wiring and the resistance change film.
Description
- This application is based upon and claims the benefit of priority from U.S. Provisional Patent Application 62/035,137, filed on Aug. 8, 2014; the entire contents of which are incorporated herein by reference.
- Embodiments described herein relate generally to a memory device and a method for manufacturing the same.
- Recently, there has been proposed a memory device for storing data by changing the electrical resistance of memory cells. In improving the memory density of such a memory device, it is advantageous to integrate a large number of memory cells in a cross-point structure. On the other hand, each memory cell is preferably provided with a current limiting layer for preventing excessive flow of current.
-
FIG. 1 is a perspective view showing a memory device according to a first embodiment; -
FIGS. 2A to 12B show a method for manufacturing a memory device according to the first embodiment; -
FIG. 13 is a sectional view showing an operation of the memory device according to the first embodiment; -
FIG. 14A is a perspective view showing a memory device according to a comparative example,FIG. 14B is a sectional view thereof; and -
FIG. 15 is a sectional view showing a memory device according to a second embodiment. - In general, a memory device according to one embodiment includes a resistance change film, an insulating film provided on the resistance change film, a first wiring provided on the insulating film and being not in contact with the resistance change film, and a high resistance film having a higher resistivity than the first wiring. The high resistance film is provided on a side surface of a stacked body including the insulating film and the first wiring, and the high resistance film is electrically connected between the first wiring and the resistance change film.
- Embodiments of the invention will now be described with reference to the drawings.
- First, a first embodiment is described.
-
FIG. 1 is a perspective view showing a memory device according to the embodiment. - For convenience of illustration, the interlayer insulating film is not shown in
FIG. 1 . - As shown in
FIG. 1 , thememory device 1 according to the embodiment includes asilicon substrate 10. - In the following, for convenience of description, an XYZ orthogonal coordinate system is adopted in this specification. Two directions parallel to the
upper surface 10 a of thesilicon substrate 10 and orthogonal to each other are referred to as “X-direction” and “Y-direction”. The direction perpendicular to theupper surface 10 a is referred to as “Z-direction”. - An interlayer insulating film 11 (see
FIG. 12B ) is provided on thesilicon substrate 10. Theinterlayer insulating film 11 is formed from an insulating material such as silicon oxide (SiO2). A plurality ofword lines 12 extending in the X-direction are provided in the interlayerinsulating film 11. Theword lines 12 are arranged periodically in the Y-direction. Theword line 12 is formed from a conductive material such as tungsten (W). The plurality ofword lines 12 placed on the same XY-plane constitute a word line wiring layer. - A
resistance change layer 13 is provided intermittently along the X-direction directly above eachword line 12. In thememory device 1 as a whole, a plurality ofresistance change layers 13 are arranged in a matrix along the X-direction and the Y-direction. Theresistance change layer 13 is formed from e.g. amorphous silicon (a-Si) or silicon oxide (SiO2). - A
metal layer 14 is provided directly above eachresistance change layer 13. Themetal layer 14 is in contact with theresistance change layer 13. Themetal layer 14 contains a metal element, e.g. silver (Ag), cobalt (Co), nickel (Ni), or copper (Cu), the ion of which can migrate in theresistance change layer 13. For instance, themetal layer 14 is formed from silver. Theresistance change layer 13 and themetal layer 14 constitute a resistance change film. The resistance change film is a film with variable resistance. - An
electrode 15 is provided directly above eachmetal layer 14. Theelectrode 15 is formed from a conductive material such as tungsten. Theresistance change layer 13, themetal layer 14, and theelectrode 15 form apillar 16 extending in the Z-direction. Thepillar 16 is shaped like e.g. a quadrangular column. - A plurality of
insulating films 17 extending in the Y-direction are provided on theelectrode 15. Theinsulating film 17 is formed from an insulating material, e.g., silicon oxide or silicon nitride (Si3N4). Eachinsulating film 17 is shaped like a strip. Eachinsulating film 17 passes through the region directly above a plurality ofpillars 16 arranged in a line along the Y-direction. The width or X-direction length of theinsulating film 17 is narrower than the width or X-direction length of theelectrode 15. Thus, eachinsulating film 17 is placed in a central region in the region directly above thecorresponding electrode 15 except both X-direction end parts, and in a region between the central regions of theelectrodes 15 adjacent in the Y-direction. - A
bit line 18 extending in the Y-direction is provided directly above theinsulating film 17. Thebit line 18 is formed from a conductive material such as tungsten. The plurality ofbit lines 18 placed on the same XY-plane constitute a bit line wiring layer. Theinsulating film 17 and thebit line 18 constitute a stackedbody 19. The width or X-direction length of thestacked body 19 is narrower than the width or X-direction length of thepillar 16. - A
high resistance film 20 is provided on bothside surfaces 19 a directed in the X-direction of thestacked body 19. The resistivity of thehigh resistance film 20 is higher than the resistivity of theword line 12, the resistivity of theelectrode 15, and the resistivity of thebit line 18, but lower than the resistivity of theinsulating film 17. Thehigh resistance film 20 is formed from e.g. tantalum silicon nitride (TaSiN). - The side surface of the
high resistance film 20 is in contact with the side surface of thebit line 18. Thus, thehigh resistance film 20 is connected to thebit line 18. The lower end of thehigh resistance film 20 is in contact with the upper surface of theelectrode 15. Thus, thehigh resistance film 20 is connected to theelectrode 15. On the other hand, thebit line 18 is not in contact with theelectrode 15. The insulatingfilm 17 is interposed between thebit line 18 and theelectrode 15. Thus, thebit line 18 is connected to theelectrode 15 through thehigh resistance film 20. Furthermore, theelectrode 15 is connected to theword line 12 through themetal layer 14 and theresistance change layer 13. Furthermore, in the case where thefilament 25 described later is not formed in theresistance change layer 13, the resistivity of theresistance change layer 13 is higher than the resistivity of theword line 12, the resistivity of theelectrode 15, and the resistivity of thebit line 18. - Next, a method for manufacturing a memory device according to the embodiment is described.
-
FIGS. 2A to 12B show a method for manufacturing a memory device according to the embodiment. -
FIG. 2A is a plan view.FIG. 2B is a sectional view taken along line A-A′ shown inFIG. 2A .FIG. 2C is a sectional view taken along line B-B′ shown inFIG. 2A . Furthermore,FIG. 3A is a plan view.FIG. 3B is a sectional view taken along line A-A′ shown inFIG. 3A . This also similarly applies toFIGS. 4A to 12B . - First, as shown in
FIGS. 2A to 2C , aninterlayer insulating film 11 a is formed on a silicon substrate 10 (seeFIG. 1 ). Next, aword line film 12 a, aresistance change layer 13 a, ametal layer 14 a, and anelectrode film 15 a are formed in this order. Next, the stacked film composed of theword line film 12 a, theresistance change layer 13 a, themetal layer 14 a, and theelectrode film 15 a is selectively removed and processed into a line-and-space pattern extending in the X-direction. Thus, a plurality ofstacked bodies 31 a extending in the X-direction are formed. At this time, theword line film 12 a is divided into a plurality ofword lines 12 extending in the X-direction. - Next, an
interlayer insulating film 11 b is embedded between thestacked bodies 31 a. InFIG. 2C , theinterlayer insulating films interlayer insulating film 11 b is subjected to CMP (chemical mechanical polishing) using theelectrode film 15 a as a stopper. Thus, the upper surface of theinterlayer insulating film 11 b is set to the same position in the Z-direction as the upper surface of the stackedbody 31 a. - Next, as shown in
FIGS. 3A and 3B , an insulatingfilm 17 a is formed by depositing an insulating material such as silicon oxide on thestacked body 31 a and theinterlayer insulating film 11 b. Next, abit line film 18 a is formed by depositing a conductive material such as tungsten. - Next, as shown in
FIGS. 4A and 4B , the stacked body composed of thebit line film 18 a, the insulatingfilm 17 a, theelectrode film 15 a, themetal layer 14 a, and theresistance change layer 13 a is selectively removed by anisotropic etching such as RIE (reactive ion etching). Thus, the stacked body is processed into a line-and-space pattern extending in the Y-direction. However, theword line 12 and theinterlayer insulating films bit line film 18 a and the insulatingfilm 17 a are processed into strips extending in the Y-direction and constitute a plurality ofbit lines 18 and insulatingfilms 17, respectively. Theelectrode film 15 a, themetal layer 14 a, and theresistance change layer 13 a are divided in a matrix along both the X-direction and the Y-direction and constitute anelectrode 15, ametal layer 14, and aresistance change layer 13, respectively. As a result, apillar 16 is formed. - Next, as shown in
FIGS. 5A and 5B , an insulating material is deposited on the entire surface to form aninterlayer insulating film 11c. Theinterlayer insulating film 11c covers thepillar 16, the insulatingfilm 17, and thebit line 18. - Next, as shown in
FIGS. 6A and 6B , the upper surface of theinterlayer insulating film 11c is subjected to CMP using thebit line 18 as a stopper. Thus, the upper surface of theinterlayer insulating film 11c is set to the same position in the Z-direction as the upper surface of thebit line 18. - Next, as shown in
FIGS. 7A and 7B , theinterlayer insulating film 11c is etched back. Thus, the upper surface of theinterlayer insulating film 11c is set back close to the interface between theelectrode 15 and the insulatingfilm 17. - Next, as shown in
FIGS. 8A and 8B , thebit line 18 and the insulatingfilm 17 are subjected to isotropic etching. Thus, the width or X-direction length of the stackedbody 19 including thebit line 18 and the insulatingfilm 17 is reduced. As a result, theregions 15 b on both X-direction end parts of the upper surface of theelectrode 15 are exposed. In this isotropic etching, the upper part of theelectrode 15 and the upper part of theinterlayer insulating film 11c are also etched to some extent. - Next, as shown in
FIGS. 9A and 9B , a high resistance material such as tantalum silicon nitride (TaSiN) is deposited on the entire surface by e.g. sputtering technique to form ahigh resistance film 20. Thehigh resistance film 20 covers the upper surface and the side surface of the stackedbody 19. - Next, as shown in
FIGS. 10A and 10B , thehigh resistance film 20 is subjected to anisotropic etching such as RIE. Thus, thehigh resistance film 20 is removed from above the upper surface of theinterlayer insulating film 11 c and from above the upper surface of the stackedbody 19. However, thehigh resistance film 20 is left on theside surface 19 a of the stackedbody 19 and on theregion 15 b of theelectrode 15. - Next, as shown in
FIGS. 11A and 11B , an insulating material is deposited on the entire surface. Thus, an interlayer insulating film lld is formed on theinterlayer insulating film 11 c so as to cover thestacked body 19 and thehigh resistance film 20. - Next, as shown in
FIGS. 12A and 12B , the upper surface of theinterlayer insulating film 11d is subjected to CMP using thebit line 18 as a stopper. Thus, the upper surface of theinterlayer insulating film 11d is set to the same position in the Z-direction as the upper surface of thebit line 18. - Thus, the
memory device 1 shown inFIG. 1 is manufactured. Here, theinterlayer insulating films 11 a-11 d constitute part of theinterlayer insulating film 11. - Next, the operation of the memory device according to the embodiment is described.
-
FIG. 13 is a sectional view showing the operation of the memory device according to the embodiment. - The resistivity of the
resistance change layer 13 is higher than the resistivity of theword line 12 and thebit line 18. Thus, when thefilament 25 described later is not formed, theresistance change layer 13 is in a high resistance state. Here, as shown inFIG. 13 , a positive voltage with thebit line 18 serving as a positive electrode and theword line 12 serving as a negative electrode is applied between thebit line 18 and theword line 12. Then, the metal such as silver contained in themetal layer 14 is ionized into a cation (Ag+) and migrates toward theword line 12 serving as a negative electrode. Furthermore, in theresistance change layer 13, the cation is combined with an electron supplied from theword line 12 and precipitated as a silver atom. Thus, afilament 25 is formed in theresistance change layer 13 and constitutes a current path. As a result, the resistance of theresistance change layer 13 is decreased. Thus, theresistance change layer 13 turns to a low resistance state. - Here, the
bit line 18 and theelectrode 15 are separated from each other by the insulatingfilm 17 and not in direct contact with each other. Thus, thebit line 18 is connected to theelectrode 15 through thehigh resistance film 20. As a result, a current path from thebit line 18 through thehigh resistance film 20, theelectrode 15, themetal layer 14, and the resistance change layer 13 (filament 25) to theword line 12 is formed between thebit line 18 and theword line 12. Furthermore, thehigh resistance film 20 functions as a current limiting layer and suppresses the amount of current. Thus, no excessive current flows in the aforementioned current path. Accordingly, thepillar 16 is not destroyed by overcurrent. - On the other hand, a negative voltage with the
bit line 18 serving as a negative electrode and theword line 12 serving as a positive electrode may be applied between thebit line 18 and theword line 12. Then, the silver atom forming thefilament 25 turns to a cation and migrates toward thebit line 18 serving as a negative electrode. This eliminates part of thefilament 25 and breaks the current path. As a result, the resistance of theresistance change layer 13 is increased. Thus, theresistance change layer 13 returns to the high resistance state. - Thus, one bit of data can be stored by realizing two levels of resistance states in the
resistance change layer 13. That is, a memory cell can be formed for eachpillar 16. - Next, the effect of the embodiment is described.
- In the
memory device 1 according to the embodiment, thehigh resistance film 20 is connected between thebit line 18 and theelectrode 15. Thus, thehigh resistance film 20 functions as a current limiting layer. Accordingly, no excessive current flows in eachpillar 16. - In the embodiment, in the steps shown in
FIGS. 9A and 9B andFIGS. 10A and 10B , thehigh resistance film 20 is formed on theside surface 19 a of the stackedbody 19. Thus, in the step shown inFIGS. 4A and 4B , when thebit line film 18 a, the insulatingfilm 17 a, theelectrode film 15 a, themetal layer 14 a, and theresistance change layer 13 a are processed, thehigh resistance film 20 has not been formed yet. Accordingly, there is no need to process thehigh resistance film 20. Thus, in the step shown inFIGS. 4A and 4B , the aspect ratio of processing is lower. Accordingly, trouble due to processing failure is less likely to occur. As a result, the yield of thememory device 1 is increased. - Furthermore, in the embodiment, the
high resistance film 20 is formed as a sidewall of the stackedbody 19. Thus, the width of thehigh resistance film 20 can be controlled by the amount of deposition of the high resistance material. This facilitates forming a thinhigh resistance film 20. As a result, the current path formed in thehigh resistance film 20 can be provided with high resistance even if the current path is not lengthened by excessively thickening the insulatingfilm 17. This can also reduce the aspect ratio of processing shown inFIGS. 4A and 4B . - Next, a comparative example is described.
-
FIG. 14A is a perspective view showing a memory device according to this comparative example.FIG. 14B is a sectional view thereof. - As shown in
FIGS. 14A and 14B , in thememory device 101 according to the comparative example, thehigh resistance film 120 is shaped not like a sidewall, but like a strip extending in the Y-direction. Thehigh resistance film 120 is placed between thebit line 18 and theelectrode 15. Furthermore, thememory device 101 does not include the insulating film 17 (seeFIG. 1 ). - In this comparative example, when the
bit line 18, theelectrode 15, themetal layer 14, and theresistance change layer 13 are processed by anisotropic etching, thehigh resistance film 120 also needs to be processed. Thus, the aspect ratio of processing is higher. As a result, processing is made difficult. This decreases the yield of thememory device 101. Here, it is also considered that thehigh resistance film 120 may be thinned in order to reduce the aspect ratio of processing. However, in this case, it is difficult to provide a desired resistance to thehigh resistance film 120. - Next, a second embodiment is described.
-
FIG. 15 is a sectional view showing a memory device according to the embodiment. - As shown in
FIG. 15 , in thememory device 2 according to the embodiment, an insulatingfilm 37 shaped like a strip extending in the Y-direction is provided directly above thebit line 18. Thehigh resistance film 20 is provided on aside surface 39 a directed in the X-direction of the stackedbody 39 composed of the insulatingfilm 17, thebit line 18, and the insulatingfilm 37. - Furthermore, an
electrode 35 is provided on the insulatingfilm 37 and thehigh resistance film 20. Theelectrode 35 is provided directly above theelectrode 15. Theelectrode 35 is divided along both the X-direction and the Y-direction. Ametal layer 34, aresistance change layer 33, and anelectrode 31 are stacked in this order directly above theelectrode 35. Themetal layer 34 and theresistance change layer 33 constitute a resistance change film. Theelectrode 35, themetal layer 34, theresistance change layer 33, and theelectrode 31 constitute apillar 36 extending in the Z-direction. Thepillar 36 is placed directly above thepillar 16. - The
electrode 35 and theelectrode 31 are formed from the same material as theelectrode 15, such as tungsten. Themetal layer 34 is formed from the same material as themetal layer 14. Themetal layer 34 contains e.g. silver, cobalt, nickel, or copper. Themetal layer 34 is formed from e.g. silver. Theresistance change layer 33 is formed from the same material as theresistance change layer 13. Theresistance change layer 33 is formed from e.g. amorphous silicon or silicon oxide. - A
word line 32 extending in the X-direction is provided on theelectrode 31. The word lines 32 are provided in a plurality and arranged periodically along the Y-direction. Eachword line 32 is placed directly above theword line 12. Theword line 32 is formed from the same material as theword line 12, such as tungsten. - Thus, in the
memory device 2, theword line 32 is provided on thebit line 18. Thepillar 36 is connected between thebit line 18 and theword line 32. Like thepillar 16, thepillar 36 can also constitute a memory cell. - According to the embodiment, the memory cells can be integrated in three dimensions. This can further increase the memory density per unit area. The configuration, manufacturing method, operation, and effect of the embodiment other than the foregoing are similar to those of the above first embodiment.
- In the embodiment, another pillar including a resistance change film may be provided on the
word line 32, and a bit line extending in the Y-direction may be provided on the pillar. Thus, word line wiring layers each including a plurality of word lines extending in the X-direction and bit line wiring layers each including a plurality of bit lines extending in the Y-direction may be alternately stacked on thesilicon substrate 10. A pillar including a resistance change film may be connected between each word line and each bit line. This can realize a memory device including a plurality of word line wiring layers and bit line wiring layers in which memory cells are stacked in three or more stages. - Also in this case, an insulating film is provided on the upper surface and the lower surface of each bit line. A high resistance film is provided on the side surface of the stacked body composed of each bit line and two insulating films provided on the upper and lower surfaces of the bit line. The high resistance film is connected to the electrode by bringing the end surface of the high resistance film into contact with the electrode. Thus, the bit line is connected to the electrode through the high resistance film without bringing the bit line into contact with the electrode. On the other hand, the resistance change film is connected between the word line and the high resistance film.
- The above embodiments have been described with reference to an example in which the resistance change film is a stacked film including a resistance change layer and a metal layer. However, the resistance change film is not limited thereto. For instance, the resistance change film may be a monolayer film made of metal oxide.
- The embodiments described above can realize a memory device being easy to manufacture, and a method for manufacturing the same.
- While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the invention.
Claims (20)
1. A memory device comprising:
a resistance change film;
an insulating film provided on the resistance change film;
a first wiring provided on the insulating film and being not in contact with the resistance change film; and
a high resistance film having a higher resistivity than the first wiring, provided on a side surface of a stacked body including the insulating film and the first wiring, and electrically connected between the first wiring and the resistance change film.
2. The device according to claim 1 , wherein width of the stacked body is narrower than width of the resistance change film.
3. The device according to claim 2 , further comprising:
an electrode having a lower resistivity than the high resistance film and placed between the resistance change film and the high resistance film.
4. The device according to claim 3 , wherein
the width of the stacked body is narrower than width of the electrode, and
a lower end of the high resistance film is in contact with the electrode.
5. The device according to claim 1 , further comprising:
a second wiring extending in a direction crossing a direction in that the first wiring extends, provided below the resistance change film, and connected to the resistance change film.
6. The device according to claim 1 , wherein the high resistance film contains tantalum, silicon, and nitrogen.
7. The device according to claim 1 , wherein the resistance change film includes:
a resistance change layer having a higher resistivity than the first wiring; and
a metal layer in contact with the resistance change layer.
8. The device according to claim 7 , wherein
the resistance change layer contains silicon, and
the metal layer contains one or more metals selected from the group consisting of silver, cobalt, nickel, and copper.
9. A memory device comprising:
a plurality of first wiring layers each including a plurality of first wirings extending in a first direction;
a plurality of second wiring layers each including a plurality of second wirings extending in a second direction crossing the first direction;
a first insulating film provided on an upper surface of each of the second wirings;
a second insulating film provided on a lower surface of each of the second wirings;
a high resistance film having a higher resistivity than the first wiring and the second wiring, provided on a side surface of a stacked body including the second insulating film, the second wiring, and the first insulating film, and connected to the second wiring; and
a resistance change film electrically connected between each of the first wirings and the high resistance film and being not in contact with the second wirings,
the first wiring layers and the second wiring layers being stacked alternately.
10. The device according to claim 9 , wherein length in the first direction of the stacked body is shorter than length in the first direction of the resistance change film.
11. The device according to claim 10 , further comprising:
an electrode having a lower resistivity than the high resistance film and placed between the resistance change film and the high resistance film.
12. The device according to claim 11 , wherein
width of the stacked body is narrower than width of the electrode, and
an end surface of the high resistance film is in contact with the electrode.
13. The device according to claim 9 , wherein the high resistance film contains tantalum, silicon, and nitrogen.
14. The device according to claim 9 , wherein the resistance change film includes:
a resistance change layer having a higher resistivity than the first wiring; and
a metal layer in contact with the resistance change layer.
15. The device according to claim 14 , wherein
the resistance change layer contains silicon, and
the metal layer contains one or more metals selected from the group consisting of silver, cobalt, nickel, and copper.
16. A method for manufacturing a memory device, comprising:
forming a resistance change film on a first wiring film;
processing the resistance change film into a strip extending in a first direction and processing the first wiring film into a plurality of first wirings extending in the first direction by selectively removing the resistance change film and the first wiring film;
forming an insulating film and a second wiring film in this order;
processing the second wiring film into a plurality of second wirings extending in a second direction crossing the first direction, processing the insulating film into a strip extending in the second direction, and dividing the resistance change film along the first direction by selectively removing the second wiring film, the insulating film, and the resistance change film;
reducing width of a stacked body including the insulating film and the second wiring; and
forming a high resistance film on a side surface of the stacked body, the high resistance film having a higher resistivity than the first wiring film and the second wiring film and being electrically connected to the resistance change film.
17. The method according to claim 16 , wherein the forming the high resistance film includes:
depositing the high resistance film so as to cover the stacked body; and
removing a portion of the high resistance film located on an upper surface of the stacked body and leaving a portion of the high resistance film located on a side surface of the stacked body by etching the high resistance film.
18. The method according to claim 16 , wherein the reducing the width of the stacked body includes performing isotropic etching on the insulating film and the second wiring.
19. The method according to claim 16 , wherein the dividing includes performing anisotropic etching on the second wiring film, the insulating film, and the resistance change film.
20. The method according to claim 16 , further comprising:
forming an electrode film on the resistance change film,
wherein in the processing into the plurality of first wirings, the electrode film is also processed into a strip extending in the first direction,
in the dividing, the electrode film is processed into a plurality of electrodes arranged along both the first direction and the second direction, and
in the forming the high resistance film, the high resistance film is brought into contact with the electrode.
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US14/621,966 US20160043140A1 (en) | 2014-08-08 | 2015-02-13 | Memory device and method for manufacturing the same |
US15/684,306 US10157964B2 (en) | 2014-08-08 | 2017-08-23 | Memory device and method for manufacturing the same |
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US201462035137P | 2014-08-08 | 2014-08-08 | |
US14/621,966 US20160043140A1 (en) | 2014-08-08 | 2015-02-13 | Memory device and method for manufacturing the same |
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