US20150287909A1 - Confined cell structures and methods of forming confined cell structures - Google Patents
Confined cell structures and methods of forming confined cell structures Download PDFInfo
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- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
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Definitions
- Embodiments of the invention relate generally to memory, and more particularly, to techniques for reducing edge damage in magnetic memory cells.
- Magnetic Random Access Memory is a non-volatile memory technology based on magnetoresistance. Unlike typical Random Access Memory (RAM) technologies which store data as electric charge, MRAM data is stored by magnetoresistive elements. Generally, the magnetoresistive elements in an MRAM cell are made from two magnetic regions, each of which holds a magnetization. The magnetization of one region (the “pinned region”) is fixed in its magnetic orientation, and the magnetization of the other region (the “free region”) can be changed by an external magnetic field generated by a programming current.
- the magnetic field of the programming current can cause the magnetic orientations of the two magnetic regions to be either parallel, giving a lower electrical resistance across the magnetoresistive elements (“0” state), or antiparallel, giving a higher electrical resistance across the magnetoresistive elements (“1” state) of the MRAM cell.
- the switching of the magnetic orientation of the free region and the resulting high or low resistance states across the magnetoresistive elements provide for the write and read operations of the typical MRAM cell.
- a spin torque transfer MRAM (STT-MRAM) cell is another type of memory cell which is programmed by changing the magnetization of magnetoresistive elements.
- the STT-MRAM cell is written by transmitting a programming current through a magnetic cell stack including a free region and a pinned region.
- the programming current is polarized by the pinned region to have a spin torque.
- the spin-polarized current then exerts the torque on the free region, switching the magnetization of the free region.
- the magnetization of the free region can be aligned to be either parallel or antiparallel to the pinned region, and the resistance state across the stack is changed.
- the manufacture of conventional memory cells may involve a series of steps to form the different regions (e.g., the pinned region, the free region, insulating or conductive regions, etc.) of the cell.
- certain steps may cause damage to the cell structure. For example, dry etching may result in demagnetization of the free region, which may affect the programmability of the magnetic memory cell.
- the effects of such damage may be more detrimental to the function of the cell.
- FIG. 1 is an illustration of an STT-MRAM cell structure, in accordance with an embodiment of the present technique
- FIG. 2 is an illustration of an STT-MRAM cell structure having edge damage
- FIGS. 3A-3J illustrate a series of side views and corresponding top views of one technique for forming an STT-MRAM cell structure having reduced edge damage, in accordance with embodiments of the present technique
- FIG. 4 is a side view of the STT-MRAM cell structure formed using the technique illustrated in FIG. 3 , in accordance with embodiments of the present technique;
- FIG. 5 is a three-dimensional view of the STT-MRAM cell structure illustrated in FIG. 4 , in accordance with embodiments of the present technique;
- FIGS. 6A-6H illustrate a series of side views and corresponding top views of a technique for forming an STT-MRAM cell having reduced edge damage using spacer regions, in accordance with embodiments of the present technique
- FIG. 7 is a side view of the STT-MRAM cell structure formed using the technique illustrated in FIG. 6 , in accordance with embodiments of the present technique;
- FIGS. 8A-8J illustrate a series of side views and corresponding top views of a technique for forming an STT-MRAM cell having reduced edge damage using vias, in accordance with embodiments of the present technique
- FIG. 9 is a side view of the STT-MRAM cell structure formed using the technique illustrated in FIG. 8 , in accordance with embodiments of the present technique.
- FIG. 10 is a side view of another STT-MRAM cell structure formed using the technique illustrated in FIG. 8 , in accordance with embodiments of the present technique.
- a magnetic memory cell is typically programmed by changing a magnetic resistance in the cell.
- a magnetic memory cell referred to herein as a cell, may include regions of magnetic materials.
- one magnetic region of the cell referred to as the “free region” may be switched in magnetization
- another magnetic region referred to as the “pinned region” may remain fixed in magnetization.
- the free region magnetization may be switched between two opposite directions to be either parallel or antiparallel to the pinned region magnetization.
- the resistance across the regions may be low, and when the magnetizations of the free and pinned regions are antiparallel, the resistance across the regions may be high.
- a magnetic memory cell may be programmed to either a low or a high resistance state by switching the magnetization of the free region.
- FIG. 1 A programmable structure of the STT-MRAM cell, referred to as a cell structure 10 , is illustrated in FIG. 1 .
- the cell structure 10 may include a free region 14 which may be switched in magnetization to be either parallel or anti-parallel to the magnetization of the pinned region 18 .
- the free region 14 and the pinned region 18 may include the same or different materials.
- each of the free and pinned regions 14 and 18 may include magnetic materials or ferromagnetic materials such as Co, Fe, Ni or its alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X ⁇ B, Cu, Re, Ru, Rh, Hf, Pd, Pt, C), or other half-metallic ferromagnetic material such as Fe 3 O 4 , CrO 2 , NiMnSb, PtMnSb, and BiFeO, or any combination of the above materials.
- magnetic materials or ferromagnetic materials such as Co, Fe, Ni or its alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X ⁇ B, Cu, Re, Ru, Rh, Hf, Pd, Pt, C), or other half-metallic ferromagnetic material such as Fe 3 O 4 , CrO 2 , NiMnSb,
- the free region 14 and the pinned region 18 may have a barrier region 16 in between, which may be suitable for separating the free and pinned regions 14 and 18 and substantially preventing coupling between the magnetizations of the two regions 14 and 18 .
- the barrier region 16 may include conductive, nonmagnetic materials such as Cu, Au, Ta, Ag, CuPt, CuMn, nonconductive, nonmagnetic materials such as Al x O y , MgO x , AlN x , SiN x , CaO x , NiO x HfO x , Ta x O y , ZrO x , NiMnO x , MgF x , SiC, SiO x , SiO x N y , or any combination of the above materials.
- the cell structure 10 may also include an antiferromagnetic region 20 suitable for fixing the magnetization of the pinned region 18 through exchange coupling, thereby increasing cell stability.
- a programming current is applied to the cell structure 10 of the cell that is selected for programming.
- a write current may be generated and passed through a data line, which may each be connected to a top lead 12 or a bottom lead 22 of the cell 10 .
- the top lead 12 and the bottom lead 22 may include conductive materials such as copper and palladium, for example.
- the top lead 12 and bottom lead 22 may each be connected to a data/sense line, for example a bit line of the memory cell, such that a programming current may be transmitted longitudinally through the regions of the cell structure 10 .
- the electrons of the programming current are spin-polarized by the pinned region 18 to exert a torque on the free region 14 , which switches the magnetization of the free region 14 to “write to” or “program” the cell.
- a current is used to detect the programmed state by measuring the resistance through the cell structure 10 .
- a read current may be generated and passed from a data line through the cell structure 10 , from the top lead 12 to the bottom lead 22 (or from the bottom lead 22 to the top lead 12 , in some embodiments).
- the voltage difference between the data lines may be different depending on the resistance through the cell structure 10 , thus indicating the programmed state of the STT-MRAM cell.
- the voltage difference may be compared to a reference and amplified by a sense amplifier.
- a memory cell such as an STT-MRAM cell may have multiple regions, including at least a free region 14 and a pinned region 18 arranged such that a programming current can program the cell and read a resistance through the cell structure 10 .
- such cell structures are manufactured using a series of steps including depositing materials, planarizing deposited materials to form regions in the cell structure, and dry etching the materials to form cell structures having a certain dimension (e.g., having a diameter of 100 nm).
- dry etch processes may damage the edges of the cell structure, which may result in the demagnetization of the free region and/or the pinned region, the generation of electron spin scattering centers, and/or shortages across cell structure.
- the damage to the edges of the cell structure may be even more detrimental to the performance of the magnetic memory cell due to the larger surface-area-to-volume ratio of the cell structure.
- An illustration of edge damage is provided in FIG. 2 , where the hatched region surrounding the perimeter of the cell structure 10 represents damaged regions 24 .
- the cell structure 10 may be formed with reduced edge damage (also referred to as etch damage).
- etch damage also referred to as etch damage
- certain damaging processes such as dry etching or planarizing may be eliminated, and in some embodiments, sensitive regions or materials (e.g., the free region 14 ) may be separated from damaging processes to substantially limit potential demagnetization in the magnetic materials.
- STT-MRAM cells are merely an example of one or more embodiments.
- the present techniques may apply to any type of magnetic memory cell having magnetic materials susceptible to demagnetization due to edge damage. Additionally, some embodiments, as described with respect to FIGS. 3-10 , may apply to any memory cell structure, or to any structure having regions of materials which may be sensitive to edge damage.
- FIGS. 3A-3J an embodiment for forming a cell structure without dry etching the edges of the free layer 14 is described.
- the process steps are represented by structures 30 , 32 , 34 , 36 , and 38 , which illustrate side views (labeled 30 a , 32 a , 34 a , 36 a , and 38 a ) and corresponding top views (labeled 30 b , 32 b , 34 b , 36 b , and 38 b ) of intermediate structures (referred to as structures) in the formation of two confined STT-MRAM cell structures in a dielectric material.
- the process described utilizes two cells for simplification of the process. Any number of cells can be formed from the described process.
- confined STT-MRAM cell structures may refer to STT-MRAM cell structures having at least a free region formed in a recess, cavity, via, etc. in dielectric materials.
- the process begins with forming the bottom lead 22 in a substrate 26 , as illustrated in view 30 a ( FIG. 3A ).
- the substrate 26 may include dielectric material (and may also be referred to as the dielectric 26 ) or any other suitable material for separating different cell structures.
- a photolithography and dry etch process may be used to recess the dielectric 26
- conductive materials such as copper or palladium, may be deposited to form the bottom lead 22 in the recesses of the dielectric 26 .
- a patterned mask may be used to form the dimensions of the bottom leads 22 and arrange the bottom leads in a dielectric substrate 26 .
- the bottom leads 22 may be oval in the dielectric material 26 , though different embodiments may include various shapes.
- the process may then involve etching the bottom lead 22 to recess the bottom lead 22 to a certain height in the recess, as in structure 32 a .
- the etching of the bottom lead 22 material may be via wet etch or other etch processes known in the art.
- Antiferromagnetic materials are then deposited in the recess to form an antiferromagnetic region 20 , and magnetic materials are deposited over the antiferromagnetic region 20 to form the pinned region 18 .
- the pinned region 18 may have a fixed magnetization achieved through exchange coupling with the antiferromagnetic region 20 .
- the antiferromagnetic materials and the magnetic materials are deposited to form the antiferromagnetic region 20 and the pinned region 18 .
- Each may be directionally deposited, such that the regions 20 and 18 are formed in one direction.
- the antiferromagnetic region 20 and the pinned region 18 may be formed on horizontal surfaces (e.g., in a lateral direction), and may not be deposited on the vertical sidewalls 28 (e.g., in a longitudinal direction).
- a wet etch may be applied after the deposition of the magnetic materials forming the pinned region 18 to remove excess materials (e.g., materials deposited on the vertical sidewalls 28 ).
- Excess materials 31 may also be formed over the dielectric 26 and may be removed at a later step in the process.
- the top view of the structure 32 b illustrates the pinned region 18 visible in the recesses.
- the barrier materials are then deposited into the recess to form a barrier region 16 in the structure 34 a ( FIG. 3E ).
- the barrier materials may include nonconductive, nonmagnetic materials such as Al x O y , MgO x , AlN x , SiN x , CaO x , NiO x HfO x , Ta x O y , ZrO x , NiMnO x , MgF x , SiC, SiO x , SiO x N y , or any combination of the above materials.
- the barrier materials may be suitable for physically separating the pinned region 18 from a free region 14 and for substantially preventing magnetic coupling effects between the pinned region 18 and the free region 14 .
- the barrier region 16 may be formed by conformal deposition, which result in a barrier region 16 disposed over a top surface of the pinned region 18 and over the vertical sidewalls 28 of the recess. In other embodiments, the barrier region 16 may be formed by directional deposition, or any other types or combinations of depositions methods which result in a barrier region 16 disposed over a top surface of the pinned region 18 . As illustrated in the top view of the structure 34 b ( FIG. 3F ), barrier materials 16 may substantially cover the previously deposited materials.
- Magnetic materials are then directionally deposited over the barrier region 16 to form the free region 14 .
- a wet etch may be used to remove any excess materials, including magnetic materials deposited on the vertical sidewalls 28 .
- Suitable conductive materials such as copper or palladium may then be deposited over the free region 14 to form a top lead 12 in the structure 36 a ( FIG. 3G ).
- the materials of the top lead 12 may substantially cover the recessed areas, as well as the substrate.
- excess materials 31 may include one or more of the previously deposited materials, including antiferromagnetic (from forming the antiferromagnetic region 22 ), magnetic (from forming the pinned and free regions 18 and 14 ), barrier (from forming the barrier region 16 ), and conductive materials (from forming the top lead 12 ). Such excess materials 31 may not be useful for functioning of the STT-MRAM cell structure 10 a .
- a CMP process may be applied to remove the excess materials 31 . The CMP process may stop at the dielectric material between the formed cell structures 10 a , and the remaining structure 38 a may include cell structures 10 a separated by dielectric materials 26 . As illustrated in the top view of the structure 38 b ( FIG. 3J ), the barrier region 16 may separate the top lead 12 from the surrounding dielectric 26 .
- FIGS. 3A-3J dry etching is not used to form the cell structures 10 a . Rather, a series of CMPs, depositions, and wet etching may be employed to form recesses for the cell structures 10 a , deposit various regions, and remove unwanted materials. The remaining cell structures 10 a are contained in the original recesses and surrounded by the dielectric material 26 . By avoiding techniques such as dry etching, damage to the cell structure 10 a , and in particular, damage to the free region 14 and the barrier region 16 , may be reduced.
- a side view of the completed cell structure 10 a formed by the process of FIGS. 3A-3J is provided in FIG. 4 . Further, a three-dimensional view of this cell structure 10 a is illustrated in FIG. 5 .
- FIGS. 6A-6H illustrate a series of side views (labeled 40 a , 42 a , 44 a , and 46 a ) and top views (labeled 40 b , 42 b , 44 b , and 46 b ) of intermediate structures 40 , 42 , 44 , and 46 in forming a cell structure 10 b having a spacer 48 .
- the spacer 48 may be configured to reduce an area and/or a volume of the free region 14 .
- the size of a programming current applied to program an STT-MRAM cell is directly related to the size of the free region 14 , as a larger current may be used to switch the magnetization of a larger volume of magnetic material. As such, forming a cell structure with a spacer 48 may result in a smaller free region 14 which may be switched in magnetization by a smaller programming current.
- the process illustrated in FIGS. 6A-6H may also involve forming recesses in the dielectric substrate 26 and depositing conductive materials in the recesses to form the bottom leads 22 , as illustrated in the structure 40 ( FIGS. 6A and 6 b ).
- the bottom lead material may then be wet etched to form bottom leads 22 having a certain height in the recess, and antiferromagnetic materials and magnetic materials may be deposited over the bottom leads 22 to form the antiferromagnetic region 20 and pinned region 18 , as illustrated in the structure 42 ( FIGS. 6C and 6D ).
- the vertical sidewalls 28 may also be wet etched to remove excess materials.
- nonmagnetic materials such as silicon nitride (SiN) may be deposited to form the spacer region 48 ( FIG. 6E ).
- the SiN may be deposited conformally.
- the SiN may be dry etched in some embodiments, such that only a region of SiN remains against the sidewalls 28 of the trench. Although dry etch may be used in this process, the dry etch may not result in demagnetization of the free region 14 or damage to the barrier region 16 , as the magnetic materials for the free region 14 may be deposited after the dry etch process which forms the spacer regions 48 .
- the spacer region 48 may be visible in the cavity and may be formed above the exposed pinned region 18 .
- barrier materials may be deposited into the recess such that it is disposed over the spacer region 48 in a vertical (longitudinal) direction and disposed over the pinned region 18 in the horizontal (lateral) direction, forming the barrier region 16 .
- the deposition of barrier materials may be either a conformal or a directional deposition. Magnetic materials may be directionally deposited over the barrier region 16 to form the free region 14 , and conductive materials may be deposited over the free region 14 to form the top lead 12 . In between depositions of different materials, a wet etch may be applied to remove excess materials from the sidewalls 28 of the trench.
- a CMP process may be used to remove excess materials 31 from the top portions of the dielectric material 26 until the planarization reaches the dielectric 26 , which may result in a structure 46 ( FIGS. 6G and 6H ) having complete cell structures 10 b separated by dielectric 26 .
- the top lead 12 may be exposed, and may be surrounded by a barrier region 16 , which is further surrounded by a spacer region 48 in the recesses of the dielectric 26 .
- FIG. 7 A larger version of the cell structure 10 b formed by the process discussed in FIG. 6 is provided in FIG. 7 .
- the cell structure 10 b may include a spacer region 48 surrounding a barrier region 16 surrounding the free region 14 , thus reducing the volume of the free region 14 and reducing a programming current which may be applied to switch the magnetization of the free region 14 .
- the CMP process removing excess materials 31 is described as stopping on the dielectric material 26 in FIG. 6
- the CMP process may also instead stop at the barrier region 16 , as illustrated in FIG. 7 .
- FIGS. 8A-8J illustrates a series of side views (labeled 50 a , 52 a , 54 a , 56 a , and 58 a ) and top views (labeled 50 b , 52 b , 54 b , 56 b , and 58 b ) of intermediate structures 50 , 52 , 54 , 56 , and 58 in forming a cell structure 10 c .
- the process may involve a CMP process and a patterned mask to form recesses in a dielectric substrate 26 where materials may be deposited to form cell structures 10 c . Conductive materials may be deposited in the recesses to form the bottom lead 22 , as illustrated in structure 50 .
- a patterned mask may be used to form the antiferromagnetic region 20 and the pinned region 18 over the bottom lead 22 .
- the patterned mask may be positioned such that antiferromagnetic materials may be disposed over the bottom lead 22 to form the antiferromagnetic region 20 , and magnetic materials may be disposed over the antiferromagnetic region 20 to form the pinned region 18 .
- the pinned region 18 may be exposed.
- additional dielectric material 26 may be deposited over the original dielectric material 26 and may cover some portions of the pinned region 18 , as illustrated in the structure 54 a ( FIG. 8E ), and an additional mask may be used such that vias 60 are formed in the additionally deposited dielectric 26 .
- the vias 60 may expose a portion of the pinned region 18 .
- the via 60 may expose a portion of the pinned region 18 while the remaining top surface of the structure 54 includes dielectric material 26 .
- Barrier materials may then be conformally or directionally deposited over the structure 54 and into the via 60 to form a barrier region 16 , such that all surfaces of the via 60 may be covered by the barrier region 16 .
- the barrier region 16 surrounding the via 60 may also be referred to as the tunnel barrier and may have a U-shaped or cup shaped structure.
- Magnetic materials may be deposited over the structure 54 and onto the tunnel barrier to form the free region 14 , as illustrated in the structure 56 a ( FIG. 8G ). As illustrated in the top view of the structure 56 b ( FIG. 8H ), the top of the structure 56 (including the recesses and the surrounding dielectric 26 ) may be covered by the magnetic materials deposited for forming the free region 14 .
- a CMP process may be used to planarize the materials deposited for the free region 14 , such that the volume of the free region 14 is substantially contained in the via 60 surrounded by the barrier region 16 in each cell structure 10 c .
- Suitable conductive materials may be deposited to form the top lead 12 , as illustrated in the structure 58 a ( FIG. 8I ).
- the original patterned mask used to recess the dielectric may be used to form the top lead 12 , or in other embodiments, a different mask or no mask may be used.
- the top view of the structure 58 b depicts the top lead 12 configured to be the data line (or to be connected to the data line) of the cell structure 10 c.
- FIG. 9 A larger version of the cell structure 10 c formed by the process discussed in FIG. 8 is provided in FIG. 9 .
- the free region 14 is substantially contained in between the tunnel barrier of the barrier region 16 and the top lead 12 .
- any dry etch or CMP processes may not substantially affect the contained free region 14 . Therefore, the free region 14 may be protected from etch damage and may not lose magnetization.
- a similar process as that described in FIGS. 8A-8J may be used to obtain the cell structure 10 d illustrated in FIG. 10 .
- the cell structure 10 d may be formed by depositing magnetic materials to form a thinner free region 14 on the barrier region 16 . Suitable conductive materials may be deposited in the remaining portions of the via 60 , over the free region 14 .
- a smaller programming current applied vertically through the cell structure 10 d may program the smaller volume of the free region 14 (e.g., in comparison to the volume of the free region in the cell structure 10 c ).
- embodiments may include processes for forming memory cells such that certain regions, such as the free region 14 , such that etch or planarization damages may be reduced in those regions.
- regions such as the free region 14
- etch or planarization damages may be reduced in those regions.
- techniques for reducing damage to such regions include forming the cell structure 10 in a contained recess such that etching of the edges may not be necessary or forming the cell structure 10 such that the certain regions (e.g., the free region 14 ) are protected from etching, planarizing, or other damaging processes.
- FIGS. 4 , 5 , 7 , 9 , and 10 depict a magnetization orientation as parallel to the plane of the substrate in which the cell structure 10 is formed
- the present techniques are not limited to any particular magnetization orientation.
- the magnetization orientation of the free region 14 and pinned region 18 may be in a different direction (e.g., perpendicular) compared to the depicted magnetization orientations in FIGS. 4 , 5 , 7 , 9 , and 10 .
- the free and pinned regions 14 and 18 may have a magnetization orientation that is perpendicular to a plane of the free and pinned regions 14 and 18 and/or parallel to a direction in which the regions (e.g., regions 12 , 14 , 16 , 18 , 20 , and 22 ) are generally deposited.
- the free region 14 may similarly be programmed to be parallel or antiparallel to the pinned region 18 , indicating different programmed states of the memory cell.
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Abstract
Description
- This application is a divisional of U.S. application Ser. No. 13/079,652, entitled “CONFINED CELL STRUCTURES AND METHODS OF FORMING CONFINED CELL STRUCTURES” filed Apr. 4, 2011, the specification of which is incorporated herein by reference in its entirety for all purposes.
- 1. Field of Invention
- Embodiments of the invention relate generally to memory, and more particularly, to techniques for reducing edge damage in magnetic memory cells.
- 2. Description of Related Art
- This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light and not as admissions of prior art.
- Magnetic Random Access Memory (MRAM) is a non-volatile memory technology based on magnetoresistance. Unlike typical Random Access Memory (RAM) technologies which store data as electric charge, MRAM data is stored by magnetoresistive elements. Generally, the magnetoresistive elements in an MRAM cell are made from two magnetic regions, each of which holds a magnetization. The magnetization of one region (the “pinned region”) is fixed in its magnetic orientation, and the magnetization of the other region (the “free region”) can be changed by an external magnetic field generated by a programming current. Thus, the magnetic field of the programming current can cause the magnetic orientations of the two magnetic regions to be either parallel, giving a lower electrical resistance across the magnetoresistive elements (“0” state), or antiparallel, giving a higher electrical resistance across the magnetoresistive elements (“1” state) of the MRAM cell. The switching of the magnetic orientation of the free region and the resulting high or low resistance states across the magnetoresistive elements provide for the write and read operations of the typical MRAM cell.
- A spin torque transfer MRAM (STT-MRAM) cell is another type of memory cell which is programmed by changing the magnetization of magnetoresistive elements. The STT-MRAM cell is written by transmitting a programming current through a magnetic cell stack including a free region and a pinned region. The programming current is polarized by the pinned region to have a spin torque. The spin-polarized current then exerts the torque on the free region, switching the magnetization of the free region. The magnetization of the free region can be aligned to be either parallel or antiparallel to the pinned region, and the resistance state across the stack is changed.
- The manufacture of conventional memory cells, including MRAM cells and STT-MRAM cells, may involve a series of steps to form the different regions (e.g., the pinned region, the free region, insulating or conductive regions, etc.) of the cell. However, in typical manufacturing techniques, certain steps may cause damage to the cell structure. For example, dry etching may result in demagnetization of the free region, which may affect the programmability of the magnetic memory cell. Furthermore, as cell structures are manufactured to be increasingly small in size, the effects of such damage may be more detrimental to the function of the cell.
- Certain embodiments are described in the following detailed description and in reference to the drawings in which:
-
FIG. 1 is an illustration of an STT-MRAM cell structure, in accordance with an embodiment of the present technique; -
FIG. 2 is an illustration of an STT-MRAM cell structure having edge damage; -
FIGS. 3A-3J illustrate a series of side views and corresponding top views of one technique for forming an STT-MRAM cell structure having reduced edge damage, in accordance with embodiments of the present technique; -
FIG. 4 is a side view of the STT-MRAM cell structure formed using the technique illustrated inFIG. 3 , in accordance with embodiments of the present technique; -
FIG. 5 is a three-dimensional view of the STT-MRAM cell structure illustrated inFIG. 4 , in accordance with embodiments of the present technique; -
FIGS. 6A-6H illustrate a series of side views and corresponding top views of a technique for forming an STT-MRAM cell having reduced edge damage using spacer regions, in accordance with embodiments of the present technique; -
FIG. 7 is a side view of the STT-MRAM cell structure formed using the technique illustrated inFIG. 6 , in accordance with embodiments of the present technique; -
FIGS. 8A-8J illustrate a series of side views and corresponding top views of a technique for forming an STT-MRAM cell having reduced edge damage using vias, in accordance with embodiments of the present technique; -
FIG. 9 is a side view of the STT-MRAM cell structure formed using the technique illustrated inFIG. 8 , in accordance with embodiments of the present technique; and -
FIG. 10 is a side view of another STT-MRAM cell structure formed using the technique illustrated inFIG. 8 , in accordance with embodiments of the present technique. - A magnetic memory cell is typically programmed by changing a magnetic resistance in the cell. For example, a magnetic memory cell, referred to herein as a cell, may include regions of magnetic materials. During programming, one magnetic region of the cell, referred to as the “free region,” may be switched in magnetization, and another magnetic region, referred to as the “pinned region,” may remain fixed in magnetization. Typically, the free region magnetization may be switched between two opposite directions to be either parallel or antiparallel to the pinned region magnetization. When the magnetizations of the free and pinned regions are parallel, the resistance across the regions may be low, and when the magnetizations of the free and pinned regions are antiparallel, the resistance across the regions may be high. Thus, a magnetic memory cell may be programmed to either a low or a high resistance state by switching the magnetization of the free region.
- One example of such a magnetic memory cell is a spin torque transfer magnetic random access memory (STT-MRAM) cell. A programmable structure of the STT-MRAM cell, referred to as a
cell structure 10, is illustrated inFIG. 1 . Thecell structure 10 may include afree region 14 which may be switched in magnetization to be either parallel or anti-parallel to the magnetization of thepinned region 18. In some embodiments, thefree region 14 and thepinned region 18 may include the same or different materials. For example, each of the free andpinned regions - The
free region 14 and thepinned region 18 may have abarrier region 16 in between, which may be suitable for separating the free andpinned regions regions barrier region 16 may include conductive, nonmagnetic materials such as Cu, Au, Ta, Ag, CuPt, CuMn, nonconductive, nonmagnetic materials such as AlxOy, MgOx, AlNx, SiNx, CaOx, NiOx HfOx, TaxOy, ZrOx, NiMnOx, MgFx, SiC, SiOx, SiOxNy, or any combination of the above materials. Thecell structure 10 may also include anantiferromagnetic region 20 suitable for fixing the magnetization of thepinned region 18 through exchange coupling, thereby increasing cell stability. - During a write operation of an STT-MRAM cell, a programming current is applied to the
cell structure 10 of the cell that is selected for programming. To initiate the write operation, a write current may be generated and passed through a data line, which may each be connected to atop lead 12 or abottom lead 22 of thecell 10. Thetop lead 12 and thebottom lead 22 may include conductive materials such as copper and palladium, for example. In some embodiments, thetop lead 12 andbottom lead 22 may each be connected to a data/sense line, for example a bit line of the memory cell, such that a programming current may be transmitted longitudinally through the regions of thecell structure 10. As the programming current passes from thebottom lead 22 to thepinned region 18 of thecell structure 10, the electrons of the programming current are spin-polarized by thepinned region 18 to exert a torque on thefree region 14, which switches the magnetization of thefree region 14 to “write to” or “program” the cell. - In a read operation of the STT-MRAM cell, a current is used to detect the programmed state by measuring the resistance through the
cell structure 10. To initiate a read operation, a read current may be generated and passed from a data line through thecell structure 10, from thetop lead 12 to the bottom lead 22 (or from thebottom lead 22 to thetop lead 12, in some embodiments). The voltage difference between the data lines may be different depending on the resistance through thecell structure 10, thus indicating the programmed state of the STT-MRAM cell. In some embodiments, the voltage difference may be compared to a reference and amplified by a sense amplifier. - Therefore, a memory cell such as an STT-MRAM cell may have multiple regions, including at least a
free region 14 and a pinnedregion 18 arranged such that a programming current can program the cell and read a resistance through thecell structure 10. Typically, such cell structures are manufactured using a series of steps including depositing materials, planarizing deposited materials to form regions in the cell structure, and dry etching the materials to form cell structures having a certain dimension (e.g., having a diameter of 100 nm). However, dry etch processes may damage the edges of the cell structure, which may result in the demagnetization of the free region and/or the pinned region, the generation of electron spin scattering centers, and/or shortages across cell structure. Moreover, as cell structures are increasingly manufactured to be smaller in size (e.g., having a diameter of 50 nm or less), the damage to the edges of the cell structure may be even more detrimental to the performance of the magnetic memory cell due to the larger surface-area-to-volume ratio of the cell structure. An illustration of edge damage is provided in FIG. 2, where the hatched region surrounding the perimeter of thecell structure 10 represents damagedregions 24. - In one or more embodiments, the
cell structure 10 may be formed with reduced edge damage (also referred to as etch damage). In the techniques and cell structures illustrated inFIGS. 3-10 , certain damaging processes such as dry etching or planarizing may be eliminated, and in some embodiments, sensitive regions or materials (e.g., the free region 14) may be separated from damaging processes to substantially limit potential demagnetization in the magnetic materials. Though the techniques and cell structures illustrated inFIGS. 3-10 generally apply to STT-MRAM cell structures, it should be noted that STT-MRAM cells are merely an example of one or more embodiments. The present techniques may apply to any type of magnetic memory cell having magnetic materials susceptible to demagnetization due to edge damage. Additionally, some embodiments, as described with respect toFIGS. 3-10 , may apply to any memory cell structure, or to any structure having regions of materials which may be sensitive to edge damage. - Beginning first with
FIGS. 3A-3J , an embodiment for forming a cell structure without dry etching the edges of thefree layer 14 is described. The process steps are represented by structures 30, 32, 34, 36, and 38, which illustrate side views (labeled 30 a, 32 a, 34 a, 36 a, and 38 a) and corresponding top views (labeled 30 b, 32 b, 34 b, 36 b, and 38 b) of intermediate structures (referred to as structures) in the formation of two confined STT-MRAM cell structures in a dielectric material. The process described utilizes two cells for simplification of the process. Any number of cells can be formed from the described process. As used herein, confined STT-MRAM cell structures may refer to STT-MRAM cell structures having at least a free region formed in a recess, cavity, via, etc. in dielectric materials. The process begins with forming thebottom lead 22 in asubstrate 26, as illustrated inview 30 a (FIG. 3A ). Thesubstrate 26 may include dielectric material (and may also be referred to as the dielectric 26) or any other suitable material for separating different cell structures. In one embodiment, a photolithography and dry etch process may be used to recess the dielectric 26, and conductive materials, such as copper or palladium, may be deposited to form thebottom lead 22 in the recesses of the dielectric 26. For example, a patterned mask may be used to form the dimensions of the bottom leads 22 and arrange the bottom leads in adielectric substrate 26. As indicated inview 30 b (FIG. 3B ), the bottom leads 22 may be oval in thedielectric material 26, though different embodiments may include various shapes. - As illustrated in
FIGS. 3C and 3D , the process may then involve etching thebottom lead 22 to recess thebottom lead 22 to a certain height in the recess, as instructure 32 a. The etching of thebottom lead 22 material may be via wet etch or other etch processes known in the art. Antiferromagnetic materials are then deposited in the recess to form anantiferromagnetic region 20, and magnetic materials are deposited over theantiferromagnetic region 20 to form the pinnedregion 18. As discussed, the pinnedregion 18 may have a fixed magnetization achieved through exchange coupling with theantiferromagnetic region 20. In some embodiments, the antiferromagnetic materials and the magnetic materials are deposited to form theantiferromagnetic region 20 and the pinnedregion 18. Each may be directionally deposited, such that theregions antiferromagnetic region 20 and the pinnedregion 18 may be formed on horizontal surfaces (e.g., in a lateral direction), and may not be deposited on the vertical sidewalls 28 (e.g., in a longitudinal direction). In some embodiments, a wet etch may be applied after the deposition of the magnetic materials forming the pinnedregion 18 to remove excess materials (e.g., materials deposited on the vertical sidewalls 28). Excess materials 31 (e.g., antiferromagnetic materials and magnetic materials) may also be formed over the dielectric 26 and may be removed at a later step in the process. The top view of thestructure 32 b illustrates the pinnedregion 18 visible in the recesses. - Barrier materials are then deposited into the recess to form a
barrier region 16 in the structure 34 a (FIG. 3E ). The barrier materials may include nonconductive, nonmagnetic materials such as AlxOy, MgOx, AlNx, SiNx, CaOx, NiOx HfOx, TaxOy, ZrOx, NiMnOx, MgFx, SiC, SiOx, SiOxNy, or any combination of the above materials. The barrier materials may be suitable for physically separating the pinnedregion 18 from afree region 14 and for substantially preventing magnetic coupling effects between the pinnedregion 18 and thefree region 14. In some embodiments, thebarrier region 16 may be formed by conformal deposition, which result in abarrier region 16 disposed over a top surface of the pinnedregion 18 and over thevertical sidewalls 28 of the recess. In other embodiments, thebarrier region 16 may be formed by directional deposition, or any other types or combinations of depositions methods which result in abarrier region 16 disposed over a top surface of the pinnedregion 18. As illustrated in the top view of thestructure 34 b (FIG. 3F ),barrier materials 16 may substantially cover the previously deposited materials. - Magnetic materials are then directionally deposited over the
barrier region 16 to form thefree region 14. In some embodiments, a wet etch may be used to remove any excess materials, including magnetic materials deposited on thevertical sidewalls 28. Suitable conductive materials such as copper or palladium may then be deposited over thefree region 14 to form atop lead 12 in thestructure 36 a (FIG. 3G ). As illustrated in the top view of thestructure 36 b (FIG. 3H ), the materials of thetop lead 12 may substantially cover the recessed areas, as well as the substrate. - As illustrated in
structure 36 a (FIG. 3I ),excess materials 31 may include one or more of the previously deposited materials, including antiferromagnetic (from forming the antiferromagnetic region 22), magnetic (from forming the pinned andfree regions 18 and 14), barrier (from forming the barrier region 16), and conductive materials (from forming the top lead 12). Suchexcess materials 31 may not be useful for functioning of the STT-MRAM cell structure 10 a. In some embodiments, a CMP process may be applied to remove theexcess materials 31. The CMP process may stop at the dielectric material between the formedcell structures 10 a, and the remainingstructure 38 a may includecell structures 10 a separated bydielectric materials 26. As illustrated in the top view of thestructure 38 b (FIG. 3J ), thebarrier region 16 may separate thetop lead 12 from the surroundingdielectric 26. - Therefore, by employing the techniques discussed in
FIGS. 3A-3J , dry etching is not used to form thecell structures 10 a. Rather, a series of CMPs, depositions, and wet etching may be employed to form recesses for thecell structures 10 a, deposit various regions, and remove unwanted materials. The remainingcell structures 10 a are contained in the original recesses and surrounded by thedielectric material 26. By avoiding techniques such as dry etching, damage to thecell structure 10 a, and in particular, damage to thefree region 14 and thebarrier region 16, may be reduced. A side view of the completedcell structure 10 a formed by the process ofFIGS. 3A-3J is provided inFIG. 4 . Further, a three-dimensional view of thiscell structure 10 a is illustrated inFIG. 5 . - Another embodiment for forming
cell structures 10 b having reduced edge damage is provided inFIGS. 6A-6H .FIGS. 6A-6H illustrate a series of side views (labeled 40 a, 42 a, 44 a, and 46 a) and top views (labeled 40 b, 42 b, 44 b, and 46 b) of intermediate structures 40, 42, 44, and 46 in forming acell structure 10 b having aspacer 48. Thespacer 48 may be configured to reduce an area and/or a volume of thefree region 14. Typically, the size of a programming current applied to program an STT-MRAM cell is directly related to the size of thefree region 14, as a larger current may be used to switch the magnetization of a larger volume of magnetic material. As such, forming a cell structure with aspacer 48 may result in a smallerfree region 14 which may be switched in magnetization by a smaller programming current. - Similar to the structures 30 and 32 formed in the process of
FIGS. 3A-3J , the process illustrated inFIGS. 6A-6H may also involve forming recesses in thedielectric substrate 26 and depositing conductive materials in the recesses to form the bottom leads 22, as illustrated in the structure 40 (FIGS. 6A and 6 b). The bottom lead material may then be wet etched to form bottom leads 22 having a certain height in the recess, and antiferromagnetic materials and magnetic materials may be deposited over the bottom leads 22 to form theantiferromagnetic region 20 and pinnedregion 18, as illustrated in the structure 42 (FIGS. 6C and 6D ). Thevertical sidewalls 28 may also be wet etched to remove excess materials. - In some embodiments, nonmagnetic materials such as silicon nitride (SiN) may be deposited to form the spacer region 48 (
FIG. 6E ). The SiN may be deposited conformally. The SiN may be dry etched in some embodiments, such that only a region of SiN remains against thesidewalls 28 of the trench. Although dry etch may be used in this process, the dry etch may not result in demagnetization of thefree region 14 or damage to thebarrier region 16, as the magnetic materials for thefree region 14 may be deposited after the dry etch process which forms thespacer regions 48. As illustrated in the top view of thestructure 44 b (FIG. 6F ), thespacer region 48 may be visible in the cavity and may be formed above the exposed pinnedregion 18. - Once the
spacer regions 48 are formed, barrier materials may be deposited into the recess such that it is disposed over thespacer region 48 in a vertical (longitudinal) direction and disposed over the pinnedregion 18 in the horizontal (lateral) direction, forming thebarrier region 16. In different embodiments, the deposition of barrier materials may be either a conformal or a directional deposition. Magnetic materials may be directionally deposited over thebarrier region 16 to form thefree region 14, and conductive materials may be deposited over thefree region 14 to form thetop lead 12. In between depositions of different materials, a wet etch may be applied to remove excess materials from thesidewalls 28 of the trench. Furthermore, a CMP process may be used to removeexcess materials 31 from the top portions of thedielectric material 26 until the planarization reaches the dielectric 26, which may result in a structure 46 (FIGS. 6G and 6H ) havingcomplete cell structures 10 b separated bydielectric 26. As illustrated in the top view of thestructure 46 b, thetop lead 12 may be exposed, and may be surrounded by abarrier region 16, which is further surrounded by aspacer region 48 in the recesses of the dielectric 26. - A larger version of the
cell structure 10 b formed by the process discussed inFIG. 6 is provided inFIG. 7 . As shown inFIG. 7 , thecell structure 10 b may include aspacer region 48 surrounding abarrier region 16 surrounding thefree region 14, thus reducing the volume of thefree region 14 and reducing a programming current which may be applied to switch the magnetization of thefree region 14. It should be noted that although the CMP process removingexcess materials 31 is described as stopping on thedielectric material 26 inFIG. 6 , the CMP process may also instead stop at thebarrier region 16, as illustrated inFIG. 7 . - Another embodiment for forming
cell structures 10 c having reduced edge damage is provided inFIGS. 8A-8J .FIGS. 8A-8J illustrates a series of side views (labeled 50 a, 52 a, 54 a, 56 a, and 58 a) and top views (labeled 50 b, 52 b, 54 b, 56 b, and 58 b) of intermediate structures 50, 52, 54, 56, and 58 in forming acell structure 10 c. The process may involve a CMP process and a patterned mask to form recesses in adielectric substrate 26 where materials may be deposited to formcell structures 10 c. Conductive materials may be deposited in the recesses to form thebottom lead 22, as illustrated in structure 50. - A patterned mask may be used to form the
antiferromagnetic region 20 and the pinnedregion 18 over thebottom lead 22. Specifically, as represented by thestructure 52 a (FIG. 8C ), the patterned mask may be positioned such that antiferromagnetic materials may be disposed over thebottom lead 22 to form theantiferromagnetic region 20, and magnetic materials may be disposed over theantiferromagnetic region 20 to form the pinnedregion 18. As illustrated in the top view of thestructure 52 b (FIG. 8D ), the pinnedregion 18 may be exposed. - In some embodiments, additional
dielectric material 26 may be deposited over the originaldielectric material 26 and may cover some portions of the pinnedregion 18, as illustrated in thestructure 54 a (FIG. 8E ), and an additional mask may be used such thatvias 60 are formed in the additionally deposited dielectric 26. Thevias 60 may expose a portion of the pinnedregion 18. As illustrated in the top view of thestructure 54 b (FIG. 8F ), the via 60 may expose a portion of the pinnedregion 18 while the remaining top surface of the structure 54 includesdielectric material 26. - Barrier materials may then be conformally or directionally deposited over the structure 54 and into the via 60 to form a
barrier region 16, such that all surfaces of the via 60 may be covered by thebarrier region 16. Thebarrier region 16 surrounding the via 60 may also be referred to as the tunnel barrier and may have a U-shaped or cup shaped structure. Magnetic materials may be deposited over the structure 54 and onto the tunnel barrier to form thefree region 14, as illustrated in thestructure 56 a (FIG. 8G ). As illustrated in the top view of thestructure 56 b (FIG. 8H ), the top of the structure 56 (including the recesses and the surrounding dielectric 26) may be covered by the magnetic materials deposited for forming thefree region 14. - In some embodiments, a CMP process may be used to planarize the materials deposited for the
free region 14, such that the volume of thefree region 14 is substantially contained in the via 60 surrounded by thebarrier region 16 in eachcell structure 10 c. Suitable conductive materials may be deposited to form thetop lead 12, as illustrated in thestructure 58 a (FIG. 8I ). In some embodiments, the original patterned mask used to recess the dielectric may be used to form thetop lead 12, or in other embodiments, a different mask or no mask may be used. The top view of thestructure 58 b (FIG. 8J ) depicts thetop lead 12 configured to be the data line (or to be connected to the data line) of thecell structure 10 c. - A larger version of the
cell structure 10 c formed by the process discussed inFIG. 8 is provided inFIG. 9 . As shown inFIG. 9 , thefree region 14 is substantially contained in between the tunnel barrier of thebarrier region 16 and thetop lead 12. Although portions of thecell structure 10 c are formed over thebottom lead 22 and are not completely confined, any dry etch or CMP processes may not substantially affect the containedfree region 14. Therefore, thefree region 14 may be protected from etch damage and may not lose magnetization. - A similar process as that described in
FIGS. 8A-8J may be used to obtain thecell structure 10 d illustrated inFIG. 10 . Thecell structure 10 d may be formed by depositing magnetic materials to form a thinnerfree region 14 on thebarrier region 16. Suitable conductive materials may be deposited in the remaining portions of the via 60, over thefree region 14. In such an embodiment, a smaller programming current applied vertically through thecell structure 10 d may program the smaller volume of the free region 14 (e.g., in comparison to the volume of the free region in thecell structure 10 c). - Various embodiments of reducing damage to memory cells are provided, and embodiments are not limited to those illustrated in
FIGS. 3-10 . In accordance with the present techniques, embodiments may include processes for forming memory cells such that certain regions, such as thefree region 14, such that etch or planarization damages may be reduced in those regions. By reducing damage to certain regions which may be more susceptible to damage or regions which may adversely affect the functioning of the memory cell if damaged, cell stability and functionality may be maintained. Specifically, techniques for reducing damage to such regions include forming thecell structure 10 in a contained recess such that etching of the edges may not be necessary or forming thecell structure 10 such that the certain regions (e.g., the free region 14) are protected from etching, planarizing, or other damaging processes. - Furthermore, it should be noted that while the embodiments illustrated in
FIGS. 4 , 5, 7, 9, and 10 depict a magnetization orientation as parallel to the plane of the substrate in which thecell structure 10 is formed, the present techniques are not limited to any particular magnetization orientation. In some embodiments, the magnetization orientation of thefree region 14 and pinnedregion 18 may be in a different direction (e.g., perpendicular) compared to the depicted magnetization orientations inFIGS. 4 , 5, 7, 9, and 10. For example, in some embodiments, the free and pinnedregions regions regions free region 14 may similarly be programmed to be parallel or antiparallel to the pinnedregion 18, indicating different programmed states of the memory cell. - While the invention may be susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and have been described in detail herein. However, it should be understood that the invention is not intended to be limited to the particular forms disclosed. Rather, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the following appended claims.
Claims (20)
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