US20150034376A1 - Printed circuit board structure - Google Patents
Printed circuit board structure Download PDFInfo
- Publication number
- US20150034376A1 US20150034376A1 US14/152,988 US201414152988A US2015034376A1 US 20150034376 A1 US20150034376 A1 US 20150034376A1 US 201414152988 A US201414152988 A US 201414152988A US 2015034376 A1 US2015034376 A1 US 2015034376A1
- Authority
- US
- United States
- Prior art keywords
- signal
- ground layer
- pads
- pcb
- insulation region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09718—Clearance holes
Definitions
- the present disclosure relates to printed circuit board (PCB) structure.
- PCB printed circuit board
- a printed circuit board (PCB) structure includes a plurality of layers and vias through the PCB structure.
- the layers include two signal layers and a ground layer sandwiched by the two signal layers.
- Each of the signal layers includes a plurality of signal traces for transmitting signals.
- the signal trace on one signal layer connects to the corresponding via for connecting with the signal trance on the other layer.
- the ground layer further defines an insulation region.
- the insulation region is concentric with the via for preventing the signals transmitted to the signal layer from transmitting to the ground layer.
- the insulation region is an annulus shaped, and a diameter of the insulation region is unchangeable.
- a parasitic capacitor exists around the via.
- a transmission loss in signal transmitting process is related to the area of the insulation region. However, when transmitting high-speed signal, the transmission loss of the PCB structure with the constant diameter of the insulation region is increased.
- FIG. 1 is a schematic view of one embodiment of a printed circuit board (PCB) structure, the PCB structure including two signal layers and a ground layer.
- PCB printed circuit board
- FIG. 2 is an enlarged partially disassembled view of layers of FIG. 1 .
- FIG. 3 is a partially cross-sectional view of the ground layer of FIG. 1 .
- FIGS. 1 and 2 show a printed circuit board (PCB) structure 100 of the embodiment.
- the PCB structure 100 includes two signal layers 10 , a ground layer 20 sandwiched between the two signal layers 10 , and at least two adjacent vias 30 through the PCB structure 100 .
- the PCB structure 100 may include more than two signal layers 10 .
- the via 30 can a buried via or a blind via.
- the signal layer 10 includes a plurality of signal traces 12 .
- the signal traces 12 are used for transmitting signals.
- the signal traces 12 on the same layer are parallel with each other, and the ends of the parallel signal traces 12 angled with each other are connected to the via 30 for connecting signal traces 12 on the different signal layer 10 .
- the ground layer 20 is substantially rectangular shaped.
- the ground layer 20 comprises a plurality of insulation regions 21 corresponding to the vias 30 .
- the region beside the insulation regions 21 is conductive region 23 .
- the insulation region 21 is substantially a round-corner rectangular shaped.
- the insulation region 21 defines at least two through holes 212 corresponding to the vias 30 .
- the insulation region 21 is filled with insulation material, and the conductive region 23 is filled with cooper
- the via 30 includes two pads 31 and a connecting portion 32 through the PCB structure 100 .
- the pads 31 are respectively mounted on the different signal layers 10 , and are connected with signal trace 12 .
- the pad 31 is substantially an annulus shaped. Projections of the pads 31 of the adjacent vias 30 on the ground layer 20 are contained in the same insulation region 21 (as shown in FIG. 3 ), and are respectively concentric with the corresponding through holes 212 .
- a minimum distance between the projection of the pad 31 on the ground layer 20 and the conductive region 23 is larger than a predetermined distance. In one embodiment, the predetermined distance is 3 mil.
- the connecting portion 32 is substantially cylinder shaped.
- the connecting portion 32 is used for connecting the two pads 31 together, and is concentric with the through hole 212 .
- the diameter of the connecting portion 32 is equal to the diameter of the through hole 212 .
- the connecting portion 32 is made of conductive material.
- the pads 31 on the same signal layer 10 of the adjacent vias 30 correspond to the same insulation region 21 on the ground layer 20 , such that, the insulation area corresponding to each of the vias 30 is increased, and when transmitting high-speed signal the transmission loss in the signal transmitting process is decreased.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
A printed circuit board (PCB) structure comprises two signal layers with and a ground layer sandwiched between the two signal layers, and at least two adjacent vias. Each of the signal layers comprises a plurality of signal traces. The via through the PCB structure is used for connecting signal traces on different signal layers together. The ground layer comprises at least one insulation region. Each of the vias comprises at least two pads and a connecting portion connecting the at least two pads together. The pads are respectively mounted on the at least two signal layer. Projections of the adjacent pads on the ground layer are contained in the same insulation region.
Description
- The present disclosure relates to printed circuit board (PCB) structure.
- A printed circuit board (PCB) structure includes a plurality of layers and vias through the PCB structure. The layers include two signal layers and a ground layer sandwiched by the two signal layers. Each of the signal layers includes a plurality of signal traces for transmitting signals. The signal trace on one signal layer connects to the corresponding via for connecting with the signal trance on the other layer. The ground layer further defines an insulation region. The insulation region is concentric with the via for preventing the signals transmitted to the signal layer from transmitting to the ground layer. In normal designed structure, the insulation region is an annulus shaped, and a diameter of the insulation region is unchangeable. A parasitic capacitor exists around the via. A transmission loss in signal transmitting process is related to the area of the insulation region. However, when transmitting high-speed signal, the transmission loss of the PCB structure with the constant diameter of the insulation region is increased.
- Therefore, there is room for improvement in the art.
- The components of the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiment of a printed circuit board (PCB) structure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout several views.
-
FIG. 1 is a schematic view of one embodiment of a printed circuit board (PCB) structure, the PCB structure including two signal layers and a ground layer. -
FIG. 2 is an enlarged partially disassembled view of layers ofFIG. 1 . -
FIG. 3 is a partially cross-sectional view of the ground layer ofFIG. 1 . - The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.” The references “a plurality of” and “a number of” mean “at least two.” Embodiments of the present disclosure will be described in detail with reference to the drawings.
-
FIGS. 1 and 2 show a printed circuit board (PCB)structure 100 of the embodiment. ThePCB structure 100 includes twosignal layers 10, aground layer 20 sandwiched between the twosignal layers 10, and at least twoadjacent vias 30 through thePCB structure 100. In other embodiments, thePCB structure 100 may include more than twosignal layers 10. Thevia 30 can a buried via or a blind via. - The
signal layer 10 includes a plurality ofsignal traces 12. Thesignal traces 12 are used for transmitting signals. The signal traces 12 on the same layer are parallel with each other, and the ends of the parallel signal traces 12 angled with each other are connected to thevia 30 forconnecting signal traces 12 on thedifferent signal layer 10. - The
ground layer 20 is substantially rectangular shaped. Theground layer 20 comprises a plurality ofinsulation regions 21 corresponding to thevias 30. The region beside theinsulation regions 21 isconductive region 23. Theinsulation region 21 is substantially a round-corner rectangular shaped. Theinsulation region 21 defines at least two throughholes 212 corresponding to thevias 30. In one embodiment, theinsulation region 21 is filled with insulation material, and theconductive region 23 is filled with cooper - The
via 30 includes twopads 31 and a connectingportion 32 through thePCB structure 100. Thepads 31 are respectively mounted on thedifferent signal layers 10, and are connected withsignal trace 12. Thepad 31 is substantially an annulus shaped. Projections of thepads 31 of theadjacent vias 30 on theground layer 20 are contained in the same insulation region 21 (as shown inFIG. 3 ), and are respectively concentric with the corresponding throughholes 212. A minimum distance between the projection of thepad 31 on theground layer 20 and theconductive region 23 is larger than a predetermined distance. In one embodiment, the predetermined distance is 3 mil. - The connecting
portion 32 is substantially cylinder shaped. The connectingportion 32 is used for connecting the twopads 31 together, and is concentric with the throughhole 212. The diameter of the connectingportion 32 is equal to the diameter of the throughhole 212. In one embodiment, the connectingportion 32 is made of conductive material. - In summary, the
pads 31 on thesame signal layer 10 of theadjacent vias 30 correspond to thesame insulation region 21 on theground layer 20, such that, the insulation area corresponding to each of thevias 30 is increased, and when transmitting high-speed signal the transmission loss in the signal transmitting process is decreased. - While various exemplary and preferred embodiments have been described, the disclosure is not limited thereto. On the contrary, various modifications and similar arrangements (as would be apparent to those skilled in the art) are intended to also be covered. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Claims (5)
1. A printed circuit board (PCB) structure, comprising:
at least two signal layers with a plurality of signal traces;
a ground layer sandwiched between the at least two signal layers; and
at least two adjacent vias through the PCB structure, and for connecting signal traces on different signal layers together;
wherein the ground layer comprises at least one insulation region; each of the vias comprises at least two pads and a connecting portion connecting the at least two pads together; the pads respectively mounted on the at least two signal layer; projections of the adjacent pads on the ground layer are contained in the same insulation region.
2. The PCB structure of claim 1 , wherein the ground layer further comprises a conductive region beside the insulation region; a minimum distance between the projection of the pad on the ground layer and the conductive region is larger than a predetermined distance.
3. The PCB structure of claim 2 , wherein the predetermined distance is 3 mil.
4. The PCB structure of claim 1 , wherein the projection of the pad on the ground layer is concentric with the connecting portion.
5. The PCB structure of claim 1 , wherein the insulation region is substantially a round-corner rectangular shaped.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2013103237673 | 2013-07-30 | ||
CN201310323767.3A CN104349572A (en) | 2013-07-30 | 2013-07-30 | Printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
US20150034376A1 true US20150034376A1 (en) | 2015-02-05 |
Family
ID=52426631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US14/152,988 Abandoned US20150034376A1 (en) | 2013-07-30 | 2014-01-10 | Printed circuit board structure |
Country Status (3)
Country | Link |
---|---|
US (1) | US20150034376A1 (en) |
JP (1) | JP2015029100A (en) |
CN (1) | CN104349572A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105072804A (en) * | 2015-07-17 | 2015-11-18 | 小米科技有限责任公司 | Circuit board and manufacturing method thereof |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105975417A (en) * | 2016-05-05 | 2016-09-28 | 浪潮电子信息产业股份有限公司 | Signal multiplexing structure body, board card and signal multiplexing method |
JP6789667B2 (en) * | 2016-05-13 | 2020-11-25 | 日本ルメンタム株式会社 | Printed circuit board and optical module |
CN106093735A (en) * | 2016-08-11 | 2016-11-09 | 浪潮电子信息产业股份有限公司 | A kind of printed circuit board (PCB) voltage-withstanding test method and device |
WO2021258270A1 (en) * | 2020-06-22 | 2021-12-30 | 华为技术有限公司 | Circuit board, electronic device, and processing method for circuit board |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7705246B1 (en) * | 2007-12-28 | 2010-04-27 | Emc Corporation | Compact differential signal via structure |
-
2013
- 2013-07-30 CN CN201310323767.3A patent/CN104349572A/en active Pending
-
2014
- 2014-01-10 US US14/152,988 patent/US20150034376A1/en not_active Abandoned
- 2014-07-30 JP JP2014154821A patent/JP2015029100A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7705246B1 (en) * | 2007-12-28 | 2010-04-27 | Emc Corporation | Compact differential signal via structure |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105072804A (en) * | 2015-07-17 | 2015-11-18 | 小米科技有限责任公司 | Circuit board and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN104349572A (en) | 2015-02-11 |
JP2015029100A (en) | 2015-02-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: HONG FU JIN PRECISION INDUSTRY (SHENZHEN) CO., LTD Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WANG, TAO;REEL/FRAME:031945/0408 Effective date: 20140107 Owner name: HON HAI PRECISION INDUSTRY CO., LTD., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WANG, TAO;REEL/FRAME:031945/0408 Effective date: 20140107 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |