US20110095818A1 - Method and apparatus for accurately measuring currents using on chip sense resistors - Google Patents

Method and apparatus for accurately measuring currents using on chip sense resistors Download PDF

Info

Publication number
US20110095818A1
US20110095818A1 US12/760,174 US76017410A US2011095818A1 US 20110095818 A1 US20110095818 A1 US 20110095818A1 US 76017410 A US76017410 A US 76017410A US 2011095818 A1 US2011095818 A1 US 2011095818A1
Authority
US
United States
Prior art keywords
resistor
voltage
current
chip
linear
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US12/760,174
Other versions
US8717051B2 (en
Inventor
Patrick Sullivan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elevate Semiconductor Inc
Original Assignee
Intersil Americas LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intersil Americas LLC filed Critical Intersil Americas LLC
Priority to US12/760,174 priority Critical patent/US8717051B2/en
Assigned to INTERSIL AMERICAS INCORPORATED reassignment INTERSIL AMERICAS INCORPORATED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SULLIVAN, PATRICK
Assigned to INTERSIL AMERICAS INC. reassignment INTERSIL AMERICAS INC. CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 024232 FRAME 0274. ASSIGNOR(S) HEREBY CONFIRMS THE NAME OF THE ASSIGNEE. Assignors: SULLIVAN, PATRICK
Priority to TW099126224A priority patent/TW201122498A/en
Priority to KR1020100077224A priority patent/KR20110044134A/en
Priority to CN201010257289.7A priority patent/CN102043081B/en
Publication of US20110095818A1 publication Critical patent/US20110095818A1/en
Application granted granted Critical
Publication of US8717051B2 publication Critical patent/US8717051B2/en
Assigned to Intersil Americas LLC reassignment Intersil Americas LLC CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: INTERSIL AMERICAS INC.
Assigned to ELEVATE SEMICONDUCTOR, INC. reassignment ELEVATE SEMICONDUCTOR, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: Intersil Americas LLC
Assigned to CALIFORNIA MEZZANINE INVESTMENT FUND, L.P. reassignment CALIFORNIA MEZZANINE INVESTMENT FUND, L.P. SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ELEVATE SEMICONDUCTOR, INC.
Assigned to AVIDBANK reassignment AVIDBANK SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ELEVATE SEMICONDUCTOR, INC.
Assigned to ELEVATE SEMICONDUCTOR, INC. reassignment ELEVATE SEMICONDUCTOR, INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: AVIDBANK
Assigned to EAST WEST BANK reassignment EAST WEST BANK SECURITY INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ELEVATE SEMICONDUCTOR, INC.
Assigned to ELEVATE SEMICONDUCTOR, INC. reassignment ELEVATE SEMICONDUCTOR, INC. RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS). Assignors: CALIFORNIA MEZZANINE INVESTMENT FUND, L.P.
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/20Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0092Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/20Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
    • G01R1/203Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • H03F3/45071Differential amplifiers with semiconductor devices only
    • H03F3/45076Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/261Amplifier which being suitable for instrumentation applications
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/408Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising three power stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/411Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2200/00Indexing scheme relating to amplifiers
    • H03F2200/462Indexing scheme relating to amplifiers the current being sensed
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45528Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45594Indexing scheme relating to differential amplifiers the IC comprising one or more resistors, which are not biasing resistor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F2203/00Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45Indexing scheme relating to differential amplifiers
    • H03F2203/45701Indexing scheme relating to differential amplifiers the LC comprising one resistor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00Electricity: power supply or regulation systems
    • Y10S323/907Temperature compensation of semiconductor

Definitions

  • FIG. 1 illustrates high-level functional blocks for an example architecture according an embodiment of the present invention
  • FIG. 2 illustrates an exemplary methodology according to an embodiment of the present invention
  • FIG. 3 illustrates an example implementation of the Measure Block
  • FIG. 4 illustrates an example implementation of the Control Block
  • FIG. 5 illustrates an example implementation of the Measure Block coupled to the Compensation Block
  • FIG. 6 illustrates an alternate circuit implementation according to an embodiment of the present invention
  • FIG. 7 illustrates an example methodology for generating a control signal
  • FIG. 8 illustrates an example methodology for correcting a signal indicative of the sensed actual load current
  • FIG. 9 illustrates an example methodology for the Compensation Block
  • FIG. 10 illustrates an example system in which the embodiments of the present invention can be implemented.
  • the embodiments of the present invention relate to accurately measuring currents using on-chip sense resistors, and specifically to adaptively compensating for errors resulting from changes in the resistances of the on-chip sense resistors caused by process and temperature changes.
  • Applications for the embodiments of the present invention can include Precision Parametric Measurement Units (PPMU) of Automatic Test Equipment (ATE).
  • PPMU Precision Parametric Measurement Units
  • ATE Automatic Test Equipment
  • a PPMU is used during device testing to measure parameters such as voltages and currents at a device pin, and to regulate such parameters. The PPMU attempts to ensure that during testing, proper parameter values are applied to the Device Under Test (DUT).
  • DUT Device Under Test
  • a control circuit including a replica resistor causes a desired load current to flow through the replica resistor and generates a control signal indicative of the voltage drop across the replica resistor, which varies with changes in temperature and process conditions.
  • a current sense circuit including the on-chip sense resistor senses the actual load current and generates an output signal indicative of the sensed current.
  • the on-chip and replica resistors are made of the material having substantially the same properties and are located in close proximity to each other, such that any temperature and process variations would affect both resistors in substantially the same manner.
  • a compensation circuit is used to compensate for the effects of the process and temperature changes on the performance of the on-chip resistor over the entire full-scale load current range.
  • the compensation circuit uses a highly linear transconductance (gm) stage. The gain of the linear gm stage is adjusted by using the control signal. The output signal generated by the current sense circuit is provided as an input to the linear gm stage. The compensation circuit uses the control signal to more accurately reflect the measured current 1.
  • FIG. 1 illustrates functional blocks for an integrated circuit chip (IC), according to an embodiment of the present invention.
  • the IC 100 includes the Control Block 102 , the Measure Block 104 and the Compensation Block 106 .
  • the Control Block 102 receives two input signals: a signal indicative of the desired voltage (e.g., desired full-scale voltage) for the Measure Block 104 (VMI_fs) and a signal indicative of the desired current (e.g., desired full-scale current) for the Measure Block 104 (Iref).
  • the Control Block 102 generates the expected voltage (e.g., expected full-scale voltage) for the Measure Block 104 (VMI_ref) by causing the Iref current to flow through the replica resistor included in the Control Block 102 .
  • the Control Block 102 Based on the comparison between the VMI_fs and VMI_ref values, the Control Block 102 generates an output control signal (GM_CTRL) that is indicative of the value of the replica resistor. To generate these signals and perform the comparison, the Control Block 102 includes a precise current source, a linear transconductance (gm) amplifier with gain control, two operational amplifiers (Op-Amps) and a compensation resistor.
  • GM_CTRL output control signal
  • the Measure Block 104 includes at least one on chip sense resistor.
  • the Measure Block 104 receives the actual load current (ILOAD) from an output stage and senses the load current by using the on-chip sense resistor.
  • the Measure Block 104 generates an output signal (MI_output) that is indicative of the sensed current.
  • the Measure Block 104 includes multiple operational amplifiers (op-amps) to generate the MI_output signal, which is proportional to the current flowing through the on chip sense resistor.
  • the replica resistor is substantially similar to the on chip resistor.
  • the replica resistor can be laid out in the same (or substantially similar) material, in approximately the same location as the on chip resistor, with the same (or substantially similar) variation with sheet resistance in the process, and/or the same (or substantially similar) temperature coefficients.
  • substantially similar as used herein with respect to the replica resistor means similar enough (e.g., in value, material composition, etc.) to the on chip resistor to cause variation in resistance of the replica resistor that is the same as, proportional to, and/or a scaled version of the variation in resistance of the on chip resistor.
  • the term “substantially similar” can also mean differing in value by a known and/or specified offset value.
  • the replica resistor can be a scaled version of the on on-chip resistor of the measure block 104 and can be internal to the chip.
  • the term “approximately the same location” refers to any location near the on-chip resistor such that the on-chip and replica resistors experience the same or substantially the same environment and thus the same and/or substantially similar temperature/process changes.
  • On-chip resistors exhibit variations with a change in temperature and/or change in process, which lead to errors in current sensing.
  • the variations are linear or close to linear.
  • the value of ⁇ is not constant but can depend on the initial temperature on which the increment in resistance is based.
  • when the increment is based on the resistance measured at 0° C., then ⁇ can have a value of ⁇ 0 . At another initial temperature t° C., the value of ⁇ can be ⁇ t . Moreover, the temperature coefficient of resistance can be negative or positive.
  • the Compensation Block 106 receives the GM_CTRL and MI_output signals as inputs and uses the GM_CTRL signal to correct the error in the MI_output signal.
  • the error in the MI_output signal results from the variation of the resistance value of the sense resistor, which is caused by the variations in the sheet resistance and the temperature.
  • the Compensation Block 106 generates the corrected MI_output signal (MI_Correct) as output.
  • the Compensation Component 106 includes a disparate linear transconductance (gm) amplifier with gain control, an operational amplifier and a compensation resistor.
  • the gain of the linear gm amplifier can be set or adjusted by the control signal generated by Control Component 102 , which is based on a change in the sheet resistance and/or temperature of the replica resistor.
  • the Control Block 102 , the Measure Block 104 and/or the Compensation Block 106 can be integrated together on a common IC 100 or can be implemented in multiple ICs (not shown).
  • FIG. 2 illustrates example methodologies for Control, Measure and Compensation Blocks, according to an embodiment of the present invention.
  • the Control Block 102 receives two inputs: a signal indicative of the desired full-scale voltage value (VMI_fs) for the Measure Block 104 and a signal indicative of the desired full scale current (Iref) for the Measure Block 104 .
  • the expected voltage value across the sense resistor (VMI_ref) of the Measure Block 214 is determined by causing Iref to flow through the replica resistor included in the Control Block 102 .
  • the Control Block 102 generates an output control signal (GM_CTRL) based on the comparison between the VMI_fs and VMI_ref signals.
  • GM_CTRL output control signal
  • the Measure Block 104 measures the load current by using an on-chip sense resistor included in the Measure Block 104 .
  • the Measure Block 104 generates an output signal (MI_output) that is indicative of the sensed current.
  • the Compensation Block 106 receives the GM_CTRL and MI_output signals as inputs.
  • the Compensation Block 106 generates an output signal (MI_correct) based on the values of the GM_CTRL and MI_output signals.
  • FIG. 3 illustrates an example implementation of the Measure Block 104 .
  • the circuit 104 can measure the actual load current ILOAD by sensing the current in an output stage by using the on-chip resistor Rmeasure 306 .
  • the current sensed by Rmeasure 306 is referred to as the VMI_sense voltage.
  • the operational amplifiers (Op-Amps) 308 , 310 and 312 can be coupled with resistors 314 , 316 , 318 and 320 , as illustrated in FIG. 3 , to form an instrumentation amplifier circuit.
  • An instrumentation amplifier is a type of differential amplifier that has been outfitted with input buffers, which eliminate the need for input impedance matching and thus make the amplifier particularly suitable for use in measurement and test equipment.
  • the resistors 314 , 316 , 318 and 320 can have suitable resistance values or ratios depending on the application.
  • the resistors 314 , 316 , 318 and 320 can have values of R 1 or R 2 , wherein R 1 and R 2 can be any suitable values of resistance and/or have any suitable ratio (e.g., 1:2, 2:1, etc.).
  • the Op-Amps 308 , 310 and 312 can be set to provide maximum gain, and the gain of the instrumentation amplifier can be adjusted by changing the resistance values of the resistors 314 , 316 , 318 and 320 .
  • the circuit 104 generates an output voltage (VMI_output voltage) at node 322 that is proportional to the current through the resistor 306 , which equals ILOAD.
  • TC temperature coefficient
  • DeltaT means change in temperature
  • DeltaRSH means change in Sheet Rho.
  • the temperature and process variations can cause errors in the currents sensed by using Rmeasure 306 .
  • the Control Component 102 and the Compensation Component 106 are used to eliminate and/or minimize these errors. It is to be appreciated that the Measure Component 104 can be implemented using other current measurement circuits that do not include an instrumentation amplifier.
  • FIG. 4 illustrates an example implementation of the Control Block 102 .
  • the Control Block 102 facilitates the regulation of the process and temperature variations for an on chip sense resistor, according to an embodiment of the present invention.
  • the circuit 102 includes an ideal and/or precise current source (Iref) 408 , a replica measure resistor (Rreplica) 410 , a linear transconductance amplifier with gain control (Linear_gm_Amp 1 a ) 412 (also referred to herein as a linear gm amp, a transconductance amplifier, a gm amp, etc.), a first operational amplifier (Amp 1 a ) 414 , a second operational amplifier (Amp 2 ) 416 , and a compensation resistor (Rcomp) 418 .
  • Iref ideal and/or precise current source
  • Rreplica replica measure resistor
  • Linear_gm_Amp 1 a linear transconductance amplifier with gain control
  • Amp 1 a first operational amplifier
  • the Iref current 408 can be a scaled version of the full-scale current expected in the Measure Block 104 .
  • the Rreplica resistor 410 can be an on-chip resistor and can be a scaled version of the Rmeasure resistor 306 .
  • the circuit 102 can generate an output control signal referred to as GM_CTRL, wherein GM_CTRL can be utilized by the Compensation Block 106 to regulate variations, such as, but not limited to, process and/or temperature variations, for the sense resistor (Rmeasure) 306 .
  • the circuit 102 can leverage the two input signals, VMI_ref and VMI_fs, to generate the output control signal.
  • the VMI_fs input is the desired full-scale voltage of the load for the Measure Block 104 .
  • the VMI_ref input is the expected voltage across the sense resistor (Rmeasure) 306 at the desired full scale current.
  • VMI_fs and VMI_ref can include any suitable values in volts depending on the application.
  • the GM_CTRL output can control the gain of the linear gm stage (linear_gm_amp 1 a ) 412 and can also control the gain of a disparate linear gm stage 506 in the compensation component 106 .
  • the ideal/precise current source Iref 408 can be generated from an external resistor (e.g., one external resistor per chip).
  • the ideal/precise current source Iref 408 can be a temperature stable current source.
  • the resistor Rreplica 410 can be laid out in the same type of material as the sense resistor Rmeasure 306 and/or in approximately the same location as the sense resistor Rmeasure 306 . It can be appreciated that the that resistors 410 and 306 are laid out in most any material of the same type (e.g., metal, alloy, element, etc.), for example, having the same or substantially similar electrical, thermal and/or mechanical properties.
  • the resistor Rreplica 410 can have the same (or substantially similar) variation with sheet resistance in the process, and the same (or substantially similar) temperature coefficients as Rmeasure 306 .
  • the value of Iref 408 is known and can be constant; however, the resistance of Rreplica 410 can vary based on various factors, such as, but not limited to, temperature and/or sheet resistance. Accordingly, the VMI_op voltage can change with a change in the various factors.
  • VMI_op can be buffered to an operation amplifier Amp 1 a 414 .
  • the Op-Amp 414 can buffer the VMI_ref signal to the Op-Amp 416 .
  • Op-Amp 416 can compare the desired full-scale voltage (VMI_fs) with the expected full-scale voltage (VMI_ref). The differences in these voltages can occur due to the variation in resistance of Rreplica (e.g., with process and temperature). If VMI_ref is less than VMI_fs, the GM_CTRL signal is positive, thus increasing the gain of the linear gm stage 412 until VMI_op is equal to VMI_fs. If VMI_ref is greater than VMI_fs, the GM_CTRL signal is negative, thus decreasing the gain of the linear gm stage 412 until VMI_op is equal to VMI_fs.
  • the linear gm stage 412 can include negative gm as well as positive gm.
  • operational amplifiers 414 and 416 are used in the circuit 102 illustrated in FIG. 4 , other circuits, components, and/or devices can also be employed to compare and/or amplify the difference (e.g., in voltage) between VMI_ref and VMI_fs.
  • a measure current range is defined, wherein, +1 volt can be defined as corresponding to 1 ampere of current and ⁇ 1 volt can be defined as corresponding to ⁇ 1 ampere of current.
  • VMI_ref can be buffered and compared to VMI_fs by using the Op-Amp 416 . If the sheet resistance is low, the resistance of Rreplica 410 can be lower than an expected/ideal value, and accordingly the VMI_ref, which is designed to generate the same full-scale voltage of 1 volt, can actually be less than 1 volt (e.g., 0.8 volts).
  • the Amp 2 416 can compare VMI_ref with VMI_fs and drive the GM_CTRL signal high, thereby increasing the gm of the Linear_gm_Amp 1 a 412 .
  • the values of the output currents of IOUTN and IOUTP also increase.
  • IOUTP can be a sourcing current and IOUTN can be a sinking current or vice versa.
  • IOUTN and IOUTP can have the same value and be equal and opposite currents.
  • the input to the Linear_gm_Amp 1 a 412 would be 0.8 volts (from VMI_ref).
  • the voltage across the Rcomp resistor 418 would increase.
  • the voltage across the Rcomp resistor 418 is defined as IOUT ⁇ Rcomp, which can be equal to 0.2 volts, wherein IOUT can be the magnitude of IOUTN or IOUTP. Accordingly, an offset is provided as an input to the Op-Amp 414 , which can cause the output voltage of the Op-Amp 414 to increase.
  • the GM_CTRL can provide an offset to the input voltage of the Op-Amp 414 until the inputs to Op-Amp 416 are equal.
  • the value of GM_CTRL will not change.
  • the voltage across Rcomp 418 can change throughout the linear and rest of the full-scale current range.
  • the output current IOUTP can be 0 Amps.
  • the Linear_gm_Amp 1 a 412 can output enough current, IOUTP (or IOUTN), to make the voltage across Rcomp 418 equal to 0.2V, whereas at the VMI_ref value of ⁇ 0.8V, the Linear_gm_Amp 1 a 412 can output enough current, IOUTP (or IOUTN), to cause the voltage across Rcomp 418 to be equal to ⁇ 0.2V.
  • the VMI_ref value is set according to a predetermined value of Iref.
  • FIG. 5 illustrates an example implementation of the Compensation Block 106 coupled to the Measure Block 104 .
  • the Compensation Block 106 is used to modify the output voltage (MI_output) generated by the Measure Block 104 .
  • the output voltage (MI_output) is proportional to the current ILOAD flowing through the resistor Rmeasure 306 and the resistance of the resistor Rmeasure 306 .
  • the output voltage (MI_output) also changes.
  • the compensation circuit 106 can adjust (e.g., add/subtract to) the output voltage (MI_output) to negate the effect of resistance changes.
  • the compensation circuit 106 includes a linear transconductance amplifier with gain control (Linear_gm_Amp 1 ) 506 , an operational amplifier (Amp 1 ) 504 , and a compensation resistor (Rcomp) 508 .
  • the gain of the linear gm stage 506 is set by the GM_CTRL signal received from the Control Block 102 , based on the sheet resistance and temperature of the on chip replica resistor (Rreplica) 410 .
  • the Linear_gm_Amp 1 506 utilizes the GM_CTRL signal for controlling the gain.
  • a proportional current can be generated by the linear gm stage (Linear_gm_Amp 1 ) 506 , which can add/subtract a voltage to the MI_output to correct and/or compensate for variations, such as, but not limited to, sheet resistance and/or temperature changes at resistor Rmeasure 306 .
  • the gain of the linear_gm_Amp 1 506 can be controlled by the GM_CTRL signal in a manner such that the current out of the Linear_gm_Amp 1 506 can be enough to set the voltage across the Rcomp 508 equal to 0.2 volts. Accordingly, in this example, the Amp 1 504 can output a voltage MI_correct that can be equal to 1 volt. Thus, a full scale current ILOAD can provide a full-scale output voltage (MI_correct).
  • Vmi_ref + IOUTP ⁇ Rcomp Vmi_fs ;
  • Ioutp ( Vmi_fs - Vmi_ref ) Rcomp ;
  • Linear_gm_Amp 1 a 412 The gain of the linear amplifier, Linear_gm_Amp 1 a 412 is defined as follows:
  • Vmi_ref ( Vmi_fs - Vmi_ref ) ( Rcomp ⁇ Vmi_ref ) ;
  • VMI_correct VMI_correct
  • vmi_Correct Vmi_sense + Vmi_sense ⁇ ( Vmi_fs - Vmi_ref ) ( Rcomp ⁇ Vmi_ref ) ⁇ Rcomp ;
  • Vmi_Correct Vmi_sense + ( Vmi_sense ⁇ Vmi_fs ) Vmi_ref - ( Vmi_sense ⁇ Vmi_ref ) Vmi_ref
  • Vmi_Correct ( Vmi_sense ⁇ Vmi_fs ) Vmi_ref
  • Vmi_Correct [ Iload ⁇ Rmeasure ⁇ ( 1 + TC ⁇ TEMP ) ⁇ ( 1 + DELTARSH ) ⁇ Vmi_fs ] [ Iref ⁇ Rreplica ⁇ ( 1 + TC ⁇ TEMP ) ⁇ ( 1 + DELTARSH ) ]
  • the embodiments of the present invention use linear circuits including linear gm amplifiers in order to compensate for the temperature and/or process variations. It is to be appreciated that the linear gm amplifiers described herein (e.g., Linear_gm_Amp 1 a 412 , Linear_gm_Amp 1 506 , etc.) are very linear.
  • the output current will be proportional to the gain across the range from the negative end (e.g., ⁇ 0.8 V) to the positive end (e.g., 0.8 V), and the output current changes linearly with the input voltage.
  • Rmeasure 306 is very linear regardless of changes from process variation and/or temperature variation and thus linear gm amplifiers that are highly linear are used in the embodiments of the present invention. Because the overall measurement of the current is the sum of the Rmeasure 306 ⁇ ILOAD and Rcomp ⁇ the IOUT of the Linear_gm_Amp 412 , the overall linearity will depend on the sum of the linearity errors of these two components.
  • FIG. 6 illustrates an example system 600 that facilitates linearly calibrating an on chip resistor affected by a process variation and/or a temperature variation, according to an embodiment of the present invention.
  • the system 600 includes a circuit arrangement that is very similar to the Measure Block 104 including the on chip resistor Rmeasure 306 .
  • the system 600 also includes a compensation circuit 602 that provides a fast approach to compensate for the error included in the sensed current measured across the resistor Rmeasure 306 .
  • the compensation circuit 602 uses a single linear gm amplifier (Linear_gm_Amp 1 ) 604 and thus reduces the components used for compensation compared to the Compensation Block 106 , and thus reduces the speed of the process of generating a corrected output voltage MI_correct.
  • Linear_gm_Amp 1 linear gm amplifier
  • the compensation circuit 602 includes a linear gm stage 604 .
  • the linear gm amplifier 604 is coupled to the Rmeasure resistor 306 .
  • the compensation circuit 602 measures the voltage directly across the Rmeasure resistor 306 with the Linear_gm_Amp 1 604 (e.g., measuring voltage at VMI_sense and FV). Based on factors such as, but not limited to, process and/or temperature variation, the voltage across Rmeasure resistor 306 can vary and cause an error in the output voltage measurement.
  • the GM_CTRL signal (e.g., generated by Control Block 102 ) is used to control the gain of the Linear_gm_Amp 1 604 .
  • the compensation resistor Rcomp 606 is incorporated into the amplifier's (IAmp 2 ) 310 feedback path and the linear gm currents IOUTN, IOUTP flow through the resistor Rcomp.
  • An offset voltage is provided by the Linear_gm_Amp 1 604 by causing its output current to flow through the resistor Rcomp 606 .
  • the linear gm stage 604 can provide voltage offsets for both positive and negative gms.
  • FIGS. 7-9 illustrate methodologies and/or flow diagrams in accordance with embodiments of the present invention.
  • the methodologies are depicted and described as series of acts/steps. It is to be understood and appreciated that the embodiments of the present invention are not limited by the acts/steps illustrated and/or by the order of acts/steps. For example, acts/steps can occur in various orders and/or concurrently, and with other acts not presented and described herein. Furthermore, not all illustrated acts may be required to implement the methodologies in accordance with the disclosed subject matter. Additionally, it should be further appreciated that the methodologies disclosed hereinafter and throughout this specification are capable of being implemented on an article of manufacture to facilitate transporting and transferring such methodologies.
  • FIG. 7 illustrates is an example methodology for generating a control signal that facilitates regulating process and temperature variations for an on chip resistor, according to an embodiment of the present invention.
  • the Control Block 102 generates the VMI_ref voltage across the Rreplica 410 replica resistor by causing an ideal full-scale current Iref 408 to pass through Rreplica 410 .
  • VMI_ref is thus proportional to the resistance of the Rreplica resistor, which can vary with changes in temperature.
  • the Vcomp voltage across the Rcomp compensation resistor 418 of the Control Block 102 is initially zero, which means that no current initially flows through the Rcomp resistor 418 .
  • the Op-Amp 414 of the Control Block 102 compares the VMI_ref and Vcomp values and generates the output voltage (V_op).
  • the Op-Amp 416 of the Control Block 102 compares V_op with VMI_fs.
  • VMI_fs is the desired full-scale voltage of the circuit that measures current through the on chip sense resistor, i.e. the Measure Block 104 .
  • the GM_CTRL signal is generated based on the difference between the VMI_fs and VMI_op values.
  • the GM_CTRL signal is used to control the gain of the linear gm amplifier (with gain) 506 in the Compensation Block 106 .
  • the Compensation Block 106 uses the GM_CTRL signal to provide an offset voltage that can negate the effects of temperature/process variations on the on chip resistor.
  • the GM_CTRL signal is used to control the gain of a disparate linear gm amplifier (with gain) 412 included in the Control Block 102 .
  • the amplifier 412 receives VMI_ref as an input.
  • the disparate linear gm amplifier 412 generates current, which includes an offset based in part on the value of the GM_CTRL signal.
  • the Vcomp voltage is determined based on the output current flowing thought the Rcomp resistor 418 . Steps 706 - 712 are then repeated until V_op and VMI_fs values become equal.
  • FIG. 8 illustrates an example methodology that regulates process and/or temperature variations for an on chip resistor, according to an embodiment of the present invention.
  • a control signal is generated by causing a desired full-scale load current to flow through a replica resistor.
  • an output signal is generated by causing an actual full-scale load current to flow through an on-chip sense resistor.
  • the replica resistor can be the same or substantially similar to the on chip resistor in terms of material, sheet resistance, temperature coefficients and the like. Further, the replica resistor can be located in approximately the same location and/or in close proximity with as the on chip resistor.
  • the current flowing through the replica resistor can be generated by using a constant, ideal (or almost ideal) and/or precise current source.
  • the control signal is used to control a gain of a second linear gm amplifier, which receives output signal as an input.
  • a voltage proportional to the output current of the second linear gm amplifier is added to the output signal to compensate for the errors caused by changes in resistance (e.g., due to temperature and/or process variations) of the on-chip resistor.
  • FIG. 9 illustrates is an example methodology that linearly calibrates an on chip resistor affected by a process variation and/or a temperature variation, according to an embodiment of the present invention.
  • a control signal generated by causing a desired full-scale load current to flow through a replica resistor is received.
  • the control signal is utilized to control the gain of a disparate linear gm amplifier, which receives as an input the voltage across the on chip sense resistor.
  • the on chip sense resistor senses the actual load current.
  • the replica resistor is substantially similar and located in close proximity to an on chip resistor.
  • the current output of the linear gm amplifier is applied to the compensation resistor Rcomp.
  • Rcomp can be included in a feedback loop to provide a correction for error caused by variations in the resistance value of the on chip resistor.
  • the Rcomp resistor can be added in the feedback path of an Op-Amp of the current sensing circuit that measures actual load current by using the chip resistor.
  • the current sensing circuit can comprise an instrumentation amplifier circuit that includes the Op-Amp.
  • the output current from the disparate linear gm amplifier can flow through the Rcomp to provide a compensation voltage across the Rcomp.
  • the linear gm amplifier can produce positive and/or negative gm.
  • the applied gain can provide a corrected output voltage at the output of the current sense circuit (e.g., instrumentation amplifier), which is proportional to the full range of current that is flowing through the on chip resistor.
  • the resistors can be of any suitable resistance
  • amplifiers can provide any suitable gain
  • current sources can provide any suitable amperage, etc.
  • the resistors Rmeasure, Rreplica, R 1 , R 2 , Rcomp, and the like can be of any suitable value and/or have any particular ratios between one another.
  • the amplifiers e.g., Amp 1 , Amp 2 , Amp 1 a , IAmp 1 , IAmp 2 , IAmp 3 , Linear_gm_amp 1 a , Linear_gm_amp 1 , etc.
  • FIG. 10 illustrates an example system in which the embodiments of the present invention can be implemented.
  • the system 1000 includes Automatic Test Equipment 1020 having a Precision Parametric Measurement Unit (PPMU) 1030 .
  • the PPMU 1030 includes the IC 100 , which includes the Control, Measure and Compensate Blocks 102 , 104 and 106 , according to an embodiment of the present invention.
  • the Target IC 1050 is situated on the circuit board 1040 and is coupled to the IC 100 . Specifically, the Target IC 1050 is tested by the ATE 1020 .
  • the Target IC 1050 provides the load current ILOAD to the Measure Block 104 and specifically to the Rmeasure resistor 306 located in the Measure Block 104 .
  • the Rmeasure resistor 306 is used for sensing the ILOAD current.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Amplifiers (AREA)

Abstract

Systems and methods for managing process and temperature variations for on-chip sense resistors are disclosed. The system includes a circuit that can leverage a linear gm circuit in order to provide linear gains (positive gains and/or negative gains). The linearity of the circuit enables compensation for temperature and process variations across an entire range of current (positive to negative). A control signal is generated by using a linear gm amplifier and a replica resistor, which is substantially similar to the on chip resistor. The control signal is used to control the gain of a disparate linear gm amplifier within a compensation circuit, which provides an offset voltage to compensate for the variation in resistance of the on chip resistor.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This application claims the benefit of U.S. Provisional Patent Application Ser. No. 61,253,904, filed on Oct. 22, 2009 (Attorney docket number SE-2722-AN/INTEP101US), and entitled “METHOD AND APPARATUS FOR ACCURATELY MEASURING CURRENTS USING ON CHIP SENSE RESISTORS”, which is incorporated herein by reference in its entirety.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 illustrates high-level functional blocks for an example architecture according an embodiment of the present invention;
  • FIG. 2 illustrates an exemplary methodology according to an embodiment of the present invention;
  • FIG. 3 illustrates an example implementation of the Measure Block;
  • FIG. 4 illustrates an example implementation of the Control Block;
  • FIG. 5 illustrates an example implementation of the Measure Block coupled to the Compensation Block;
  • FIG. 6 illustrates an alternate circuit implementation according to an embodiment of the present invention;
  • FIG. 7 illustrates an example methodology for generating a control signal;
  • FIG. 8 illustrates an example methodology for correcting a signal indicative of the sensed actual load current;
  • FIG. 9 illustrates an example methodology for the Compensation Block; and
  • FIG. 10 illustrates an example system in which the embodiments of the present invention can be implemented.
  • DETAILED DESCRIPTION
  • The embodiments of the present invention relate to accurately measuring currents using on-chip sense resistors, and specifically to adaptively compensating for errors resulting from changes in the resistances of the on-chip sense resistors caused by process and temperature changes. Applications for the embodiments of the present invention can include Precision Parametric Measurement Units (PPMU) of Automatic Test Equipment (ATE). A PPMU is used during device testing to measure parameters such as voltages and currents at a device pin, and to regulate such parameters. The PPMU attempts to ensure that during testing, proper parameter values are applied to the Device Under Test (DUT).
  • According to an embodiment of the present invention, a control circuit including a replica resistor is provided. The control circuit causes a desired load current to flow through the replica resistor and generates a control signal indicative of the voltage drop across the replica resistor, which varies with changes in temperature and process conditions. A current sense circuit including the on-chip sense resistor senses the actual load current and generates an output signal indicative of the sensed current. The on-chip and replica resistors are made of the material having substantially the same properties and are located in close proximity to each other, such that any temperature and process variations would affect both resistors in substantially the same manner.
  • A compensation circuit is used to compensate for the effects of the process and temperature changes on the performance of the on-chip resistor over the entire full-scale load current range. The compensation circuit uses a highly linear transconductance (gm) stage. The gain of the linear gm stage is adjusted by using the control signal. The output signal generated by the current sense circuit is provided as an input to the linear gm stage. The compensation circuit uses the control signal to more accurately reflect the measured current 1.
  • The claimed subject matter is described with references to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details and examples are set forth in order to provide a thorough understanding of the embodiments of the present invention. However, the embodiments of the present invention can be practiced without these specific details and are not limited by these specific details and examples. In addition, well-known structures and devices are shown in block diagram form in order to facilitate describing the claimed subject matter. Moreover, the word “exemplary” is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects or designs. Rather, use of the word “exemplary” is intended to present concepts in a concrete fashion. Also, the word “coupled” is used herein to mean direct or indirect electrical or mechanical coupling.
  • FIG. 1 illustrates functional blocks for an integrated circuit chip (IC), according to an embodiment of the present invention. The IC 100 includes the Control Block 102, the Measure Block 104 and the Compensation Block 106. The Control Block 102 receives two input signals: a signal indicative of the desired voltage (e.g., desired full-scale voltage) for the Measure Block 104 (VMI_fs) and a signal indicative of the desired current (e.g., desired full-scale current) for the Measure Block 104 (Iref). The Control Block 102 generates the expected voltage (e.g., expected full-scale voltage) for the Measure Block 104 (VMI_ref) by causing the Iref current to flow through the replica resistor included in the Control Block 102. Based on the comparison between the VMI_fs and VMI_ref values, the Control Block 102 generates an output control signal (GM_CTRL) that is indicative of the value of the replica resistor. To generate these signals and perform the comparison, the Control Block 102 includes a precise current source, a linear transconductance (gm) amplifier with gain control, two operational amplifiers (Op-Amps) and a compensation resistor.
  • The Measure Block 104 includes at least one on chip sense resistor. The Measure Block 104 receives the actual load current (ILOAD) from an output stage and senses the load current by using the on-chip sense resistor. The Measure Block 104 generates an output signal (MI_output) that is indicative of the sensed current. The Measure Block 104 includes multiple operational amplifiers (op-amps) to generate the MI_output signal, which is proportional to the current flowing through the on chip sense resistor.
  • The replica resistor is substantially similar to the on chip resistor. The replica resistor can be laid out in the same (or substantially similar) material, in approximately the same location as the on chip resistor, with the same (or substantially similar) variation with sheet resistance in the process, and/or the same (or substantially similar) temperature coefficients. The term “substantially similar” as used herein with respect to the replica resistor means similar enough (e.g., in value, material composition, etc.) to the on chip resistor to cause variation in resistance of the replica resistor that is the same as, proportional to, and/or a scaled version of the variation in resistance of the on chip resistor.
  • Additionally or alternately, the term “substantially similar” can also mean differing in value by a known and/or specified offset value. The replica resistor can be a scaled version of the on on-chip resistor of the measure block 104 and can be internal to the chip. Furthermore, the term “approximately the same location” refers to any location near the on-chip resistor such that the on-chip and replica resistors experience the same or substantially the same environment and thus the same and/or substantially similar temperature/process changes.
  • On-chip resistors exhibit variations with a change in temperature and/or change in process, which lead to errors in current sensing. The variations are linear or close to linear. The temperature coefficient of resistance, a, can be expressed in parts per million (PPM)/degrees Celsius, and is defined by the following equation: RT2=RTi×[1+α(T2−Ti)]; where Ti can be the initial temperature, T2 can be the final temperature, RTi can be the initial resistance, RT2 can be the resistance at temperature T2, and a can be the temperature coefficient. The value of α is not constant but can depend on the initial temperature on which the increment in resistance is based. For example, when the increment is based on the resistance measured at 0° C., then α can have a value of α0. At another initial temperature t° C., the value of α can be αt. Moreover, the temperature coefficient of resistance can be negative or positive.
  • The Compensation Block 106 receives the GM_CTRL and MI_output signals as inputs and uses the GM_CTRL signal to correct the error in the MI_output signal. The error in the MI_output signal results from the variation of the resistance value of the sense resistor, which is caused by the variations in the sheet resistance and the temperature. The Compensation Block 106 generates the corrected MI_output signal (MI_Correct) as output. The Compensation Component 106 includes a disparate linear transconductance (gm) amplifier with gain control, an operational amplifier and a compensation resistor. The gain of the linear gm amplifier can be set or adjusted by the control signal generated by Control Component 102, which is based on a change in the sheet resistance and/or temperature of the replica resistor. The Control Block 102, the Measure Block 104 and/or the Compensation Block 106 can be integrated together on a common IC 100 or can be implemented in multiple ICs (not shown).
  • FIG. 2 illustrates example methodologies for Control, Measure and Compensation Blocks, according to an embodiment of the present invention. According to the flow diagram 200, at step 212, the Control Block 102 receives two inputs: a signal indicative of the desired full-scale voltage value (VMI_fs) for the Measure Block 104 and a signal indicative of the desired full scale current (Iref) for the Measure Block 104. At Step 214, the expected voltage value across the sense resistor (VMI_ref) of the Measure Block 214 is determined by causing Iref to flow through the replica resistor included in the Control Block 102. At Step 216, the Control Block 102 generates an output control signal (GM_CTRL) based on the comparison between the VMI_fs and VMI_ref signals.
  • At Step 222, the Measure Block 104 measures the load current by using an on-chip sense resistor included in the Measure Block 104. At Step 224, the Measure Block 104 generates an output signal (MI_output) that is indicative of the sensed current.
  • At Step 232, the Compensation Block 106 receives the GM_CTRL and MI_output signals as inputs. At Step 234, the Compensation Block 106 generates an output signal (MI_correct) based on the values of the GM_CTRL and MI_output signals.
  • FIG. 3 illustrates an example implementation of the Measure Block 104. The circuit 104 can measure the actual load current ILOAD by sensing the current in an output stage by using the on-chip resistor Rmeasure 306. The current sensed by Rmeasure 306 is referred to as the VMI_sense voltage. The operational amplifiers (Op-Amps) 308, 310 and 312 can be coupled with resistors 314, 316, 318 and 320, as illustrated in FIG. 3, to form an instrumentation amplifier circuit. An instrumentation amplifier is a type of differential amplifier that has been outfitted with input buffers, which eliminate the need for input impedance matching and thus make the amplifier particularly suitable for use in measurement and test equipment.
  • The resistors 314, 316, 318 and 320 can have suitable resistance values or ratios depending on the application. For example, as illustrated in FIG. 3, the resistors 314, 316, 318 and 320 can have values of R1 or R2, wherein R1 and R2 can be any suitable values of resistance and/or have any suitable ratio (e.g., 1:2, 2:1, etc.). The Op- Amps 308, 310 and 312 can be set to provide maximum gain, and the gain of the instrumentation amplifier can be adjusted by changing the resistance values of the resistors 314, 316, 318 and 320.
  • The circuit 104 generates an output voltage (VMI_output voltage) at node 322 that is proportional to the current through the resistor 306, which equals ILOAD. The VMI_output voltage can be calculated as follows: VMI_output=Iload×Rmeasure×(R2/R1)×(1+TC×DeltaT)×(1+DeltaRSH), where TC means temperature coefficient, DeltaT means change in temperature, and DeltaRSH means change in Sheet Rho. The temperature and process variations can cause errors in the currents sensed by using Rmeasure 306. According to an embodiment of the present invention, the Control Component 102 and the Compensation Component 106 are used to eliminate and/or minimize these errors. It is to be appreciated that the Measure Component 104 can be implemented using other current measurement circuits that do not include an instrumentation amplifier.
  • FIG. 4 illustrates an example implementation of the Control Block 102. The Control Block 102 facilitates the regulation of the process and temperature variations for an on chip sense resistor, according to an embodiment of the present invention. The circuit 102 includes an ideal and/or precise current source (Iref) 408, a replica measure resistor (Rreplica) 410, a linear transconductance amplifier with gain control (Linear_gm_Amp1 a) 412 (also referred to herein as a linear gm amp, a transconductance amplifier, a gm amp, etc.), a first operational amplifier (Amp1 a) 414, a second operational amplifier (Amp2) 416, and a compensation resistor (Rcomp) 418.
  • The Iref current 408 can be a scaled version of the full-scale current expected in the Measure Block 104. The Rreplica resistor 410 can be an on-chip resistor and can be a scaled version of the Rmeasure resistor 306. The circuit 102 can generate an output control signal referred to as GM_CTRL, wherein GM_CTRL can be utilized by the Compensation Block 106 to regulate variations, such as, but not limited to, process and/or temperature variations, for the sense resistor (Rmeasure) 306. The circuit 102 can leverage the two input signals, VMI_ref and VMI_fs, to generate the output control signal. The VMI_fs input is the desired full-scale voltage of the load for the Measure Block 104. The VMI_ref input is the expected voltage across the sense resistor (Rmeasure) 306 at the desired full scale current. VMI_fs and VMI_ref can include any suitable values in volts depending on the application. The GM_CTRL output can control the gain of the linear gm stage (linear_gm_amp1 a) 412 and can also control the gain of a disparate linear gm stage 506 in the compensation component 106.
  • According to an embodiment of the present invention, the ideal/precise current source Iref 408 can be generated from an external resistor (e.g., one external resistor per chip). The ideal/precise current source Iref 408 can be a temperature stable current source. The resistor Rreplica 410 can be laid out in the same type of material as the sense resistor Rmeasure 306 and/or in approximately the same location as the sense resistor Rmeasure 306. It can be appreciated that the that resistors 410 and 306 are laid out in most any material of the same type (e.g., metal, alloy, element, etc.), for example, having the same or substantially similar electrical, thermal and/or mechanical properties. The resistor Rreplica 410 can have the same (or substantially similar) variation with sheet resistance in the process, and the same (or substantially similar) temperature coefficients as Rmeasure 306.
  • According to an embodiment of the present invention, the voltage at VMI_Ref can be a voltage that is proportional to the resistor Rreplica 410 (e.g., by employing Ohms Law, V=I×R). The value of Iref 408 is known and can be constant; however, the resistance of Rreplica 410 can vary based on various factors, such as, but not limited to, temperature and/or sheet resistance. Accordingly, the VMI_op voltage can change with a change in the various factors. VMI_op can be buffered to an operation amplifier Amp1 a 414. Initially, when the gain of the linear gm stage 412 is zero (e.g., Linear_gm_Amp1 a 412 is open), the Op-Amp 414 can buffer the VMI_ref signal to the Op-Amp 416.
  • Furthermore, Op-Amp 416 can compare the desired full-scale voltage (VMI_fs) with the expected full-scale voltage (VMI_ref). The differences in these voltages can occur due to the variation in resistance of Rreplica (e.g., with process and temperature). If VMI_ref is less than VMI_fs, the GM_CTRL signal is positive, thus increasing the gain of the linear gm stage 412 until VMI_op is equal to VMI_fs. If VMI_ref is greater than VMI_fs, the GM_CTRL signal is negative, thus decreasing the gain of the linear gm stage 412 until VMI_op is equal to VMI_fs. The linear gm stage 412 can include negative gm as well as positive gm. Furthermore, although operational amplifiers 414 and 416 are used in the circuit 102 illustrated in FIG. 4, other circuits, components, and/or devices can also be employed to compare and/or amplify the difference (e.g., in voltage) between VMI_ref and VMI_fs.
  • To illustrate the operation of the Control Block 102 by way of an example, a measure current range is defined, wherein, +1 volt can be defined as corresponding to 1 ampere of current and −1 volt can be defined as corresponding to −1 ampere of current. When the Linear_gm_Amp1 a 412 is open, VMI_ref can be buffered and compared to VMI_fs by using the Op-Amp 416. If the sheet resistance is low, the resistance of Rreplica 410 can be lower than an expected/ideal value, and accordingly the VMI_ref, which is designed to generate the same full-scale voltage of 1 volt, can actually be less than 1 volt (e.g., 0.8 volts). In that case, the Amp2 416 can compare VMI_ref with VMI_fs and drive the GM_CTRL signal high, thereby increasing the gm of the Linear_gm_Amp1 a 412. As the value of the GM_CTRL voltage increases, the values of the output currents of IOUTN and IOUTP also increase. IOUTP can be a sourcing current and IOUTN can be a sinking current or vice versa. IOUTN and IOUTP can have the same value and be equal and opposite currents.
  • In this example, the input to the Linear_gm_Amp1 a 412 would be 0.8 volts (from VMI_ref). When the gm of the Linear_gm_Amp1 a 412 starts rising (e.g., due to an increase in the value of GM_CTRL), the voltage across the Rcomp resistor 418 would increase. The voltage across the Rcomp resistor 418 is defined as IOUT×Rcomp, which can be equal to 0.2 volts, wherein IOUT can be the magnitude of IOUTN or IOUTP. Accordingly, an offset is provided as an input to the Op-Amp 414, which can cause the output voltage of the Op-Amp 414 to increase. In this example, the output voltage of the Op-Amp 414 can be equal to the 0.8 volts+0.2 volts=1 volt. In this manner, the GM_CTRL can provide an offset to the input voltage of the Op-Amp 414 until the inputs to Op-Amp 416 are equal. When the inputs to the Op-Amp 416 are equal, the value of GM_CTRL will not change.
  • Although the above example describes a scenario wherein resistance of Rreplica 410 becomes lower than an ideal value due to temperature variation, a scenario wherein resistance of Rreplica 410 becomes higher than an ideal value is also possible. In that case, the value of GM_CTRL would be negative, which would result in a negative input voltage being provided to the Op-Amp 414. Accordingly, the output voltage of Op-Amp 414 would be adjusted such that the inputs to Op-Amp 416, specifically, the output voltage of Op-Amp 414 and VMI_fs, become equal.
  • The voltage across Rcomp 418, i.e. IOUT×Rcomp, can change throughout the linear and rest of the full-scale current range. For example, at the VMI_ref value of 0V, the output current IOUTP can be 0 Amps. At the VMI_ref value of 0.8V, the Linear_gm_Amp1 a 412 can output enough current, IOUTP (or IOUTN), to make the voltage across Rcomp 418 equal to 0.2V, whereas at the VMI_ref value of −0.8V, the Linear_gm_Amp1 a 412 can output enough current, IOUTP (or IOUTN), to cause the voltage across Rcomp 418 to be equal to −0.2V. According to an embodiment of the present invention, the VMI_ref value is set according to a predetermined value of Iref.
  • FIG. 5 illustrates an example implementation of the Compensation Block 106 coupled to the Measure Block 104. The Compensation Block 106 is used to modify the output voltage (MI_output) generated by the Measure Block 104. Moreover, the output voltage (MI_output) is proportional to the current ILOAD flowing through the resistor Rmeasure 306 and the resistance of the resistor Rmeasure 306. As the value of the resistance of Rmeasure 306 changes, for example, with variations in temperature, processes, etc., the output voltage (MI_output) also changes. The compensation circuit 106 can adjust (e.g., add/subtract to) the output voltage (MI_output) to negate the effect of resistance changes.
  • The compensation circuit 106 includes a linear transconductance amplifier with gain control (Linear_gm_Amp1) 506, an operational amplifier (Amp1) 504, and a compensation resistor (Rcomp) 508. The gain of the linear gm stage 506 is set by the GM_CTRL signal received from the Control Block 102, based on the sheet resistance and temperature of the on chip replica resistor (Rreplica) 410. The Linear_gm_Amp1 506 utilizes the GM_CTRL signal for controlling the gain. As current is sensed across the sense resistor (Rmeasure) 306, a proportional current can be generated by the linear gm stage (Linear_gm_Amp1) 506, which can add/subtract a voltage to the MI_output to correct and/or compensate for variations, such as, but not limited to, sheet resistance and/or temperature changes at resistor Rmeasure 306.
  • MI_output can be scaled such than it can become equal to ILOAD×Rmeasure (using Ohms Law). For example, at full scale (wherein ILOAD is equal to a full scale that is expected), the MI_output can be at 0.8 volts (e.g., due to the variations at resistor Rmeasure 306). Moreover, the input of the Linear_gm_Amp1 506 can be 0.8 volts and the current out of the Linear_gm_Amp1 506 can be enough to make the voltage across the Rcomp 508 (V=I×Rcomp) to equal 0.2 volts. Moreover, the gain of the linear_gm_Amp1 506 can be controlled by the GM_CTRL signal in a manner such that the current out of the Linear_gm_Amp1 506 can be enough to set the voltage across the Rcomp 508 equal to 0.2 volts. Accordingly, in this example, the Amp1 504 can output a voltage MI_correct that can be equal to 1 volt. Thus, a full scale current ILOAD can provide a full-scale output voltage (MI_correct).
  • The following equations illustrate theories supporting the embodiments of the present invention. In the below analysis, for the purposes of illustration only, it is assumed that the amplifiers are ideal and the resistors are of like material, and match in absolute value and temperature coefficient. It is also assumed that R2=R1 and therefore the gain of the instrumentation amplifier in circuit 104 is equal to 1. It is also assumed the linear gm stage (e.g., 506) can be ideally linear. These assumptions are valid and proven below, and the circuits 102 and 106 rely upon them to attempt to cancel first order temperature coefficients and/or sheet resistance variations for the sense resistor 306. These assumptions are not limiting on the embodiments of the present invention, values, etc.
  • Referring to FIG. 4, with respect to the Control Block 102, if the inputs to the Op-Amp 416 are equal, then:
  • Vmi_ref + IOUTP × Rcomp = Vmi_fs ;
  • from the circuit
  • Ioutp = ( Vmi_fs - Vmi_ref ) Rcomp ;
  • solving for IOUTP.
  • The gain of the linear amplifier, Linear_gm_Amp1 a 412 is defined as follows:
  • Gm = IOUTP Vmi_ref = ( Vmi_fs - Vmi_ref ) ( Rcomp × Vmi_ref ) ;
  • Theory and substitution
    Referring to FIG. 5, with respect to the Measure Block 104 and the Compensate Block 106, the following equations define VMI_correct:

  • Vmi_Correct==Vmi_sense+(Vmi_sense×Gm×Rcomp); from circuit
  • vmi_Correct = Vmi_sense + Vmi_sense × ( Vmi_fs - Vmi_ref ) ( Rcomp × Vmi_ref ) × Rcomp ;
  • substitution
    Cancellation and factoring gives:
  • Vmi_Correct = Vmi_sense + ( Vmi_sense × Vmi_fs ) Vmi_ref - ( Vmi_sense × Vmi_ref ) Vmi_ref
  • This can be reduced to the following:
  • Vmi_Correct = ( Vmi_sense × Vmi_fs ) Vmi_ref
  • Expressing the above into terms of temperature and Delta sheet rho (DELTARSH), the result is the following:
  • Vmi_Correct = [ Iload × Rmeasure × ( 1 + TC × TEMP ) × ( 1 + DELTARSH ) × Vmi_fs ] [ Iref × Rreplica × ( 1 + TC × TEMP ) × ( 1 + DELTARSH ) ]
  • Taking the Derivative with respect to Temperature or RSH will give zero. Hence, the above equation proves that there is no change in output voltage (e.g., MI_correct) with a change in temperature and/or sheet rho.
  • The embodiments of the present invention use linear circuits including linear gm amplifiers in order to compensate for the temperature and/or process variations. It is to be appreciated that the linear gm amplifiers described herein (e.g., Linear_gm_Amp1 a 412, Linear_gm_Amp1 506, etc.) are very linear. The linear gm amplifiers can be defined by the equation IOUT=gm×VIN, wherein, IOUT is the output current of the linear gm amplifier, VIN is the voltage at the input of the linear gm amplifier and gm is the gain of the linear gm amplifier. Based on the linear gm amplifiers being linear, the output current will be proportional to the gain across the range from the negative end (e.g., −0.8 V) to the positive end (e.g., 0.8 V), and the output current changes linearly with the input voltage. Moreover, Rmeasure 306 is very linear regardless of changes from process variation and/or temperature variation and thus linear gm amplifiers that are highly linear are used in the embodiments of the present invention. Because the overall measurement of the current is the sum of the Rmeasure 306×ILOAD and Rcomp×the IOUT of the Linear_gm_Amp 412, the overall linearity will depend on the sum of the linearity errors of these two components.
  • FIG. 6 illustrates an example system 600 that facilitates linearly calibrating an on chip resistor affected by a process variation and/or a temperature variation, according to an embodiment of the present invention. The system 600 includes a circuit arrangement that is very similar to the Measure Block 104 including the on chip resistor Rmeasure 306. The system 600 also includes a compensation circuit 602 that provides a fast approach to compensate for the error included in the sensed current measured across the resistor Rmeasure 306. In particular, the compensation circuit 602 uses a single linear gm amplifier (Linear_gm_Amp1) 604 and thus reduces the components used for compensation compared to the Compensation Block 106, and thus reduces the speed of the process of generating a corrected output voltage MI_correct.
  • The compensation circuit 602 includes a linear gm stage 604. The linear gm amplifier 604 is coupled to the Rmeasure resistor 306. The compensation circuit 602 measures the voltage directly across the Rmeasure resistor 306 with the Linear_gm_Amp1 604 (e.g., measuring voltage at VMI_sense and FV). Based on factors such as, but not limited to, process and/or temperature variation, the voltage across Rmeasure resistor 306 can vary and cause an error in the output voltage measurement. The GM_CTRL signal (e.g., generated by Control Block 102) is used to control the gain of the Linear_gm_Amp1 604. The compensation resistor Rcomp 606 is incorporated into the amplifier's (IAmp2) 310 feedback path and the linear gm currents IOUTN, IOUTP flow through the resistor Rcomp. An offset voltage is provided by the Linear_gm_Amp1 604 by causing its output current to flow through the resistor Rcomp 606. The linear gm stage 604 can provide voltage offsets for both positive and negative gms.
  • FIGS. 7-9 illustrate methodologies and/or flow diagrams in accordance with embodiments of the present invention. For simplicity of explanation, the methodologies are depicted and described as series of acts/steps. It is to be understood and appreciated that the embodiments of the present invention are not limited by the acts/steps illustrated and/or by the order of acts/steps. For example, acts/steps can occur in various orders and/or concurrently, and with other acts not presented and described herein. Furthermore, not all illustrated acts may be required to implement the methodologies in accordance with the disclosed subject matter. Additionally, it should be further appreciated that the methodologies disclosed hereinafter and throughout this specification are capable of being implemented on an article of manufacture to facilitate transporting and transferring such methodologies.
  • FIG. 7 illustrates is an example methodology for generating a control signal that facilitates regulating process and temperature variations for an on chip resistor, according to an embodiment of the present invention. According to the flow diagram 700, at Step 702, The Control Block 102 generates the VMI_ref voltage across the Rreplica 410 replica resistor by causing an ideal full-scale current Iref 408 to pass through Rreplica 410. VMI_ref is thus proportional to the resistance of the Rreplica resistor, which can vary with changes in temperature. At Step 704, the Vcomp voltage across the Rcomp compensation resistor 418 of the Control Block 102 is initially zero, which means that no current initially flows through the Rcomp resistor 418.
  • At Step 706, the Op-Amp 414 of the Control Block 102 compares the VMI_ref and Vcomp values and generates the output voltage (V_op). At Step 708, the Op-Amp 416 of the Control Block 102 compares V_op with VMI_fs. VMI_fs is the desired full-scale voltage of the circuit that measures current through the on chip sense resistor, i.e. the Measure Block 104. As a result of the comparison, at Step 710, the GM_CTRL signal is generated based on the difference between the VMI_fs and VMI_op values. At Step 712, the GM_CTRL signal is used to control the gain of the linear gm amplifier (with gain) 506 in the Compensation Block 106. The Compensation Block 106 uses the GM_CTRL signal to provide an offset voltage that can negate the effects of temperature/process variations on the on chip resistor.
  • At Step 718, the GM_CTRL signal is used to control the gain of a disparate linear gm amplifier (with gain) 412 included in the Control Block 102. The amplifier 412 receives VMI_ref as an input. At Step 720, the disparate linear gm amplifier 412 generates current, which includes an offset based in part on the value of the GM_CTRL signal. At Step 722, the Vcomp voltage is determined based on the output current flowing thought the Rcomp resistor 418. Steps 706-712 are then repeated until V_op and VMI_fs values become equal.
  • FIG. 8 illustrates an example methodology that regulates process and/or temperature variations for an on chip resistor, according to an embodiment of the present invention. At Step 802, a control signal is generated by causing a desired full-scale load current to flow through a replica resistor. At Step 804, an output signal is generated by causing an actual full-scale load current to flow through an on-chip sense resistor. The replica resistor can be the same or substantially similar to the on chip resistor in terms of material, sheet resistance, temperature coefficients and the like. Further, the replica resistor can be located in approximately the same location and/or in close proximity with as the on chip resistor. The current flowing through the replica resistor can be generated by using a constant, ideal (or almost ideal) and/or precise current source. At Step 806, the control signal is used to control a gain of a second linear gm amplifier, which receives output signal as an input. At Step 808, a voltage proportional to the output current of the second linear gm amplifier is added to the output signal to compensate for the errors caused by changes in resistance (e.g., due to temperature and/or process variations) of the on-chip resistor.
  • FIG. 9 illustrates is an example methodology that linearly calibrates an on chip resistor affected by a process variation and/or a temperature variation, according to an embodiment of the present invention. At Step 902, a control signal generated by causing a desired full-scale load current to flow through a replica resistor is received. At Step 904, the control signal is utilized to control the gain of a disparate linear gm amplifier, which receives as an input the voltage across the on chip sense resistor. The on chip sense resistor senses the actual load current. As discussed previously, the replica resistor is substantially similar and located in close proximity to an on chip resistor. At Step 906, the current output of the linear gm amplifier is applied to the compensation resistor Rcomp. Rcomp can be included in a feedback loop to provide a correction for error caused by variations in the resistance value of the on chip resistor.
  • The Rcomp resistor can be added in the feedback path of an Op-Amp of the current sensing circuit that measures actual load current by using the chip resistor. The current sensing circuit can comprise an instrumentation amplifier circuit that includes the Op-Amp. The output current from the disparate linear gm amplifier can flow through the Rcomp to provide a compensation voltage across the Rcomp. The linear gm amplifier can produce positive and/or negative gm. The applied gain can provide a corrected output voltage at the output of the current sense circuit (e.g., instrumentation amplifier), which is proportional to the full range of current that is flowing through the on chip resistor.
  • The components and circuitry elements described above can be of any suitable value in order to implement the embodiments of the present invention. For example, the resistors can be of any suitable resistance, amplifiers can provide any suitable gain, current sources can provide any suitable amperage, etc. The resistors Rmeasure, Rreplica, R1, R2, Rcomp, and the like can be of any suitable value and/or have any particular ratios between one another. Moreover, the amplifiers (e.g., Amp1, Amp2, Amp1 a, IAmp1, IAmp2, IAmp3, Linear_gm_amp1 a, Linear_gm_amp1, etc.) can include any suitable gain.
  • FIG. 10 illustrates an example system in which the embodiments of the present invention can be implemented. The system 1000 includes Automatic Test Equipment 1020 having a Precision Parametric Measurement Unit (PPMU) 1030. The PPMU 1030 includes the IC 100, which includes the Control, Measure and Compensate Blocks 102, 104 and 106, according to an embodiment of the present invention. The Target IC 1050 is situated on the circuit board 1040 and is coupled to the IC 100. Specifically, the Target IC 1050 is tested by the ATE 1020. The Target IC 1050 provides the load current ILOAD to the Measure Block 104 and specifically to the Rmeasure resistor 306 located in the Measure Block 104. The Rmeasure resistor 306 is used for sensing the ILOAD current.
  • What has been described above includes examples of the embodiments of the present invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the claimed subject matter, but it is to be appreciated that many further combinations and permutations of the subject innovation are possible. Accordingly, the claimed subject matter is intended to embrace all such alterations, modifications, and variations that fall within the spirit and scope of the appended claims.
  • The aforementioned systems/circuits have been described with respect to interaction between several components/blocks. It can be appreciated that such systems/circuits and components/blocks can include those components or specified sub-components, some of the specified components or sub-components, and/or additional components, and according to various permutations and combinations of the foregoing. Sub-components can also be implemented as components communicatively coupled to other components rather than included within parent components (hierarchical). Additionally, it should be noted that one or more components may be combined into a single component providing aggregate functionality or divided into several separate sub-components, and any one or more middle layers, such as a management layer, may be provided to communicatively couple to such sub-components in order to provide integrated functionality. Any components described herein may also interact with one or more other components not specifically described herein but known by those of skill in the art.

Claims (20)

1. An apparatus, comprising:
a first circuit including a first resistor and a first linear transconductance amplifier for generating a control signal indicative of a value of the first resistor;
a second circuit including a second resistor; wherein, the second circuit is configured to generate an output signal indicative of a load current flowing through the second resistor; and
a third circuit that utilizes the control signal for correcting the output signal to compensate for a variation in resistance of the second resistor,
wherein, the variation in resistance of the second resistor is proportional to a variation in resistance of the first resistor; and
the second resistor is located on an integrated circuit chip.
2. The apparatus claim 1, wherein the third circuit includes a second linear transconductance amplifier that generates a corrected output signal by employing the control signal and the output signal.
3. The apparatus of claim 1, wherein the first linear transconductance amplifier utilizes a voltage across the first resistor to generate a compensation current that facilitates generation of the control signal, wherein the voltage is a function of a desired full-scale current for the second circuit.
4. The apparatus of claim 3, further comprising: the first circuit including an op-amp for comparing a compensation voltage, which is a function of the compensation current, with a desired full-scale voltage for the second circuit to facilitate generation of the control signal.
5. The apparatus of claim 4, wherein the control signal is a function of the first input signal, the second input signal and the voltage across the first resistor and is used to control a gain of the first linear transconductance amplifier.
6. The apparatus of claim 1, wherein the resistance values the first and the second resistor change as a function of a change in temperature.
7. The apparatus of claim 1, wherein the first and the second resistors are located in close proximity with each other.
8. The apparatus of claim 1, wherein the first and the second resistors are made of the same type of material.
9. The apparatus of claim 1, wherein the first resistor is located on the integrated circuit chip.
10. A method for measuring a load current with an on-chip resistor, the method comprising:
generating an output voltage proportional to the load current flowing through the on-chip resistor;
generating a control signal indicative of the resistance value of a replica resistor; and
adjusting the output voltage based on the control signal to account for a change in the resistance value of the on-chip resistor; wherein,
a resistance value of the replica resistor varies in proportion with the resistance value of the on chip resistor.
11. The method of claim 10, wherein adjusting the output voltage comprises adjusting the gain of a linear transconductance amplifier with the control signal.
12. The method of claim 11, further comprising:
providing the output voltage as an input to the linear transconductance amplifier; and
adding a voltage proportional to an output current of the linear transconductance amplifier to the output voltage.
13. The method of claim 11, further comprising: causing the current generated by the linear transconductance amplifier to flow through a compensation resistor for generating an offset voltage.
14. The method of claim 13, correcting the error including adding the offset voltage to the output voltage.
15. The method of claim 10, wherein the output voltage is indicative of the resistance value of the on-chip resistance.
16. The method of claim 13, wherein the current generated by the linear transconductance amplifier changes linearly as a function of the output voltage.
17. The method of claim 10, further comprising: generating the control signal by causing a desired full-scale current to flow through the replica resistor, and comparing the voltage across the replica resistor with a desired full-scale voltage.
18. An Automatic Test Equipment (ATE) that facilitates negating an effect of at least one of a process variation or a temperature variation for an on chip resistor, the ATE comprising:
a test Integrated Circuit (IC) coupled to a target IC for receiving a load current from a target IC;
the test IC including the on chip resistor and a replica of the on chip resistor;
the on chip resistor for sensing the load current; and
a control component including the replica resistor and a linear transconductance amplifier having gain control for generating a control signal that can be employed for generating an offset voltage for compensating for a variation in a resistance of the on chip resistor during current measurement; wherein,
the replica and the on-chip resistors are made of a material having substantially similar properties.
19. The ATE of claim 18, further comprising: a compensation component that includes a disparate linear transconductance amplifier with gain control; wherein,
the control signal for controlling the gain of the disparate linear transconductance amplifier; and
the output current of the disparate linear transconductance amplifier for providing the offset voltage.
20. The ATE of claim 19, further comprising: a current sensing component that generates an output voltage that is proportional to the load current flowing through the on-chip resistor; wherein
the control component and the compensation component for correcting an error in the output voltage.
US12/760,174 2009-10-22 2010-04-14 Method and apparatus for accurately measuring currents using on chip sense resistors Active 2033-01-16 US8717051B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US12/760,174 US8717051B2 (en) 2009-10-22 2010-04-14 Method and apparatus for accurately measuring currents using on chip sense resistors
TW099126224A TW201122498A (en) 2009-10-22 2010-08-06 Method and apparatus for accurately measuring currents using on chip sense resistors
KR1020100077224A KR20110044134A (en) 2009-10-22 2010-08-11 Method and apparatus for accurately measuring currents using on chip sense resistors
CN201010257289.7A CN102043081B (en) 2009-10-22 2010-08-12 Method and apparatus for accurately measuring currents using on-chip sense resistors

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US25390409P 2009-10-22 2009-10-22
US12/760,174 US8717051B2 (en) 2009-10-22 2010-04-14 Method and apparatus for accurately measuring currents using on chip sense resistors

Publications (2)

Publication Number Publication Date
US20110095818A1 true US20110095818A1 (en) 2011-04-28
US8717051B2 US8717051B2 (en) 2014-05-06

Family

ID=43897899

Family Applications (1)

Application Number Title Priority Date Filing Date
US12/760,174 Active 2033-01-16 US8717051B2 (en) 2009-10-22 2010-04-14 Method and apparatus for accurately measuring currents using on chip sense resistors

Country Status (4)

Country Link
US (1) US8717051B2 (en)
KR (1) KR20110044134A (en)
CN (1) CN102043081B (en)
TW (1) TW201122498A (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014018791A1 (en) * 2012-07-25 2014-01-30 Qualcomm Incorporated Method and apparatus for temperature adjusted control of batfet current sensing
US20140087669A1 (en) * 2012-09-25 2014-03-27 Airoha Technology Corp. Mixer with calibration circuit and calibration method thereof
US20150145538A1 (en) * 2013-11-27 2015-05-28 Infineon Technologies Ag Circuits and methods for measuring a current
US20160266170A1 (en) * 2015-03-13 2016-09-15 Polycon Technology Co., Ltd. Low ohmic current sensor capable of using untrimmed resistor to provide required resistance
EP3114761A4 (en) * 2014-03-07 2017-11-22 Nokia Technologies OY Device and method for current sensing and power supply modulator using the same
US10573711B2 (en) 2017-07-13 2020-02-25 Semiconductor Components Industries, Llc Semiconductor device resistor including vias and multiple metal layers
US11137419B2 (en) 2019-12-17 2021-10-05 Analog Devices International Unlimited Company Mutiple range current sensor techniques
US11193957B2 (en) * 2019-08-13 2021-12-07 Analog Devices International Unlimited Company Shunt resistor averaging techniques
US11362630B2 (en) * 2018-04-25 2022-06-14 Beijing Boe Optoelectronics Technology Co., Ltd. Amplifying circuit and rectifying antenna
FR3133675A1 (en) * 2022-03-21 2023-09-22 STMicroelectronics (Grand Ouest) SAS Device for supplying a load and measuring the current consumption of this load
CN117388562A (en) * 2023-12-11 2024-01-12 珅斯电子(上海)有限公司 Variable magneto-inductive current sensor and calibration method thereof

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2982674B1 (en) * 2011-11-10 2015-01-16 Renault Sas METHOD AND SYSTEM FOR MEASURING ELECTRICAL CURRENT
TWI571049B (en) * 2012-03-12 2017-02-11 禾瑞亞科技股份有限公司 Signal sensing circuit
GB201309825D0 (en) * 2013-06-01 2013-07-17 Metroic Ltd Current measurement
US9933480B2 (en) * 2014-09-19 2018-04-03 Elevate Semiconductor, Inc. Parametric pin measurement unit high voltage extension
CN106684941B (en) * 2015-11-05 2019-08-06 北京汇能精电科技股份有限公司 The measurement method of photovoltaic charging system and photoelectricity cell voltage
DE102015226665A1 (en) * 2015-12-23 2017-06-29 Robert Bosch Gmbh Electrically conductive measuring layer for measuring a potential difference
CN107764433A (en) * 2016-08-23 2018-03-06 哈尔滨飞机工业集团有限责任公司 A kind of Inter-Turbine Temperature watch test device
US11616841B2 (en) * 2020-02-07 2023-03-28 Taiwan Semiconductor Manufacturing Company Limited Remote mapping of circuit speed variation due to process, voltage and temperature using a network of digital sensors
US11402456B2 (en) * 2020-08-24 2022-08-02 Monolithic Power Systems, Inc. High voltage current sensing circuit with adaptive calibration
US11979125B2 (en) 2022-03-09 2024-05-07 Analog Devices, Inc. Techniques to externally control amplifier gain

Citations (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4277749A (en) * 1979-02-21 1981-07-07 Hewlett-Packard Company Input circuit for electronic instruments
US4963802A (en) * 1989-03-27 1990-10-16 Elantec Resistor programmable velocity controller
US5059892A (en) * 1990-10-15 1991-10-22 Hewlett-Packard Company Radio frequency signal interface
US5063344A (en) * 1990-03-05 1991-11-05 Delco Electronics Corporation Mode selectable interface circuit for an air core gage controller
US5563541A (en) * 1994-05-19 1996-10-08 Sony/Tektronix Corporation Load current detection circuit
US5723974A (en) * 1995-11-21 1998-03-03 Elantec Semiconductor, Inc. Monolithic power converter with a power switch as a current sensing element
US5804979A (en) * 1997-05-13 1998-09-08 Fluke Corporation Circuit for measuring in-circuit resistance and current
US5867056A (en) * 1997-11-14 1999-02-02 Fluke Corporation Voltage reference support circuit
US5917318A (en) * 1996-02-28 1999-06-29 Ando Electric Co., Ltd. High-speed responsive power supply for measuring equipment
US6028426A (en) * 1997-08-19 2000-02-22 Statpower Technologies Partnership Temperature compensated current measurement device
US6230276B1 (en) * 1999-02-01 2001-05-08 Douglas T Hayden Energy conserving measurement system under software control and method for battery powered products
US20010003419A1 (en) * 1999-12-09 2001-06-14 Laurent Ribes Apparatus for measuring current flowing in a conductor
US20010005161A1 (en) * 1999-12-21 2001-06-28 Yeong Jeon Baek Level-shifting reference voltage source circuits and methods
US6448853B1 (en) * 2001-04-09 2002-09-10 Elantec Semiconductor, Inc. Distortion improvement in amplifiers
US6459246B1 (en) * 2001-06-13 2002-10-01 Marvell International, Ltd. Voltage regulator
US6801033B2 (en) * 2000-02-29 2004-10-05 Seiko Instruments Inc. Voltage converter having switching element with variable substrate potential
US20050195024A1 (en) * 2004-03-05 2005-09-08 Jackie Cheng Apparatus and method for DC offset reduction
US6965247B2 (en) * 2002-11-28 2005-11-15 Infineon Technologies, Ag Semiconductor device for detecting and adjusting a threshold value variation
US20060049856A1 (en) * 2004-09-03 2006-03-09 Tatsuji Nakai Load-driving semiconductor device that detects current flowing through load by resistor
US7085977B2 (en) * 2000-12-19 2006-08-01 Texas Instruments Incorporated Method and system for detecting an outlying resistance in a plurality of resistive elements
US20060220740A1 (en) * 2005-03-31 2006-10-05 Agilent Technologies, Inc. Apparatus for current measuring and a resistor
US20060232266A1 (en) * 2003-03-29 2006-10-19 Kelly Brendan P Undercurrent sense arrangement and method
US20060259256A1 (en) * 2001-11-01 2006-11-16 Linear Technology Corporation Circuits and methods for current measurements referred to a precision impedance
US20060267592A1 (en) * 2005-03-31 2006-11-30 Choi Jin H Apparatus and method for measuring the amount of the current in battery cells using a plurality of sensing resistors
US20070263334A1 (en) * 2006-03-06 2007-11-15 Junji Nishida Current detector circuit and current-mode DC-DC converter using same
US20080048703A1 (en) * 2006-08-25 2008-02-28 Fujitsu Limited Semiconductor integrated circuit and testing method of same
US20080094092A1 (en) * 2006-10-19 2008-04-24 Kenneth J Goodnow Mechanism For Detection And Compensation Of NBTI Induced Threshold Degradation
US7373574B2 (en) * 2004-07-09 2008-05-13 Advantest Corporation Semiconductor testing apparatus and method of testing semiconductor
US20080157798A1 (en) * 2005-08-01 2008-07-03 Marvell International Ltd. On-die heating circuit and control loop for rapid heating of the die
US20090002056A1 (en) * 2007-06-30 2009-01-01 Doyle James T Active resistance circuit with controllable temperature coefficient
US7849426B2 (en) * 2007-10-31 2010-12-07 International Business Machines Corporation Mechanism for detection and compensation of NBTI induced threshold degradation
US20100321050A1 (en) * 2009-06-23 2010-12-23 International Business Machines Corporation On-chip measurement of signals
US20110148445A1 (en) * 2009-12-22 2011-06-23 Vladimir Aleksandar Zivkovic Testing Circuit and Method
US8050642B2 (en) * 2007-11-26 2011-11-01 Electronics And Telecommunications Research Institute Variable gain amplifier and receiver including the same
US20120218022A1 (en) * 2011-02-25 2012-08-30 Linear Technology Corporation Accurate Current Sensing with Heat Transfer Correction
US20120249098A1 (en) * 2008-04-01 2012-10-04 O2Micro, Inc. Circuits and methods for current sensing

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101330252B (en) 2007-06-19 2010-06-09 钰瀚科技股份有限公司 DC-DC converter with temperature compensating circuit

Patent Citations (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4277749A (en) * 1979-02-21 1981-07-07 Hewlett-Packard Company Input circuit for electronic instruments
US4963802A (en) * 1989-03-27 1990-10-16 Elantec Resistor programmable velocity controller
US5063344A (en) * 1990-03-05 1991-11-05 Delco Electronics Corporation Mode selectable interface circuit for an air core gage controller
US5059892A (en) * 1990-10-15 1991-10-22 Hewlett-Packard Company Radio frequency signal interface
US5563541A (en) * 1994-05-19 1996-10-08 Sony/Tektronix Corporation Load current detection circuit
US5723974A (en) * 1995-11-21 1998-03-03 Elantec Semiconductor, Inc. Monolithic power converter with a power switch as a current sensing element
US5917318A (en) * 1996-02-28 1999-06-29 Ando Electric Co., Ltd. High-speed responsive power supply for measuring equipment
US5804979A (en) * 1997-05-13 1998-09-08 Fluke Corporation Circuit for measuring in-circuit resistance and current
US6028426A (en) * 1997-08-19 2000-02-22 Statpower Technologies Partnership Temperature compensated current measurement device
US5867056A (en) * 1997-11-14 1999-02-02 Fluke Corporation Voltage reference support circuit
US6230276B1 (en) * 1999-02-01 2001-05-08 Douglas T Hayden Energy conserving measurement system under software control and method for battery powered products
US20010003419A1 (en) * 1999-12-09 2001-06-14 Laurent Ribes Apparatus for measuring current flowing in a conductor
US20010005161A1 (en) * 1999-12-21 2001-06-28 Yeong Jeon Baek Level-shifting reference voltage source circuits and methods
US6801033B2 (en) * 2000-02-29 2004-10-05 Seiko Instruments Inc. Voltage converter having switching element with variable substrate potential
US7085977B2 (en) * 2000-12-19 2006-08-01 Texas Instruments Incorporated Method and system for detecting an outlying resistance in a plurality of resistive elements
US6448853B1 (en) * 2001-04-09 2002-09-10 Elantec Semiconductor, Inc. Distortion improvement in amplifiers
US6459246B1 (en) * 2001-06-13 2002-10-01 Marvell International, Ltd. Voltage regulator
US20060259256A1 (en) * 2001-11-01 2006-11-16 Linear Technology Corporation Circuits and methods for current measurements referred to a precision impedance
US6965247B2 (en) * 2002-11-28 2005-11-15 Infineon Technologies, Ag Semiconductor device for detecting and adjusting a threshold value variation
US20060232266A1 (en) * 2003-03-29 2006-10-19 Kelly Brendan P Undercurrent sense arrangement and method
US6992526B2 (en) * 2004-03-05 2006-01-31 Wionics Research Apparatus and method for DC offset reduction
US20050195024A1 (en) * 2004-03-05 2005-09-08 Jackie Cheng Apparatus and method for DC offset reduction
US7373574B2 (en) * 2004-07-09 2008-05-13 Advantest Corporation Semiconductor testing apparatus and method of testing semiconductor
US20060049856A1 (en) * 2004-09-03 2006-03-09 Tatsuji Nakai Load-driving semiconductor device that detects current flowing through load by resistor
US20060267592A1 (en) * 2005-03-31 2006-11-30 Choi Jin H Apparatus and method for measuring the amount of the current in battery cells using a plurality of sensing resistors
US20060220740A1 (en) * 2005-03-31 2006-10-05 Agilent Technologies, Inc. Apparatus for current measuring and a resistor
US20080157798A1 (en) * 2005-08-01 2008-07-03 Marvell International Ltd. On-die heating circuit and control loop for rapid heating of the die
US20070263334A1 (en) * 2006-03-06 2007-11-15 Junji Nishida Current detector circuit and current-mode DC-DC converter using same
US20080048703A1 (en) * 2006-08-25 2008-02-28 Fujitsu Limited Semiconductor integrated circuit and testing method of same
US20080094092A1 (en) * 2006-10-19 2008-04-24 Kenneth J Goodnow Mechanism For Detection And Compensation Of NBTI Induced Threshold Degradation
US7504847B2 (en) * 2006-10-19 2009-03-17 International Business Machines Corporation Mechanism for detection and compensation of NBTI induced threshold degradation
US20090002056A1 (en) * 2007-06-30 2009-01-01 Doyle James T Active resistance circuit with controllable temperature coefficient
US7849426B2 (en) * 2007-10-31 2010-12-07 International Business Machines Corporation Mechanism for detection and compensation of NBTI induced threshold degradation
US8050642B2 (en) * 2007-11-26 2011-11-01 Electronics And Telecommunications Research Institute Variable gain amplifier and receiver including the same
US20120249098A1 (en) * 2008-04-01 2012-10-04 O2Micro, Inc. Circuits and methods for current sensing
US20100321050A1 (en) * 2009-06-23 2010-12-23 International Business Machines Corporation On-chip measurement of signals
US20110148445A1 (en) * 2009-12-22 2011-06-23 Vladimir Aleksandar Zivkovic Testing Circuit and Method
US20120218022A1 (en) * 2011-02-25 2012-08-30 Linear Technology Corporation Accurate Current Sensing with Heat Transfer Correction

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9000750B2 (en) 2012-07-25 2015-04-07 Qualcomm Incorporated Method and apparatus for temperature adjusted control of BATFET current sensing
WO2014018791A1 (en) * 2012-07-25 2014-01-30 Qualcomm Incorporated Method and apparatus for temperature adjusted control of batfet current sensing
US9154080B2 (en) * 2012-09-25 2015-10-06 Airoha Technology Corp. Mixer with calibration circuit and calibration method thereof
US20140087669A1 (en) * 2012-09-25 2014-03-27 Airoha Technology Corp. Mixer with calibration circuit and calibration method thereof
DE102014116985B4 (en) 2013-11-27 2018-11-29 Infineon Technologies Ag Circuits and methods for measuring a current
US9372212B2 (en) * 2013-11-27 2016-06-21 Infineon Technologies Ag Circuits and methods for measuring a current
US20150145538A1 (en) * 2013-11-27 2015-05-28 Infineon Technologies Ag Circuits and methods for measuring a current
EP3114761A4 (en) * 2014-03-07 2017-11-22 Nokia Technologies OY Device and method for current sensing and power supply modulator using the same
US20160266170A1 (en) * 2015-03-13 2016-09-15 Polycon Technology Co., Ltd. Low ohmic current sensor capable of using untrimmed resistor to provide required resistance
US10573711B2 (en) 2017-07-13 2020-02-25 Semiconductor Components Industries, Llc Semiconductor device resistor including vias and multiple metal layers
US11362630B2 (en) * 2018-04-25 2022-06-14 Beijing Boe Optoelectronics Technology Co., Ltd. Amplifying circuit and rectifying antenna
US11923814B2 (en) 2018-04-25 2024-03-05 Beijing Boe Optoelectronics Technology Co., Ltd. Amplifying circuit and rectifying antenna
US11193957B2 (en) * 2019-08-13 2021-12-07 Analog Devices International Unlimited Company Shunt resistor averaging techniques
US11137419B2 (en) 2019-12-17 2021-10-05 Analog Devices International Unlimited Company Mutiple range current sensor techniques
FR3133675A1 (en) * 2022-03-21 2023-09-22 STMicroelectronics (Grand Ouest) SAS Device for supplying a load and measuring the current consumption of this load
CN117388562A (en) * 2023-12-11 2024-01-12 珅斯电子(上海)有限公司 Variable magneto-inductive current sensor and calibration method thereof

Also Published As

Publication number Publication date
CN102043081A (en) 2011-05-04
TW201122498A (en) 2011-07-01
US8717051B2 (en) 2014-05-06
KR20110044134A (en) 2011-04-28
CN102043081B (en) 2015-02-11

Similar Documents

Publication Publication Date Title
US8717051B2 (en) Method and apparatus for accurately measuring currents using on chip sense resistors
US10224812B1 (en) Sensing network mismatch compensation for switching voltage regulator with input voltage and current sensing
EP2392931B1 (en) Dynamic compensation of aging drift in current sense resistor
US7928703B2 (en) On-chip current sensing
US7777565B2 (en) Differential amplification circuit and manufacturing method thereof
US8941369B2 (en) Curvature compensated band-gap design trimmable at a single temperature
CN106051267B (en) Semiconductor device, vehicle-mounted valve system and solenoid driver
US20070103174A1 (en) Direct current test apparatus
US10088532B2 (en) Temperature compensation circuit and sensor device
US11949320B2 (en) Rdson-based current sensing system
US20210041509A1 (en) Hall sensor trim circuit
US8421477B2 (en) Resistance variation detection circuit, semiconductor device and resistance variation detection method
US6750797B1 (en) Programmable precision current controlling apparatus
CN111505542A (en) Stress compensation control circuit and semiconductor sensor device
US7675272B2 (en) Output impedance compensation for linear voltage regulators
US20050017760A1 (en) Current sense shunt resistor circuit
EP1992066B1 (en) Apparatus for and method of biasing a transistor
US11598824B2 (en) Magnetic field sensor apparatus and method
US20060066383A1 (en) Log circuit and highly linear differential-amplifier circuit
US8446208B2 (en) Circuit arrangement with temperature compensation
WO2015178271A1 (en) Dummy load circuit and charge detection circuit
US9385687B2 (en) Configurable radio frequency attenuator
KR101397818B1 (en) apparatus and method for outputting signal
US20230408604A1 (en) Sensor output compensation circuit
JP4768461B2 (en) Temperature detecting means adjusting circuit and adjusting method thereof

Legal Events

Date Code Title Description
AS Assignment

Owner name: INTERSIL AMERICAS INCORPORATED, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SULLIVAN, PATRICK;REEL/FRAME:024232/0274

Effective date: 20091022

AS Assignment

Owner name: INTERSIL AMERICAS INC., CALIFORNIA

Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 024232 FRAME 0274. ASSIGNOR(S) HEREBY CONFIRMS THE NAME OF THE ASSIGNEE;ASSIGNOR:SULLIVAN, PATRICK;REEL/FRAME:024472/0664

Effective date: 20100526

STCF Information on status: patent grant

Free format text: PATENTED CASE

AS Assignment

Owner name: INTERSIL AMERICAS LLC, CALIFORNIA

Free format text: CHANGE OF NAME;ASSIGNOR:INTERSIL AMERICAS INC.;REEL/FRAME:033119/0484

Effective date: 20111223

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

AS Assignment

Owner name: ELEVATE SEMICONDUCTOR, INC., CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:INTERSIL AMERICAS LLC;REEL/FRAME:035770/0045

Effective date: 20150403

FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO SMALL (ORIGINAL EVENT CODE: SMAL)

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 4TH YR, SMALL ENTITY (ORIGINAL EVENT CODE: M2551)

Year of fee payment: 4

AS Assignment

Owner name: CALIFORNIA MEZZANINE INVESTMENT FUND, L.P., NEW YO

Free format text: SECURITY INTEREST;ASSIGNOR:ELEVATE SEMICONDUCTOR, INC.;REEL/FRAME:046770/0782

Effective date: 20180831

AS Assignment

Owner name: AVIDBANK, CALIFORNIA

Free format text: SECURITY INTEREST;ASSIGNOR:ELEVATE SEMICONDUCTOR, INC.;REEL/FRAME:047759/0909

Effective date: 20180831

AS Assignment

Owner name: ELEVATE SEMICONDUCTOR, INC., CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:AVIDBANK;REEL/FRAME:049624/0036

Effective date: 20190619

AS Assignment

Owner name: EAST WEST BANK, CALIFORNIA

Free format text: SECURITY INTEREST;ASSIGNOR:ELEVATE SEMICONDUCTOR, INC.;REEL/FRAME:049781/0414

Effective date: 20190717

AS Assignment

Owner name: ELEVATE SEMICONDUCTOR, INC., CALIFORNIA

Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:CALIFORNIA MEZZANINE INVESTMENT FUND, L.P.;REEL/FRAME:049865/0303

Effective date: 20190717

FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 8