US20100068892A1 - Substrate processing method - Google Patents
Substrate processing method Download PDFInfo
- Publication number
- US20100068892A1 US20100068892A1 US12/558,047 US55804709A US2010068892A1 US 20100068892 A1 US20100068892 A1 US 20100068892A1 US 55804709 A US55804709 A US 55804709A US 2010068892 A1 US2010068892 A1 US 2010068892A1
- Authority
- US
- United States
- Prior art keywords
- gas
- mask layer
- thickness
- film
- substrate processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 55
- 238000003672 processing method Methods 0.000 title claims abstract description 29
- 238000012545 processing Methods 0.000 claims abstract description 77
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims description 89
- 238000000034 method Methods 0.000 claims description 59
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims description 23
- 239000010408 film Substances 0.000 description 183
- 239000007789 gas Substances 0.000 description 131
- 235000012431 wafers Nutrition 0.000 description 53
- 238000005530 etching Methods 0.000 description 37
- 238000012546 transfer Methods 0.000 description 27
- 230000006870 function Effects 0.000 description 13
- 238000011084 recovery Methods 0.000 description 12
- 150000002500 ions Chemical class 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 239000002585 base Substances 0.000 description 9
- 238000003860 storage Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 238000004380 ashing Methods 0.000 description 4
- 238000009499 grossing Methods 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 229910052794 bromium Inorganic materials 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229910052717 sulfur Inorganic materials 0.000 description 2
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 229910052740 iodine Inorganic materials 0.000 description 1
- OCVXZQOKBHXGRU-UHFFFAOYSA-N iodine(1+) Chemical compound [I+] OCVXZQOKBHXGRU-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Definitions
- the present invention relates to a substrate processing method, and particularly, to a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another.
- a wafer for semiconductor devices which includes an oxide film, e.g., a TEOS (Tetra Ethyl Ortho Silicate) film, which contains impurities formed on a silicon base by a CVD process or the like; a conductive film, such as a TiN film; an antireflection film (BARC film); and a mask layer (photoresist film) that are stacked one on top of another (see, e.g., Japanese Patent Application Publication No. 2006-190939).
- the photoresist film is formed to have a predetermined pattern by photolithography, and serves as a mask layer upon etching the antireflection film and the conductive film.
- the minimum dimension of pattern in the photoresist film is defined depending on the minimum dimension that may be developed in photolithography, however, the minimum dimension that may be accomplished by photolithography in a mass-production has a limitation due to a deviation in a focal length.
- the minimum dimension achievable is about 80 nm.
- a processing dimension that satisfies the requirement of scaling-down for miniaturization of semiconductor devices is about 30 nm.
- photoresist films smoother and thinner than those of the prior art have been widely applied and the wavelength of light used for photolithography has been shortened in order to reduce the minimum dimension of the pattern. This causes a problem that the photoresist film itself is worn when the antireflection film (BARC film) is etched. Thus, it has been accelerated to develop a technology to increase or recover the thickness of the photoresist film.
- BARC film antireflection film
- the present invention provides a substrate processing method for forming an opening with a dimension satisfying the requirement of scaling-down for miniaturization of semiconductor devices, which may increase the thickness of a mask layer before the mask layer is worn or recover the mask layer worn.
- a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another, the mask layer having an opening that partially exposes the intermediate layer includes increasing a thickness of the mask layer by depositing deposits on an upper surface of the mask layer having the opening with plasma generated from a mixed gas of SF 6 gas and a depositive gas represented in a general equation, C x H y F z (where, x, y, and z are positive integers).
- FIG. 1 is a plan view schematically illustrating a configuration of a substrate processing system that performs a substrate processing method according to an embodiment of the present invention
- FIG. 2 is a cross section view taken along line II-II in FIG. 1 ;
- FIG. 3 is a cross section view schematically illustrating a configuration of a semiconductor wafer on which plasma processing is performed by the substrate processing system shown in FIG. 1 ;
- FIGS. 4A to 4D are views illustrating the substrate processing method according to the embodiment of the present invention.
- FIGS. 5A to 5D are views illustrating the substrate processing method according to the embodiment of the present invention.
- FIGS. 6A to 6B are views illustrating the substrate processing method according to an embodiment of the present invention.
- the substrate processing system includes a plurality of process modules configured to perform an etching process or an ashing process using plasma on a semiconductor wafer W (hereinafter, simply referred to as “wafer W”) as a substrate.
- wafer W semiconductor wafer W
- FIG. 1 is a plan view schematically illustrating a configuration of the substrate processing system that performs the substrate processing method in accordance with the embodiment of the present invention.
- the substrate processing system 10 includes a transfer module 11 having a hexagonal shape as seen from the top side, two process modules 12 and 13 connected to a side surface of the transfer module 11 , two process modules 14 and 15 connected to another side surface of the transfer module 11 opposite to the two process modules 12 and 13 , a process module 16 connected to the transfer module 11 to be adjacent to the process module 13 , a process module 17 connected to the transfer module 11 to be adjacent to the process module 15 , a rectangular loader module 18 serving as a transfer chamber, and two load lock modules 19 and 20 arranged between the transfer module 11 and the loader module 18 to connect the transfer module 11 and the loader module 18 to each other.
- the transfer module 11 includes an extensible and rotatable transfer arm 21 which is arranged therein.
- the transfer arm 21 transfers a wafer W between the transfer module 11 and the process modules 12 to 17 or the load lock modules 19 and 20 .
- the process module 12 includes a processing chamber 22 (see FIG. 2 ) for accommodating the wafer W therein.
- a mixed gas of a CF-based gas, e.g., CF 4 gas, and O 2 gas, as a processing gas, is introduced into the chamber, plasma is generated from the introduced processing gas by creating an electric field in the chamber, and the wafer W is etched by the plasma.
- a CF-based gas e.g., CF 4 gas, and O 2 gas
- FIG. 2 is a cross section view taken along line II-II in FIG. 1 .
- the process module 12 further includes a mounting table 23 for the wafer W, which is arranged in the processing chamber 22 , a shower head 24 arranged at an upper side of the chamber 22 to face the mounting table 23 , a TMP (Turbo Molecular Pump) 25 for exhausting gases in the chamber 22 , and an APC (Adaptive Pressure Control) valve 26 as a variable butterfly valve, which is arranged between the chamber 22 and the TMP 25 to control the pressure in the chamber 22 .
- a mounting table 23 for the wafer W which is arranged in the processing chamber 22
- a shower head 24 arranged at an upper side of the chamber 22 to face the mounting table 23
- a TMP Teurbo Molecular Pump
- APC Adaptive Pressure Control
- a high frequency power supply 27 is connected to the mounting table 23 via a matcher 28 to supply high frequency power to the mounting table 23 .
- the mounting table 23 functions as a lower electrode.
- the matcher 28 reduces the reflection of the high frequency power from the mounting table 23 so that the supply efficiency of the high frequency power to the mounting table 23 is maximized.
- the mounting table 23 applies the high frequency power supplied from the high frequency power supply 27 to a processing space S.
- the shower head 24 is constituted as a gas supply unit 30 shaped as a circular plate.
- the gas supply unit 30 has a buffer chamber 32 .
- the buffer chamber 32 communicates with the inside of the chamber 22 via gas injection holes 34 .
- the buffer chamber 32 is connected to a CF 4 gas supply system and an O 2 gas supply system (both are not shown).
- the CF 4 gas supply system supplies CF 4 gas to the buffer chamber 32 .
- the O 2 gas supply system supplies O 2 gas to the buffer chamber 32 .
- the CF 4 gas and the O 2 gas are then supplied to the chamber 22 via the gas injection holes 34 .
- a high frequency power supply 35 is connected to the shower head 24 via a matcher 36 to supply high frequency power to the shower head 24 .
- the shower head 24 functions as an upper electrode.
- the matcher 36 has the same function as that of the matcher 28 .
- the shower head 24 applies high frequency power supplied from the high frequency power supply 35 to the processing space S.
- the mounting table 23 and the shower head 24 apply high frequency powers to the processing space S so that the processing gas supplied from the shower head 24 to the processing space S is converted to plasma and ions or radicals are generated, and then a step of etching an intermediate layer is performed as described later.
- the process module 13 includes a processing chamber for accommodating the wafer W that experienced a step of etching the intermediate layer in the process module 12 .
- a mixed gas of CH 3 F gas and SF 6 gas as a processing gas is introduced into the chamber, forms an electric field is generated in the chamber to generate plasma from the introduced processing gas, and performs a step of increasing the thickness of the mask layer is performed on the wafer W by using the plasma as described later.
- the process module 13 has the same configuration as that of the process module 12 , and includes a CH 3 F gas supply system and an SF 6 gas supply system (both are not shown).
- a step of etching an SiN film is performed on the wafer W in which the mask layer has been thickened.
- the steps of increasing the thickness of the mask layer by attaching deposits and the step of etching the SiN film are both performed in the same chamber, the deposits in the step of increasing the thickness of the mask layer would hamper the etching of the SiN film.
- the step of etching the SiN film is carried out by the process module 15 .
- the process module 15 has also the same configuration as that of the process module 12 .
- the process module 14 includes a processing chamber for accommodating the wafer W that has been subjected to the etching process in the process module 15 .
- O 2 gas as a processing gas is introduced into the chamber, an electric field is generated in the chamber to generate plasma from the introduced processing gas, and an ashing process is performed on the wafer W by the plasma.
- the process module 14 also has the same configuration as that of the process module 12 and includes a shower head (not shown) constituted of only a gas supply unit (not shown) shaped as a circular plate, in which an O 2 supply system (not shown) is connected to the buffer chamber (not shown), instead of the shower head 24 constituted of the gas supply unit 30 connected to the various gas supply systems.
- the insides of the transfer module 11 and the process modules 12 to 17 are kept in a depressurized state.
- the process modules 12 to 17 are connected to the transfer module 11 via vacuum gate valves 12 a to 17 a , respectively.
- the load lock modules 19 and 20 include vacuum gate valves 19 a and 20 a , respectively, at which the load lock modules 19 and 20 are connected to the transfer module 11 , and atmospheric door valves 19 b and 20 b , respectively, at which the load lock modules 19 and 20 are connected to the loader module 18 .
- the load lock modules 19 and 20 serve as a preliminary vacuum transfer chamber that may adjust the inner pressure.
- the load lock modules 19 and 20 respectively, have wafer mounting tables 19 c and 20 c to temporarily mount thereon the wafer W that is transferred between the loader module 18 and the transfer module 11 .
- load lock modules 19 and 20 e.g., three FOUP (Front Opening Unified Pod) mounting tables 38 for mounting FOUPs 37 as vessels for accommodating, e.g., twenty five wafers W and an orienter 39 for pre-aligning the orientation of the wafers W unloaded from the FOUPs 37 are connected to the loader module 18 .
- FOUP Front Opening Unified Pod
- the load lock modules 19 and 20 are connected to one longer sidewall of the loader module 18 and arranged opposite to the three FOUP mounting tables 38 with the loader module 18 located therebetween, and the orienter 39 is arranged at one longitudinal end of the loader module 18 .
- the loader module 18 includes therein a scalar dual-arm type transfer arm 40 for transferring the wafer W and three load ports 41 , as input ports for the wafers W, arranged at the other sidewall thereof correspondingly to the respective FOUP mounting tables 38 .
- the transfer arm 40 takes the wafers W out from the FOUPs 37 mounted on the FOUP mounting tables 38 via the load ports 41 , and transfer the wafers W taken out to the load lock modules 19 and 20 or the orienter 39 .
- the substrate processing system 10 includes an operation panel 42 arranged at the longitudinal end of the loader module 18 .
- the operation panel 42 includes a display unit such as, e.g., an LCD (Liquid Crystal Display), which displays operational situations of each component of the substrate processing system 10 .
- LCD Liquid Crystal Display
- FIG. 3 is a cross section view schematically illustrating a configuration of a semiconductor wafer on which plasma processing is performed in the substrate processing system shown in FIG. 1 .
- the wafer W includes an SiN film 51 formed as a processing target layer on a silicon base 50 , an antireflection film (BARC film) 52 formed on the SiN film 51 , and a photoresist film (mask layer) 53 formed on the BARC film 52 .
- BARC film antireflection film
- mask layer photoresist film
- the silicon base 50 is a thin film that is formed of silicon and shaped as a circular plate.
- the SiN film 51 is formed on the silicon base 50 by performing, e.g., a CVD process or the like on the surface of the silicon base 50 .
- the BARC film 52 is formed on the SiN film 51 , e.g., by a coating process.
- the BARC film 52 is made of a high-molecule resin containing a pigment that absorbs a specific wavelength of light, e.g., an ArF excimer laser beam irradiated toward the photoresist film 53 .
- the BARC film 52 prevents an ArF excimer laser beam passing through the photoresist film 53 from being reflected by the SiN film 51 to reach the photoresist film 53 again.
- the photoresist film 53 is formed on the BARC film 52 , e.g., by using a spin coater (not shown).
- the photoresist film 53 is formed of a positive type photosensitive resin and transformed to be alkali-soluble when being irradiated with an ArF excimer laser beam.
- the remaining photoresist film 53 on the wafer W has the predetermined pattern having openings at locations where, e.g., via holes are formed.
- an opening via hole or trench
- an opening having a width CD (Critical Dimension)
- CD Cosmetic Dimension
- a smoother and thinner photoresist film has been adopted while shortening the wavelength of light used for the photolithography as described above.
- the smoother and thinner photoresist mask film is easily worn upon etching the BARC film 52 and fails to sufficiently exert a function as a mask layer in the etching of the SiN film 51 .
- an intermediate layer or processing target layer of a triple-layer wafer including the processing target layer, the intermediate layer, and a mask layer for example CF 4 /CHF 3 /Ar/O 2 based gases have been conventionally used as a processing gas for selectively etching the intermediate layer or processing target layer rather than the mask layer.
- a mask layer for example CF 4 /CHF 3 /Ar/O 2 based gases
- the worn amount of the mask layer is relatively increased upon etching the intermediate layer, and thus it is required to develop a technology that increases the thickness of the mask layer beforehand or recovers the thickness of worn mask layer.
- CF based depositive gas C x H y F z , where, x, y, and z are positive integers
- the substrate processing method in accordance with the present invention is directed to a substrate processing method that processes a substrate in which a processing target layer, an intermediate layer, and a mask layer are deposited one on top of another, wherein the mask layer has an opening through which the intermediate layer is partially exposed.
- the substrate processing method according to the present invention is characterized by including a step of increasing the thickness of the mask layer, wherein the thickness of the mask layer is increased by depositing deposits on an upper surface of the mask layer with the opening by using plasma generated from a mixed gas of a depositive gas whose general equation is represented as C x H y F z (where, x, y, and z are positive integers) and SF 6 gas.
- the “depositive gas” refers to a gas that has a function to increase the thickness of the photoresist film 53 as a mask layer or decrease the width of the opening by depositing deposits on the upper surface of the photoresist film 53 or sidewall surface of the opening.
- the substrate processing method includes a step of increasing the thickness of the mask layer wherein the thickness of the photoresist film 53 is increased by depositing deposits on an upper surface of the photoresist film 53 included in the wafer W based on plasma processing.
- FIGS. 4A to 6B are views illustrating a substrate processing method in accordance with an embodiment of the present invention.
- the wafer W is prepared in which the SiN film 51 , the BARC film 52 , and the photoresist film 53 are stacked on the silicon base 50 one on top of another ( FIG. 4A ).
- the thickness of the SiN film 51 , the thickness of the BARC film 52 , and the thickness of the photoresist film 53 may be, for example, 100 nm, 80 nm, and 90 nm, respectively.
- the photoresist film 53 has the opening 54 whose width may be, for example, 45 nm (pitch of 90 nm).
- the wafer W is transferred in the chamber 22 of the process module 12 (refer to FIG. 2 ) and mounted on the mounting table 23 .
- the pressure in the chamber 22 is set to, for example, 2.6 Pa (20 mTorr) by the APC valve 26 and the like. Further, the temperature of the wafer W is set to, for example, 30° C. Further, CF 4 gas is supplied from the gas supply unit 30 of the shower head 24 into the chamber 22 at a flow rate of 70 sccm, and O 2 gas is supplied into the chamber 22 at a flow rate of 10 sccm. And, high frequency power of 50 W is applied to the mounting table 23 and high frequency power of 600 W is applied to the shower head 24 . At this time, the CF 4 gas and the O 2 gas are excited by the high frequency power applied to the processing space S to be converted to plasma, and ions and radicals are created ( FIG.
- a step of increasing the thickness of the mask layer (hereinafter, referred to as “mask layer thickness recovery step (SM step)”) is performed on the photoresist film 53 to recover the thickness of the worn photoresist film 53 of the wafer W.
- SM step mask layer thickness recovery step
- the wafer W in which the photoresist film 53 has been worn is unloaded from the chamber 22 of the process module 12 , loaded in the chamber of the process module 13 via the transfer module 11 , and then mounted on the mounting table 23 . Thereafter, the pressure in the chamber 22 of the process module 13 is set to, for example, 2.6 Pa (20 mTorr) by the APC valve 26 and the like and the temperature of the wafer W is set to, for example, 30° C. Then, CH 3 F gas is supplied from the gas supply unit 30 of the shower head 24 into the chamber 22 at a flow rate of 200 sccm while SF 6 gas is supplied to the chamber 22 at a flow rate of 300 sccm.
- high frequency power of 100 W is applied to the mounting table 23 while high frequency electric power of 200 W is applied to the shower head 24 .
- a mixed gas of the CH 3 F gas and the SF 6 gas is converted to plasma by the high frequency power applied to the processing space S, and ions and radicals are created ( FIG. 4D ).
- the thickness of the deposits is gradually increased on the upper surface of the photoresist film 53 .
- the thickness of the deposits was found to be, for example, 60 nm 30 seconds after the initiation of the processing. That is, the thickness of the photoresist film 53 was recovered from 35 nm up to 60 nm by the mask layer recovery step (SM step). At this time, deposits are deposited even on the sidewall surface of the opening 54 so that the width of the opening 54 was decreased from, for example, 55 nm to 45 nm.
- the thickness of the photoresist film 53 and the width of the opening 54 vary with a processing time of the mask layer thickness recovery step. As the processing time is lengthened, the thickness of the film is increased and the width of the opening is decreased. Accordingly, the thickness of the photoresist film 53 and the width of the opening 54 may be controlled by adjusting the processing time.
- a breakthrough step is performed on the wafer W having the photoresist film 53 whose thickness has been recovered by the mask layer thickness recovery step to remove the deposits that are primarily formed of carbon and attached to the surface of the SiN film 51 .
- the reason why the breakthrough step is performed may be as follows.
- the deposits are sometimes deposited on the surface of the SiN film 51 , which are not coated by the BARC film 52 , the photoresist film 53 , and the deposits 55 deposited thereon by the mask layer thickness recovery step that recovers the thickness of the photoresist film 53 and is performed after the step of etching the BARC film 52 .
- the etching of the SiN film 51 may be hindered since the step of etching the SiN film has a high selectivity for carbon which is a main component of the deposits 55 .
- the breakthrough step is performed as a process prior to the step of etching the SiN film to sweep away the surface of the SiN film 51 .
- the breakthrough step is executed as follows. That is, the wafer W in which the thickness of the photoresist film 53 has been recovered by the mask layer thickness recovery step is unloaded from the chamber 22 of the process module 13 , loaded into the chamber 22 of the process module 12 (refer to FIG. 2 ) via the transfer module 11 , and then mounted on the mounting table 23 .
- the pressure in the chamber 22 is set to, for example, 2.6 Pa (20 mTorr) by the APC valve 26 and the like. Further, the temperature of the wafer W is set to, for example, 30° C. Further, Ar gas is supplied from the gas supply unit 30 of the shower head 24 to the chamber 22 at a flow rate of 200 sccm while O 2 gas is supplied to the chamber 22 at a flow rate of the silicon base 50 sccm. And, high frequency power of 50 W is applied to the mounting table 23 while high frequency power of 200 W is applied to the shower head 24 . At this time, the Ar gas and the O 2 gas are excited by the high frequency power applied to the processing space S to be converted to plasma, and ions and radicals are created ( FIG. 5B ).
- ions and radicals collide and react with a portion of the SiN film 51 , which is not covered by the BARC film 52 , the photoresist film 53 , and the deposits 55 deposited thereon. Then, the portion of the SiN film 51 is swept out and any existent deposits are eliminated. Further, a processing time for the breakthrough step is set to, for example, 20 seconds.
- an SiN etching step is performed on the wafer W, in which the deposits attached to the surface of the SiN film 51 and formed mainly of carbon have been eliminated by the breakthrough step, so that the opening of the photoresist film 53 is transcribed onto the SiN film 51 .
- the wafer W that has been subjected to the breakthrough step is unloaded from the chamber 22 of the process module 12 (refer to FIG. 2 ), loaded into the chamber of the process module 15 via the transfer module 11 , and then mounted on the mounting table 23 . Thereafter, the pressure in the chamber 22 of the process module 15 is set to, for example, 2.6 Pa (20 mTorr) by the APC valve 26 and the like, and the temperature of the wafer W is set to, for example, 30° C.
- high frequency power of 600 W is applied to the mounting table 23 while high frequency power of 200 W is applied to the shower head 24 .
- the mixed gas of Ar gas and N 2 gas and CH 3 F gas are converted to plasma by the high frequency power applied to the processing space S, and ions or radicals are created ( FIG. 5C ).
- the wafer W is unloaded from the chamber 22 of the process module 15 after the etching of the SiN film 51 , loaded into the chamber 22 of the process module 14 (refer to FIG. 2 ) via the transfer module 11 , and then mounted on the mounting table 23 .
- the pressure in the chamber 22 of the process module 14 , in which the wafer W has been loaded is set to, for example, 1.3 ⁇ 10 Pa (100 mTorr) by the APC valve 26 or the like.
- the temperature of the wafer W is adjusted to, for example, 30° C., and then O 2 gas is supplied from the gas supply unit 30 of the shower head 24 to the chamber at a flow rate of 374 sccm.
- high frequency power of 0 to 30 W is applied to the mounting table 23 while high frequency power of 600 W is applied to the shower head 24 .
- O 2 gas is converted to plasma by the high frequency power applied to the processing space S, and ions and radicals are created ( FIG. 6A ).
- the BARC film 52 , the photoresist film 53 , and the deposits 55 deposited on an upper surface of the photoresist film 53 and sidewalls of the opening 54 , which are stacked on the SiN film 51 , are ashed by the created ions and radicals. By doing so, the BARC film 52 , the photoresist film 53 , and the deposits 55 deposited on the upper surface of the photoresist film 53 and the sidewall surface of the opening 54 are removed ( FIG. 6B ).
- the width of an upper part of the opening 54 in the SiN film 51 of the wafer W was 45 nm. Thereafter, the wafer W was unloaded from the chamber of the process module 14 and then the process was ended.
- the thickness of the photoresist film 53 which was worn during the step of etching the BARC film 52 , can be recovered by performing plasma processing using a mixed gas of CH 3 F gas, which is a depositive gas, and SF 6 gas after the etching of the BARC film 52 .
- the photoresist film 53 smoother than the BARC film 52 is thus worn in such a manner that the width of an upper part of the opening 54 becomes wider than the width of a lower part of the opening 54 or sidewall of the opening is formed in a tapered shape so that the width of the photoresist film 53 becomes narrow as it goes upward. If the photoresist film 53 is left worn, it is impossible to etch the SiN film 51 such that the opening thereof has an inner wall surface extending straight vertically.
- the thickness of the photoresist film 53 was recovered by depositing or attaching deposits to the surface of the worn photoresist film 53 , particularly a tapered portion of the worn photoresist film 53 by performing plasma processing using a mixed gas of CH 3 F gas, which is a depositive gas, and SF 6 gas.
- a mixed gas of CH 3 F gas which is a depositive gas, and SF 6 gas.
- the deposits are deposited on the surface of the photoresist film 53 particularly on the tapered portion thereof, the deposits are attached, for example, around a tip of the upwardly tapered portion, e.g., in an “afro hair” form in the step of etching the BARC film 52 , so that the thickness and width are recovered.
- the thickness of the photoresist film 53 can be recovered. Accordingly, the processability of the wafer W can be significantly enhanced by applying the embodiment to the wafer W including the thin, smooth photoresist film 53 and the solid BARC film 52 , which makes it possible to etch a SiN film thicker than the conventional art.
- the step of increasing the thickness of the mask layer uses a mixed gas of a depositive gas and SF 6 gas as a processing gas, wherein CH 3 F gas is preferably utilized as the depositive gas. Because of a number of hydrogen atoms, CH 3 F gas easily reacts with the photoresist film 53 and allows deposits to be effectively deposited on the upper surface of the photoresist film 53 , so that the thickness of the photoresist film 53 may be increased. SF 6 gas serves to smooth the surface of the photoresist film 53 .
- a mixing ratio of SF 6 gas with respect to CH 3 F gas is preferably equal to or less than 1.5, and more preferably range from about 1 to about 1.5.
- the supply amount of CH 3 F gas is 200 sccm
- the supply amount of SF 6 gas is set to be equal to or less than 300 sccm.
- SF 6 gas is considered as a gas for exerting an etching effect thanks to a large percentage of fluorine
- SF 6 gas contains sulfur (S) so that the deposit attachment operation is shown by S-based reaction product.
- S sulfur
- the bias power for the mask layer thickness recovery step is preferably about 50 W to 200 W.
- the bias power is less than 50 W, the deposits are insufficiently attached onto the surface of the photoresist film 53 .
- the bias power exceeds 200 W the photoresist film 53 is easily roughened due to sputtering.
- a temperature for substrate processing is not particularly limited, but practically preferably range from about 20° C. to about 100° C.
- the power (source power) for generating plasma is not particularly limited, but may be changed, for example, depending on the apparatus used.
- the pressure in the chamber preferably may range from about 2 Pa (15 mTorr) to about 5.2 Pa (40 mTorr) in the mask layer thickness recovery step.
- the processing pressure is too low, the surface of the substrate is easily roughened.
- the processing pressure is too high, the surface of the substrate is easily worn.
- the processing time for the mask layer thickness recovery step is, for example, from 20 seconds to 40 seconds.
- a speed at which the deposits are attached onto the surface of the photoresist film 53 is highest at the beginning of processing, and then gradually lowered since the speed is nearly converged after about 30 seconds.
- the mechanism of recovering the thickness of the photoresist film 53 is not necessarily clear, it is considered that the deposit deposition operation by CH 3 F gas may be balanced with the deposit control operation or smoothing operation by SF 6 gas by adjusting the flow rate ratio of SF 6 gas respective of CH 3 F gas, the bias power, and the processing pressure within the above-mentioned respective ranges in the mask layer thickness recovery step. By doing so, the deposits may be selectively attached onto the upper surface of the photoresist film 53 , so that the thickness of the photoresist film 53 worn during the etching of the BARC film 52 can be recovered.
- a gas containing a halogen element such as chlorine (Cl), bromine (Br), iodine (I) and fluorine (F) may be adopted instead of SF 6 gas.
- a gas containing S, Cl, Br, and I but not F may also be used as long as the gas provides the similar operation and effects.
- the flow rates of Ar gas, N 2 gas, and CH 3 F gas are preferably 300 to 900 sccm, 100 to 300 sccm, and 50 to 150 sccm, respectively, in the step of etching the SiN film 51 subsequent to the mask layer thickness recovery step.
- the step of etching the SiN film 51 is primarily performed by Ar gas.
- CH 3 F gas exerts an effect (selectivity) of depositing the deposits to control the etching speed by Ar gas.
- N 2 gas controls the amount of attached deposits by CH 3 F gas.
- the processing target film is the SiN film 51
- the processing target film is not limited thereto.
- the processing target film may be a TiN film, or others.
- the BARC film 52 has been used as the intermediate film, the intermediate film is not limited to the BARC film.
- the step of increasing the thickness of the mask layer was performed after the BARC film 52 of the wafer W was etched in order to recover the thickness of the photoresist film 53 worn by the etching of the BARC film 52 .
- the step of increasing the thickness of the mask layer may be carried out before the BARC film 52 is etched so as to increase the thickness of the photoresist film 53 in advance so that the step of etching the BARC film 52 is applied to the wafer W in which the photoresist film 53 has been thickened. This may also remove the influence caused when the photoresist film 53 is worn so that the SiN film 51 may be etched well.
- the substrate on which plasma processing is performed is not limited to the wafer for semiconductor devices, but various substrates used for LCDs (Liquid Crystal Displays) or FPDs (Flat Panel Displays) or photomask, CD substrates, or print boards may be used.
- Another aspect of the present invention may be also accomplished by supplying a storage medium that stores program codes of software executing the functions suggested in the above-mentioned embodiment to a system or apparatus, so that a computer (or CPU, or MPU) included in the system or apparatus reads and executes the program codes stored in the storage medium.
- a computer or CPU, or MPU
- the program codes themselves read from the storage medium are configured to implement the above-described functions of the embodiment, and the program codes and the storage medium storing the program codes constitute the present invention.
- the storage medium for supplying the program codes may include, for example, floppy (trade mark) discs, hard discs, magneto-optical discs, optical discs such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, or DVD+RW, magnetic tapes, non-volatile memory cards, ROMs, etc.
- the program codes may be downloaded over a network.
- the present invention also includes a case where the above-mentioned functions of the embodiment are implemented by executing the program codes read by the computer, and a part or entirety of actual processes is executed by an OS (Operating System) operated in the computer based on the instructions of the program codes, whereby the above-mentioned functions of the embodiment are realized.
- OS Operating System
- the present invention also includes a case where the program codes read from the storage medium is written to a memory provided to a function expansion unit connected to the computer or a function extension board inserted into the computer, and then a part or entirety of actual processes for an extended function is executed by a CPU provided to the extension board or extension unit based on the instructions of the program codes, whereby the above-mentioned functions of the embodiment are realized.
- the step of increasing the thickness of the mask layer by depositing deposits on the upper surface of the mask layer with an opening by using plasma generated from a mixed gas of a depositive gas represented as a general equation C x H y F z (where, x, y, and z are positive integers) and SF 6 , so that the thickness of the mask layer can be increased as necessary.
- the step of increasing the thickness of the mask layer is a step of recovering the thickness of the worn mask layer by etching the BARC film as an intermediate layer. Accordingly the thickness of the worn mask layer can be recovered by the step of etching the intermediate layer.
- the step of increasing the thickness of the mask layer is performed before the intermediate layer is etched, so that the thickness of the mask layer can be increased before the mask layer is worn, thereby making subsequent processes stable.
- the depositive gas is CH 3 F, so that deposits based on CH 3 F can be deposited on the upper surface of the mask layer, which increase the thickness of the mask layer.
- the mixing ratio of SF 6 with respect to the depositive gas is set to be equal to or less than 1.5, so that a deposit deposition operation by the depositive gas, and a deposit control operation and a smoothing operation of the surface of the mask layer by SF 6 can cause a synergy effect, which allows the deposits to be selectively attached onto the surface of the mask layer, thereby increasing the thickness of the mask layer.
- the mixing ratio of SF 6 with respect to the depositive gas is set to be from 1 to 1.5, and thus the deposits can be selectively attached to the surface of the mask layer, thereby effectively increasing the thickness of the mask layer.
- Bias electric power of 50 W to 200 W is applied to the substrate in the step of increasing the thickness of the mask layer, so that the deposits can be selectively attached to the surface of the mask layer in combination with a gas mixing ratio and a processing pressure, thereby effectively increasing the thickness of the mask layer.
- the pressure of the atmosphere surrounding the substrate is adjusted to be from 2.0 Pa (15 mTorr) to 5.2 Pa (40 mTorr) in the step of increasing the thickness of the mask layer, so that the deposits can be effectively attached to the surface of the mask layer in combination with the bias electric power and the processing gas mixing ratio, thereby increasing the thickness of the mask layer.
- the processing time is set to be from 20 seconds to 40 seconds in the step of increasing the thickness of the mask layer, so that the deposits can be attached to the surface of the mask layer within a minimum processing time as necessary, thereby increasing the thickness of the mask layer.
- the mask layer is a photoresist film in the step of increasing the thickness of the mask layer, so that the deposits are attached to the surface of the photoresist film to increase the thickness of the photoresist film.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
- This application claims priority to Japanese Patent Application No. 2008-234809, filed on Sep. 12, 2008, the entire contents of which are incorporated by herein reference.
- The present invention relates to a substrate processing method, and particularly, to a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another.
- There is known a wafer for semiconductor devices, which includes an oxide film, e.g., a TEOS (Tetra Ethyl Ortho Silicate) film, which contains impurities formed on a silicon base by a CVD process or the like; a conductive film, such as a TiN film; an antireflection film (BARC film); and a mask layer (photoresist film) that are stacked one on top of another (see, e.g., Japanese Patent Application Publication No. 2006-190939). The photoresist film is formed to have a predetermined pattern by photolithography, and serves as a mask layer upon etching the antireflection film and the conductive film.
- Recently, semiconductor devices are becoming smaller and smaller, and it is required to form a circuit pattern on the surface of the wafer more finely. To form such a fine circuit pattern, it is needed to make the minimum dimension of pattern in the photoresist film small in the fabrication of the semiconductor devices so that an opening (via hole or trench) with a small dimension may be formed in an etching target film.
- The minimum dimension of pattern in the photoresist film is defined depending on the minimum dimension that may be developed in photolithography, however, the minimum dimension that may be accomplished by photolithography in a mass-production has a limitation due to a deviation in a focal length. For example, the minimum dimension achievable is about 80 nm. Meanwhile, a processing dimension that satisfies the requirement of scaling-down for miniaturization of semiconductor devices is about 30 nm.
- Further, photoresist films smoother and thinner than those of the prior art have been widely applied and the wavelength of light used for photolithography has been shortened in order to reduce the minimum dimension of the pattern. This causes a problem that the photoresist film itself is worn when the antireflection film (BARC film) is etched. Thus, it has been accelerated to develop a technology to increase or recover the thickness of the photoresist film.
- In view of the above, the present invention provides a substrate processing method for forming an opening with a dimension satisfying the requirement of scaling-down for miniaturization of semiconductor devices, which may increase the thickness of a mask layer before the mask layer is worn or recover the mask layer worn.
- In accordance with an embodiment of the invention, there is provided a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another, the mask layer having an opening that partially exposes the intermediate layer, includes increasing a thickness of the mask layer by depositing deposits on an upper surface of the mask layer having the opening with plasma generated from a mixed gas of SF6 gas and a depositive gas represented in a general equation, CxHyFz (where, x, y, and z are positive integers).
- The objects and features of the present invention will become apparent from the following description of embodiments, given in conjunction with the accompanying drawings, in which:
-
FIG. 1 is a plan view schematically illustrating a configuration of a substrate processing system that performs a substrate processing method according to an embodiment of the present invention; -
FIG. 2 is a cross section view taken along line II-II inFIG. 1 ; -
FIG. 3 is a cross section view schematically illustrating a configuration of a semiconductor wafer on which plasma processing is performed by the substrate processing system shown inFIG. 1 ; -
FIGS. 4A to 4D are views illustrating the substrate processing method according to the embodiment of the present invention; -
FIGS. 5A to 5D are views illustrating the substrate processing method according to the embodiment of the present invention; and -
FIGS. 6A to 6B are views illustrating the substrate processing method according to an embodiment of the present invention. - Hereinafter, embodiments of the present invention will be described in detail with reference to accompanying drawings.
- First of all, a substrate processing system for performing a substrate processing method in accordance with an embodiment of the present invention will be described. The substrate processing system includes a plurality of process modules configured to perform an etching process or an ashing process using plasma on a semiconductor wafer W (hereinafter, simply referred to as “wafer W”) as a substrate.
-
FIG. 1 is a plan view schematically illustrating a configuration of the substrate processing system that performs the substrate processing method in accordance with the embodiment of the present invention. - Referring to
FIG. 1 , thesubstrate processing system 10 includes atransfer module 11 having a hexagonal shape as seen from the top side, twoprocess modules transfer module 11, twoprocess modules transfer module 11 opposite to the twoprocess modules process module 16 connected to thetransfer module 11 to be adjacent to theprocess module 13, aprocess module 17 connected to thetransfer module 11 to be adjacent to theprocess module 15, arectangular loader module 18 serving as a transfer chamber, and twoload lock modules transfer module 11 and theloader module 18 to connect thetransfer module 11 and theloader module 18 to each other. - The
transfer module 11 includes an extensible androtatable transfer arm 21 which is arranged therein. Thetransfer arm 21 transfers a wafer W between thetransfer module 11 and theprocess modules 12 to 17 or theload lock modules - The
process module 12 includes a processing chamber 22 (seeFIG. 2 ) for accommodating the wafer W therein. A mixed gas of a CF-based gas, e.g., CF4 gas, and O2 gas, as a processing gas, is introduced into the chamber, plasma is generated from the introduced processing gas by creating an electric field in the chamber, and the wafer W is etched by the plasma. -
FIG. 2 is a cross section view taken along line II-II inFIG. 1 . - Referring to
FIG. 2 , theprocess module 12 further includes a mounting table 23 for the wafer W, which is arranged in theprocessing chamber 22, ashower head 24 arranged at an upper side of thechamber 22 to face the mounting table 23, a TMP (Turbo Molecular Pump) 25 for exhausting gases in thechamber 22, and an APC (Adaptive Pressure Control)valve 26 as a variable butterfly valve, which is arranged between thechamber 22 and theTMP 25 to control the pressure in thechamber 22. - A high
frequency power supply 27 is connected to the mounting table 23 via amatcher 28 to supply high frequency power to the mounting table 23. By doing so, the mounting table 23 functions as a lower electrode. In addition, thematcher 28 reduces the reflection of the high frequency power from the mounting table 23 so that the supply efficiency of the high frequency power to the mounting table 23 is maximized. The mounting table 23 applies the high frequency power supplied from the highfrequency power supply 27 to a processing space S. - The
shower head 24 is constituted as agas supply unit 30 shaped as a circular plate. Thegas supply unit 30 has abuffer chamber 32. Thebuffer chamber 32 communicates with the inside of thechamber 22 viagas injection holes 34. - The
buffer chamber 32 is connected to a CF4 gas supply system and an O2 gas supply system (both are not shown). The CF4 gas supply system supplies CF4 gas to thebuffer chamber 32. And, the O2 gas supply system supplies O2 gas to thebuffer chamber 32. The CF4 gas and the O2 gas are then supplied to thechamber 22 via thegas injection holes 34. - A high
frequency power supply 35 is connected to theshower head 24 via amatcher 36 to supply high frequency power to theshower head 24. By doing so, the shower head 24 functions as an upper electrode. In addition, thematcher 36 has the same function as that of thematcher 28. Theshower head 24 applies high frequency power supplied from the highfrequency power supply 35 to the processing space S. - In the
chamber 22 of theprocess module 12, as described above, the mounting table 23 and theshower head 24 apply high frequency powers to the processing space S so that the processing gas supplied from theshower head 24 to the processing space S is converted to plasma and ions or radicals are generated, and then a step of etching an intermediate layer is performed as described later. - Returning to
FIG. 1 , theprocess module 13 includes a processing chamber for accommodating the wafer W that experienced a step of etching the intermediate layer in theprocess module 12. A mixed gas of CH3F gas and SF6 gas as a processing gas is introduced into the chamber, forms an electric field is generated in the chamber to generate plasma from the introduced processing gas, and performs a step of increasing the thickness of the mask layer is performed on the wafer W by using the plasma as described later. Further, theprocess module 13 has the same configuration as that of theprocess module 12, and includes a CH3F gas supply system and an SF6 gas supply system (both are not shown). - A step of etching an SiN film is performed on the wafer W in which the mask layer has been thickened. However, if the step of increasing the thickness of the mask layer by attaching deposits and the step of etching the SiN film are both performed in the same chamber, the deposits in the step of increasing the thickness of the mask layer would hamper the etching of the SiN film. Thus, in this embodiment, the step of etching the SiN film is carried out by the
process module 15. Theprocess module 15 has also the same configuration as that of theprocess module 12. - The
process module 14 includes a processing chamber for accommodating the wafer W that has been subjected to the etching process in theprocess module 15. O2 gas as a processing gas is introduced into the chamber, an electric field is generated in the chamber to generate plasma from the introduced processing gas, and an ashing process is performed on the wafer W by the plasma. Further, theprocess module 14 also has the same configuration as that of theprocess module 12 and includes a shower head (not shown) constituted of only a gas supply unit (not shown) shaped as a circular plate, in which an O2 supply system (not shown) is connected to the buffer chamber (not shown), instead of theshower head 24 constituted of thegas supply unit 30 connected to the various gas supply systems. - The insides of the
transfer module 11 and theprocess modules 12 to 17 are kept in a depressurized state. Theprocess modules 12 to 17 are connected to thetransfer module 11 viavacuum gate valves 12 a to 17 a, respectively. - In the
substrate processing system 10, the inner pressure of theloader module 18 is maintained at an atmospheric pressure while the inner pressure of thetransfer module 11 is maintained vacuum. Accordingly, theload lock modules vacuum gate valves load lock modules transfer module 11, andatmospheric door valves 19 b and 20 b, respectively, at which theload lock modules loader module 18. As such, theload lock modules load lock modules loader module 18 and thetransfer module 11. - Besides the
load lock modules FOUPs 37 as vessels for accommodating, e.g., twenty five wafers W and anorienter 39 for pre-aligning the orientation of the wafers W unloaded from theFOUPs 37 are connected to theloader module 18. - The
load lock modules loader module 18 and arranged opposite to the three FOUP mounting tables 38 with theloader module 18 located therebetween, and theorienter 39 is arranged at one longitudinal end of theloader module 18. - The
loader module 18 includes therein a scalar dual-armtype transfer arm 40 for transferring the wafer W and threeload ports 41, as input ports for the wafers W, arranged at the other sidewall thereof correspondingly to the respective FOUP mounting tables 38. Thetransfer arm 40 takes the wafers W out from theFOUPs 37 mounted on the FOUP mounting tables 38 via theload ports 41, and transfer the wafers W taken out to theload lock modules orienter 39. - Further, the
substrate processing system 10 includes anoperation panel 42 arranged at the longitudinal end of theloader module 18. Theoperation panel 42 includes a display unit such as, e.g., an LCD (Liquid Crystal Display), which displays operational situations of each component of thesubstrate processing system 10. -
FIG. 3 is a cross section view schematically illustrating a configuration of a semiconductor wafer on which plasma processing is performed in the substrate processing system shown inFIG. 1 . - Referring to
FIG. 3 , the wafer W includes anSiN film 51 formed as a processing target layer on asilicon base 50, an antireflection film (BARC film) 52 formed on theSiN film 51, and a photoresist film (mask layer) 53 formed on theBARC film 52. - The
silicon base 50 is a thin film that is formed of silicon and shaped as a circular plate. TheSiN film 51 is formed on thesilicon base 50 by performing, e.g., a CVD process or the like on the surface of thesilicon base 50. TheBARC film 52 is formed on theSiN film 51, e.g., by a coating process. TheBARC film 52 is made of a high-molecule resin containing a pigment that absorbs a specific wavelength of light, e.g., an ArF excimer laser beam irradiated toward thephotoresist film 53. TheBARC film 52 prevents an ArF excimer laser beam passing through thephotoresist film 53 from being reflected by theSiN film 51 to reach thephotoresist film 53 again. Thephotoresist film 53 is formed on theBARC film 52, e.g., by using a spin coater (not shown). Thephotoresist film 53 is formed of a positive type photosensitive resin and transformed to be alkali-soluble when being irradiated with an ArF excimer laser beam. - In the wafer W as configured above, when an ArF excimer laser beam corresponding to a pattern converted to have a predetermined pattern is irradiated to the
photoresist film 53 by a stepper (not shown), a portion of thephotoresist film 53 which is irradiated with the ArF excimer laser beam is transformed to be alkali-soluble. Thereafter, a developing solution which is a strong alkali is dropped to thephotoresist film 53 so that the portion of thephotoresist film 53 transformed to be alkali-soluble is removed. By doing so, a portion of thephotoresist film 53 corresponding to a pattern converted to have a predetermined pattern is removed from thephotoresist film 53, and thus the remainingphotoresist film 53 on the wafer W has the predetermined pattern having openings at locations where, e.g., via holes are formed. - Meanwhile, it is required to form an opening (via hole or trench) with a small dimension, specifically, an opening having a width (CD (Critical Dimension)) of about 30 nm on the etching target film in order to satisfy the requirement of scaling-down for miniaturization of semiconductor devices. For this purpose, a smoother and thinner photoresist film has been adopted while shortening the wavelength of light used for the photolithography as described above. However, the smoother and thinner photoresist mask film is easily worn upon etching the
BARC film 52 and fails to sufficiently exert a function as a mask layer in the etching of theSiN film 51. That is, upon etching an intermediate layer or processing target layer of a triple-layer wafer including the processing target layer, the intermediate layer, and a mask layer, for example CF4/CHF3/Ar/O2 based gases have been conventionally used as a processing gas for selectively etching the intermediate layer or processing target layer rather than the mask layer. At the moment a mask layer is currently adopted whose thickness is, e.g., about ⅕ of that of the conventional mask layer, however, the worn amount of the mask layer is relatively increased upon etching the intermediate layer, and thus it is required to develop a technology that increases the thickness of the mask layer beforehand or recovers the thickness of worn mask layer. - The inventors studied research on the relationship among the type of processing gases for attaching deposits to the mask layer, processing conditions, and the amount of attached deposits to discover a method of increasing the thickness of the mask layers and have found that deposits are deposited on an upper surface of the
photoresist film 53 by performing plasma processing on the wafer W where, for example, theSiN film 51 as a target layer, theBARC film 52, and thephotoresist film 53 are deposited on thesilicon base 50 one on top of another by using a mixed gas of CF based depositive gas (CxHyFz, where, x, y, and z are positive integers) and SF6 gas, thus increasing the thickness of thephotoresist film 53 increased. This led to the present invention. - That is, the substrate processing method in accordance with the present invention is directed to a substrate processing method that processes a substrate in which a processing target layer, an intermediate layer, and a mask layer are deposited one on top of another, wherein the mask layer has an opening through which the intermediate layer is partially exposed. The substrate processing method according to the present invention is characterized by including a step of increasing the thickness of the mask layer, wherein the thickness of the mask layer is increased by depositing deposits on an upper surface of the mask layer with the opening by using plasma generated from a mixed gas of a depositive gas whose general equation is represented as CxHyFz (where, x, y, and z are positive integers) and SF6 gas.
- Here, the “depositive gas” refers to a gas that has a function to increase the thickness of the
photoresist film 53 as a mask layer or decrease the width of the opening by depositing deposits on the upper surface of thephotoresist film 53 or sidewall surface of the opening. - Hereinafter, a substrate processing method in accordance with embodiments of the present invention will be described in more detail with reference to accompanying drawings.
- The substrate processing method includes a step of increasing the thickness of the mask layer wherein the thickness of the
photoresist film 53 is increased by depositing deposits on an upper surface of thephotoresist film 53 included in the wafer W based on plasma processing. -
FIGS. 4A to 6B are views illustrating a substrate processing method in accordance with an embodiment of the present invention. - Referring to
FIGS. 4A to 4B , first, the wafer W is prepared in which theSiN film 51, theBARC film 52, and thephotoresist film 53 are stacked on thesilicon base 50 one on top of another (FIG. 4A ). The thickness of theSiN film 51, the thickness of theBARC film 52, and the thickness of thephotoresist film 53 may be, for example, 100 nm, 80 nm, and 90 nm, respectively. Thephotoresist film 53 has theopening 54 whose width may be, for example, 45 nm (pitch of 90 nm). The wafer W is transferred in thechamber 22 of the process module 12 (refer toFIG. 2 ) and mounted on the mounting table 23. - Next, the pressure in the
chamber 22 is set to, for example, 2.6 Pa (20 mTorr) by theAPC valve 26 and the like. Further, the temperature of the wafer W is set to, for example, 30° C. Further, CF4 gas is supplied from thegas supply unit 30 of theshower head 24 into thechamber 22 at a flow rate of 70 sccm, and O2 gas is supplied into thechamber 22 at a flow rate of 10 sccm. And, high frequency power of 50 W is applied to the mounting table 23 and high frequency power of 600 W is applied to theshower head 24. At this time, the CF4 gas and the O2 gas are excited by the high frequency power applied to the processing space S to be converted to plasma, and ions and radicals are created (FIG. 4B ). These ions and radicals collide and react with a portion of theBARC film 52, which is not covered by thephotoresist film 53, so that the portion is etched. At this time, the surface of thephotoresist film 53 and inner wall surface of theopening 54 are crashed by the plasma generated by excitation of the CF4 gas and the O2 gas as well, and thus worn out, which reduced the thickness of thephotoresist film 53 from, for example, 73 nm to 35 nm. Further, the width of theopening 54 was increased from, for example, 45 nm to 55 nm (FIG. 4C ). The processing time for the step of etching the BARC film is, for example, 40 seconds. - Then, a step of increasing the thickness of the mask layer (hereinafter, referred to as “mask layer thickness recovery step (SM step)”) is performed on the
photoresist film 53 to recover the thickness of theworn photoresist film 53 of the wafer W. - That is, the wafer W in which the
photoresist film 53 has been worn is unloaded from thechamber 22 of theprocess module 12, loaded in the chamber of theprocess module 13 via thetransfer module 11, and then mounted on the mounting table 23. Thereafter, the pressure in thechamber 22 of theprocess module 13 is set to, for example, 2.6 Pa (20 mTorr) by theAPC valve 26 and the like and the temperature of the wafer W is set to, for example, 30° C. Then, CH3F gas is supplied from thegas supply unit 30 of theshower head 24 into thechamber 22 at a flow rate of 200 sccm while SF6 gas is supplied to thechamber 22 at a flow rate of 300 sccm. And, high frequency power of 100 W is applied to the mounting table 23 while high frequency electric power of 200 W is applied to theshower head 24. At this time, a mixed gas of the CH3F gas and the SF6 gas is converted to plasma by the high frequency power applied to the processing space S, and ions and radicals are created (FIG. 4D ). - These ions and radicals collide and react with the upper surface of the
photoresist film 53, and thus deposits are deposited on the upper surface of thephotoresist film 53, thereby recovering the thickness of the photoresist film 53 (FIG. 5A ). - Since the processing is initiated, the thickness of the deposits is gradually increased on the upper surface of the
photoresist film 53. The thickness of the deposits was found to be, for example, 60nm 30 seconds after the initiation of the processing. That is, the thickness of thephotoresist film 53 was recovered from 35 nm up to 60 nm by the mask layer recovery step (SM step). At this time, deposits are deposited even on the sidewall surface of theopening 54 so that the width of theopening 54 was decreased from, for example, 55 nm to 45 nm. The thickness of thephotoresist film 53 and the width of theopening 54 vary with a processing time of the mask layer thickness recovery step. As the processing time is lengthened, the thickness of the film is increased and the width of the opening is decreased. Accordingly, the thickness of thephotoresist film 53 and the width of theopening 54 may be controlled by adjusting the processing time. - Next, a breakthrough step is performed on the wafer W having the
photoresist film 53 whose thickness has been recovered by the mask layer thickness recovery step to remove the deposits that are primarily formed of carbon and attached to the surface of theSiN film 51. - The reason why the breakthrough step is performed may be as follows.
- The deposits are sometimes deposited on the surface of the
SiN film 51, which are not coated by theBARC film 52, thephotoresist film 53, and thedeposits 55 deposited thereon by the mask layer thickness recovery step that recovers the thickness of thephotoresist film 53 and is performed after the step of etching theBARC film 52. If the subsequent SiN film etching step is carried out with thedeposits 55 attached on theSiN film 51, the etching of theSiN film 51 may be hindered since the step of etching the SiN film has a high selectivity for carbon which is a main component of thedeposits 55. Accordingly, the breakthrough step is performed as a process prior to the step of etching the SiN film to sweep away the surface of theSiN film 51. In addition, it is actually unclear whether thedeposits 55 are attached onto theSiN film 51 or not in the mask layer thickness recovery step, but the breakthrough step is considered not to be skipped at least to stably perform the subsequent SiN film etching step. - The breakthrough step is executed as follows. That is, the wafer W in which the thickness of the
photoresist film 53 has been recovered by the mask layer thickness recovery step is unloaded from thechamber 22 of theprocess module 13, loaded into thechamber 22 of the process module 12 (refer toFIG. 2 ) via thetransfer module 11, and then mounted on the mounting table 23. - Next, the pressure in the
chamber 22 is set to, for example, 2.6 Pa (20 mTorr) by theAPC valve 26 and the like. Further, the temperature of the wafer W is set to, for example, 30° C. Further, Ar gas is supplied from thegas supply unit 30 of theshower head 24 to thechamber 22 at a flow rate of 200 sccm while O2 gas is supplied to thechamber 22 at a flow rate of thesilicon base 50 sccm. And, high frequency power of 50 W is applied to the mounting table 23 while high frequency power of 200 W is applied to theshower head 24. At this time, the Ar gas and the O2 gas are excited by the high frequency power applied to the processing space S to be converted to plasma, and ions and radicals are created (FIG. 5B ). These ions and radicals collide and react with a portion of theSiN film 51, which is not covered by theBARC film 52, thephotoresist film 53, and thedeposits 55 deposited thereon. Then, the portion of theSiN film 51 is swept out and any existent deposits are eliminated. Further, a processing time for the breakthrough step is set to, for example, 20 seconds. - Next, an SiN etching step is performed on the wafer W, in which the deposits attached to the surface of the
SiN film 51 and formed mainly of carbon have been eliminated by the breakthrough step, so that the opening of thephotoresist film 53 is transcribed onto theSiN film 51. - That is, the wafer W that has been subjected to the breakthrough step is unloaded from the
chamber 22 of the process module 12 (refer toFIG. 2 ), loaded into the chamber of theprocess module 15 via thetransfer module 11, and then mounted on the mounting table 23. Thereafter, the pressure in thechamber 22 of theprocess module 15 is set to, for example, 2.6 Pa (20 mTorr) by theAPC valve 26 and the like, and the temperature of the wafer W is set to, for example, 30° C. Then, a mixed gas of Ar gas and N2 gas which are mixed at a flow rate ratio of, for example, 3:1, is supplied to thechamber 22 at a flow rate of, for example, 800 sccm (600 sccm for Ar gas and 200 sccm for N2 gas), while CH3F gas is supplied to thechamber 22 at a flow rate of, for example, 50 sccm. And, high frequency power of 600 W is applied to the mounting table 23 while high frequency power of 200 W is applied to theshower head 24. At this time, the mixed gas of Ar gas and N2 gas and CH3F gas are converted to plasma by the high frequency power applied to the processing space S, and ions or radicals are created (FIG. 5C ). - These ions and radicals collide and react with a portion of the
SiN film 51 which is not covered by theBARC film 52, thephotoresist film 53, and thedeposits 55 deposited thereon, and then the portion of theSiN film 51 is etched (FIG. 5D ). TheSiN film 51 is etched until thesilicon base 50 is exposed. At this time, the width of theopening 54 was 45 nm in theSiN film 51 sixty seconds after the processing was initiated. - Next, an ashing process is performed on the wafer W in which the
opening 54 of thephotoresist film 53 has been transcribed to theSiN film 51 by the above processes. - That is, the wafer W is unloaded from the
chamber 22 of theprocess module 15 after the etching of theSiN film 51, loaded into thechamber 22 of the process module 14 (refer toFIG. 2 ) via thetransfer module 11, and then mounted on the mounting table 23. - Then, the pressure in the
chamber 22 of theprocess module 14, in which the wafer W has been loaded, is set to, for example, 1.3×10 Pa (100 mTorr) by theAPC valve 26 or the like. And, the temperature of the wafer W is adjusted to, for example, 30° C., and then O2 gas is supplied from thegas supply unit 30 of theshower head 24 to the chamber at a flow rate of 374 sccm. And, high frequency power of 0 to 30 W is applied to the mounting table 23 while high frequency power of 600 W is applied to theshower head 24. At this time, O2 gas is converted to plasma by the high frequency power applied to the processing space S, and ions and radicals are created (FIG. 6A ). TheBARC film 52, thephotoresist film 53, and thedeposits 55 deposited on an upper surface of thephotoresist film 53 and sidewalls of theopening 54, which are stacked on theSiN film 51, are ashed by the created ions and radicals. By doing so, theBARC film 52, thephotoresist film 53, and thedeposits 55 deposited on the upper surface of thephotoresist film 53 and the sidewall surface of theopening 54 are removed (FIG. 6B ). - Twenty to ninety seconds after the ashing process was initiated, the width of an upper part of the
opening 54 in theSiN film 51 of the wafer W was 45 nm. Thereafter, the wafer W was unloaded from the chamber of theprocess module 14 and then the process was ended. - According to the embodiment, the thickness of the
photoresist film 53, which was worn during the step of etching theBARC film 52, can be recovered by performing plasma processing using a mixed gas of CH3F gas, which is a depositive gas, and SF6 gas after the etching of theBARC film 52. - That is, when the
BARC film 52 is etched, thephotoresist film 53 smoother than theBARC film 52 is thus worn in such a manner that the width of an upper part of theopening 54 becomes wider than the width of a lower part of theopening 54 or sidewall of the opening is formed in a tapered shape so that the width of thephotoresist film 53 becomes narrow as it goes upward. If thephotoresist film 53 is left worn, it is impossible to etch theSiN film 51 such that the opening thereof has an inner wall surface extending straight vertically. - In this embodiment, the thickness of the
photoresist film 53 was recovered by depositing or attaching deposits to the surface of theworn photoresist film 53, particularly a tapered portion of theworn photoresist film 53 by performing plasma processing using a mixed gas of CH3F gas, which is a depositive gas, and SF6 gas. At this time, since the deposits are deposited on the surface of thephotoresist film 53 particularly on the tapered portion thereof, the deposits are attached, for example, around a tip of the upwardly tapered portion, e.g., in an “afro hair” form in the step of etching theBARC film 52, so that the thickness and width are recovered. - According to the embodiment, the thickness of the
photoresist film 53 can be recovered. Accordingly, the processability of the wafer W can be significantly enhanced by applying the embodiment to the wafer W including the thin,smooth photoresist film 53 and thesolid BARC film 52, which makes it possible to etch a SiN film thicker than the conventional art. - The step of increasing the thickness of the mask layer according to the embodiment uses a mixed gas of a depositive gas and SF6 gas as a processing gas, wherein CH3F gas is preferably utilized as the depositive gas. Because of a number of hydrogen atoms, CH3F gas easily reacts with the
photoresist film 53 and allows deposits to be effectively deposited on the upper surface of thephotoresist film 53, so that the thickness of thephotoresist film 53 may be increased. SF6 gas serves to smooth the surface of thephotoresist film 53. - In the embodiment, a mixing ratio of SF6 gas with respect to CH3F gas is preferably equal to or less than 1.5, and more preferably range from about 1 to about 1.5. For example, when the supply amount of CH3F gas is 200 sccm, the supply amount of SF6 gas is set to be equal to or less than 300 sccm.
- When the flow rate of SF6 gas with respect to CH3F gas is excessively small, the deposits are deposited even onto the surface of the
SiN film 51, whereas the amount of the deposits attached on the surface of thephotoresist film 53 is deficient when the flow rate is too large, which causes the thickness of thephotoresist film 53 to be insufficiently recovered. When the flow rate ratio of CH3F gas and SF6 gas falls within the above range, the deposit attachment operation of CH3F gas is balanced with the deposit control operation or smoothing operation of SF6 gas, so that the thickness of thephotoresist film 53 may be effectively recovered without the deposits being attached to the SiN film. - Although SF6 gas is considered as a gas for exerting an etching effect thanks to a large percentage of fluorine, SF6 gas contains sulfur (S) so that the deposit attachment operation is shown by S-based reaction product. By this, the smoothing effect is considered to be exerted, which prevents the upper surface of the
photoresist film 53 from being roughened and worn. - In the embodiment, the bias power for the mask layer thickness recovery step is preferably about 50 W to 200 W. When the bias power is less than 50 W, the deposits are insufficiently attached onto the surface of the
photoresist film 53. On the other hand, when the bias power exceeds 200 W, thephotoresist film 53 is easily roughened due to sputtering. A temperature for substrate processing is not particularly limited, but practically preferably range from about 20° C. to about 100° C. Further, the power (source power) for generating plasma is not particularly limited, but may be changed, for example, depending on the apparatus used. - In the embodiment, the pressure in the chamber preferably may range from about 2 Pa (15 mTorr) to about 5.2 Pa (40 mTorr) in the mask layer thickness recovery step. When the processing pressure is too low, the surface of the substrate is easily roughened. On the other hand, when the processing pressure is too high, the surface of the substrate is easily worn.
- In the embodiment, the processing time for the mask layer thickness recovery step is, for example, from 20 seconds to 40 seconds. A speed at which the deposits are attached onto the surface of the
photoresist film 53 is highest at the beginning of processing, and then gradually lowered since the speed is nearly converged after about 30 seconds. - In the embodiment, although the mechanism of recovering the thickness of the
photoresist film 53 is not necessarily clear, it is considered that the deposit deposition operation by CH3F gas may be balanced with the deposit control operation or smoothing operation by SF6 gas by adjusting the flow rate ratio of SF6 gas respective of CH3F gas, the bias power, and the processing pressure within the above-mentioned respective ranges in the mask layer thickness recovery step. By doing so, the deposits may be selectively attached onto the upper surface of thephotoresist film 53, so that the thickness of thephotoresist film 53 worn during the etching of theBARC film 52 can be recovered. - In the embodiment, a gas containing a halogen element, such as chlorine (Cl), bromine (Br), iodine (I) and fluorine (F) may be adopted instead of SF6 gas. Further, another gas containing S, Cl, Br, and I but not F may also be used as long as the gas provides the similar operation and effects.
- In the embodiment, the flow rates of Ar gas, N2 gas, and CH3F gas are preferably 300 to 900 sccm, 100 to 300 sccm, and 50 to 150 sccm, respectively, in the step of etching the
SiN film 51 subsequent to the mask layer thickness recovery step. - Here, the step of etching the
SiN film 51 is primarily performed by Ar gas. CH3F gas exerts an effect (selectivity) of depositing the deposits to control the etching speed by Ar gas. N2 gas controls the amount of attached deposits by CH3F gas. - In the embodiment, although it has been exemplified that the processing target film is the
SiN film 51, the processing target film is not limited thereto. For example, the processing target film may be a TiN film, or others. Further, although theBARC film 52 has been used as the intermediate film, the intermediate film is not limited to the BARC film. - In the embodiment, although there has been described the case where process modules are changed and separate chambers are used for each and every process, the processes may be sequentially carried out in the same chamber. By performing the processes in the same chamber, the transfer time of the wafer W can be shortened as well as costs for facilities can be reduced.
- In the embodiment, the step of increasing the thickness of the mask layer was performed after the
BARC film 52 of the wafer W was etched in order to recover the thickness of thephotoresist film 53 worn by the etching of theBARC film 52. However, the step of increasing the thickness of the mask layer may be carried out before theBARC film 52 is etched so as to increase the thickness of thephotoresist film 53 in advance so that the step of etching theBARC film 52 is applied to the wafer W in which thephotoresist film 53 has been thickened. This may also remove the influence caused when thephotoresist film 53 is worn so that theSiN film 51 may be etched well. - In the embodiment, the substrate on which plasma processing is performed is not limited to the wafer for semiconductor devices, but various substrates used for LCDs (Liquid Crystal Displays) or FPDs (Flat Panel Displays) or photomask, CD substrates, or print boards may be used.
- Further, another aspect of the present invention may be also accomplished by supplying a storage medium that stores program codes of software executing the functions suggested in the above-mentioned embodiment to a system or apparatus, so that a computer (or CPU, or MPU) included in the system or apparatus reads and executes the program codes stored in the storage medium.
- In this case, the program codes themselves read from the storage medium are configured to implement the above-described functions of the embodiment, and the program codes and the storage medium storing the program codes constitute the present invention.
- Further, the storage medium for supplying the program codes may include, for example, floppy (trade mark) discs, hard discs, magneto-optical discs, optical discs such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, or DVD+RW, magnetic tapes, non-volatile memory cards, ROMs, etc. Or, the program codes may be downloaded over a network.
- Further, the present invention also includes a case where the above-mentioned functions of the embodiment are implemented by executing the program codes read by the computer, and a part or entirety of actual processes is executed by an OS (Operating System) operated in the computer based on the instructions of the program codes, whereby the above-mentioned functions of the embodiment are realized.
- Further, the present invention also includes a case where the program codes read from the storage medium is written to a memory provided to a function expansion unit connected to the computer or a function extension board inserted into the computer, and then a part or entirety of actual processes for an extended function is executed by a CPU provided to the extension board or extension unit based on the instructions of the program codes, whereby the above-mentioned functions of the embodiment are realized. According to the substrate processing method of the present invention, there is provided the step of increasing the thickness of the mask layer by depositing deposits on the upper surface of the mask layer with an opening by using plasma generated from a mixed gas of a depositive gas represented as a general equation CxHyFz (where, x, y, and z are positive integers) and SF6, so that the thickness of the mask layer can be increased as necessary.
- The step of increasing the thickness of the mask layer is a step of recovering the thickness of the worn mask layer by etching the BARC film as an intermediate layer. Accordingly the thickness of the worn mask layer can be recovered by the step of etching the intermediate layer.
- The step of increasing the thickness of the mask layer is performed before the intermediate layer is etched, so that the thickness of the mask layer can be increased before the mask layer is worn, thereby making subsequent processes stable.
- The depositive gas is CH3F, so that deposits based on CH3F can be deposited on the upper surface of the mask layer, which increase the thickness of the mask layer.
- The mixing ratio of SF6 with respect to the depositive gas is set to be equal to or less than 1.5, so that a deposit deposition operation by the depositive gas, and a deposit control operation and a smoothing operation of the surface of the mask layer by SF6 can cause a synergy effect, which allows the deposits to be selectively attached onto the surface of the mask layer, thereby increasing the thickness of the mask layer.
- The mixing ratio of SF6 with respect to the depositive gas is set to be from 1 to 1.5, and thus the deposits can be selectively attached to the surface of the mask layer, thereby effectively increasing the thickness of the mask layer.
- Bias electric power of 50 W to 200 W is applied to the substrate in the step of increasing the thickness of the mask layer, so that the deposits can be selectively attached to the surface of the mask layer in combination with a gas mixing ratio and a processing pressure, thereby effectively increasing the thickness of the mask layer.
- The pressure of the atmosphere surrounding the substrate is adjusted to be from 2.0 Pa (15 mTorr) to 5.2 Pa (40 mTorr) in the step of increasing the thickness of the mask layer, so that the deposits can be effectively attached to the surface of the mask layer in combination with the bias electric power and the processing gas mixing ratio, thereby increasing the thickness of the mask layer.
- The processing time is set to be from 20 seconds to 40 seconds in the step of increasing the thickness of the mask layer, so that the deposits can be attached to the surface of the mask layer within a minimum processing time as necessary, thereby increasing the thickness of the mask layer.
- The mask layer is a photoresist film in the step of increasing the thickness of the mask layer, so that the deposits are attached to the surface of the photoresist film to increase the thickness of the photoresist film.
- While the invention has been shown and described with respect to the embodiments, it will be understood by those skilled in the art that various changes and modification may be made without departing from the scope of the invention as defined in the following claims.
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/558,047 US8252698B2 (en) | 2008-09-12 | 2009-09-11 | Substrate processing method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008234809A JP5107842B2 (en) | 2008-09-12 | 2008-09-12 | Substrate processing method |
JP2008-234809 | 2008-09-12 | ||
US11297008P | 2008-11-10 | 2008-11-10 | |
US12/558,047 US8252698B2 (en) | 2008-09-12 | 2009-09-11 | Substrate processing method |
Publications (2)
Publication Number | Publication Date |
---|---|
US20100068892A1 true US20100068892A1 (en) | 2010-03-18 |
US8252698B2 US8252698B2 (en) | 2012-08-28 |
Family
ID=42007607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/558,047 Active 2029-09-29 US8252698B2 (en) | 2008-09-12 | 2009-09-11 | Substrate processing method |
Country Status (5)
Country | Link |
---|---|
US (1) | US8252698B2 (en) |
JP (1) | JP5107842B2 (en) |
KR (1) | KR101536363B1 (en) |
CN (1) | CN101673683B (en) |
TW (1) | TWI392976B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102810472A (en) * | 2011-05-31 | 2012-12-05 | 南亚科技股份有限公司 | Method of reducing striation on a sidewall of a recess |
US10923353B2 (en) * | 2014-11-26 | 2021-02-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (FinFET) device with controlled end-to-end critical dimension and method for forming the same |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5180121B2 (en) * | 2009-02-20 | 2013-04-10 | 東京エレクトロン株式会社 | Substrate processing method |
JP5563860B2 (en) * | 2010-03-26 | 2014-07-30 | 東京エレクトロン株式会社 | Substrate processing method |
US9978563B2 (en) * | 2016-01-27 | 2018-05-22 | Tokyo Electron Limited | Plasma treatment method to meet line edge roughness and other integration objectives |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4666555A (en) * | 1985-08-23 | 1987-05-19 | Intel Corporation | Plasma etching of silicon using fluorinated gas mixtures |
US5520771A (en) * | 1990-09-26 | 1996-05-28 | Hitachi, Ltd. | Microwave plasma processing apparatus |
US20050103748A1 (en) * | 2002-06-27 | 2005-05-19 | Tokyo Electron Limited | Plasma processing method |
US20050274691A1 (en) * | 2004-05-27 | 2005-12-15 | Hyun-Mog Park | Etch method to minimize hard mask undercut |
US20060089005A1 (en) * | 2004-10-27 | 2006-04-27 | Lam Research Corporation | Photoresist conditioning with hydrogen ramping |
US20060163202A1 (en) * | 2005-01-21 | 2006-07-27 | Tokyo Electron Limited | Plasma etching method |
US20070163995A1 (en) * | 2006-01-17 | 2007-07-19 | Tokyo Electron Limited | Plasma processing method, apparatus and storage medium |
US20090035944A1 (en) * | 2007-07-08 | 2009-02-05 | Applied Materials, Inc. | Methods of for forming ultra thin structures on a substrate |
US20100048026A1 (en) * | 2008-08-25 | 2010-02-25 | Tokyo Electron Limited | Substrate processing method |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100327346B1 (en) * | 1999-07-20 | 2002-03-06 | 윤종용 | Plasma etching method using selective polymer deposition and method for forming contact hole using the plasma etching method |
CN101154569B (en) * | 2002-06-27 | 2014-05-14 | 东京毅力科创株式会社 | Plasma processing method |
JP2006156591A (en) * | 2004-11-26 | 2006-06-15 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
JP2006203035A (en) * | 2005-01-21 | 2006-08-03 | Tokyo Electron Ltd | Plasma etching method |
JP2007194284A (en) * | 2006-01-17 | 2007-08-02 | Tokyo Electron Ltd | Plasma treatment method, plasma treatment device, and storage medium |
CN101148765B (en) * | 2006-09-19 | 2010-05-12 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Silicon chip etching method |
KR100944846B1 (en) * | 2006-10-30 | 2010-03-04 | 어플라이드 머티어리얼스, 인코포레이티드 | Mask etch process |
-
2008
- 2008-09-12 JP JP2008234809A patent/JP5107842B2/en not_active Expired - Fee Related
-
2009
- 2009-09-10 KR KR1020090085461A patent/KR101536363B1/en active IP Right Grant
- 2009-09-10 CN CN2009101705390A patent/CN101673683B/en not_active Expired - Fee Related
- 2009-09-11 TW TW098130754A patent/TWI392976B/en not_active IP Right Cessation
- 2009-09-11 US US12/558,047 patent/US8252698B2/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4666555A (en) * | 1985-08-23 | 1987-05-19 | Intel Corporation | Plasma etching of silicon using fluorinated gas mixtures |
US5520771A (en) * | 1990-09-26 | 1996-05-28 | Hitachi, Ltd. | Microwave plasma processing apparatus |
US20050103748A1 (en) * | 2002-06-27 | 2005-05-19 | Tokyo Electron Limited | Plasma processing method |
US20050274691A1 (en) * | 2004-05-27 | 2005-12-15 | Hyun-Mog Park | Etch method to minimize hard mask undercut |
US20060089005A1 (en) * | 2004-10-27 | 2006-04-27 | Lam Research Corporation | Photoresist conditioning with hydrogen ramping |
US20060163202A1 (en) * | 2005-01-21 | 2006-07-27 | Tokyo Electron Limited | Plasma etching method |
US20070163995A1 (en) * | 2006-01-17 | 2007-07-19 | Tokyo Electron Limited | Plasma processing method, apparatus and storage medium |
US20090035944A1 (en) * | 2007-07-08 | 2009-02-05 | Applied Materials, Inc. | Methods of for forming ultra thin structures on a substrate |
US20100048026A1 (en) * | 2008-08-25 | 2010-02-25 | Tokyo Electron Limited | Substrate processing method |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102810472A (en) * | 2011-05-31 | 2012-12-05 | 南亚科技股份有限公司 | Method of reducing striation on a sidewall of a recess |
US10923353B2 (en) * | 2014-11-26 | 2021-02-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fin field effect transistor (FinFET) device with controlled end-to-end critical dimension and method for forming the same |
Also Published As
Publication number | Publication date |
---|---|
JP2010067895A (en) | 2010-03-25 |
TWI392976B (en) | 2013-04-11 |
KR101536363B1 (en) | 2015-07-13 |
TW201027278A (en) | 2010-07-16 |
CN101673683A (en) | 2010-03-17 |
CN101673683B (en) | 2013-01-09 |
JP5107842B2 (en) | 2012-12-26 |
US8252698B2 (en) | 2012-08-28 |
KR20100031476A (en) | 2010-03-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101048009B1 (en) | Substrate Processing Method | |
US8642483B2 (en) | Substrate processing with shrink etching step | |
US8105949B2 (en) | Substrate processing method | |
US8329050B2 (en) | Substrate processing method | |
JP5638413B2 (en) | Method for forming mask pattern | |
US8252698B2 (en) | Substrate processing method | |
JP2010283213A (en) | Substrate processing method | |
JP5604063B2 (en) | Substrate processing method and storage medium | |
KR20030031599A (en) | Method for fabricating semiconductor device | |
JP2013070098A (en) | Substrate processing method | |
US8986561B2 (en) | Substrate processing method and storage medium | |
JP5484363B2 (en) | Substrate processing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: TOKYO ELECTRON LIMITED,JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KUSHIBIKI, MASATO;NISHIMURA, EIICHI;REEL/FRAME:023440/0766 Effective date: 20090911 Owner name: TOKYO ELECTRON LIMITED, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KUSHIBIKI, MASATO;NISHIMURA, EIICHI;REEL/FRAME:023440/0766 Effective date: 20090911 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |
|
FEPP | Fee payment procedure |
Free format text: MAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |