US20080018799A1

US20080018799A1 - Video signal extracting method and related apparatus

Info

Publication number: US20080018799A1
Application number: US11/567,738
Authority: US
Inventors: Jen-Shi Wu; I-Hong Chen
Original assignee: MediaTek Inc
Current assignee: MediaTek Inc
Priority date: 2003-03-21
Filing date: 2006-12-07
Publication date: 2008-01-24
Also published as: TW200420141A; US20040183952A1; US7176984B2; TWI222836B

Abstract

A method and for extracting a chrominance signal of a video signal is disclosed. The method includes the following steps: generating a target video signal, a first delayed video signal, a second delayed video signal and a plurality of reference video signals; generating a HCS according to the target video signal; generating a VCS according to the target video signal and the plurality of reference video signals; generating a temporal chrominance signal; generating a SLFD according to the target video signal and the plurality of reference video signals; generating a weighting factor according to the target video signal, the second delayed video signal and the plurality of reference video signals; generating a spatial chrominance signal; and generating the chrominance signal of the video signal by determining the spatial chrominance signal, the temporal chrominance signal and the weighting factor.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This is a continuation-in-part of a co-pending U.S. patent application Ser. No. 10/708,706, which was filed on Mar. 19, 2004 and is included herein by reference.

BACKGROUND

The invention relates to a video signal separator, and more particularly, to a method and related apparatus for separating a luminance signal from a video signal.
It has been over fifty years since color TVs were introduced to the public. A composite color TV signal (video signal in brief) for a color TV includes luminance as well as chrominance information. A luminance signal of the video signal works with frequencies ranging from 0 (DC) to 5.5 MHz, while a chrominance signal, which is carried by a carrier, works from 3.58 MHz to 4.43 MHz and overlaps the luminance signal. Numerous patents, such as U.S. Pat. No. 4,703,342, U.S. Pat. No. 4,954,885, U.S. Pat. No. 5,225,899, U.S. Pat. No. 5,231,477, U.S. Pat. No. 5,231,478, U.S. Pat. No. 5,386,244, U.S. Pat. No. 5,416,531, U.S. Pat. No. 5,416,532, U.S. Pat. No. 5,517,255, and EP0161923A2, have disclosed different methods and apparatus to separate the luminance signal from the video signal.
FIG. 1 is a function block diagram of a video signal separator 10 according to the prior art. The video signal separator 10 is capable of separating an analog video signal into a luminance signal and a chrominance signal. The video signal separator 10 includes an analog/digital converter (ADC) 12 for converting the analog video signal into a digital downward reference video signal DRVS, a first line delay circuit 14 electrically connected to the ADC 12 for delaying the DRVS by one horizontal line (will be described in more details later) so as to generate a target video signal TVS, a second line delay circuit 16 electrically connected to the first line delay circuit 14 for delaying the TVS by one horizontal line so as to generate an upward reference video signal URVS, a horizontal reference chrominance signal generator 18 (HRCS generator) for receiving the DRVS, the TVS and the URVS so as to generate a horizontal reference chrominance signal HRCS, a vertical reference chrominance signal generator 20 (VRCS generator) for receiving the TVS so as to generate a vertical reference chrominance signal VRCS, a horizontal/vertical reference chrominance signal generator 22 (HVRCS generator) for receiving the DRVS, the TVS and the URVS so as to generate a horizontal/vertical reference chrominance signal HVRCS, a judging device 24 for receiving the DRVS, the TVS and the URVS so as to generate a select signal, a multiplexer 26 for outputting one of three signals HRCS, VRCS and HVRCS by determining the select signal transmitted from the judging device 24, and a subtractor 28 for subtracting signals output by the multiplexer 26 from the TVS so as to generate the luminance signal, and a signal output from the multiplexer 26 being the chrominance signal.
The ADC 12 samples the analog video signal with a sampling frequency f_s, which is four times a color subcarrier f_sc, and generates the DRVS, so chrominance signals of two adjacent sampling points have ninety degrees of phase difference. Since the color subcarrier f_scis equal to (455/2)fH, wherein fH is a horizontal scan frequency, which is equal to the amount of horizontal scan lines projected onto a screen 40 per second by a cathode tube of a color TV, chrominance signals of any sampling points on two adjacent horizontal scan lines have 180 degrees of phase difference. FIG. 2 illustrates a phase diagram of chrominance signals of any sampling points of three adjacent horizontal scan lines on screen 40 according to the prior art. A first line 42, a second line 44 and a third line 46 each include five sampling points, and an arrow embraced in a sampling point indicates a phase of the sampling point. For example, three sampling points 48, 50 and 52 are respectively represented by Y+C, Y−C and Y+C, wherein Y represents a luminance signal of a sampling point while C represents a chrominance signal of a sampling point, and chrominance signals of the sampling points 48 (Y+C) and 50 (Y−C) have 180 degrees of phase difference.
Operations of the video signal separator 10 are described as follows: Please refer to FIG. 1 again. When a video signal of an NTSC (National Television Standards Committee) system travels through the ADC 12, the ADC 12 transforms the video signal into the DRVS with the sampling frequency f_s. Then the first line delay circuit 14 delays the DRVS by a horizontal scan line so as to generate the TVS. The second line delay circuit 16 delays the TVS by a horizontal scan line and generates the URVS. The HRCS generator 18, the VRCS generator 20 and the HVRCS generator 22 respectively transform the DRVS, the TVS, and the URVS into the HRCS, the VRCS, and the HVRCS. For example, a transfer function for the HRCS generator 18 can be Ch(Z)=(−¼)(1−Z⁻²)², a transfer function for the VRCS generator 20 can be Cv(Z)=(−¼)(1−Z^−L)², and a transfer function for the HVRCS generator 22 can be Chv(Z)=(−¼)(1−Z⁻²)²(−¼)(1−Z^−L)², wherein Z⁻¹represents delaying a sampling point while Z^−Lrepresents delaying a horizontal scan line. Then the multiplexer 26 determines the select signal transmitted from the judging device 24 and outputs one of the HRVS, the VRCS and the HVRCS. How the judging device 24 generates the select signal is described as follows.
FIG. 3 illustrates a function block diagram of the judging device 24 according to the prior art. The judging device 24 includes a horizontal luminance signal non-correlated value calculator 60 (HLNC calculator) for calculating a horizontal luminance signal non-correlated value HLNC, a horizontal chrominance signal non-correlated value calculator 62 (HCNC generator) for calculating a horizontal chrominance signal non-correlated value HCNC, a vertical luminance signal non-correlated value calculator 64 (VLNC generator) for calculating a vertical luminance signal non-correlated value VLNC, and a vertical chrominance signal non-correlated value calculator 66 (VCNC generator) for calculating a vertical chrominance signal non-correlated value VCNC, and a judging circuit 68 for generating the select signal according to the HLNC, the HCNC, the VLNC and the VCNC. The judging circuit 68 determines a smallest non-correlated value among these four non-correlated values and generates the select signal to guide the multiplexer 26 to output the HRVS, the VRCS or the HVRCS according to the smallest non-correlated value. The aforementioned calculator 60, 62, 64 and 66 are all used to calculate non-correlation among a plurality of signals. The non-correlation calculation is well known by those skilled in the art, and a detailed description is omitted here.
As the judging device 24 generates the select signal, the multiplexer 26 is capable of generating the chrominance signal according to the select signal. Then the subtractor 28 calculates the luminance signal by subtracting the chrominance from the video signal, that is, separating the luminance signal from the video signal.
The video signal separator 10 of the prior art has at least two drawbacks:
1. The judging device 24 of the video signal separator 10 depends on only three video signals (the DRVS, TVS and URVS) to generate the select signal. That the judging device 24 depends on only the TVS and two video signals respectively disposed upward and downward next to the TVS to generate the select signal is likely to generate a non-appropriate select signal and further calculates a false luminance signal and chrominance signal as well. For example, if the differences from the TVS to the upward as well as to the downward video signal are both significantly large while these two differences differs slightly from each other, the VLNC calculator 64 of the judging device 24 calculates a small VLNC and the judging circuit 68 transmits corresponding select signal to the multiplexer 26 according to the small VLNC, misleading the multiplexer 26 to output false luminance signal and chrominance signal.
2. The video signal separator 10 of the prior art generates the luminance signal as well as the chrominance signal in a so-called hard decision way—the multiplexer 26 only outputs one of the HRVS, TVS and VRVS as the luminance signal. When the non-correlated values respectively generated by the calculators 60, 62, 64 and 66 differs significantly from one another, the hard decision can calculate a luminance signal and a chrominance signal both with a tolerable error. However, when the non-correlated values generated by the calculators 60, 62, 64 and 66 are not significantly differ from one another, the select signal output from the judging device 24 by referring to these non-correlated values may mislead the multiplexer 26 to output improper luminance signal and chrominance signal.

SUMMARY OF THE INVENTION

It is therefore an objective of the invention to provide a video signal separator and related apparatus capable of separating a luminance signal from a video signal of a video image displayed on a display device based on five horizontal scan lines and two frame delayed scan lines to overcome the drawbacks of the prior art.
According to an embodiment of the invention, a method for extracting a chrominance signal from a video signal is disclosed. The method comprises the following steps: generating a target video signal, a first delayed video signal, a second delayed video signal and a plurality of reference video signals by delaying the video signal; generating a horizontal chrominance signal (HCS) according to the target video signal; generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signals; generating a temporal chrominance signal according to the target video signal and the first delayed video signal; generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; generating a weighting factor according to the target video signal, the second delayed video signal and the plurality of reference video signals; generating a spatial chrominance signal by determining the HCS, the VCS, and the SLFD; and generating the chrominance signal of the video signal by determining the spatial chrominance signal, the temporal chrominance signal and the weighting factor.
According to another embodiment of the invention, a method for extracting a chrominance signal from a video signal is disclosed. The method comprising the following steps: generating a target video signal, a first delayed video signal, a second delayed video signal and a plurality of reference video signals by delaying the video signal; generating a horizontal chrominance signal (HCS) according to the target video signal; generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signals; generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; and generating the chrominance signal by determining the HCS, the VCS, and the SLFD.
According to another embodiment of the invention, a video signal processor for extracting a chrominance signal from a video signal provided. The video signal processor comprises a delay unit, a horizontal chrominance signal generator, a vertical chrominance signal generator, a temporal chrominance signal generator, a horizontal/vertical fading factor generator, a weighting factor generator, a spatial chrominance signal generator, and a chrominance signal generator. The delay unit is utilized for generating a target video signal, a first delayed video signal, a second delayed video signal, and a plurality of reference video signals by delaying the video signal; the horizontal chrominance signal generator is utilized for generating a horizontal chrominance signal (HCS) according to the target video signal; the vertical chrominance signal generator is utilized for generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signal; the temporal chrominance signal generator is utilized for generating a temporal chrominance signal according to the target video signal and the first delayed video signal; the horizontal/vertical fading factor generator is utilized for generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; the weighting factor generator is utilized for generating a weighting factor according to the target video signal, the second delayed video signal and the plurality of reference video signals; the spatial chrominance signal generator is utilized for generating a spatial chrominance signal according to the HCS, the VCS, and the SLFD; and the chrominance signal generator is utilized for generating the chrominance signal of the video signal according to the temporal chrominance signal, the spatial chrominance signal and the weighting factor.
According to another embodiment of the invention, a video signal processor for extracting a chrominance signal from a video signal is provided. The video signal comprises a delay unit, a horizontal chrominance signal generator, a vertical chrominance signal generator, a horizontal/vertical fading factor generator, and a chrominance signal generator. The delay unit is utilized for generating a target video signal and a plurality of reference video signals by delaying the video signal; the horizontal chrominance signal generator is utilized for generating a horizontal chrominance signal (HCS) according to the target video signal; the vertical chrominance signal generator is utilized for generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signal; the horizontal/vertical fading factor generator is utilized for generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; and the chrominance signal generator is utilized for generating a spatial chrominance signal according to the HCS, the VCS, and the SLFD.
It is an advantage of the invention that a video signal separator for separating a luminance signal from a video signal according to differences of a horizontal scan line and another four horizontal scan lines, and also according to differences of the horizontal scan line and another two frame delayed scan lines in soft decision can prevent an error that a judging device of the prior art video signal separator makes in determining a select signal from occurring.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a function block diagram of a video signal separator according to the prior art.
FIG. 2 is a phase diagram of chrominance signals of any sampling points of three adjacent horizontal scan lines according to the prior art.
FIG. 3 is a function block diagram of a judging device of the video signal separator shown in FIG. 1 according to the prior art.
FIG. 4 is a function block diagram of a video signal separator according to the invention.
FIG. 5 is a diagram of a Sigmoid-like curve.
FIG. 6 is a function block diagram of a HIC of the video signal separator shown in FIG. 4 according to the invention.
FIG. 7 is a function block diagram of a VIC of the video signal separator shown in FIG. 4 according to the invention.
FIG. 8 is a function block diagram of intermediate reference signal generators of the video signal separator shown in FIG. 4 according to the invention.
FIG. 9 is a function block diagram of a UDFD generator of the video signal separator shown in FIG. 4 according to the invention.
FIG. 10 is a function block diagram of a video signal processor according to an embodiment of the invention.
FIG. 11 is a function block diagram illustrating the temporal chrominance signal generator shown in FIG. 10 according to the invention.
FIG. 12 is a function block diagram illustrating the weighting factor generator shown in FIG. 10 according to the invention.

DETAILED DESCRIPTION

FIG. 4 is a function block diagram of a video signal separator 70 according to one embodiment of the invention. The video signal separator 70 is capable of separating a video signal, like an NTSC signal as well as a PAL (phase alternation by line) signal, into a luminance signal S_cand a chrominance signal S_y. The video signal separator 70 includes an ADC 72 for transferring a video signal into a digital second downward reference video signal S_dn2, a first line delay circuit 74 for delaying the S_dn2by a horizontal scan line so as to generate a first downward reference video signal S_dn1, a second line delay circuit 76 for delaying the S_dn1by a horizontal scan line so as to generate a target video signal S_obj, a third line delay circuit 78 for delaying the S_objby a horizontal scan line so as to generate a first upward reference video signal S_up1, a fourth line delay circuit 80 for delaying the S_up1by a horizontal scan line so as to generate a second upward reference video signal S_up2, a horizontal chrominance signal generator 82 (HCS generator) for generating a horizontal chrominance signal S_hcaccording to the S_obj, a horizontal/vertical fading factor generator 84 (SLFD generator) for generating a horizontal/vertical fading factor SLFD according to the S_objas well as the plurality of reference video signals S_dn1, S_dn2, S_up1, and S_up2, a vertical chrominance signal generator 92 (VCS generator) for generating a vertical chrominance signal S_vc, a chrominance signal generator 98 (CS generator) for generating the S_caccording to the S_hc, the S_vc, the SLFD and an equation 1 S_c=SLFD*S_hc+(1−SLFD)*S_vc, and a luminance signal generator 100 (LS generator) for generating the S_yby subtracting the S_cfrom the S_obj.
How the SLFD generator 84 generates the SLFD is described as follows: Please refer to FIG. 4 again. The SLFD generator 84 of the video signal separator 70 includes a horizontal interference calculator 86 (HIC) for calculating a horizontal chrominance interfering factor D_hcas well as a horizontal luminance interfering factor D_hyaccording to the reference signals S_dn1, S_dn2, S_up1, and S_up2, a horizontal difference generator 87 (H_diffgenerator) for generating a horizontal difference H_diffaccording to the D_hcas well as the D_hy, a vertical interference calculator 88 (VIC) for calculating a vertical chrominance interfering factor D_vcas well as a vertical luminance interfering factor D_vyaccording to the reference signals S_dn1, S_dn2, S_up1, and S_up2, a vertical difference generator 89 (V_diffgenerator) for generating a vertical difference V_diffaccording to the D_vcas well as the D_vy, and a SLFD module 90 for generating the SLFD according to the H_diff, the V_diffand an equation 2 (i.e., SLFD=Lim(k*V_diff−H_diff)), wherein k is a weighing parameter and Lim( ) is a Sigmoid-like curve.
FIG. 5 illustrates a diagram of the Sigmoid-like curve in this embodiment. As shown in FIG. 5, when k*V_diff−H_diffis greater or less than a tolerance of error D, the video signal separator 70 is not different from the video signal separator 10 of the prior art. When k*V_diff−H_difffalls into a region from +D to −D, the video signal separator 70 of the invention generates the S_cas well as the S_yby determining a SLFD mapped on the Sigmoid-like curve by k*V_diff−H_diff. In essence, this embodiment generates S_cand S_yin a so-called soft decision instead of the hard decision. The SLFD can be treated as a weighing factor for the calculations between S_hcand S_vcto generate S_cand S_y. In other words, if k*V_diffis less than H_diffby D, this indicating that a difference between the vertical samples multiplied by k is much less than a difference between the horizontal samples, the video signal separator 70 therefore generates the S_cand the S_yaccording to the S_vc; on the contrary, if k*V_diffis greater than H_diffby D, the video signal separator 70 generates the S_cand the S_yaccording to the S_hc
The H_diffgenerator 87 of the SLDF generator 84 refers to an equation 3 (i.e., H_diff=a*D_hy+(1−a)*D_hc) to calculate H_diffwhile the V_diffgenerator 89 of the SLDF generator 84 refers to an equation 4 (i.e., V_diff=b*D_vy+(1−a)*D_vc) to calculate V_diff. An “a” in the equation 3 and a “b” in the equation 4 are both weighting parameters and can be modified according to the video signal or to a TV system from which the video signal comes.
The process to generate D_hc, D_hy, D_vcand D_vyis described as follows: Please refer to FIG. 6 and FIG. 7. FIG. 6 is a circuit diagram of the HIC 86. FIG. 7 is a circuit diagram of the VIC 88. The HIC 86 includes a first adder 110 for generating a first vertical luminance interfering signal V_y1by adding the S_up1to the S_obj, a first 1-D comb filter 112 for transferring the V_y1into a first vertical luminance filtered signal V_fy1, a second adder 114 for generating a second vertical luminance interfering signal V_y2by adding the S_dn1to the S_obj, a second 1-D comb filter 116 for transferring the V_y2into a second vertical luminance filtered signal V_fy2, a third adder 118 for generating a vertical luminance signal S_vyby adding the V_fy2to the v_fy1, a first absoluter 120 for transferring the S_vyinto a positive vertical luminance signal S_pvy, a first low pass filter 122 for transferring the S_pvyinto the D_hy, a sample point delay circuit 124 for generating a rightward reference video signal S_rrefby delaying the S_objby two sampling points, a subtractor 126 for generating a horizontal chrominance interfering signal H_cby subtracting the S_rreffrom the S_obj, a 2-D comb filter 128 for transferring the H_cinto a horizontal chrominance filtered signal H_fc, a second absoluter 130 for transferring the H_fcinto a positive horizontal chrominance signal S_phc, and a second low pass filter 132 for transferring the S_phcinto the D_hc.
Please refer to FIG. 7, the VIC 88 includes a first subtractor 150 for generating a first vertical chrominance interfering signal V_c1, by subtracting the S_up1from the S_obj, a second subtractor 152 for generating a second vertical chrominance interfering signal V_c2by subtracting the S_dn1from the S_obj, a third subtractor 154 for generating a vertical chrominance signal S_vcby subtracting the V_c1from the V_c2, a third absoluter 156 for transferring the S_vcinto a positive vertical chrominance signal S_pvc, a third low pass filter 158 for transferring the S_pvcinto the D_vc, a first sample point delay circuit 160 (first 2D) for generating a first rightward reference video signal S_r1refby delaying the S_up1, by two sampling points, a fourth adder 162 for generating a first luminance interfering signal H_y1by adding the S_up1to the S_r1ref, a second sample point delay circuit 164 (second 2D) for generating a second rightward reference video signal S_r2refby delaying the S_dn1by two sampling points, a fifth adder 166 for generating a second horizontal luminance interfering signal H_y2by adding the S_dn1to the S_r2ref, a fourth subtractor 168 for generating a horizontal luminance signal S_hyby subtracting the H_y1from the H_y2, a fourth absoluter 170 for transferring the S_hyinto a positive horizontal luminance signal S_phy, and a fourth low pass filter 172 for transferring the S_phyinto the D_vy.
How the VCS generator 92 generates the S_vcis described as follows: The VCS generator 92 includes a intermediate video signal generator 93 (IVS generator), an up/down fading factor generator 94 (UDFD generator) and a vertical reference video signal generator 96 (VRVS generator). IVS generator 93 generates a plurality of intermediate video signals according to the S_objand the S_dn1, S_dn2, S_up1, and S_up2. IVS generator 93 also generates an upward chrominance signal (UCS) according to the S_objand the S_up1, and a downward chrominance signal (DCS) according to the S_objand the S_dn1. UDFD generator 94 calculates an UP/down fading factor UDFD according the plurality of intermediate video signals. VRVS generator 96 generates the S_vcaccording to the UCS, the DCS and the UDFD, and S_vcin reference to the equation of S_vc=UDFD*UCS+(1−UDFD)*DCS.
How the IVS generator 93 of the VCS generator 92 generates the plurality of intermediate video signals is described as follows: Please refer to FIG. 8, which is a function block diagram of the IVS generator 93 according to the invention. The IVS generator 93 includes a first upward video signal generator 180 for generating a first upward video signal S_sup1according to the S_objand the S_up1, a second upward video signal generator 182 for generating a second upward video signal S_sup2according to the S_up1and the S_up2, a first downward video signal generator 184 for generating a first downward video signal S_sdn1according to the S_objand the S_dn1, and a second downward video signal generator 186 for generating a second downward video signal S_sdn2according to the S_dn1and the S_dn2.
Video signal generators 180, 182, 184 and 186 of the IVS generator 93 respectively include an adder 188, a multiplier 190, a subtractor 192 and a demodulator 194. The plurality of intermediate video signals S_sup1, S_sup2, S_sdn1and S_sdn2each includes a video luminance signal, a first chrominance signal heading to a first direction, and a second chrominance signal heading to a second direction, which is not parallel but usually perpendicular to the first direction.
How the plurality of video generators 180, 182, 184 and 186 generate a video luminance signal Y_cu, a video first chrominance signal U_cuand a video second chrominance signal V_cu, all shown in FIG. 8, is described as follows: Cite the first upward video signal generator 180 as an example. The Y_cuis an arithmetic mean of the S_up1and the S_obj. The U_cuand the V_cuare both demodulated from the demodulator 194 by demodulating a signal generated by subtracting the Y_cufrom the S_obj. The demodulator 194 demodulates the Y_cubased on the carrier (mentioned in prior art).
How the UDFD generator 94 of the VCS generator 92 generates the UDFD is described as follows: FIG. 9 is a function block diagram of the UDFD generator 94 according to the embodiment. The UDFD generator 94 includes an upward difference generator 97 for generating an upward difference Diff_upaccording to the S_sup1and the S_sup2, a downward difference generator 95 for generating a downward difference Diff_dnaccording to the S_sdn1and the S_sdn2, and an upward/downward difference module 99 for generating the UDFD according to the Diff_upand the Diff_dn. The UDFD, the Diff_upand the Diff_dnobey an equation 5 (i.e., UDFD=Lim(Diff_dn−Diff_up)), wherein Diff_up=ABS(Y_u−Y_cu)+sqrt((U_u−U_cu)²+(V_u−V_cu)²), wherein ABS(x) represents an absolute value of x, and sqrt(y) is a square root of y.
In contrast to the prior art, this embodiment of the invention can provide a video signal separator, which is capable of calculating differences between a video signal located on a horizontal scan line and another four horizontal scan lines, and of then calculating a luminance signal and a chrominance signal of the video signal in soft decision based on the differences and these five horizontal scan lines, for preventing an error the judging device 24 of the prior art video signal separator 10 makes in determining the select signal from occurring. Additionally, the weighting parameters k, a and b in equation 1, 2 and 3 can be selectively modified to adapt to a video signal and a TV system in which the video system stays as well.
Please refer to FIG. 10. FIG. 10 is a function block diagram of a video signal processor 200 according to an embodiment of the invention. The video signal processor 200 is capable of separating a video signal, like an NTSC signal as well as a PAL (phase alternation by line) signal, into a luminance signal S_yand a chrominance signal S_c. The video signal processor 200 comprises an ADC 272, a delay unit 270, a horizontal chrominance signal generator 282 (HCS generator), a horizontal/vertical fading factor generator 284 (SLFD generator), a vertical chrominance signal generator 292 (VCS generator), a spatial chrominance signal generator 981, a temporal chrominance signal generator 982, a weighting factor generator 983, a blending device 984, and a luminance signal generator 985 (LS generator). The delay unit 270 comprises a first line delay circuit 274, a second line delay circuit 276, a third line delay circuit 278, a fourth line delay circuit 280, a first frame delay device 282, and a second frame delay device 284. The ADC 272 samples the video signal with a sampling frequency f_s, which is for example four times a color subcarrier f_sc, and generates a digital second downward reference video signal S_dn2. The first line delay circuit 274 delays the S_dn2by a horizontal scan line so as to generate a first downward reference video signal S_dn1. The second line delay circuit 276 delays the S_dn1by a horizontal scan line so as to generate a target video signal S_obj. The third line delay circuit 278 delays the S_objby a horizontal scan line so as to generate a first upward reference video signal S_up1. The fourth line delay circuit 280 delays the S_up1by a horizontal scan line so as to generate a second upward reference video signal S_up2. The first frame delay device 282 generates the first delayed video signal F1 by delaying the target video signal S_objby a video frame. And the second frame delay device 284 generates the second delayed video signal F2 by delaying the first delayed video signal F1 by a video frame. The horizontal chrominance signal generator 282 (HCS generator) generates a horizontal chrominance signal (i.e. HCS) S_hcaccording to the S_obj. The horizontal/vertical fading factor generator 284 (SLFD generator) generates a horizontal/vertical fading factor SLFD according to the S_objas well as the plurality of reference video signals S_dn1, S_dn2, S_up1and S_up2. The vertical chrominance signal generator 292 (VCS generator) generates a vertical chrominance signal (i.e. VCS) S_vc. The temporal chrominance signal 982 generates a temporal chrominance signal S_tcaccording to the target video signal S_objand the first delayed video signal F1. The weighting factor generator 983 generates a weighting factor WT according to the target video signal S_obj, the second delayed video signal F2, and the plurality of reference video signals S_dn1, S_dn2, S_up1and S_up2. The spatial chrominance signal generator 981 generates a spatial chrominance signal S_pcaccording to the S_hc, S_vc, and SLFD in reference to equation 1, i.e. S_pc=SLFD*S_hc+(1−SLFD)*S_vc. The blending device 984 generates the chrominance signal S_caccording to the weighting factor WT, the spatial chrominance signal S_pc, and the temporal chrominance signal S_tc. The luminance signal generator 985 (LS generator) generates the luminance signal S_yby subtracting the chrominance signal S_cfrom the S_obj.
Please refer to FIG. 6, FIG. 7 and FIG. 10 again. The SLFD generator 284 of the video signal processor 200 includes a horizontal interference calculator 2841 (HIC) for calculating a horizontal chrominance interfering factor D_hcas well as a horizontal luminance interfering factor D_hyaccording to the reference signals S_dn1, S_up1and the target video signal S_obj, a horizontal difference generator 2842 (H_diffgenerator) for generating a horizontal difference H_diffaccording to the D_hcas well as the D_hy, a vertical interference calculator 2843 (VIC) for calculating a vertical chrominance interfering factor D_vcas well as a vertical luminance interfering factor D_vyaccording to the reference signals S_dn1, S_up1and the target video signal S_obj, a vertical difference generator 2844 (V_diffgenerator) for generating a vertical difference V_diffaccording to the D_vcas well as the D_vy, and a SLFD module 2845 for generating the SLFD according to the H_diff, the V_diffin reference to the equation 2 (i.e., SLFD=Lim(k*V_diff−H_diff)), wherein k is a weighting and Lim( ) is a Sigmoid-like curve.
Please refer to FIG. 5 again, which illustrates the diagram of the Sigmoid-like curve in this embodiment. As shown in FIG. 5, when k*V_diff−H_diffis greater or less than a tolerance of error D, the spatial chrominance signal S_pcthat generated by the spatial chrominance signal generator 981 do not vary considerably from the video signal separator 10 of the prior art. When k*V_diff−H_difffalls into a region from +D to −D, the video signal processor 200 of the invention generates the S_pcby determining a SLFD mapped on the Sigmoid-like curve by k*V_diff−H_diff. In essence, this embodiment generates S_pcin a so-called soft decision instead of the hard decision. The SLFD can be treated as a weighting parameter for the calculations between S_hcand S_vcto generate S_pc. In other words, if k*V_diffis less than H_diffby D, this indicating that a difference between the vertical samples multiplied by k is much less than a difference between the horizontal samples, the spatial chrominance signal generator 981 therefore generates the S_pcaccording to the S_vc. On the contrary, if k*V_diffis greater than H_diffby D, the spatial chrominance signal generator 981 generates the S_pcaccording to the S_hc.
The H_diffgenerator 2842 of the SLDF generator 284 refers to the equation 3 (i.e., H_diff=a*D_hy+(1−a)*D_hc) to calculate H_diffwhile the V_diffgenerator 2844 of the SLDF generator 284 refers to the equation 4 (i.e., V_diff=b*D_vy+(1−a)*D_vc) to calculate V_diff. An “a” in the equation 3 and a “b” in the equation 4 are both weighing parameters and can be modified according to the video signal or to a TV system from which the video signal comes.
Please note that, to utilize the horizontal interference calculator 2841 and the vertical interference calculator 2843 for generating D_hc, D_hy, D_vcand D_vyare similar to the above-mentioned horizontal interference calculator 86 and the vertical interference calculator 88 as shown in FIG. 6 and FIG. 7, thus the detailed description is omitted here for brevity.
The VCS generator 292 includes an intermediate video signal generator 2921 (IVS generator), an up/down fading factor generator 2922 (UDFD generator) and a vertical reference video signal generator 2923 (VRVS generator). IVS generator 2921 generates a plurality of intermediate video signals according to the S_objand the S_dn1, S_dn2, S_up1and S_up2. IVS generator 93 also generates an upward chrominance signal (UCS) according to the S_objand the S_up1, and a downward chrominance signal (DCS) according to the S_objand the S_dn1. UDFD generator 2922 calculates an UP/down fading factor UDFD according the plurality of intermediate video signals. And VRVS generator 2923 for generating the S_vcaccording to the UCS, the DCS and the UDFD, and S_vcin reference to the equation of S_vc=UDFD*UCS+(1−UDFD)*DCS. Please note that, as the matter of fact that the VCS generator 292 is similar to the above-mentioned VCS generator 92 as shown in FIG. 8, thus the detailed description is omitted here for brevity. Furthermore, the UDFD generator 2922 is similar to the above-mentioned UDFD generator 94 as shown in FIG. 9, thus the detailed description is also omitted here for brevity.
Please refer to FIG. 11. FIG. 11 is a functional block diagram illustrating the temporal chrominance signal generator 982 shown in FIG. 10 according to the embodiment. The temporal chrominance signal generator 982 comprises a first operator 982 a and a delay module 982 b. The first operator 982 a subtracts the first delayed video signal F1 from the target video signal, and divides the subtraction result by two. As the matter of fact that the chrominance component of the target video signal having 180° differ from the chrominance component of the first delayed video signal F1, therefore the temporal chrominance signal S_tcof the video signal can be obtained through the first operator 982 a. Please note that, the temporal chrominance signal S_tcis delayed by the delay module 982 b in this embodiment in order to have a concurrent input time with the spatial chrominance signal S_pcand the weighting factor WT to reach the blending device 984.
Please refer to FIG. 12. FIG. 12 is a function block diagram illustrating the weighting factor generator 983 shown in FIG. 10 according to the embodiment. The weighting factor generator 983 comprises a second operator 983 a, an absolute value generator 983 b, a low pass filter 983 c, a delay module 983 d, a selecting module 983 e, and a third operator 983 f. The second delayed video signal F2 is inputted to the second operator 983 a, and the second operator 983 a subtracts second delayed video signal F2 from the target video signal S_objto generate a temporal chrominance difference T_diff, wherein the T_diffis the chrominance difference between the target video signal S_objand the second delayed video signal F2. As the matter of fact that the chrominance component of the video signal having the same phase with the chrominance component of the second delayed video signal F2, therefore the chrominance difference of the video signal can be obtained through the second operator 983 a. Furthermore, in order to obtain the absolute value of the chrominance difference, the absolute value generator 983 b is utilized to obtain the absolute value of the chrominance difference. Then, the absolute value of the chrominance difference is filtered by the low pass filter 984 c. Similar to the above-mentioned temporal chrominance signal generator 982, T_diffis delayed by a delay module 983 d in this embodiment in order to have a concurrent input time with the chrominance difference SP_diffto reach the third operator 983 f. In this embodiment, the selecting module 983 e is utilized for selecting, for example, the minimum chrominance difference of the H_diffand the V_diffto generate the chrominance difference SP_diff. Then the third operator 983 f receives the chrominance difference SP_diffand the T_diffto generate the weighting factor WT. In this embodiment, the third operator 983 f utilizes an equation (i.e., WT=SP_diff/(T_diff+SP_diff)) to obtain the weighting factor WT.
In addition, referring to the FIG. 10 again, the blending device 984 receives the weighting factor WT, the temporal chrominance signal S_tc, and the spatial chrominance signal S_pcto generate the chrominance signal S_caccording to an equation 7, i.e., S_c=(S_tc*WT)+(S_pc*(1−WT)). According to the equation 7, the weighting factor WT will decide the component of the temporal chrominance signal S_tcand the spatial chrominance signal S_pcthat form the chrominance signal S_c.
Please note that, after the chrominance signal S_cis generated, the luminance signal generator 985 (LS generator) subtracts the chrominance signal S_cfrom the S_objto generate the luminance signal S_yof the video signal. Accordingly, the chrominance signal S_cand the luminance signal S_yof the video signal can be extracted more precisely. Furthermore, the luminance signal generator 985 can be any type of luminance signal generator, and the detailed description is omitted here for brevity.
In contrast to the prior art, this embodiment of the invention can provide a video signal separator, which is capable of calculating differences between a video signal located on a horizontal scan line and another four horizontal scan lines, and calculating one difference between the video signal located on a horizontal scan line and one frame-delayed scan line and another difference between the video signal located on the horizontal scan line and another frame-delayed scan line, and then calculating a luminance signal and a chrominance signal of the video signal in soft decision based on the differences, these five horizontal scan lines, and the two frame delayed scan lines for preventing an error the judging device 24 of the prior art video signal separator 10 makes in determining the select signal from occurring. Additionally, the weighting parameters k, a and b in equation 1, 2 and 3 can be selectively modified to adapt to a video signal and a TV system in which the video system stays as well.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims

1. A method for extracting a chrominance signal from a video signal, the method comprising the following steps:

(a) generating a target video signal, a first delayed video signal, a second delayed video signal and a plurality of reference video signals by delaying the video signal;

(b) generating a horizontal chrominance signal (HCS) according to the target video signal;

(c) generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signals;

(d) generating a temporal chrominance signal according to the target video signal and the first delayed video signal;

(e) generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals;

(f) generating a weighting factor according to the target video signal, the second delayed video signal and the plurality of reference video signals;

(g) generating a spatial chrominance signal by determining the HCS, the VCS, and the SLFD; and

(h) generating the chrominance signal of the video signal by determining the spatial chrominance signal, the temporal chrominance signal and the weighting factor.

2. The method of claim 1, wherein the step (c) comprises:

(c1) generating an UDFD and a plurality of VRVSs according to the target video signal and the plurality of reference video signals; and

(c2) generating the VCS according to the UDFD and the plurality of VRVSs.

3. The method of claim 2, wherein the plurality of reference video signals generated in step (a) comprises a first upward reference video signal (URVS), a second URVS, a first downward reference video signal (DRVS), and a second DRVS, the video signal being the second DRVS, the first DRVS lagged the video signal by a first predetermined numbers of scan lines, the target video signal lagged the first DRVS by the first predetermined numbers of scan lines, the first URVS lagged the target video signal by the first predetermined numbers of scan lines, and the second DRVS lagged the first URVS by the first predetermined numbers of scan lines, and step (c1) comprises the following steps:

(h) generating a first upward video signal (UVS) according to the target video signal and the first URVS;

(i) generating a second UVS according to the first URVS and the second URVS;

(j) generating a first downward video signal (DVS) according to the target video signal and the first DRVS;

(k) generating a second DVS according to the first DRVS and the second DRVS;

(l) generating a Diff_upaccording to the first UVS and the second UVS;

(m) generating a Diff_dnaccording to the first DVS and the second DVS; and

(n) generating the UDFD according to the Diff_upand the Diff_dn.

4. The method of claim 3, wherein the UDFD is equal to Lim(Diff_dn−Diff_up), Lim( ) being a Sigmoid-like curve.

5. The method of claim 1, wherein the first delayed video signal is generated from delaying the target video signal by a second predetermined numbers of video frames, the second delayed video signal is generating from delaying the first delayed video signal by the second predetermined numbers of video frames, and step (f) comprises the following steps:

generating a horizontal chrominance interfering factor (Dhc) and a horizontal luminance interfering factor (Dhy) according to the target signal and the reference signals;

generating a horizontal difference (Hdiff) according to the Dhc and the Dhy;

generating a vertical chrominance interfering factor (Dvc) and a vertical luminance interfering factor (Dvy) according to the target signal and the reference signals;

generating a vertical difference (Vdiff) according to the Dvc and the Dvy; and

generating the weighting factor according to the Hdiff, the Vdiff, the target signal, and the second delayed video signal.

6. The method of claim 1, wherein step (e) comprises the following steps:

generating a horizontal difference (Hdiff) according to the Dhc and the Dhy;

generating a vertical difference (Vdiff) according to the Dvc and the Dvy; and

generating the SLFD according to the H_diffand the V_diff, wherein the SLFD is equal to Lim(k*V_diff−H_diff), Lim( ) being a Sigmoid-like curve, and k a weighting constant.

7. A method for extracting a chrominance signal from a video signal, the method comprising the following steps:

(d) generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; and

(e) generating the chrominance signal by determining the HCS, the VCS, and the SLFD.

8. The method of claim 7, wherein step (d) comprises the following steps:

generating a horizontal difference (Hdiff) according to the Dhc and the Dhy;

generating a vertical difference (Vdiff) according to the Dvc and the Dvy; and

9. The method of claim 7, wherein the plurality of reference video signals generated in step (a) comprises a first upward reference video signal (URVS), a second URVS, a first downward reference video signal (DRVS), and a second DRVS, the video signal being the second DRVS, the first DRVS lagged the video signal by a first predetermined numbers of scan lines, the target video signal lagged the first DRVS by the first predetermined numbers of scan lines, the first URVS lagged the target video signal by the first predetermined numbers of scan lines, and the second DRVS lagged the first URVS by the first predetermined numbers of scan lines.

10. A video signal processor for extracting a chrominance signal from a video signal comprising:

a delay unit for generating a target video signal, a first delayed video signal, a second delayed video signal, and a plurality of reference video signals by delaying the video signal;

a horizontal chrominance signal generator for generating a horizontal chrominance signal (HCS) according to the target video signal;

a vertical chrominance signal generator for generating a vertical chrominance signal (VCS) according to the target video signal and the plurality of reference video signal;

a temporal chrominance signal generator for generating a temporal chrominance signal according to the target video signal and the first delayed video signal;

a horizontal/vertical fading factor generator for generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals;

a weighting factor generator for generating a weighting factor according to the target video signal, the second delayed video signal and the plurality of reference video signals;

a spatial chrominance signal generator for generating a spatial chrominance signal according to the HCS, the VCS, and the SLFD; and

a chrominance signal generator for generating the chrominance signal of the video signal according to the temporal chrominance signal, the spatial chrominance signal and the weighting factor.

11. The video signal processor of claim 10, wherein the vertical chrominance signal generator comprises:

a intermediate video signal generator (IVS generator) for generating an upward chrominance signal, a downward chrominance signal and a plurality of intermediate video signals according to the target video signal and the references,

an UDFD generator, for generating a UDFD according to the plurality of intermediate video signals; and

a VRVS generator, for generating the VCS according to the upward chrominance signal, the downward chrominance signal and the UDFD.

12. The video signal processor of claim 11, wherein the plurality of intermediate video signals comprises a first upward video signal (UVS), a second UVS, a first downward video signal (DVS) and a second DVS, the IVS generator comprising:

a first UVS generator for generating the first UVS according to the target video signal and the first URVS;

a second UVS generator for generating the second UVS according to the first URVS and the second URVS;

a first DVS generator for generating the first DVS according to the target video signal and the first DRVS;

a second DVS generator for generating the second DVS according to the first DRVS and the second DRVS;

an upward chrominance signal generator for generating the upward chrominance signal according to the target video signal and the first URVS; and

a downward chrominance signal generator for generating the downward chrominance signal according to the target video signal and the first DRVS; and

the UDFD generator comprising:

a Diff_upgenerator for generating a upward difference (Diff_up) according to the first UVS and the second UVS;

a Diff_dngenerator for generating a downward difference (Diff_dn) according to the first DVS and the second DVS; and

a UDDM generator for generating the UDFD according to the Diff_upand the Diff_dn.

13. The video signal processor of claim 12, wherein the UDFD is equal to Lim(Diff_dn−Diff_up), Lim( ) being a Sigmoid-like curve.

14. The video signal processor of claim 12, wherein the first UVS comprises a Y_cu, a U_cuheading to a first direction and a V_cuheading to a second direction, which is not parallel to the first direction, and the second UVS comprises a Y_u, a U_uheading to the first direction and a V_uheading to the second direction, wherein Diff_upis equal to ABS(Y_u−Y_cu)+SQRT((U_u−U_cu)²+(V_u−V_cu)²), ABS(x) being an absolute value of x, and SQRT(y) being a square root of y.

15. The video signal processor of claim 12, wherein the first DVS comprises a Y_cd, a U_cdheading to a first direction and a V_cdheading to a second direction, which is not parallel to the first direction, and the second DVS comprises a Y_d, a U_dheading to the first direction and a V_dheading to the second direction, wherein Diff_dnis equal to ABS(Y_d−Y_cd)+SQRT((U_d−U_cd)²+(V_d−V_cd)²), ABS(x) being an absolute value of x, and SQRT(y) being a square root of y.

16. The video signal processor of claim 10, wherein the plurality of reference video signals comprises a first upward reference video signal (URVS), a second URVS, a first downward reference video signal (DRVS), and a second DRVS, the video signal being the second DRVS, the delay unit comprising:

a first delay device for generating the first DRVS by delaying the video signal by a first predetermined numbers of scan lines;

a second delay device for generating the target video signal by delaying the first DRVS by the first predetermined numbers of scan lines;

a third delay device for generating the first URVS by delaying the target video signal by the first predetermined numbers of scan lines;

a fourth delay device for generating the second DRVS by delaying the first URVS by the first predetermined numbers of scan lines;

a first frame delay device for generating the first delayed video signal by delaying the target video signal by a second predetermined numbers of video frames; and

a second frame delay device for generating the second delayed video signal by delaying the first delayed video signal by the second predetermined numbers of video frames.

17. The video signal processor of claim 16, wherein the horizontal/vertical fading factor generator comprises:

a horizontal interference calculator for calculating a horizontal chrominance interfering factor (D_hc) and a horizontal luminance interfering factor (D_hy) according to the target video signal and the plurality of reference video signals;

a vertical interference calculator for calculating a vertical chrominance interfering factor (D_vc) and a vertical luminance interfering factor (D_vy) according to the target video signal and the plurality of reference video signals;

a horizontal difference generator for generating a horizontal difference (H_diff) according to the D_hcand the D_hy;

a vertical difference generator for generating a vertical difference (V_diff) according to the D_vcand the D_vy; and

a SLFD module for generating the SLFD according to the H_diffand the V_diff;

wherein the SLFD is equal to Lim(k*V_diff−H_diff), Lim( ) being a Sigmoid-like curve, and k a weighing factor.

18. The video signal processor of claim 17, wherein the horizontal interference calculator comprises:

a first adder for generating a first vertical luminance interfering signal by adding the URVS to the target video signal;

a first 1-D comb filter for transferring the vertical luminance interfering signal into a first vertical luminance filtered signal;

a second adder for generating a second vertical luminance interfering signal by adding the DRVS to the target video signal;

a second 1-D comb filter for transferring the second vertical luminance interfering signal into a second vertical luminance filtered signal;

a third adder for generating a vertical luminance signal by adding the first vertical luminance filtered signal to the second vertical luminance filtered signal;

a first absoluter for transferring the vertical luminance signal into a positive vertical luminance signal;

a first low pass filter for transferring the positive vertical luminance signal into the D_hy;

a sample point delay circuit for generating a rightward reference video signal by delaying the target video signal by two sampling points;

a subtractor for generating a horizontal chrominance interfering signal by subtracting the rightward reference video signal from the target video signal;

a 2-D comb filter for transferring the horizontal chrominance interfering signal into a horizontal chrominance filtered signal;

a second absoluter for transferring the horizontal chrominance filtered signal into a positive horizontal chrominance signal; and

a second low pass filter for transferring the positive horizontal chrominance signal into the D_hc.

19. The video signal processor of claim 17, wherein the vertical interference calculator comprises:

a first subtractor for generating a first vertical chrominance interfering signal by subtracting the URVS from the target video signal;

a second subtractor for generating a second vertical chrominance interfering signal by subtracting the DRVS from the target video signal;

a third subtractor for generating a vertical chrominance signal by subtracting the first vertical chrominance interfering signal from the second vertical chrominance interfering signal;

a third absoluter for transferring the vertical chrominance signal into a positive vertical chrominance signal;

a third low pass filter for transferring the positive vertical chrominance signal into the D_vc;

a fourth adder for generating a first luminance interfering signal by adding a first rightward reference video signal to the URVS, the first rightward reference video signal lagging the URVS by twice an inverse of the sampling frequency;

a fifth adder for generating a second horizontal luminance interfering signal by adding a second rightward reference video signal to the downward reference video signal, the second rightward reference video signal leading the DRVS by twice an inverse of the sampling frequency;

a fourth subtractor for generating a horizontal luminance signal by subtracting the first horizontal luminance interfering signal from the second horizontal luminance interfering signal;

a fourth absoluter for transferring the horizontal luminance signal into a positive horizontal luminance signal; and

a fourth low pass filter for transferring the positive horizontal luminance signal into the D_vy.

20. The video signal processor of claim 17, wherein the weighting factor generator comprises:

a second operator for processing the target video signal and the second delayed video signal to generate a temporal chrominance difference (T_diff) between the target video signal and the second delayed video signal;

a selecting module for selecting one of the H_diffand the V_diffto generate a SP_diff; and

a third operator for generating the weighting factor according to the T_diffand the SP_diff.

21. The video signal processor of claim 16, wherein the temporal chrominance signal generator comprises:

a first operator for processing the target video signal and the first delayed video signal to generate the temporal chrominance signal.

22. A video signal processor for extracting a chrominance signal from a video signal comprising:

a delay unit for generating a target video signal and a plurality of reference video signals by delaying the video signal;

a horizontal/vertical fading factor generator for generating a horizontal/vertical fading factor (SLFD) according to the target video signal and the plurality of reference video signals; and

a chrominance signal generator for generating a spatial chrominance signal according to the HCS, the VCS, and the SLFD.

23. The video signal processor of claim 22, wherein the VCS generator comprises:

a UDFD generator, for generating a UDFD according to the plurality of intermediate video signals; and

24. The video signal processor of claim 23, wherein the plurality of intermediate video signals comprising a first upward video signal (UVS), a second UVS, a first downward video signal (DVS) and a second DVS, the IVS generator comprising:

the UDFD generator comprising:

25. The video signal processor of claim 23, wherein the UDFD is equal to Lim(Diff_dn−Diff_up), Lim( ) being a Sigmoid-like curve.

26. The video signal processor of claim 23, wherein the first UVS comprises a Y_cu, a U_cuheading to a first direction and a V_cuheading to a second direction, which is not parallel to the first direction, and the second UVS comprises a Y_u, a U_uheading to the first direction and a V_uheading to the second direction, wherein Diff_upis equal to ABS(Y_u−Y_cu)+SQRT((U_u−U_cu)²+(V_u−V_cu)²), ABS(x) being an absolute value of x, and SQRT(y) being a square root of y.

27. The video signal processor of claim 23, wherein the first DVS comprises a Y_cd, a U_cdheading to a first direction and a V_cdheading to a second direction, which is not parallel to the first direction, and the second DVS comprises a Y_d, a U_dheading to the first direction and a V_dheading to the second direction, wherein Diff_dnis equal to ABS(Y_d−Y_cd)+SQRT((U_d−U_cd)²+(V_d−V_cd)²), ABS(x) being an absolute value of x, and SQRT(y) being a square root of y.

28. The video signal processor of claim 22, wherein the plurality of reference video signals comprises a first upward reference video signal (URVS), a second URVS, a first downward reference video signal (DRVS), and a second DRVS, the video signal being the second DRVS, the delay unit comprising:

a third delay device for generating the first URVS by delaying the target video signal by the first predetermined numbers of scan lines; and

29. The video signal processor of claim 28, wherein the horizontal/vertical fading factor generator comprises:

a vertical interference calculator for calculating a vertical chrominance interfering factor (D_vc) and a vertical luminance interfering factor (D_hy) according to the target video signal and the plurality of reference video signals;

an vertical difference generator for generating a vertical difference (V_diff) according to the D_vcand the D_vy; and

a SLFD module for generating the SLFD according to the H_diffand the V_diff;

30. The video signal processor of claim 29, wherein the horizontal interference calculator comprises:

31. The video signal processor of claim 29, wherein the vertical interference calculator comprises: