US20070200575A1 - Circuit and method for error test, recordation, and repair - Google Patents
Circuit and method for error test, recordation, and repair Download PDFInfo
- Publication number
- US20070200575A1 US20070200575A1 US11/653,066 US65306607A US2007200575A1 US 20070200575 A1 US20070200575 A1 US 20070200575A1 US 65306607 A US65306607 A US 65306607A US 2007200575 A1 US2007200575 A1 US 2007200575A1
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- Prior art keywords
- substrate
- elastomeric material
- contact pin
- keeper plate
- conductive
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
- G01R1/07371—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
- G01R1/07357—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with flexible bodies, e.g. buckling beams
Definitions
- the present invention relates generally to methods and apparatus in the field of probe cards and contact cards for testing semiconductor substrates. More specifically, the present invention relates to methods and apparatus in the field of probe and contact cards that compensate for variation in the height of contacts on the semiconductor substrate under test.
- PCB printed circuit board
- the PCB is made of low cost PCB material, which creates difficulties in making it planar and also has different thermal expansion properties than the substrate under test.
- probe cards, or contact cards have been used to make contact from the PCB to the substrate under test to compensate for such problems.
- Variation in height of the contacts of the semiconductor substrate under test can result in probe cards having difficulty making and maintaining good contact.
- the variation in the height of contacts of a semiconductor substrate is compensated by a portion of the reusable test fixture that uses contact tips or flexible contact tips for contacting the contacts on semiconductor devices and contacts on a wafer.
- an elastomeric mat having conductive patterns thereon corresponding to conductive pads or contact areas on the wafer may be used with flexible contact tips on a portion of the reusable burn-in fixture.
- the variation in the height of contacts of a semiconductor substrate is compensated by a probe card used in a test assembly that may have a number of contact pins or needles extending from it on one side that contact the PCB and an opposite set that contact the semiconductor substrate under test.
- the individual pins or needles are typically co-planar.
- the probe card may lose co-planarity to make contact with either the semiconductor substrate under test, resulting in poor alignment with the opposite set resulting in the problems during testing of current leak, poor connections, missing connections, etc.
- a keeper plate has a plurality of pogo pins, each pogo pin having a top side, a bottom side and a central sleeve containing the springs, inserted into holes in the keeper plate.
- One end of each pogo pin corresponds to a contact on the semiconductor substrate under test, while the opposite end corresponds to contact on the PCB.
- Such a keeper plate can adjust for some variation in the height of the contacts.
- each pogo pin has a cost of approximately $1.00, and must be assembled in the keeper plate. For a wafer-sized keeper plate, between 11,500 and 12,000 or more pogo pins may be needed. As such, the costs in materials and labor to manufacture such a keeper plate for a test assembly are significant.
- a test apparatus or test system must have the pins in a probe card capable of compensating of any height variations of the contacts of a semiconductor substrate under test.
- a test apparatus or test system needs to be readily manufactured using standard micromachining or wafer handling techniques.
- Such a test apparatus or test system must be conveniently scalable from single semiconductor die testing to wafer-level testing.
- the present invention comprises a contact card for contacting the contacts of a semiconductor substrate, such as a semiconductor die or wafer having a plurality of semiconductor dice for testing and burn-in.
- FIG. 1 is a perspective view of one embodiment of a contactor card assembly for testing and burn-in in accordance with the principles of the present invention
- FIG. 2 is a side view of the contactor card assembly of FIG. 1 , shown in an uncompressed condition and in relation to a semiconductor package and tester for testing of the semiconductor package, in accordance with the principles of the present invention
- FIG. 3 is a side view of the contactor card assembly of FIGS. 1 and 2 , shown in compressed condition and in relation to a semiconductor package and tester for testing of the semiconductor package, in accordance with the principles of the present invention
- FIG. 4 is a side view of a semiconductor substrate, useful for forming a portion of the contactor card assembly of FIG. 1 , in accordance with the principles of the present invention
- FIG. 5 is a side view of the semiconductor substrate of FIG. 4 , having a via therein;
- FIG. 6 is a side view of the semiconductor substrate of FIG. 5 , wherein the via is filled with an elastomer in accordance with one aspect of the present invention
- FIG. 7 is a side view of the semiconductor substrate of FIG. 6 , undergoing laser ablation in accordance with the principles of the present invention.
- FIG. 8 is a side view of the semiconductor substrate of FIG. 7 with a conductive pin inserted therein to form a portion of a conductor card assembly in accordance with the principles of the present invention
- FIG. 9 is a side view of a substrate useful for forming an intermediate portion of a conductor card assembly in accordance with the principles of the present invention.
- FIG. 10 is a perspective view of the substrate of FIG. 9 showing a channel formed therein, in accordance with the principles of the present invention.
- FIG. 11 is a side view of the substrate of FIG. 10 having an elastomer deposited in the channel thereof, in accordance with one embodiment of the present invention.
- the present invention comprises a method and apparatus for a contactor card assembly for the probe testing and burn-in testing of semiconductor dies and wafers. It will be appreciated that the invention is illustrated by the various embodiments of the invention described herein. It will be understood that various combinations or modifications of the disclosed embodiments of the invention may be made without departing from the scope of the invention.
- FIG. 1 Illustrated in drawing FIG. 1 is an embodiment of a contactor card assembly 1000 of the present invention.
- An upper keeper plate 100 includes a plurality of vias 102 therethrough. Each via 102 contains an electrically conductive upper connector or contact pin 104 having a shaft 105 , a portion (not shown) of which is surrounded by a resilient, flexible upper elastomer 106 that retains the upper connector pin 104 therein, yet allows the pin 104 to move in any direction along its longitudinal axis as the elastomer 106 flexes.
- Upper connector pin 104 and the upper elastomer 106 are described in more detail herein.
- Upper keeper plate 100 may contain holes 108 for visual and mechanical alignment of semiconductor substrates or other structures in using the assembly 1000 , including alignment of the upper keeper plate 100 to intermediate keeper plate 140 and lower keeper plate 120 , as well to external testing device fixtures.
- a lower keeper plate 120 includes a plurality of vias 122 therethrough. Each via 122 containing an electrically conductive lower connector or contact pin 124 , which is surrounded by a resilient, flexible lower elastomer 126 that retains the lower connector pin 124 therein while allowing the connector pin 124 to move in any direction along its longitudinal axis as the lower elastomer 126 flexes.
- the lower keeper plate 120 may contain lower alignment holes 128 for visual and mechanical alignment of semiconductor substrates or other structures in using the assembly 1000 .
- Lower keeper plate 120 and upper keeper plate 100 are manufactured in the same manner from the similar or the same materials, differing only in the placement of the upper and lower connective pins 104 and 124 .
- An intermediate keeper plate 140 may be disposed between the upper keeper plate 100 and lower keeper plate 120 .
- An electrically conductive pivot bar 142 is contained in a resilient, flexible elastomer 144 disposed in a channel 146 passing through the intermediate keeper plate 140 . At least a portion of the top surface 145 and bottom surface 147 of the electrically conductive pivot bar 142 remain exposed from the elastomer 144 .
- a lower connector pin 124 extends upward from the bottom keeper plate 120 to contact the lower surface 147 at a point along its horizontal axis away from the midpoint of the pivot bar 142 , in a direction opposite the contact of the upper connector pin 104 on the upper surface 145 .
- the support structure 1002 for supporting the keeper plates and maintaining the relationship therebetween is illustrated in dashed lines in drawing FIGS. 2 and 3 .
- the contactor card assembly 1000 is shown in relationship to a semiconductor substrate 220 to be tested in a testing device 1050 .
- a printed circuit board 200 or other testing substrate is mounted on an upper backing plate 204 and contains at least one contact 202 on the surface thereof.
- An upper connection pin 104 aligns with the contact 202 in an uncompressed position.
- the semiconductor substrate 220 undergoing testing or burn-in is disposed on a backing plate 226 located beneath the lower keeper plate 120 .
- Semiconductor substrate 220 may be a semiconductor die, a semiconductor assembly (such as a packaged die), a semiconductor wafer containing multiple die sites or another substrate containing an integrated circuit to be tested.
- An electrical contact 222 such as a solder ball on a semiconductor assembly or a bond pad on a semiconductor die, is aligned with the lower connective pin 124 corresponding to the upper connective pin 104 aligned with the appropriate contact 202 on the PCB 200 .
- the contact card assembly conforms to the contacts as illustrated in drawing FIG. 3 .
- the upper and lower connector pins 104 and 124 are able to move in a direction along their longitudinal axes to engage the contact 202 and electrical contact 222 with sufficient force to establish and maintain electrical communication therebetween.
- the electrical contacts 222 on the substrate 220 are of different heights, such as an array of solder balls disposed on the under bump metallization (UMB) of a wafer or die having variations in height across the array, contact may be maintained in an effective manner.
- UMB under bump metallization
- appropriately sized upper and lower electrical contact pins 104 and 124 may be used to allow proper contact to be made to electrical contacts 222 on a substrate 220 that includes contact pads that have conductive bumps, such as solder balls, attached thereto and non-bumped pads, such as wire bond pads. Additionally, in some embodiments, appropriately sized upper and lower electrical contact pins 104 and 124 may be used to allow proper contact to be made to electrical contacts 222 on a substrate 220 , that is a stacked semiconductor die package having electrical contacts 222 on different levels of the package corresponding to the differing semiconductor dice.
- Pivot bar 142 moves within the channel 146 in response to the forces placed upon it by the upper and lower connector pins 104 and 124 .
- the elastomer 144 flexes to allow the pivot bar 142 a range of motion while retaining it in the channel 146 .
- the pivot bar 142 can twist, yaw, tilt or roll, in reaction to the forces placed upon it. Where a number of pivot bars 142 are used, each corresponding to an individual contact of an array, the ability of each pivot bar 142 to act independently of the others allows contact to be made from contact 202 to the electrical connection 222 across a varying distance.
- FIGS. 4 through 8 one embodiment of a process in accordance with the present invention for creating a keeper plate 420 with conductive contact pins 430 extending therethrough is illustrated.
- a plate substrate 400 having a generally planar shape and including upper surface 402 and lower surface 404 may be used, as illustrated in drawing FIG. 4 .
- Plate substrate 400 may comprise any material capable of supporting the additional structures.
- a substrate comprising primarily silicon, as formed in the art by growing a single crystal wafer in the form of a cylinder, which is then segmented or sliced, such as a wafer, may be used.
- the plate substrate 400 may be used as another bulk semiconductor substrate, such as silicon-on-sapphire (SOS) substrate or a silicon-on-glass (SOG) substrate, or other type of silicon-on-insulator (SOI) substrate.
- SOS silicon-on-sapphire
- SOI silicon-on-insulator
- Other substrates that may be used as the plate substrate 400 include printed circuit board (PCB), metallic plates, ceramics or polymeric materials formed into a substrate. Additional suitable substrates may include photosensitive and metallizable patterned glass materials, such as FOTURAN® photo-etchable glass available from SCHOTT North America, and copper coated InvarTM alloy (which may be finished with gold coating).
- the selected plate substrate 400 may have a coefficient of thermal expansion similar to the testing substrate or substrate under test, to reduce the possibility of damage during a testing and burn-in procedure.
- plate substrate 400 may be a wafer or may be sized as a conventional semiconductor wafer, allowing for handling and processing.
- the plate substrate 400 may have any suitable shape, so long as a substantially planar top surface 402 and a substantially planar bottom surface 404 are maintained.
- Plate substrate 400 may thus be formed as a planar disk or a planar polygonal substrate. All such alternative structures are within the scope of the present invention
- At least one via 406 may be formed through the plate substrate 400 , extending from the top surface 402 to the bottom surface 404 , as illustrated in drawing FIG. 5 .
- the at least one via 406 may be formed in any suitable fashion known to those of ordinary skill in the art.
- the at least one via 406 may be formed by laser ablation.
- Laser ablation may be effected using any suitable equipment, such as the Model 5000-series lasers, offered currently by ElectroScientific Industries (ESI) of Portland, Oreg.
- ESI ElectroScientific Industries
- One specific, suitable piece of equipment is a 355 nm wavelength UV YAG laser, ESI Model 2700, which may be used to form vias as little as 25 ⁇ m in diameter.
- one hundred pulses using this laser will form a 750 ⁇ m deep via through silicon.
- Another suitable laser is the Model 200, offered by Xsil Limited of Dublin, Ireland.
- one or more vias 406 may be formed by etching (comprising wet etching, dry etching and either isotropic etching or anisotropic etching), by drilling or boring with a mechanical drill bit, or otherwise as known to those of ordinary skill in the art.
- Guide holes (such as those illustrated as 108 and 128 in drawing FIG. 1 ), and any other desired structures, may be formed in the plate substrate 400 at this time.
- via 406 may then be filled with an elastomeric material 410 , as illustrated in drawing FIG. 6 .
- Any suitable elastomeric material which may be dispensed into via 406 and retain an inserted connector pin therein may be used.
- the technique for filling via 406 will vary based on the elastomeric material 410 chosen.
- a liquid elastomeric material may be dispensed directly into a via 406 and then cured.
- a liquid or gelatinous elastomeric material may be dispensed on the upper surface 402 of the plate substrate 400 and a squeegee or other scraper pulled across the surface to push the elastomeric material 410 into the vias 406 .
- the elastomeric material may be cured by baking, by photo curing or any other type of curing appropriate for the selected material.
- Suitable elastomeric materials 410 may include electrically insulative material to isolate the connective pin from the plate substrate 400 .
- a suitable material is liquid silicone, which may be cured to a flexible state. The cured hardness of the elastomer 410 , as well as the thickness and cross sectional are may be selected to result in a spring force on the connective pin sufficient to ensure good contact.
- Via 406 may be filled with the plate substrate 400 attached to an underlying chuck plate to provide a bottom to the via 406 , or may be performed with via 406 openings exposed to allow for over-deposition of the elastomeric material 410 , where desired.
- a conductive elastomer may be used to facilitate current flow across the substrate 400 , while preventing leakage between vias 406 .
- the conductive material may be used to electrically bias the final assembly to improve performance (i.e., the material may be shorted to a ground to act as a ground plane, or biased with voltage to facilitate testing).
- a pin hole 412 may then be bored through the elastomeric material 410 contained in the via 406 .
- formation may be accomplished with a cutting laser by ablation.
- a micromachining laser such as an Xsil laser, may be useful for performing this operation.
- the pin hole 412 may be formed by other suitable means, such as by etching, drilling or boring with a mechanical drill bit, punching, by combining any of these means with each other or laser ablation, or as otherwise known to those of ordinary skill in the art.
- the bore of pin hole 412 has a width W. In embodiments where pin hole 412 has a circular cross section, width W will correspond to the diameter of the pin hole 412 .
- a conductive contact pin 430 may then be inserted into the pin hole 412 , and may serve as the connector pins 104 and 124 illustrated in drawing FIGS. 1 through 3 .
- the conductive contact pin 430 may be an elongated conductive shaft 424 , which will extend out from the plate substrate 400 to contact the structure under test and a pivot bar 142 .
- the proximal end 422 (designated as the end that will contact the pivot bar 142 ) may be rounded to facilitate the movement of the pivot bar 142 during operation.
- the distal contact end of the conductive contact pin 430 may be flat, rounded, crowned, pointed, or have any other shape that is desired and suitable for the intended application.
- the shaft 424 of the pin may have a cross-sectional width greater than the width W of the bore of pin hole 412 , allowing the elastomeric material 410 to retain the conductive contact pin 430 in the pin hole 412 .
- Placement of the conductive contact pin 430 may be facilitated by use of a jig J to retain a conductive contact pin 430 in proper position during placement. Where a number of conductive contact pins 430 are used, the jig J may hold the conductive contact pins 430 in correct alignment, allowing the insertion of the entire plurality at one time.
- the protrusion of the conductive contact pin 430 from the substrate 400 may also be controlled by the use of the jig J, or through machine placement of the pin.
- the conductive contact pin 430 may be constructed of any suitable electrically conductive material. For example, a section of copper wire that is plated with gold or a gold wire that is plated with nickel then flash coated with a thin layer of gold may be used.
- the conductive contact pins 430 may be constructed by patterning vias in a wafer or a thick resist layer and then coating the vias with a seed layer, followed by plating the vias with a conductive material, such as copper. The vias may be plated until conductive material is added to form pins of sufficient depth.
- One advantage of placing the conductive contact pins 430 into a bore of a pin hole 412 in cured elastomeric material is that the conductive contact pins 430 may be removed and replaced should failure occur. Additionally, the chance of pin contact areas becoming contaminated is lessened compared to placing the conductive contact pins 430 in the vias 406 , followed by filling the vias with an elastomer that is then cured. It will, however be appreciated that keeper plates created using such a process may be used in the contact card 100 of the present invention, and as such fall within the scope of the present invention.
- FIGS. 9 through 11 Illustrated in drawing FIGS. 9 through 11 is a procedure for manufacturing an intermediate keeper plate 140 including a pivot bar 142 in accordance with the principles of the present invention. It will be appreciated that while illustrative of one embodiment of the present invention, other methods and procedures may also be used and all such methods are within the scope of the present invention.
- the electrically conductive substrate 500 may be a planar substrate having a top surface 502 and a bottom surface 504 .
- Suitable electrically conductive planar substrates may be constructed from metals.
- a section of a metal foil may be provided.
- Other electrically conductive substrates 500 may be constructed from electrically conductive polymers, conductor-filled polymers, other electrically conductive materials and combination thereof.
- a channel 506 may be cut through electrically conductive substrate 500 to substantially surround a bar 508 .
- the bar 508 may remain attached to the substrate 500 through a small tab 510 of material, with channel 506 surrounding the remainder of the bar 508 .
- Bar 508 may have any desired shape and any desired longitudinal axis.
- bar 508 may be circular, oval, rectangular, square, a regular polygon, or irregularly shaped, as is desired for the specific usage.
- the upper surface 507 and lower surface 509 of bar 508 may remain substantially planar, or a rounded divot 517 ( FIG. 11 ) may be placed therein for an electrically conductive contact pin 430 ( FIG. 8 ) to slide along in a guided manner.
- Channel 506 may be cut through substrate 500 in any suitable manner.
- channel 506 may be cut with a micromachining laser, such as the aforementioned Xsil micromachining laser, or formed by etching the foil with a suitable etchant.
- the channel 506 may be cleaned to remove any debris that would interfere with the motion electrical isolation of the bar 508 .
- the bar 508 (and substrate 500 , if desired) may be plated to improve surface hardness or conductivity.
- a solder mask material may be used to selectively plate the bars 508 .
- a non-conductive elastomeric material 512 may then be disposed in the channel 506 around the bar 508 attaching it to the substrate 500 .
- the upper surface 507 and lower surface 509 of bar 508 may remain free of the non-conductive elastomeric material 512 .
- the non-conductive elastomeric material 512 electrically isolates the bar 508 from the surrounding substrate, reducing current leaking during testing and burn-in.
- Any suitable non-conductive elastomeric material may be used.
- liquid silicone may be dispensed into the channel 506 .
- Other suitable non-conductive elastomers may include flexible polymeric materials with electrically insulative properties and flexible insulative epoxies.
- the non-conductive elastomeric material 512 may be dispensed in channel 506 in any suitable fashion.
- a liquid material may be dispensed directly into the channel 506 , where the substrate 500 is placed on a support plate providing a bottom for the channel.
- a Teflon-coated plate would provide a bottom that liquid silicone would not adhere to, allowing release.
- tape may be applied over the channel and the contact portion of the bar 508 , which may be removed upon dispensing or curing of the elastomeric material 512 .
- the non-conductive elastomeric material 512 is of suitable viscosity, no support may be required.
- non-conductive elastomeric material 512 is gelatinous, or a higher viscosity fluid
- the material may be dispensed on the upper surface 502 of the substrate 500 and then disposed in one or more channels 506 by a squeegee or other scraper.
- the non-conductive elastomeric material 512 may be cured in any suitable fashion.
- the part may be heated to cure the material, or exposed to a specific wavelength of light to photoset a photoactive material.
- the tab 510 may be removed to allow the bar 508 to pivot. Tab 510 removal may occur by laser ablation, etching or as otherwise known to those of ordinary skill in the art. Where tape is applied to protect the pivot bar 508 through dispensing or handling, the tape may be left on during tab 510 removal to protect the pivot bar 508 and elastomeric material 512 from slag and damage incurred during tab 510 removal and then removed.
- a non-conductive substrate 500 may be used with vias formed therein and a conductive bar 508 placed therein to further reduce the possibility of current leakage.
- the substrate 500 may be provided by building up a substrate 500 containing the channel through a plating process, such as nickel plating an appropriate mandrel, or stacking of thick-film tab tape or fab metal.
- a plating process such as nickel plating an appropriate mandrel, or stacking of thick-film tab tape or fab metal.
- a three dimensional plated build up process such a photolithography, or a controlled plating process may be used.
- An entire contactor card assembly such as that illustrated as 1000 in drawing FIGS. 1 through 3 , may be assembled from an intermediate keeper plate 140 , and upper and lower keeper plates 100 and 120 .
- the contact force of the electrically conductive contact pins 104 and 124 may be controlled for the desired application by varying the thickness of the keeper plates, the diameter of the pins 104 and 124 , the diameter of the pin holes 412 , the shape of the bar 508 and the resiliency of the cured elastomeric materials.
- a keeper plate 420 may be attached to a wafer or die that has solder disposed on the electrical contacts thereof, or an assembly of wafers or dice with solder disposed on the electrical contacts thereof to form a stacked assembly with resilient contacts. This may also be accomplished with the complete assembly, including upper, lower and intermediate keeper plates to avoid the need to form insulated vias in a package. Such an assembly may be able to undergo testing and burn-in through the attached contactor assembly.
- the flexible compliant contacts formed as discussed previously herein, may be used in other semiconductor related structures. This may be useful in any application where contact is to be made with a array of contacts that may have variations in contact height. For example, the contacts currently used in burn-in and test head sockets may be replaced by the compliant connectors to add a degree of flexibility to the contacts.
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Abstract
Description
- This application is a continuation of application Ser. No. 10/933,745, filed Sep. 2, 2004, which will issue on Jan. 23, 2007 as U.S. Pat. No. 7,167,010. The disclosure of the previously referenced U.S. patent application and patent referenced is hereby incorporated by reference in its entirety.
- 1. Field of the Invention
- The present invention relates generally to methods and apparatus in the field of probe cards and contact cards for testing semiconductor substrates. More specifically, the present invention relates to methods and apparatus in the field of probe and contact cards that compensate for variation in the height of contacts on the semiconductor substrate under test.
- 2. State of the Art
- For burn-in testing of semiconductor substrates, an electrical connection must be established from the contacts on the substrate to the testing device. Often a section of printed circuit board (PCB) with contacts corresponding to the substrate under test is connected to the testing device and used to make contact with the substrate. Typically the PCB is made of low cost PCB material, which creates difficulties in making it planar and also has different thermal expansion properties than the substrate under test. Typically, probe cards, or contact cards have been used to make contact from the PCB to the substrate under test to compensate for such problems.
- Variation in height of the contacts of the semiconductor substrate under test, such as where the semiconductor substrate includes mounting or interconnect structures, including under bump metallization, redistribution lines, solder balls, or other connections, can result in probe cards having difficulty making and maintaining good contact. For example, as described in U.S. Pat. No. 6,535,012, in a reusable test fixture for burn-in testing, the variation in the height of contacts of a semiconductor substrate is compensated by a portion of the reusable test fixture that uses contact tips or flexible contact tips for contacting the contacts on semiconductor devices and contacts on a wafer. If desired, an elastomeric mat having conductive patterns thereon corresponding to conductive pads or contact areas on the wafer may be used with flexible contact tips on a portion of the reusable burn-in fixture.
- In another example, the variation in the height of contacts of a semiconductor substrate is compensated by a probe card used in a test assembly that may have a number of contact pins or needles extending from it on one side that contact the PCB and an opposite set that contact the semiconductor substrate under test. The individual pins or needles are typically co-planar. In compressing the testing assembly to make contact with the semiconductor substrate under test, the probe card may lose co-planarity to make contact with either the semiconductor substrate under test, resulting in poor alignment with the opposite set resulting in the problems during testing of current leak, poor connections, missing connections, etc.
- One attempt to deal with these problems has been the use of “pogo” or spring loaded pins in a probe card. In the testing assembly, a keeper plate has a plurality of pogo pins, each pogo pin having a top side, a bottom side and a central sleeve containing the springs, inserted into holes in the keeper plate. One end of each pogo pin corresponds to a contact on the semiconductor substrate under test, while the opposite end corresponds to contact on the PCB. Such a keeper plate can adjust for some variation in the height of the contacts. However, each pogo pin has a cost of approximately $1.00, and must be assembled in the keeper plate. For a wafer-sized keeper plate, between 11,500 and 12,000 or more pogo pins may be needed. As such, the costs in materials and labor to manufacture such a keeper plate for a test assembly are significant.
- Accordingly, a test apparatus or test system must have the pins in a probe card capable of compensating of any height variations of the contacts of a semiconductor substrate under test. Preferably, such a test apparatus or test system needs to be readily manufactured using standard micromachining or wafer handling techniques. Such a test apparatus or test system must be conveniently scalable from single semiconductor die testing to wafer-level testing.
- The present invention comprises a contact card for contacting the contacts of a semiconductor substrate, such as a semiconductor die or wafer having a plurality of semiconductor dice for testing and burn-in.
- In the drawings, which, in conjunction with the accompanying description of the invention, disclose the various embodiments of the invention:
-
FIG. 1 is a perspective view of one embodiment of a contactor card assembly for testing and burn-in in accordance with the principles of the present invention; -
FIG. 2 is a side view of the contactor card assembly ofFIG. 1 , shown in an uncompressed condition and in relation to a semiconductor package and tester for testing of the semiconductor package, in accordance with the principles of the present invention; -
FIG. 3 is a side view of the contactor card assembly ofFIGS. 1 and 2 , shown in compressed condition and in relation to a semiconductor package and tester for testing of the semiconductor package, in accordance with the principles of the present invention; -
FIG. 4 is a side view of a semiconductor substrate, useful for forming a portion of the contactor card assembly ofFIG. 1 , in accordance with the principles of the present invention; -
FIG. 5 is a side view of the semiconductor substrate ofFIG. 4 , having a via therein; -
FIG. 6 is a side view of the semiconductor substrate ofFIG. 5 , wherein the via is filled with an elastomer in accordance with one aspect of the present invention; -
FIG. 7 is a side view of the semiconductor substrate ofFIG. 6 , undergoing laser ablation in accordance with the principles of the present invention; -
FIG. 8 is a side view of the semiconductor substrate ofFIG. 7 with a conductive pin inserted therein to form a portion of a conductor card assembly in accordance with the principles of the present invention; -
FIG. 9 is a side view of a substrate useful for forming an intermediate portion of a conductor card assembly in accordance with the principles of the present invention; -
FIG. 10 is a perspective view of the substrate ofFIG. 9 showing a channel formed therein, in accordance with the principles of the present invention; and -
FIG. 11 is a side view of the substrate ofFIG. 10 having an elastomer deposited in the channel thereof, in accordance with one embodiment of the present invention. - The present invention comprises a method and apparatus for a contactor card assembly for the probe testing and burn-in testing of semiconductor dies and wafers. It will be appreciated that the invention is illustrated by the various embodiments of the invention described herein. It will be understood that various combinations or modifications of the disclosed embodiments of the invention may be made without departing from the scope of the invention.
- Illustrated in drawing
FIG. 1 is an embodiment of acontactor card assembly 1000 of the present invention. Anupper keeper plate 100 includes a plurality ofvias 102 therethrough. Eachvia 102 contains an electrically conductive upper connector orcontact pin 104 having ashaft 105, a portion (not shown) of which is surrounded by a resilient, flexibleupper elastomer 106 that retains theupper connector pin 104 therein, yet allows thepin 104 to move in any direction along its longitudinal axis as theelastomer 106 flexes.Upper connector pin 104 and theupper elastomer 106 are described in more detail herein.Upper keeper plate 100 may containholes 108 for visual and mechanical alignment of semiconductor substrates or other structures in using theassembly 1000, including alignment of theupper keeper plate 100 tointermediate keeper plate 140 andlower keeper plate 120, as well to external testing device fixtures. - Similar to the
upper keeper plate 100, alower keeper plate 120 includes a plurality ofvias 122 therethrough. Each via 122 containing an electrically conductive lower connector orcontact pin 124, which is surrounded by a resilient, flexiblelower elastomer 126 that retains thelower connector pin 124 therein while allowing theconnector pin 124 to move in any direction along its longitudinal axis as thelower elastomer 126 flexes. Thelower keeper plate 120 may containlower alignment holes 128 for visual and mechanical alignment of semiconductor substrates or other structures in using theassembly 1000.Lower keeper plate 120 andupper keeper plate 100 are manufactured in the same manner from the similar or the same materials, differing only in the placement of the upper and lowerconnective pins - An
intermediate keeper plate 140 may be disposed between theupper keeper plate 100 andlower keeper plate 120. An electricallyconductive pivot bar 142 is contained in a resilient,flexible elastomer 144 disposed in achannel 146 passing through theintermediate keeper plate 140. At least a portion of thetop surface 145 andbottom surface 147 of the electricallyconductive pivot bar 142 remain exposed from theelastomer 144. - An
upper connector pin 104 extending from theupper keeper plate 100 contacts thepivot bar 142 on itsupper surface 145, at a point along its horizontal axis away from the midpoint of thepivot bar 142. Alower connector pin 124 extends upward from thebottom keeper plate 120 to contact thelower surface 147 at a point along its horizontal axis away from the midpoint of thepivot bar 142, in a direction opposite the contact of theupper connector pin 104 on theupper surface 145. Thesupport structure 1002 for supporting the keeper plates and maintaining the relationship therebetween is illustrated in dashed lines in drawingFIGS. 2 and 3 . - Turning to drawing
FIGS. 2 and 3 , thecontactor card assembly 1000 is shown in relationship to asemiconductor substrate 220 to be tested in atesting device 1050. A printedcircuit board 200 or other testing substrate is mounted on anupper backing plate 204 and contains at least onecontact 202 on the surface thereof. Anupper connection pin 104 aligns with thecontact 202 in an uncompressed position. Thesemiconductor substrate 220 undergoing testing or burn-in is disposed on abacking plate 226 located beneath thelower keeper plate 120.Semiconductor substrate 220 may be a semiconductor die, a semiconductor assembly (such as a packaged die), a semiconductor wafer containing multiple die sites or another substrate containing an integrated circuit to be tested. Anelectrical contact 222, such as a solder ball on a semiconductor assembly or a bond pad on a semiconductor die, is aligned with the lowerconnective pin 124 corresponding to the upperconnective pin 104 aligned with theappropriate contact 202 on thePCB 200. - As the testing device is compressed to bring the connector pins 104 and 124 in contact with the
electrical contact 222 and thecontact 202, the contact card assembly conforms to the contacts as illustrated in drawingFIG. 3 . The upper and lower connector pins 104 and 124 are able to move in a direction along their longitudinal axes to engage thecontact 202 andelectrical contact 222 with sufficient force to establish and maintain electrical communication therebetween. Where theelectrical contacts 222 on thesubstrate 220 are of different heights, such as an array of solder balls disposed on the under bump metallization (UMB) of a wafer or die having variations in height across the array, contact may be maintained in an effective manner. In some embodiments, appropriately sized upper and lower electrical contact pins 104 and 124 may be used to allow proper contact to be made toelectrical contacts 222 on asubstrate 220 that includes contact pads that have conductive bumps, such as solder balls, attached thereto and non-bumped pads, such as wire bond pads. Additionally, in some embodiments, appropriately sized upper and lower electrical contact pins 104 and 124 may be used to allow proper contact to be made toelectrical contacts 222 on asubstrate 220, that is a stacked semiconductor die package havingelectrical contacts 222 on different levels of the package corresponding to the differing semiconductor dice. -
Pivot bar 142 moves within thechannel 146 in response to the forces placed upon it by the upper and lower connector pins 104 and 124. Theelastomer 144 flexes to allow the pivot bar 142 a range of motion while retaining it in thechannel 146. As illustrated in drawingFIG. 3 , thepivot bar 142 can twist, yaw, tilt or roll, in reaction to the forces placed upon it. Where a number of pivot bars 142 are used, each corresponding to an individual contact of an array, the ability of eachpivot bar 142 to act independently of the others allows contact to be made fromcontact 202 to theelectrical connection 222 across a varying distance. Compression sufficient to allow testing and burn-in of an integrated circuit can be established, while neitherPCB 200 norsemiconductor substrate 220 need be maintained in exactly parallel planes to avoid problems from non-co-planarity of the contacts. In some embodiments of the invention, variation of up to about 100 μm can be tolerated across an array of contacts. It will be appreciated that for embodiments where appropriately sized upper and lower electrical contact pins 104 and 124 are used to allow proper contact to be made toelectrical contacts 222 on asubstrate 220 with bumped and non-bumped contact pads, orsubstrates 220 that are stacked semiconductor packages, this variation may refers to variations from the theoretically expected position of such contacts, and, even larger variations may be tolerated. - Turning to drawing
FIGS. 4 through 8 , one embodiment of a process in accordance with the present invention for creating akeeper plate 420 with conductive contact pins 430 extending therethrough is illustrated. Aplate substrate 400 having a generally planar shape and includingupper surface 402 andlower surface 404 may be used, as illustrated in drawingFIG. 4 .Plate substrate 400 may comprise any material capable of supporting the additional structures. For example, a substrate comprising primarily silicon, as formed in the art by growing a single crystal wafer in the form of a cylinder, which is then segmented or sliced, such as a wafer, may be used. Alternatively, another bulk semiconductor substrate may be employed, such as silicon-on-sapphire (SOS) substrate or a silicon-on-glass (SOG) substrate, or other type of silicon-on-insulator (SOI) substrate. Other substrates that may be used as theplate substrate 400 include printed circuit board (PCB), metallic plates, ceramics or polymeric materials formed into a substrate. Additional suitable substrates may include photosensitive and metallizable patterned glass materials, such as FOTURAN® photo-etchable glass available from SCHOTT North America, and copper coated Invar™ alloy (which may be finished with gold coating). In any event, the selectedplate substrate 400 may have a coefficient of thermal expansion similar to the testing substrate or substrate under test, to reduce the possibility of damage during a testing and burn-in procedure. - In order to allow processing with currently available equipment,
plate substrate 400 may be a wafer or may be sized as a conventional semiconductor wafer, allowing for handling and processing. Theplate substrate 400 may have any suitable shape, so long as a substantially planartop surface 402 and a substantially planarbottom surface 404 are maintained.Plate substrate 400 may thus be formed as a planar disk or a planar polygonal substrate. All such alternative structures are within the scope of the present invention - At least one via 406 may be formed through the
plate substrate 400, extending from thetop surface 402 to thebottom surface 404, as illustrated in drawingFIG. 5 . The at least one via 406 may be formed in any suitable fashion known to those of ordinary skill in the art. For example, the at least one via 406 may be formed by laser ablation. Laser ablation may be effected using any suitable equipment, such as the Model 5000-series lasers, offered currently by ElectroScientific Industries (ESI) of Portland, Oreg. One specific, suitable piece of equipment is a 355 nm wavelength UV YAG laser, ESI Model 2700, which may be used to form vias as little as 25 μm in diameter. One hundred pulses using this laser will form a 750 μm deep via through silicon. Another suitable laser is theModel 200, offered by Xsil Limited of Dublin, Ireland. Alternatively, one ormore vias 406 may be formed by etching (comprising wet etching, dry etching and either isotropic etching or anisotropic etching), by drilling or boring with a mechanical drill bit, or otherwise as known to those of ordinary skill in the art. Guide holes (such as those illustrated as 108 and 128 in drawingFIG. 1 ), and any other desired structures, may be formed in theplate substrate 400 at this time. - Once via 406 is complete, and if necessary cleaned, it may then be filled with an
elastomeric material 410, as illustrated in drawingFIG. 6 . Any suitable elastomeric material, which may be dispensed into via 406 and retain an inserted connector pin therein may be used. The technique for filling via 406 will vary based on theelastomeric material 410 chosen. For example, a liquid elastomeric material may be dispensed directly into a via 406 and then cured. A liquid or gelatinous elastomeric material may be dispensed on theupper surface 402 of theplate substrate 400 and a squeegee or other scraper pulled across the surface to push theelastomeric material 410 into thevias 406. Once thevias 406 are filled with theelastomeric material 410, the elastomeric material may be cured by baking, by photo curing or any other type of curing appropriate for the selected material. - Suitable
elastomeric materials 410 may include electrically insulative material to isolate the connective pin from theplate substrate 400. One example of a suitable material is liquid silicone, which may be cured to a flexible state. The cured hardness of theelastomer 410, as well as the thickness and cross sectional are may be selected to result in a spring force on the connective pin sufficient to ensure good contact. Via 406 may be filled with theplate substrate 400 attached to an underlying chuck plate to provide a bottom to the via 406, or may be performed with via 406 openings exposed to allow for over-deposition of theelastomeric material 410, where desired. In embodiments of the invention where theplate substrate 400 is constructed of a non-conductive material, a conductive elastomer may be used to facilitate current flow across thesubstrate 400, while preventing leakage betweenvias 406. It will be appreciated that in embodiments where theplate substrate 400 is a conductive material, the conductive material may be used to electrically bias the final assembly to improve performance (i.e., the material may be shorted to a ground to act as a ground plane, or biased with voltage to facilitate testing). - As illustrated in drawing
FIG. 7 , apin hole 412 may then be bored through theelastomeric material 410 contained in thevia 406. As with via 406, formation may be accomplished with a cutting laser by ablation. A micromachining laser, such as an Xsil laser, may be useful for performing this operation. Where appropriate, thepin hole 412 may be formed by other suitable means, such as by etching, drilling or boring with a mechanical drill bit, punching, by combining any of these means with each other or laser ablation, or as otherwise known to those of ordinary skill in the art. The bore ofpin hole 412 has a width W. In embodiments wherepin hole 412 has a circular cross section, width W will correspond to the diameter of thepin hole 412. - As illustrated in
FIG. 8 , aconductive contact pin 430 may then be inserted into thepin hole 412, and may serve as the connector pins 104 and 124 illustrated in drawingFIGS. 1 through 3 . Theconductive contact pin 430 may be an elongatedconductive shaft 424, which will extend out from theplate substrate 400 to contact the structure under test and apivot bar 142. The proximal end 422 (designated as the end that will contact the pivot bar 142) may be rounded to facilitate the movement of thepivot bar 142 during operation. The distal contact end of theconductive contact pin 430 may be flat, rounded, crowned, pointed, or have any other shape that is desired and suitable for the intended application. Theshaft 424 of the pin may have a cross-sectional width greater than the width W of the bore ofpin hole 412, allowing theelastomeric material 410 to retain theconductive contact pin 430 in thepin hole 412. Placement of theconductive contact pin 430 may be facilitated by use of a jig J to retain aconductive contact pin 430 in proper position during placement. Where a number of conductive contact pins 430 are used, the jig J may hold the conductive contact pins 430 in correct alignment, allowing the insertion of the entire plurality at one time. The protrusion of theconductive contact pin 430 from thesubstrate 400 may also be controlled by the use of the jig J, or through machine placement of the pin. - The
conductive contact pin 430 may be constructed of any suitable electrically conductive material. For example, a section of copper wire that is plated with gold or a gold wire that is plated with nickel then flash coated with a thin layer of gold may be used. In certain embodiments of the invention, the conductive contact pins 430 may be constructed by patterning vias in a wafer or a thick resist layer and then coating the vias with a seed layer, followed by plating the vias with a conductive material, such as copper. The vias may be plated until conductive material is added to form pins of sufficient depth. - One advantage of placing the conductive contact pins 430 into a bore of a
pin hole 412 in cured elastomeric material is that the conductive contact pins 430 may be removed and replaced should failure occur. Additionally, the chance of pin contact areas becoming contaminated is lessened compared to placing the conductive contact pins 430 in thevias 406, followed by filling the vias with an elastomer that is then cured. It will, however be appreciated that keeper plates created using such a process may be used in thecontact card 100 of the present invention, and as such fall within the scope of the present invention. - Illustrated in drawing
FIGS. 9 through 11 is a procedure for manufacturing anintermediate keeper plate 140 including apivot bar 142 in accordance with the principles of the present invention. It will be appreciated that while illustrative of one embodiment of the present invention, other methods and procedures may also be used and all such methods are within the scope of the present invention. - An electrically
conductive substrate 500 is illustrated in drawingFIG. 9 . The electricallyconductive substrate 500 may be a planar substrate having atop surface 502 and abottom surface 504. Suitable electrically conductive planar substrates may be constructed from metals. For example, a section of a metal foil may be provided. Other electricallyconductive substrates 500 may be constructed from electrically conductive polymers, conductor-filled polymers, other electrically conductive materials and combination thereof. - As illustrated in drawing
FIG. 10 , achannel 506 may be cut through electricallyconductive substrate 500 to substantially surround abar 508. Thebar 508 may remain attached to thesubstrate 500 through asmall tab 510 of material, withchannel 506 surrounding the remainder of thebar 508.Bar 508 may have any desired shape and any desired longitudinal axis. For example, bar 508 may be circular, oval, rectangular, square, a regular polygon, or irregularly shaped, as is desired for the specific usage. Theupper surface 507 andlower surface 509 ofbar 508 may remain substantially planar, or a rounded divot 517 (FIG. 11 ) may be placed therein for an electrically conductive contact pin 430 (FIG. 8 ) to slide along in a guided manner. -
Channel 506 may be cut throughsubstrate 500 in any suitable manner. For example, where a metal foil is provided as thesubstrate 500,channel 506 may be cut with a micromachining laser, such as the aforementioned Xsil micromachining laser, or formed by etching the foil with a suitable etchant. Where needed, thechannel 506 may be cleaned to remove any debris that would interfere with the motion electrical isolation of thebar 508. At this point the bar 508 (andsubstrate 500, if desired) may be plated to improve surface hardness or conductivity. A solder mask material may be used to selectively plate thebars 508. - A non-conductive
elastomeric material 512 may then be disposed in thechannel 506 around thebar 508 attaching it to thesubstrate 500. Theupper surface 507 andlower surface 509 ofbar 508 may remain free of the non-conductiveelastomeric material 512. The non-conductiveelastomeric material 512 electrically isolates thebar 508 from the surrounding substrate, reducing current leaking during testing and burn-in. Any suitable non-conductive elastomeric material may be used. For example, liquid silicone may be dispensed into thechannel 506. Other suitable non-conductive elastomers may include flexible polymeric materials with electrically insulative properties and flexible insulative epoxies. - The non-conductive
elastomeric material 512 may be dispensed inchannel 506 in any suitable fashion. For example a liquid material may be dispensed directly into thechannel 506, where thesubstrate 500 is placed on a support plate providing a bottom for the channel. For example, a Teflon-coated plate would provide a bottom that liquid silicone would not adhere to, allowing release. In another example, tape may be applied over the channel and the contact portion of thebar 508, which may be removed upon dispensing or curing of theelastomeric material 512. Where the non-conductiveelastomeric material 512 is of suitable viscosity, no support may be required. Where the non-conductiveelastomeric material 512 is gelatinous, or a higher viscosity fluid, the material may be dispensed on theupper surface 502 of thesubstrate 500 and then disposed in one ormore channels 506 by a squeegee or other scraper. - Once the non-conductive
elastomeric material 512 is disposed in thechannel 506, it may be cured in any suitable fashion. For example, the part may be heated to cure the material, or exposed to a specific wavelength of light to photoset a photoactive material. Once theelastomeric material 512 is cured, thetab 510 may be removed to allow thebar 508 to pivot.Tab 510 removal may occur by laser ablation, etching or as otherwise known to those of ordinary skill in the art. Where tape is applied to protect thepivot bar 508 through dispensing or handling, the tape may be left on duringtab 510 removal to protect thepivot bar 508 andelastomeric material 512 from slag and damage incurred duringtab 510 removal and then removed. - It will be appreciated that modifications to the process outlined above may be made by those of ordinary skill in the art. For example, a
non-conductive substrate 500 may be used with vias formed therein and aconductive bar 508 placed therein to further reduce the possibility of current leakage. In other embodiments, thesubstrate 500 may be provided by building up asubstrate 500 containing the channel through a plating process, such as nickel plating an appropriate mandrel, or stacking of thick-film tab tape or fab metal. A three dimensional plated build up process, such a photolithography, or a controlled plating process may be used. - An entire contactor card assembly, such as that illustrated as 1000 in drawing
FIGS. 1 through 3 , may be assembled from anintermediate keeper plate 140, and upper andlower keeper plates pins bar 508 and the resiliency of the cured elastomeric materials. - In other embodiments of the invention, a
keeper plate 420 may be attached to a wafer or die that has solder disposed on the electrical contacts thereof, or an assembly of wafers or dice with solder disposed on the electrical contacts thereof to form a stacked assembly with resilient contacts. This may also be accomplished with the complete assembly, including upper, lower and intermediate keeper plates to avoid the need to form insulated vias in a package. Such an assembly may be able to undergo testing and burn-in through the attached contactor assembly. The flexible compliant contacts, formed as discussed previously herein, may be used in other semiconductor related structures. This may be useful in any application where contact is to be made with a array of contacts that may have variations in contact height. For example, the contacts currently used in burn-in and test head sockets may be replaced by the compliant connectors to add a degree of flexibility to the contacts. - It will be apparent that details of the apparatus, processes, and methods herein described can be varied considerably without departing from the concept and scope of the invention. The claims alone define the scope of the invention as conceived and as described herein.
Claims (23)
Priority Applications (1)
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US11/653,066 US20070200575A1 (en) | 2004-09-02 | 2007-01-12 | Circuit and method for error test, recordation, and repair |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/933,745 US7167010B2 (en) | 2004-09-02 | 2004-09-02 | Pin-in elastomer electrical contactor and methods and processes for making and using the same |
US11/653,066 US20070200575A1 (en) | 2004-09-02 | 2007-01-12 | Circuit and method for error test, recordation, and repair |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/933,745 Continuation US7167010B2 (en) | 2004-09-02 | 2004-09-02 | Pin-in elastomer electrical contactor and methods and processes for making and using the same |
Publications (1)
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US20070200575A1 true US20070200575A1 (en) | 2007-08-30 |
Family
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US10/933,745 Expired - Fee Related US7167010B2 (en) | 2004-09-02 | 2004-09-02 | Pin-in elastomer electrical contactor and methods and processes for making and using the same |
US11/653,066 Abandoned US20070200575A1 (en) | 2004-09-02 | 2007-01-12 | Circuit and method for error test, recordation, and repair |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
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US10/933,745 Expired - Fee Related US7167010B2 (en) | 2004-09-02 | 2004-09-02 | Pin-in elastomer electrical contactor and methods and processes for making and using the same |
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US (2) | US7167010B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080173999A1 (en) * | 2007-01-23 | 2008-07-24 | Samsung Electronics Co., Ltd. | Stack package and method of manufacturing the same |
US20100039779A1 (en) * | 2008-08-15 | 2010-02-18 | Siemens Power Generation, Inc. | Wireless Telemetry Electronic Circuit Board for High Temperature Environments |
US20100039289A1 (en) * | 2008-08-15 | 2010-02-18 | Siemens Power Generation, Inc. | Wireless Telemetry Electronic Circuit Package for High Temperature Environments |
US20230268290A1 (en) * | 2022-02-18 | 2023-08-24 | Western Digital Technologies, Inc. | Semiconductor Devices Having Supportive Plating Structures |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7282932B2 (en) * | 2004-03-02 | 2007-10-16 | Micron Technology, Inc. | Compliant contact pin assembly, card system and methods thereof |
US7338300B1 (en) * | 2006-11-28 | 2008-03-04 | Inventec Corporation | Static electricity conductive mechanism |
US9977052B2 (en) * | 2016-10-04 | 2018-05-22 | Teradyne, Inc. | Test fixture |
TWI758991B (en) * | 2020-12-04 | 2022-03-21 | 致茂電子股份有限公司 | Probe device |
CN118033189B (en) * | 2024-02-08 | 2024-08-23 | 苏州联讯仪器股份有限公司 | Wafer level burn-in test fixture and wafer level burn-in test device |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4473798A (en) * | 1981-08-25 | 1984-09-25 | Daymarc Corporation | Interface assembly for testing integrated circuit devices |
US5670889A (en) * | 1994-10-17 | 1997-09-23 | Nihon Denshizairyo Kabushiki Kaisha | Probe card for maintaining the position of a probe in high temperature application |
US6229322B1 (en) * | 1998-08-21 | 2001-05-08 | Micron Technology, Inc. | Electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus |
US6351133B1 (en) * | 1999-03-31 | 2002-02-26 | Adoamtest Corp. | Packaging and interconnection of contact structure |
US6462575B1 (en) * | 2000-08-28 | 2002-10-08 | Micron Technology, Inc. | Method and system for wafer level testing and burning-in semiconductor components |
US6466043B2 (en) * | 1999-01-29 | 2002-10-15 | Advantest Corp. | Contact structure for electrical communication with contact targets |
US6475822B2 (en) * | 1993-11-16 | 2002-11-05 | Formfactor, Inc. | Method of making microelectronic contact structures |
US6535012B1 (en) * | 1990-08-29 | 2003-03-18 | Micron Technology, Inc. | Universal wafer carrier for wafer level die burn-in |
US6535033B2 (en) * | 2000-12-07 | 2003-03-18 | Texas Instruments Incorporated | Peak hold circuit |
US6579804B1 (en) * | 1998-11-30 | 2003-06-17 | Advantest, Corp. | Contact structure and production method thereof and probe contact assembly using same |
US6830460B1 (en) * | 1999-08-02 | 2004-12-14 | Gryphics, Inc. | Controlled compliance fine pitch interconnect |
US6953348B2 (en) * | 2003-04-25 | 2005-10-11 | Yokowo Co., Ltd. | IC socket |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5546012A (en) | 1994-04-15 | 1996-08-13 | International Business Machines Corporation | Probe card assembly having a ceramic probe card |
CN1134667C (en) | 1996-05-17 | 2004-01-14 | 福姆法克特公司 | Microelectronic spring contact element |
-
2004
- 2004-09-02 US US10/933,745 patent/US7167010B2/en not_active Expired - Fee Related
-
2007
- 2007-01-12 US US11/653,066 patent/US20070200575A1/en not_active Abandoned
Patent Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4473798A (en) * | 1981-08-25 | 1984-09-25 | Daymarc Corporation | Interface assembly for testing integrated circuit devices |
US6535012B1 (en) * | 1990-08-29 | 2003-03-18 | Micron Technology, Inc. | Universal wafer carrier for wafer level die burn-in |
US6475822B2 (en) * | 1993-11-16 | 2002-11-05 | Formfactor, Inc. | Method of making microelectronic contact structures |
US5670889A (en) * | 1994-10-17 | 1997-09-23 | Nihon Denshizairyo Kabushiki Kaisha | Probe card for maintaining the position of a probe in high temperature application |
US6229322B1 (en) * | 1998-08-21 | 2001-05-08 | Micron Technology, Inc. | Electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus |
US6579804B1 (en) * | 1998-11-30 | 2003-06-17 | Advantest, Corp. | Contact structure and production method thereof and probe contact assembly using same |
US6466043B2 (en) * | 1999-01-29 | 2002-10-15 | Advantest Corp. | Contact structure for electrical communication with contact targets |
US6472890B2 (en) * | 1999-01-29 | 2002-10-29 | Advantest, Corp. | Method for producing a contact structure |
US6351133B1 (en) * | 1999-03-31 | 2002-02-26 | Adoamtest Corp. | Packaging and interconnection of contact structure |
US6830460B1 (en) * | 1999-08-02 | 2004-12-14 | Gryphics, Inc. | Controlled compliance fine pitch interconnect |
US6462575B1 (en) * | 2000-08-28 | 2002-10-08 | Micron Technology, Inc. | Method and system for wafer level testing and burning-in semiconductor components |
US6535033B2 (en) * | 2000-12-07 | 2003-03-18 | Texas Instruments Incorporated | Peak hold circuit |
US6953348B2 (en) * | 2003-04-25 | 2005-10-11 | Yokowo Co., Ltd. | IC socket |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080173999A1 (en) * | 2007-01-23 | 2008-07-24 | Samsung Electronics Co., Ltd. | Stack package and method of manufacturing the same |
US20100039779A1 (en) * | 2008-08-15 | 2010-02-18 | Siemens Power Generation, Inc. | Wireless Telemetry Electronic Circuit Board for High Temperature Environments |
US20100039289A1 (en) * | 2008-08-15 | 2010-02-18 | Siemens Power Generation, Inc. | Wireless Telemetry Electronic Circuit Package for High Temperature Environments |
WO2010039319A3 (en) * | 2008-08-15 | 2010-08-12 | Siemens Energy, Inc. | A wireless telemetry electronic circuit package for high temperature environments |
US8023269B2 (en) | 2008-08-15 | 2011-09-20 | Siemens Energy, Inc. | Wireless telemetry electronic circuit board for high temperature environments |
US8220990B2 (en) | 2008-08-15 | 2012-07-17 | Siemens Energy, Inc. | Wireless telemetry electronic circuit package for high temperature environments |
US20230268290A1 (en) * | 2022-02-18 | 2023-08-24 | Western Digital Technologies, Inc. | Semiconductor Devices Having Supportive Plating Structures |
Also Published As
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US20060043986A1 (en) | 2006-03-02 |
US7167010B2 (en) | 2007-01-23 |
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Owner name: MICRON TECHNOLOGY, INC., IDAHO Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT;REEL/FRAME:050937/0001 Effective date: 20190731 |