US20060265205A1 - Simulation system and computer-implemented method for simulation and verifying a control system - Google Patents
Simulation system and computer-implemented method for simulation and verifying a control system Download PDFInfo
- Publication number
- US20060265205A1 US20060265205A1 US10/561,632 US56163204A US2006265205A1 US 20060265205 A1 US20060265205 A1 US 20060265205A1 US 56163204 A US56163204 A US 56163204A US 2006265205 A1 US2006265205 A1 US 2006265205A1
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- 238000004088 simulation Methods 0.000 title claims abstract description 71
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004891 communication Methods 0.000 claims abstract description 38
- 230000008569 process Effects 0.000 claims abstract description 12
- 238000011161 development Methods 0.000 claims abstract description 11
- 238000012795 verification Methods 0.000 claims abstract description 4
- 238000004590 computer program Methods 0.000 claims description 9
- 238000013459 approach Methods 0.000 description 18
- 230000010076 replication Effects 0.000 description 11
- 238000002474 experimental method Methods 0.000 description 10
- 230000003068 static effect Effects 0.000 description 7
- 230000009466 transformation Effects 0.000 description 7
- 230000003542 behavioural effect Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 230000003750 conditioning effect Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000003362 replicative effect Effects 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000011217 control strategy Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000013178 mathematical model Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 230000004936 stimulating effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/10—Geometric CAD
- G06F30/15—Vehicle, aircraft or watercraft design
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
Definitions
- the present invention relates to a simulation system for computer-implemented simulation and verification of a control system under development as well as a computer-implemented method for simulating and verifying a control system under development. More particularly, the present invention relates to the so-called rapid prototyping of a control system for dynamic systems such as vehicles, aircrafts, ships, etc. as well as parts thereof. Further, the present invention relates to a computer program product with a computer-readable medium and a computer program stored on the computer-readable medium with program coding means which are suitable for carrying out such a process when the computer program is run on a computer.
- a rapid prototyping system usually is characterized as being a hybrid hardware/software system, in general consisting of the following main components:
- FIG. 1 shows a conventional simulation system 10 as known from the prior art.
- the known simulation system 10 comprises one or more simulation processors with corresponding memory modules 12 a , 12 b, 12 c on which portions of a model of the control system under development (or so-called sub-models) are run.
- the simulation system 10 further comprises an input interface 13 a and an output interface 13 b for exchanging signals with the so-called outside world.
- the simulation system 10 comprises a communication interface 14 for downloading the module from a host onto the simulation target, controlling the simulation experiment, measuring and calibrating module signals and parameters, respectively.
- Signals of the input and output interfaces can be analog (e.g., temperature or pressure sensor) or digital (e.g., communication protocol such as CAN).
- analog e.g., temperature or pressure sensor
- digital e.g., communication protocol such as CAN
- modules in the following several model parts (called modules in the following) from one or several sources (e.g., behavioral modeling tool, hand-written C code) are to be integrated with each other, so as to compose an entire control system's model.
- the communication among modules 12 a , 12 b, 12 c as well as between modules and input or output interfaces 13 a, 13 b (likewise considered as modules in the following) is performed via signals connecting input and output ports, depicted as circles in FIG. 1 .
- this communication is achieved by sharing the very same memory location (the same high-level language variable) for ports being connected with each other, where one module writes the current value of the signal into the given memory location and the other module reads from it.
- FIG. 2 a shows a first module 12 d and a second module 12 e which are sharing a variable which is stored in a static memory location 81 .
- These objects are achieved by proposing a simulation system and a computer-implemented method for simulating and verifying a control system.
- the dynamic interconnection approach of the present invention does not rely on interconnection scheme specific model-to-code transformation. Instead, this transformation is totally independent of the actual module interconnections being used. Rather, inter-module communication is performed in an explicit manner by using distinct memory locations instead of shared ones and copying or replicating signal values from one memory location to another when needed.
- the interconnection scheme is not reflected by the mere simulation executable, it needs to be passed on to the simulation target differently. This is achieved by dynamically setting up the actual module interconnections via the host-target communication interface during experiment setup, after having downloaded the executable.
- a simulation model is run to simulate and verify a control system during development, the simulation model comprises a number of sub-models which are run on respective modules of a simulation system. Communication between the respective modules of the simulation model as well as the simulation system is performed via distinct and separate memory locations, the modules being dynamically reconfigured with each other.
- the data and/or signals are replicated consistently by means of a cross-bar switch.
- this replication is performed under real time conditions.
- the modules interconnect automatically via interconnection nodes and replicate data.
- a consistent replication of data under real-time circumstances or conditions may be done via communication variables.
- the cross-bar switch as mentioned above provides means for consistently copying values of output signals to communication variables after reaching a consistent state. Further, the cross-bar switch provides means for consistently passing these values to connected input signals before the respective modules continue computation.
- a consistent copy mechanism may be achieved by atomic copy processes, blocking interrupts or the like. Under certain circumstances being determined by the respective real-time environment settings, signal variables or communication variables may be obsolete and then could be optimized away for higher performance.
- a distributed approach could be used for dynamic reconfiguration of module interconnections instead of the central approach as described above.
- ports could connect themselves to their respective counterparts and be responsible for signal value replication.
- the invention also covers a computer program with program coding means which are suitable for carrying out a process according to the invention as subscribed above when the computer program is run on a computer.
- FIG. 1 shows a schematic block illustration of a simulation system of the prior art.
- FIG. 2 a shows a schematic illustration of a static interconnection of the prior art.
- FIG. 2 b shows a preferred embodiment of a dynamic interconnection according to the present invention.
- FIG. 3 shows s a preferred embodiment of a simulation system according to the invention using a dynamic interconnection according to FIG. 2 b.
- FIG. 4 shows an example of a consistent replication under real-time circumstances via communication variables according to the invention.
- FIG. 5 shows an alternative embodiment of an interconnection scheme according to the invention.
- FIG. 2 b a dynamic interconnection approach via distinct memory locations is provided.
- the principles of the dynamic interconnection according to the invention is visualized in FIG. 2 b wherein data 81 a of a first module 2 d are copied or replicated by means of dynamic replication 20 in a distinct memory location of a second module 2 e as according data 81 a′.
- FIG. 3 a first example for a simulation system 30 according to the invention is described in the following as the so-called central approach.
- the main component of the central approach simulation system 30 is a so-called cross-bar switch 10 with an interconnection scheme 11 .
- the simulation system 30 further comprises a plurality of modules 2 a, 2 b, 2 c, an input interface 3 a, an output interface 3 b, a stimuli generator module 4 as well as a real-time operating system 7 .
- all components of simulation system 30 are interconnected with each other via the cross-bar switch, the interconnection scheme 11 defining which input and output ports of modules on the simulation target are connected with each other.
- the interconnection scheme corresponds to the totality of connections in a block diagram wherein each block corresponds to one of the modules being integrated on the simulation target 30 .
- the interconnection scheme 11 could be conceived as a two-dimensional switch matrix wherein both dimensions denote the modules' ports and the matrix values define whether the respective ports are connected with each other (and possibly the signal flow direction).
- a simulation host 5 is connected with the cross-bar switch 10 via a host-target communication interface 6 and constitutes the human-machine interface to the rapid prototyping system.
- the host 5 enables the configuration and reconfiguration of the interconnection scheme, preferably supported by some graphical user interface.
- the host-target communication interface 6 connects the simulation host 5 with the simulation target 30 .
- it is based on some wired or wireless connection (serial interface, Ethernet, Bluetooth, etc.) and standardized or proprietary communication protocols (e.g., ASAP1b, L1). It provides at least the following functionality:
- the cross-bar switch 10 runs on the simulation target and is connected with
- the initial interconnection scheme 11 is downloaded from the host 5 via the host-target communication interface 6 into the cross-bar switch 10 .
- the cross-bar switch 10 performs the actual communication among modules and components by copying signal values from output ports to input ports.
- the way this replication process is performed is defined by the interconnection scheme 11 .
- the interconnection scheme 11 can be reconfigured after interrupting or even during a running simulation. Thus, module interconnections can be altered on the fly, without perceptible delay.
- signal and/or data values 82 a, 82 e of a first module 2 f can be buffered as communication variables 82 b, 82 f, respectively, in distinct memory locations.
- second and third modules 2 g, 2 h receive respective signal and/or data values 82 c, 82 g and 82 d, 82 h, respectively.
- Each module 2 f, 2 g, 2 h may compute at e.g. a different rate or upon interrupt triggers, and data replication 40 is performed by means of communication variables 82 b, 82 f buffering the current signal values.
- communication variables 82 b, 82 f buffering the current signal values.
- the cross-bar switch 10 provides means for
- the consistent copy mechanism as described may be achieved by atomic copy processes, blocking interrupts or the like, depending on the underlying real-time architecture and operating system.
- signal variables or communication variables may be obsolete and then could be optimized away for higher performance.
- each signal value may be influenced during inter-module communication in a pre-defined manner after reading the original value from the source memory location and before writing to the target memory location.
- the kind of operation being applied and the respective parameters are considered as being part of the interconnection scheme.
- Each of them can be configured and reconfigured in a dynamic manner, as can module interconnections. This enhancement greatly widens the usefulness of the dynamic reconfiguration approach.
- FIG. 5 a distributed approach for dynamic reconfiguration of module interconnections which could be used instead of the central approach employing a distinct cross-bar switch component on the target is described. Rather than having a central component copy signal values, ports could “connect themselves” to their respective counterparts and be responsible for signal value replication.
- the intelligence for value replication is distributed over the system's components instead of concentrating it in a central cross-bar switch component.
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- Evolutionary Computation (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Automation & Control Theory (AREA)
- Aviation & Aerospace Engineering (AREA)
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Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP03013928.1 | 2003-06-20 | ||
EP03013928A EP1489531A1 (fr) | 2003-06-20 | 2003-06-20 | Système de simulation et mèthode assistée par ordinateur pour la simulation et la vèrification d'un système de commandes |
PCT/IB2004/002466 WO2004114164A1 (fr) | 2003-06-20 | 2004-06-21 | Systeme de simulation et procede realise sur ordinateur pour la simulation et la verification d'un systeme de commande |
Publications (1)
Publication Number | Publication Date |
---|---|
US20060265205A1 true US20060265205A1 (en) | 2006-11-23 |
Family
ID=33395832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/561,632 Abandoned US20060265205A1 (en) | 2003-06-20 | 2004-06-21 | Simulation system and computer-implemented method for simulation and verifying a control system |
Country Status (3)
Country | Link |
---|---|
US (1) | US20060265205A1 (fr) |
EP (1) | EP1489531A1 (fr) |
WO (1) | WO2004114164A1 (fr) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090232146A1 (en) * | 2006-10-24 | 2009-09-17 | Nxp, B.V. | System comprising nodes with active and passive ports |
US20110119317A1 (en) * | 2009-11-19 | 2011-05-19 | Atellis, Inc. | Apparatus, method and computer readable medium for simulation integration |
DE102012108490A1 (de) * | 2012-09-11 | 2014-03-13 | SimX GmbH | Verfahren und Simulationsumgebung zur flexiblen automatisierten Verbindung von Teilmodellen |
US9201999B1 (en) * | 2014-06-30 | 2015-12-01 | Cadence Design Systems, Inc. | Integrated circuit floorplan having feedthrough buffers |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3451202B1 (fr) * | 2017-09-01 | 2021-02-24 | dSPACE digital signal processing and control engineering GmbH | Procédé de génération d'un modèle d'un système technique exécutable sur un appareil d'essai et appareil d'essai |
Citations (4)
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US4599070A (en) * | 1981-07-29 | 1986-07-08 | Control Interface Company Limited | Aircraft simulator and simulated control system therefor |
US5404304A (en) * | 1993-11-19 | 1995-04-04 | Delco Electronics Corporation | Vehicle control system for determining verified wheel speed signals |
US6823280B2 (en) * | 2000-01-24 | 2004-11-23 | Fluor Corporation | Control system simulation, testing, and operator training |
US20050018803A1 (en) * | 2003-06-26 | 2005-01-27 | Doosan Heavy Industries & Construction Co., Ltd. | Control rod driving simulator for verification of control rod driving mechanism control system of atomic power plant |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US5056014A (en) * | 1985-02-04 | 1991-10-08 | Lockheed Sanders, Inc. | Network simulation system |
US4807183A (en) * | 1985-09-27 | 1989-02-21 | Carnegie-Mellon University | Programmable interconnection chip for computer system functional modules |
US5036473A (en) * | 1988-10-05 | 1991-07-30 | Mentor Graphics Corporation | Method of using electronically reconfigurable logic circuits |
US5452231A (en) * | 1988-10-05 | 1995-09-19 | Quickturn Design Systems, Inc. | Hierarchically connected reconfigurable logic assembly |
US6289494B1 (en) * | 1997-11-12 | 2001-09-11 | Quickturn Design Systems, Inc. | Optimized emulation and prototyping architecture |
WO2001031516A2 (fr) * | 1999-10-22 | 2001-05-03 | Mentor Graphics Corporation | Systeme d'emulaton a architecture efficace d'acheminement de signal d'emulation |
-
2003
- 2003-06-20 EP EP03013928A patent/EP1489531A1/fr not_active Ceased
-
2004
- 2004-06-21 US US10/561,632 patent/US20060265205A1/en not_active Abandoned
- 2004-06-21 WO PCT/IB2004/002466 patent/WO2004114164A1/fr active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4599070A (en) * | 1981-07-29 | 1986-07-08 | Control Interface Company Limited | Aircraft simulator and simulated control system therefor |
US5404304A (en) * | 1993-11-19 | 1995-04-04 | Delco Electronics Corporation | Vehicle control system for determining verified wheel speed signals |
US6823280B2 (en) * | 2000-01-24 | 2004-11-23 | Fluor Corporation | Control system simulation, testing, and operator training |
US7162385B2 (en) * | 2000-01-24 | 2007-01-09 | Fluor Corporation | Control system simulation, testing, and operator training |
US20050018803A1 (en) * | 2003-06-26 | 2005-01-27 | Doosan Heavy Industries & Construction Co., Ltd. | Control rod driving simulator for verification of control rod driving mechanism control system of atomic power plant |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090232146A1 (en) * | 2006-10-24 | 2009-09-17 | Nxp, B.V. | System comprising nodes with active and passive ports |
US9614764B2 (en) * | 2006-10-24 | 2017-04-04 | Entropic Communications, Llc | System comprising nodes with active and passive ports |
US20110119317A1 (en) * | 2009-11-19 | 2011-05-19 | Atellis, Inc. | Apparatus, method and computer readable medium for simulation integration |
WO2011063187A2 (fr) * | 2009-11-19 | 2011-05-26 | Atellis, Inc. | Appareil, procédé et support lisible par ordinateur pour intégration de simulation |
WO2011063187A3 (fr) * | 2009-11-19 | 2011-08-18 | Atellis, Inc. | Appareil, procédé et support lisible par ordinateur pour intégration de simulation |
US9753996B2 (en) | 2009-11-19 | 2017-09-05 | Atellis, Inc. | Apparatus, method and computer readable medium for simulation integration |
DE102012108490A1 (de) * | 2012-09-11 | 2014-03-13 | SimX GmbH | Verfahren und Simulationsumgebung zur flexiblen automatisierten Verbindung von Teilmodellen |
DE102012108490B4 (de) * | 2012-09-11 | 2015-03-26 | SimX GmbH | Verfahren und Simulationsumgebung zur flexiblen automatisierten Verbindung von Teilmodellen |
US9201999B1 (en) * | 2014-06-30 | 2015-12-01 | Cadence Design Systems, Inc. | Integrated circuit floorplan having feedthrough buffers |
Also Published As
Publication number | Publication date |
---|---|
EP1489531A1 (fr) | 2004-12-22 |
WO2004114164A1 (fr) | 2004-12-29 |
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Date | Code | Title | Description |
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AS | Assignment |
Owner name: ROBERT BOSCH GMBH, GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WEISS, GUENTHER;STREHL, KARSTEN;HONEKAMP, UWE;REEL/FRAME:017821/0242;SIGNING DATES FROM 20060126 TO 20060203 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |