US20050280027A1 - Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method - Google Patents
Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method Download PDFInfo
- Publication number
- US20050280027A1 US20050280027A1 US11/184,831 US18483105A US2005280027A1 US 20050280027 A1 US20050280027 A1 US 20050280027A1 US 18483105 A US18483105 A US 18483105A US 2005280027 A1 US2005280027 A1 US 2005280027A1
- Authority
- US
- United States
- Prior art keywords
- layer
- semiconductor
- film
- ohmic electrode
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 91
- 150000001875 compounds Chemical class 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title description 9
- 238000000034 method Methods 0.000 title description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 24
- 239000010703 silicon Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 229910052761 rare earth metal Inorganic materials 0.000 claims abstract description 17
- 150000002910 rare earth metals Chemical class 0.000 claims abstract description 17
- 229910052751 metal Inorganic materials 0.000 claims description 37
- 239000002184 metal Substances 0.000 claims description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 23
- 229910021332 silicide Inorganic materials 0.000 claims description 21
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 21
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- 239000002344 surface layer Substances 0.000 claims description 8
- 229910021478 group 5 element Inorganic materials 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 138
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 28
- 229910002601 GaN Inorganic materials 0.000 description 26
- 239000010408 film Substances 0.000 description 14
- 229910052691 Erbium Inorganic materials 0.000 description 12
- UYAHIZSMUZPPFV-UHFFFAOYSA-N erbium Chemical compound [Er] UYAHIZSMUZPPFV-UHFFFAOYSA-N 0.000 description 12
- 239000010936 titanium Substances 0.000 description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 8
- 229910052719 titanium Inorganic materials 0.000 description 8
- 229910021341 titanium silicide Inorganic materials 0.000 description 8
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 229910002704 AlGaN Inorganic materials 0.000 description 5
- 239000013039 cover film Substances 0.000 description 5
- 238000005036 potential barrier Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 4
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000000313 electron-beam-induced deposition Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000002784 hot electron Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- 206010010144 Completed suicide Diseases 0.000 description 1
- 229910052688 Gadolinium Inorganic materials 0.000 description 1
- 229910052689 Holmium Inorganic materials 0.000 description 1
- 229910052774 Proactinium Inorganic materials 0.000 description 1
- 229910052771 Terbium Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- UIWYJDYFSGRHKR-UHFFFAOYSA-N gadolinium atom Chemical compound [Gd] UIWYJDYFSGRHKR-UHFFFAOYSA-N 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- KJZYNXUDTRRSPN-UHFFFAOYSA-N holmium atom Chemical compound [Ho] KJZYNXUDTRRSPN-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- GZCRRIHWUXGPOV-UHFFFAOYSA-N terbium atom Chemical compound [Tb] GZCRRIHWUXGPOV-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Definitions
- the present invention relates to a semiconductor device and its manufacture method, and more particularly to a semiconductor device having an ohmic electrode formed on compound semiconductor having a wide band gap and its manufacture method.
- ohmic electrode for semiconductor having a wide band gap such as gallium nitride (GaN)
- GaN gallium nitride
- Ti titanium
- Al aluminum
- RTA rapid thermal annealing
- a depletion layer formed in the surface layer of GaN becomes thin.
- tunneling current can be increased in addition to hot electron field emission by which carriers are transported over the potential barrier at the junction. In this manner, ohmic contact with a small contact resistance can be formed.
- the current-voltage characteristics at the junction between semiconductor and metal are determined by electron affinity, band gap, impurity concentration, respectively of semiconductor, work function of metal and the like.
- metal is made in contact with semiconductor, there is a general tendency that the Fermi level of metal is pinned in the band gap of semiconductor.
- semiconductor having a wide band gap such as GaN the Schottky barrier at the junction between metal and semiconductor becomes high. From this reason, there is a limit in reducing contact resistance.
- An object of this invention is to provide a semiconductor device capable of lowering contact resistance of an ohmic electrode formed on semiconductor having a wide band gap, and its manufacture method.
- a method of manufacturing a semiconductor device comprising steps of: forming a first film of rare-earth metal on a semiconductor region of compound semiconductor exposed on a substrate; forming a second film essentially comprising silicon on a surface of the first film; and heating the first and second films to silicidate at least a portion of the first film in contact with the second film.
- the first film in contact with the semiconductor region is made of rare-earth metal or its silicide.
- An ohmic contact having a low contact resistance can be formed on compound semiconductor having a wide band gap.
- a semiconductor device comprising: a substrate having a semiconductor region of compound semiconductor formed in a surface layer of the substrate; and a first film of rare-earth metal directly disposed on a surface of the semiconductor region.
- a semiconductor device comprising: a substrate having a semiconductor region of compound semiconductor formed in a surface layer of the substrate; and a first film of silicide of rare-earth metal directly disposed on a surface of the semiconductor region.
- an ohmic contact having a low contact resistance can be formed on compound semiconductor having a wide band gap.
- FIGS. 1A and 1B are cross sectional views of a substrate illustrating a method of manufacturing a semiconductor device according to a first embodiment.
- FIGS. 2A and 2B are cross sectional views of a substrate illustrating a method of manufacturing a semiconductor device according to a second embodiment.
- FIGS. 3A and 3B are energy band diagrams near at the interface between a semiconductor layer and a metal layer of the semiconductor device of the first embodiment.
- FIG. 4 is a cross sectional view of a MESFET having the structure of the semiconductor device of the second embodiment.
- FIG. 5 is a cross sectional view of a HEMT having the structure of the semiconductor device of the second embodiment.
- FIG. 6 is a cross sectional view of an HBT having the structure of the semiconductor device of the second embodiment.
- FIG. 7 is a cross sectional view of an LED having the structure of the semiconductor device of the second embodiment.
- a semiconductor layer 2 of compound semiconductor is formed on a semiconductor substrate 1 .
- the semiconductor layer 2 is made of group III-V compound semiconductor containing nitrogen as a group V element, such as gallium nitride (GaN).
- group III-V compound semiconductor containing nitrogen includes InGaN, AlGaN, InN, GalnNAs, InAlNAs, AlN and the like.
- These compound semiconductor materials have a wide band gap as compared to those compound semiconductor materials which contain P, As, Sb or the like as the group V element and do not contain N.
- the embodiments to follow are effective for the semiconductor layer 2 made of compound semiconductor having a wide band gap, among others compound semiconductor having a band gap equal to or wider than 3 eV.
- a metal layer 3 made of erbium (Er) is formed on the semiconductor layer 2 .
- the metal layer 3 can be formed in a high vacuum state of about 1 ⁇ 10 ⁇ 7 to 1 ⁇ 10 ⁇ 8 Pa by electron beam deposition, crucible heating deposition, sputtering or the like. Oxidation of erbium can be prevented by setting a film forming atmosphere to the high vacuum state of about 1 ⁇ 10 ⁇ 7 to 1 ⁇ 10 ⁇ 8 Pa.
- a silicon layer 4 is formed on the metal layer 3 .
- the silicon layer 4 can be formed in a vacuum state of about 1 ⁇ 10 ⁇ 5 to 1 ⁇ 10 ⁇ 6 Pa by electron beam deposition, crucible heating deposition, sputtering or the like.
- the surface of the silicon layer 4 is covered with a resist patter, and by using this resist pattern as a mask, the silicon layer 4 and metal layer 3 are etched.
- the silicon layer 4 is dry-etched by using SF 6 and O 2
- the metal layer 3 is dry-etched by using Ar.
- Heat treatment is performed in a vacuum state of about 1 ⁇ 10 ⁇ 5 to 1 ⁇ 10 ⁇ 6 Pa and at a temperature of about 300 to 400° C. With this heat treatment, a silicide reaction occurs between the metal layer 3 and silicon layer 4 . By using amorphous silicon as the material of the silicon layer 4 , the suicide reaction occurs at a low temperature of 400° C. or lower. Since the silicide reaction is conducted in the vacuum state, oxidation of the metal layer 3 can be prevented.
- the heat treatment for the silicide reaction may be performed in an inert gas atmosphere.
- an ohmic electrode 5 of silicide of rare-earth metal is therefore formed on the semiconductor layer 2 .
- silicon in the ohmic electrode 5 diffuses into the surface layer of the semiconductor layer 2 so that a high concentration silicon region 6 is formed.
- FIG. 3A is an energy band diagram before silicidation shown in FIG. 1A .
- the band gap E C of the semiconductor layer 2 of GaN is 3.4 eV.
- a potential barrier E B is formed corresponding to a difference between electron affinity of GaN and the work function of erbium.
- E F , E C and E V shown in FIGS. 3A and 3B represent the Fermi level, the level at the lower end of the conduction band and the level at the upper end of the valence band, respectively.
- the work function (3.25 eV) of erbium is smaller than the work function (4.33 eV) of titanium.
- the potential barrier E B can be made lower than when a titanium electrode is made in contact with GaN. Hot electron field emission becomes large and low resistance contact can be obtained. Even in the state before silicidation shown in FIG. 1A , contact resistance can be lowered more-than a conventional ohmic electrode structure. Even if only a region of the metal layer 3 in contact with the silicon layer 4 is silicidated and a region in contact with the semiconductor layer 2 is not silicidated, the energy band structure similar to that shown in FIG. 3A can be obtained.
- the metal layer 3 may be made of rare-earth metal other than Er, such as gadolinium (Gd) having a work function of 3.15 eV, terbium (Tb) having a work function of 3.0 eV and holmium (Ho) having a work function of 3.15 eV.
- Gd gadolinium
- Tb terbium
- Ho holmium
- Rare-earth metal is rich in reaction and likely to be oxidized. Because oxide of rare-earth metal is an insulator, rare-earth metal has been considered not suitable for the electrode material.
- the metal layer 3 made of rare-earth metal is covered with the silicon layer 4 so that oxidation of the metal layer 3 can be prevented.
- FIG. 3B is an energy band diagram after silicidation shown in FIG. 1B .
- the height of the potential barrier E B at the interface between the semiconductor layer 2 and metal layer 3 does not change from that before silicidation. Since the high concentration silicon region 6 is formed in the surface layer of the semiconductor layer 2 , the depletion layer extending from the interface into the inside of the semiconductor layer 2 becomes thin. Therefore, even electrons having energy equal to or smaller than the potential barrier E B are transported from the semiconductor layer 2 to the metal layer 3 or vice versa by the tunneling phenomenon. The contact resistance can therefore be lowered further.
- the contact resistance when a titanium electrode was formed on a GaN layer was 5 to 8 ⁇ 10 ⁇ 6 ⁇ cm 2
- the contact resistance when an erbium (Er) silicide electrode was formed on a GaN layer was 2 ⁇ 10 ⁇ 6 ⁇ cm 2 .
- the silicide reaction is performed.
- rare-earth metal and silicon may be vapor-deposited at the same time by using two crucibles.
- the ohmic electrode 5 made of silicide of rare-earth metal can be formed.
- the surface of GaN is required to be processed by hydrochloric acid, hydrofluoric acid, potassium hydroxide or the like before the titanium film is formed.
- the surface treatment of the semiconductor layer 2 by such chemicals is not required to be performed before the metal layer 3 of erbium is formed.
- a semiconductor layer 2 On a substrate 1 , a semiconductor layer 2 , a metal layer 3 and a silicon film 4 are sequentially formed. The processes up to this state are similar to the processes of the first embodiment described with reference to FIG. 1A .
- an upper metal layer 8 of titanium is formed on the silicon layer 4 .
- the upper metal layer 8 can be formed by electron beam deposition, crucible heating deposition, sputtering or the like.
- the surface of the upper metal layer 8 is covered with a resist pattern, and by using this resist pattern as a mask, the upper metal layer 8 , silicon layer 4 and metal layer 3 are etched. Thereafter, heat treatment is performed in a vacuum state to conduct a silicide reaction.
- an ohmic electrode 5 is therefore formed by the silicide reaction between the metal layer 3 and silicon layer 4 , and on this ohmic electrode 5 a cover layer 9 is formed which is made of titanium silicide (TiSi 2 ) formed through silicidation of the upper metal layer 8 .
- TiSi 2 titanium silicide
- a high concentration silicon region 6 is formed in the surface layer of the semiconductor layer 2 .
- titanium silicide is lower than that of erbium silicide. Therefore, not only the contact resistance but also the resistance of an electronic circuit constituted of ohmic electrodes 5 can be lowered.
- titanium is used as the material of the upper metal layer 8
- other metals may also be used which are silicidated with silicon to form metal silicide having a resistivity lower than that of the ohmic electrode 5 .
- Such metals may be cobalt (Co), nickel (Ni), platinum (Pt) or the like.
- FIG. 4 is a cross sectional view of a MESFET.
- a buffer layer 21 of GaN On a substrate 20 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC), a buffer layer 21 of GaN, an underlying layer 22 of undoped GaN and a channel layer 23 of n-type GaN are sequentially formed.
- a gate electrode 26 having a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper layer) is in Schottky contact with a partial surface area of the channel layer 23 .
- Ohmic electrodes 24 made of erbium silicide are formed on the channel layer 23 on both sides of and spaced apart from the gate electrode 26 .
- a cover film 25 of titanium silicide is formed on each of the ohmic electrodes 24 .
- the channel layer 23 , ohmic electrode 24 and cover layer 25 correspond to the semiconductor layer 2 , ohmic electrode 5 and cover layer 9 shown in FIG. 2B .
- the contact resistance between the ohmic electrode 24 and channel layer 23 can be lowered.
- FIG. 5 is a cross sectional view of a high electron mobility transistor (HEMT).
- HEMT high electron mobility transistor
- a buffer layer 31 of GaN On a substrate 30 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC), a buffer layer 31 of GaN, an underlying layer 32 of undoped GaN, an electron transit layer 33 of undoped AlGaN and an electron supply layer 34 of n-type AlGaN are sequentially formed.
- a gate electrode 37 of Pt is in Schottky contact with a partial surface area of the electron supply layer 34 .
- Ohmic electrodes 35 made of erbium silicide are formed on the electron supply layer 34 on both sides of and spaced apart from the gate electrode 37 .
- a cover film 36 of titanium silicide is formed on each of the ohmic electrodes 35 . Two-dimensional electron gas is accumulated at the interface between the electron transit layer 33 and electron supply layer 34 .
- the electron supply layer 34 , ohmic electrode 35 and cover layer 36 correspond to the semiconductor layer 2 , ohmic electrode 5 and cover layer 9 shown in FIG. 2B .
- the contact resistance between the ohmic electrode 35 and electron supply layer 34 can be lowered.
- the electrical resistance between the ohmic electrode 35 and two-dimensional electron gas accumulated at the interface between the electron transit layer 33 and electron supply layer 34 can be lowered.
- FIG. 6 is a cross sectional view of a hetero bipolar transistor (HBT).
- HBT hetero bipolar transistor
- a buffer layer 41 of GaN On a substrate 40 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC), a buffer layer 41 of GaN, a collector layer 42 of n-type GaN, a-base layer 43 of p-type AlGaN and an emitter layer 44 of n-type GaN are sequentially formed.
- a partial upper surface of the collector layer 42 is exposed and on this exposed surface an ohmic electrode 45 of erbium silicide is formed.
- a cover film 46 of titanium silicide On the ohmic electrode 45 , a cover film 46 of titanium silicide is formed.
- a partial upper surface of the base layer 43 is exposed and on this exposed surface a base electrode 47 having a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper-layer) is formed.
- a base electrode 47 having a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper-layer) is formed.
- an ohmic electrode 48 of erbium silicide is formed on the emitter layer 44 .
- a cover film 49 of titanium silicide is formed on the ohmic electrode 48 .
- the collector layer 42 , ohmic electrode 45 and cover layer 46 correspond to the semiconductor layer 2 , ohmic electrode 5 and cover layer 9 shown in FIG. 2B .
- the emitter layer 44 , ohmic electrode 48 and cover layer 49 correspond to the semiconductor layer 2 , ohmic electrode 5 and cover layer 9 shown in FIG. 2B .
- the contact resistance between the ohmic electrode 45 and collector layer 42 and the contact resistance between the ohmic electrode 48 and emitter layer 44 can be lowered.
- FIG. 7 is a cross sectional view of a light emission diode (LED).
- LED light emission diode
- a buffer layer 51 of GaN On a substrate 50 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC), a buffer layer 51 of GaN, an n-type contact layer 52 of n-type GaN, a cathode layer 53 of n-type AlGaN, a light emission layer 54 of undoped InGaN, an anode layer 55 of p-type GaN and a p-type contact layer 56 of p-type GaN are sequentially formed.
- substrate 50 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC)
- a buffer layer 51 of GaN On a substrate 50 made of sapphire (Al 2 O 3 ) or silicon carbide (SiC), a buffer layer 51 of GaN, an n-type contact layer 52 of n-type GaN, a cathode layer
- a partial upper surface of the n-type contact layer 52 is exposed and on this exposed surface an ohmic electrode 57 of erbium silicide is formed.
- a cover film 58 of titanium silicide is formed on the ohmic electrode 57 .
- a p-side electrode 59 is formed which has a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper-layer) is formed.
- the n-type contact layer 52 , ohmic electrode 57 and cover layer 58 correspond to the semiconductor layer 2 , ohmic electrode 5 and cover layer 9 shown in FIG. 2B .
- the contact resistance between the ohmic electrode 57 and n-type contact layer 52 can therefore be lowered.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Led Devices (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
A first film of rare-earth metal is formed on a semiconductor region of compound semiconductor exposed on a substrate. A second film essentially comprising silicon is formed on the surface of the first film. The first and second films are heated to silicidate at least a portion of the first film in contact with the second film. It is possible to lower the contact resistance of an ohmic electrode formed on semiconductor having a wide band gap.
Description
- This application is based on Japanese Patent Application No. 2002-133056, filed on May 8, 2002, the entire contents of which are incorporated herein by reference.
- 1) Field of the Invention
- The present invention relates to a semiconductor device and its manufacture method, and more particularly to a semiconductor device having an ohmic electrode formed on compound semiconductor having a wide band gap and its manufacture method.
- 2) Description of the Related Art
- As an ohmic electrode for semiconductor having a wide band gap such as gallium nitride (GaN), a laminated electrode of titanium (Ti) and aluminum (Al) has been used conventionally. After the laminated electrode of Ti (lower layer)/Al (upper layer) is vapor-deposited on the surface of GaN, rapid thermal annealing (RTA) is performed to form ohmic contact. With RTA, a surface oxide layer slightly left on the surface of GaN is thermally destructed so that recombination centers are formed at a boundary between metal and semiconductor. Carriers are transported via recombination centers so that ohmic contact can be obtained.
- As the impurity concentration of GaN is raised, a depletion layer formed in the surface layer of GaN becomes thin. As the depletion layer becomes thin, tunneling current can be increased in addition to hot electron field emission by which carriers are transported over the potential barrier at the junction. In this manner, ohmic contact with a small contact resistance can be formed.
- The current-voltage characteristics at the junction between semiconductor and metal are determined by electron affinity, band gap, impurity concentration, respectively of semiconductor, work function of metal and the like. As metal is made in contact with semiconductor, there is a general tendency that the Fermi level of metal is pinned in the band gap of semiconductor. As metal is made in contact with semiconductor having a wide band gap such as GaN, the Schottky barrier at the junction between metal and semiconductor becomes high. From this reason, there is a limit in reducing contact resistance.
- In forming ohmic contact on GaN, it is necessary to perform annealing at a high temperature of about 600 to 800° C. after a Ti electrode is formed, because oxygen left on the surface of GaN is strongly coupled to Ga.
- An object of this invention is to provide a semiconductor device capable of lowering contact resistance of an ohmic electrode formed on semiconductor having a wide band gap, and its manufacture method.
- According to one aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising steps of: forming a first film of rare-earth metal on a semiconductor region of compound semiconductor exposed on a substrate; forming a second film essentially comprising silicon on a surface of the first film; and heating the first and second films to silicidate at least a portion of the first film in contact with the second film.
- The first film in contact with the semiconductor region is made of rare-earth metal or its silicide. An ohmic contact having a low contact resistance can be formed on compound semiconductor having a wide band gap.
- According to another aspect of the present invention, there is provided a semiconductor device comprising: a substrate having a semiconductor region of compound semiconductor formed in a surface layer of the substrate; and a first film of rare-earth metal directly disposed on a surface of the semiconductor region.
- According to another aspect of the present invention, there is provided a semiconductor device comprising: a substrate having a semiconductor region of compound semiconductor formed in a surface layer of the substrate; and a first film of silicide of rare-earth metal directly disposed on a surface of the semiconductor region.
- By making the first film made of rare-earth metal or its silicide contact the semiconductor region, an ohmic contact having a low contact resistance can be formed on compound semiconductor having a wide band gap.
-
FIGS. 1A and 1B are cross sectional views of a substrate illustrating a method of manufacturing a semiconductor device according to a first embodiment. -
FIGS. 2A and 2B are cross sectional views of a substrate illustrating a method of manufacturing a semiconductor device according to a second embodiment. -
FIGS. 3A and 3B are energy band diagrams near at the interface between a semiconductor layer and a metal layer of the semiconductor device of the first embodiment. -
FIG. 4 is a cross sectional view of a MESFET having the structure of the semiconductor device of the second embodiment. -
FIG. 5 is a cross sectional view of a HEMT having the structure of the semiconductor device of the second embodiment. -
FIG. 6 is a cross sectional view of an HBT having the structure of the semiconductor device of the second embodiment. -
FIG. 7 is a cross sectional view of an LED having the structure of the semiconductor device of the second embodiment. - With reference to
FIGS. 1A and 1B , description will be made on a semiconductor device and its manufacture method according to the first embodiment of the invention. - As shown in
FIG. 1A , asemiconductor layer 2 of compound semiconductor is formed on asemiconductor substrate 1. Thesemiconductor layer 2 is made of group III-V compound semiconductor containing nitrogen as a group V element, such as gallium nitride (GaN). In addition to GaN, group III-V compound semiconductor containing nitrogen includes InGaN, AlGaN, InN, GalnNAs, InAlNAs, AlN and the like. These compound semiconductor materials have a wide band gap as compared to those compound semiconductor materials which contain P, As, Sb or the like as the group V element and do not contain N. The embodiments to follow are effective for thesemiconductor layer 2 made of compound semiconductor having a wide band gap, among others compound semiconductor having a band gap equal to or wider than 3 eV. - A
metal layer 3 made of erbium (Er) is formed on thesemiconductor layer 2. Themetal layer 3 can be formed in a high vacuum state of about 1×10−7 to 1×10−8 Pa by electron beam deposition, crucible heating deposition, sputtering or the like. Oxidation of erbium can be prevented by setting a film forming atmosphere to the high vacuum state of about 1×10−7 to 1×10−8 Pa. - A
silicon layer 4 is formed on themetal layer 3. Thesilicon layer 4 can be formed in a vacuum state of about 1×10−5 to 1×10−6 Pa by electron beam deposition, crucible heating deposition, sputtering or the like. - The surface of the
silicon layer 4 is covered with a resist patter, and by using this resist pattern as a mask, thesilicon layer 4 andmetal layer 3 are etched. For example, thesilicon layer 4 is dry-etched by using SF6 and O2, and themetal layer 3 is dry-etched by using Ar. - Heat treatment is performed in a vacuum state of about 1×10−5 to 1×10−6 Pa and at a temperature of about 300 to 400° C. With this heat treatment, a silicide reaction occurs between the
metal layer 3 andsilicon layer 4. By using amorphous silicon as the material of thesilicon layer 4, the suicide reaction occurs at a low temperature of 400° C. or lower. Since the silicide reaction is conducted in the vacuum state, oxidation of themetal layer 3 can be prevented. The heat treatment for the silicide reaction may be performed in an inert gas atmosphere. - As shown in
FIG. 1B , anohmic electrode 5 of silicide of rare-earth metal is therefore formed on thesemiconductor layer 2. In addition, silicon in theohmic electrode 5 diffuses into the surface layer of thesemiconductor layer 2 so that a highconcentration silicon region 6 is formed. -
FIG. 3A is an energy band diagram before silicidation shown inFIG. 1A . The band gap EC of thesemiconductor layer 2 of GaN is 3.4 eV. At the interface between thesemiconductor layer 2 andmetal layer 3, a potential barrier EB is formed corresponding to a difference between electron affinity of GaN and the work function of erbium. EF, EC and EV shown inFIGS. 3A and 3B represent the Fermi level, the level at the lower end of the conduction band and the level at the upper end of the valence band, respectively. - The work function (3.25 eV) of erbium is smaller than the work function (4.33 eV) of titanium. The potential barrier EB can be made lower than when a titanium electrode is made in contact with GaN. Hot electron field emission becomes large and low resistance contact can be obtained. Even in the state before silicidation shown in
FIG. 1A , contact resistance can be lowered more-than a conventional ohmic electrode structure. Even if only a region of themetal layer 3 in contact with thesilicon layer 4 is silicidated and a region in contact with thesemiconductor layer 2 is not silicidated, the energy band structure similar to that shown inFIG. 3A can be obtained. Themetal layer 3 may be made of rare-earth metal other than Er, such as gadolinium (Gd) having a work function of 3.15 eV, terbium (Tb) having a work function of 3.0 eV and holmium (Ho) having a work function of 3.15 eV. - Rare-earth metal is rich in reaction and likely to be oxidized. Because oxide of rare-earth metal is an insulator, rare-earth metal has been considered not suitable for the electrode material. In this embodiment, as shown in
FIG. 1A , themetal layer 3 made of rare-earth metal is covered with thesilicon layer 4 so that oxidation of themetal layer 3 can be prevented. -
FIG. 3B is an energy band diagram after silicidation shown inFIG. 1B . The height of the potential barrier EB at the interface between thesemiconductor layer 2 andmetal layer 3 does not change from that before silicidation. Since the highconcentration silicon region 6 is formed in the surface layer of thesemiconductor layer 2, the depletion layer extending from the interface into the inside of thesemiconductor layer 2 becomes thin. Therefore, even electrons having energy equal to or smaller than the potential barrier EB are transported from thesemiconductor layer 2 to themetal layer 3 or vice versa by the tunneling phenomenon. The contact resistance can therefore be lowered further. - The contact resistance when a titanium electrode was formed on a GaN layer was 5 to 8×10−6 Ωcm2, whereas the contact resistance when an erbium (Er) silicide electrode was formed on a GaN layer was 2×10−6 Ωcm2.
- In the first embodiment, after the laminated structure of the
metal layer 3 of rare-earth metal and thesilicon layer 4 is formed, the silicide reaction is performed. Instead, rare-earth metal and silicon may be vapor-deposited at the same time by using two crucibles. In this case, at the same time when the film is formed, theohmic electrode 5 made of silicide of rare-earth metal can be formed. - If a conventional titanium electrode is used, the surface of GaN is required to be processed by hydrochloric acid, hydrofluoric acid, potassium hydroxide or the like before the titanium film is formed. In contrast, in the first embodiment, the surface treatment of the
semiconductor layer 2 by such chemicals is not required to be performed before themetal layer 3 of erbium is formed. - With reference to
FIGS. 2A and 2B , description will be made on a semiconductor device and its manufacture method according to the second embodiment of the invention. - On a
substrate 1, asemiconductor layer 2, ametal layer 3 and asilicon film 4 are sequentially formed. The processes up to this state are similar to the processes of the first embodiment described with reference toFIG. 1A . On thesilicon layer 4, anupper metal layer 8 of titanium is formed. Theupper metal layer 8 can be formed by electron beam deposition, crucible heating deposition, sputtering or the like. - The surface of the
upper metal layer 8 is covered with a resist pattern, and by using this resist pattern as a mask, theupper metal layer 8,silicon layer 4 andmetal layer 3 are etched. Thereafter, heat treatment is performed in a vacuum state to conduct a silicide reaction. - As shown in
FIG. 2B , anohmic electrode 5 is therefore formed by the silicide reaction between themetal layer 3 andsilicon layer 4, and on this ohmic electrode 5 acover layer 9 is formed which is made of titanium silicide (TiSi2) formed through silicidation of theupper metal layer 8. A highconcentration silicon region 6 is formed in the surface layer of thesemiconductor layer 2. - The resistivity of titanium silicide is lower than that of erbium silicide. Therefore, not only the contact resistance but also the resistance of an electronic circuit constituted of
ohmic electrodes 5 can be lowered. In the second embodiment, although titanium is used as the material of theupper metal layer 8, other metals may also be used which are silicidated with silicon to form metal silicide having a resistivity lower than that of theohmic electrode 5. Such metals may be cobalt (Co), nickel (Ni), platinum (Pt) or the like. - Next, various semiconductor devices will be described which incorporate the ohmic electrode structure of the first or second embodiment.
-
FIG. 4 is a cross sectional view of a MESFET. On asubstrate 20 made of sapphire (Al2O3) or silicon carbide (SiC), abuffer layer 21 of GaN, anunderlying layer 22 of undoped GaN and achannel layer 23 of n-type GaN are sequentially formed. - A
gate electrode 26 having a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper layer) is in Schottky contact with a partial surface area of thechannel layer 23.Ohmic electrodes 24 made of erbium silicide are formed on thechannel layer 23 on both sides of and spaced apart from thegate electrode 26. On each of theohmic electrodes 24, acover film 25 of titanium silicide is formed. - The
channel layer 23,ohmic electrode 24 andcover layer 25 correspond to thesemiconductor layer 2,ohmic electrode 5 and coverlayer 9 shown inFIG. 2B . In MESFET shown inFIG. 4 , the contact resistance between theohmic electrode 24 andchannel layer 23 can be lowered. -
FIG. 5 is a cross sectional view of a high electron mobility transistor (HEMT). On asubstrate 30 made of sapphire (Al2O3) or silicon carbide (SiC), abuffer layer 31 of GaN, anunderlying layer 32 of undoped GaN, anelectron transit layer 33 of undoped AlGaN and anelectron supply layer 34 of n-type AlGaN are sequentially formed. - A
gate electrode 37 of Pt is in Schottky contact with a partial surface area of theelectron supply layer 34.Ohmic electrodes 35 made of erbium silicide are formed on theelectron supply layer 34 on both sides of and spaced apart from thegate electrode 37. On each of theohmic electrodes 35, acover film 36 of titanium silicide is formed. Two-dimensional electron gas is accumulated at the interface between theelectron transit layer 33 andelectron supply layer 34. - The
electron supply layer 34,ohmic electrode 35 andcover layer 36 correspond to thesemiconductor layer 2,ohmic electrode 5 and coverlayer 9 shown inFIG. 2B . In HEMT shown inFIG. 5 , the contact resistance between theohmic electrode 35 andelectron supply layer 34 can be lowered. The electrical resistance between theohmic electrode 35 and two-dimensional electron gas accumulated at the interface between theelectron transit layer 33 andelectron supply layer 34 can be lowered. -
FIG. 6 is a cross sectional view of a hetero bipolar transistor (HBT). On asubstrate 40 made of sapphire (Al2O3) or silicon carbide (SiC), abuffer layer 41 of GaN, acollector layer 42 of n-type GaN,a-base layer 43 of p-type AlGaN and anemitter layer 44 of n-type GaN are sequentially formed. A partial upper surface of thecollector layer 42 is exposed and on this exposed surface anohmic electrode 45 of erbium silicide is formed. On theohmic electrode 45, acover film 46 of titanium silicide is formed. - A partial upper surface of the
base layer 43 is exposed and on this exposed surface abase electrode 47 having a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper-layer) is formed. On theemitter layer 44, anohmic electrode 48 of erbium silicide is formed. On theohmic electrode 48, acover film 49 of titanium silicide is formed. - The
collector layer 42,ohmic electrode 45 andcover layer 46 correspond to thesemiconductor layer 2,ohmic electrode 5 and coverlayer 9 shown inFIG. 2B . Theemitter layer 44,ohmic electrode 48 andcover layer 49 correspond to thesemiconductor layer 2,ohmic electrode 5 and coverlayer 9 shown inFIG. 2B . The contact resistance between theohmic electrode 45 andcollector layer 42 and the contact resistance between theohmic electrode 48 andemitter layer 44 can be lowered. -
FIG. 7 is a cross sectional view of a light emission diode (LED). On asubstrate 50 made of sapphire (Al2O3) or silicon carbide (SiC), abuffer layer 51 of GaN, an n-type contact layer 52 of n-type GaN, acathode layer 53 of n-type AlGaN, alight emission layer 54 of undoped InGaN, ananode layer 55 of p-type GaN and a p-type contact layer 56 of p-type GaN are sequentially formed. - A partial upper surface of the n-
type contact layer 52 is exposed and on this exposed surface anohmic electrode 57 of erbium silicide is formed. On theohmic electrode 57, acover film 58 of titanium silicide is formed. On a partial surface of the p-type contact layer 56, a p-side electrode 59 is formed which has a two-layer structure of Pt (lower layer)/Au (upper layer) or a two-layer structure of Ni (lower layer)/Au (upper-layer) is formed. - The n-
type contact layer 52,ohmic electrode 57 andcover layer 58 correspond to thesemiconductor layer 2,ohmic electrode 5 and coverlayer 9 shown inFIG. 2B . The contact resistance between theohmic electrode 57 and n-type contact layer 52 can therefore be lowered. - The present invention has been described in connection with the preferred embodiments. The invention is not limited only to the above embodiments. It is apparent that various modifications, improvements, combinations, and the like can be made by those skilled in the art.
Claims (7)
1-7. (canceled)
8. A semiconductor device comprising:
a substrate having a semiconductor region made of compound semiconductor formed in a surface layer of said substrate; and
a first film made of rare-earth metal directly disposed on a surface of the semiconductor region.
9. A semiconductor device according to claim 8 , wherein the semiconductor region is made of group III-V compound semiconductor comprising nitrogen as a group V element.
10. A semiconductor device comprising:
a substrate having a semiconductor region made of compound semiconductor formed in a surface layer of said substrate; and
a first film of silicide of rare-earth metal directly disposed on a surface of the semiconductor region.
11. A semiconductor device according to claim 10 , wherein the semiconductor region is made of group III-V compound semiconductor comprising nitrogen as a group V element.
12. A semiconductor device according to claim 10 , further comprising a second film directly disposed on a surface of said first film and made of metal silicide having a resistivity lower than a resistivity of said first film.
13. A semiconductor device according to claim 10 , wherein a silicon concentration of a portion of the semiconductor region in contact with said first film is higher than a silicon concentration of a portion of the semiconductor region remote from said first film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/184,831 US20050280027A1 (en) | 2002-05-08 | 2005-07-20 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002133056A JP3866149B2 (en) | 2002-05-08 | 2002-05-08 | Manufacturing method of semiconductor device |
JP2002-133056 | 2002-05-08 | ||
US10/429,828 US6936487B2 (en) | 2002-05-08 | 2003-05-06 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
US11/184,831 US20050280027A1 (en) | 2002-05-08 | 2005-07-20 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/429,828 Division US6936487B2 (en) | 2002-05-08 | 2003-05-06 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050280027A1 true US20050280027A1 (en) | 2005-12-22 |
Family
ID=29397405
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/429,828 Expired - Lifetime US6936487B2 (en) | 2002-05-08 | 2003-05-06 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
US11/184,831 Abandoned US20050280027A1 (en) | 2002-05-08 | 2005-07-20 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/429,828 Expired - Lifetime US6936487B2 (en) | 2002-05-08 | 2003-05-06 | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method |
Country Status (2)
Country | Link |
---|---|
US (2) | US6936487B2 (en) |
JP (1) | JP3866149B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070222466A1 (en) * | 2006-02-27 | 2007-09-27 | Keith Heinemann | Approach for fabricating probe elements for probe card assemblies using a reusable substrate |
US20080237867A1 (en) * | 2007-03-28 | 2008-10-02 | International Business Machines Corporation | Low contact resistance metal contact |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005183551A (en) * | 2003-12-17 | 2005-07-07 | Nec Corp | Semiconductor device, field effect transistor, and method for manufacturing same |
JP2007165446A (en) * | 2005-12-12 | 2007-06-28 | Oki Electric Ind Co Ltd | Ohmic contact structure of semiconductor element |
JP5769160B2 (en) | 2008-10-30 | 2015-08-26 | 国立大学法人東北大学 | Contact forming method, semiconductor device manufacturing method, and semiconductor device |
US8563372B2 (en) * | 2010-02-11 | 2013-10-22 | Cree, Inc. | Methods of forming contact structures including alternating metal and silicon layers and related devices |
US8466555B2 (en) * | 2011-06-03 | 2013-06-18 | Raytheon Company | Gold-free ohmic contacts |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4692348A (en) * | 1984-06-21 | 1987-09-08 | International Business Machines Corporation | Low temperature shallow doping technique |
US5192987A (en) * | 1991-05-17 | 1993-03-09 | Apa Optics, Inc. | High electron mobility transistor with GaN/Alx Ga1-x N heterojunctions |
US5571391A (en) * | 1994-07-15 | 1996-11-05 | Sharp Kabushiki Kaisha | Electrode structure and method for fabricating the same |
US5608287A (en) * | 1995-02-23 | 1997-03-04 | Eastman Kodak Company | Conductive electron injector for light-emitting diodes |
US5982024A (en) * | 1996-02-29 | 1999-11-09 | Sumitomo Chemical Company Limited | High concentration doped semiconductor |
US6222204B1 (en) * | 1994-07-19 | 2001-04-24 | Sharp Kabushiki Kaisha | Electrode structure and method for fabricating the same |
US6323053B1 (en) * | 1997-06-16 | 2001-11-27 | Matsushita Electric Industrial Co., Ltd. | Growth of GaN on Si substrate using GaSe buffer layer |
US20020163302A1 (en) * | 2001-04-09 | 2002-11-07 | Koichi Nitta | Light emitting device |
US6750124B1 (en) * | 2001-02-06 | 2004-06-15 | Arizona Board Of Regents | Direct patterning of nanometer-scale silicide structures on silicon by ion-beam implantation through a thin barrier layer |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1022494A (en) * | 1996-07-03 | 1998-01-23 | Sony Corp | Ohmic electrode and forming method therefor |
JPH10105117A (en) * | 1996-09-26 | 1998-04-24 | Casio Comput Co Ltd | Display device and driving method therefor |
JP3495544B2 (en) * | 1997-02-17 | 2004-02-09 | 古河電気工業株式会社 | GaN-based semiconductor device and manufacturing method thereof |
JPH10303407A (en) * | 1997-04-22 | 1998-11-13 | Matsushita Electric Ind Co Ltd | Semiconductor device |
JP3599592B2 (en) * | 1999-03-30 | 2004-12-08 | 古河電気工業株式会社 | Method for forming electrode on group III-V nitride compound semiconductor |
JP2002016311A (en) * | 2000-06-27 | 2002-01-18 | Sharp Corp | Gallium nitride based light emitting element |
JP2002075910A (en) * | 2000-08-24 | 2002-03-15 | Sharp Corp | Method of manufacturing electrode structure for nitride-based iii-v compound semiconductor device |
-
2002
- 2002-05-08 JP JP2002133056A patent/JP3866149B2/en not_active Expired - Fee Related
-
2003
- 2003-05-06 US US10/429,828 patent/US6936487B2/en not_active Expired - Lifetime
-
2005
- 2005-07-20 US US11/184,831 patent/US20050280027A1/en not_active Abandoned
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4692348A (en) * | 1984-06-21 | 1987-09-08 | International Business Machines Corporation | Low temperature shallow doping technique |
US5192987A (en) * | 1991-05-17 | 1993-03-09 | Apa Optics, Inc. | High electron mobility transistor with GaN/Alx Ga1-x N heterojunctions |
US5571391A (en) * | 1994-07-15 | 1996-11-05 | Sharp Kabushiki Kaisha | Electrode structure and method for fabricating the same |
US6222204B1 (en) * | 1994-07-19 | 2001-04-24 | Sharp Kabushiki Kaisha | Electrode structure and method for fabricating the same |
US5608287A (en) * | 1995-02-23 | 1997-03-04 | Eastman Kodak Company | Conductive electron injector for light-emitting diodes |
US5982024A (en) * | 1996-02-29 | 1999-11-09 | Sumitomo Chemical Company Limited | High concentration doped semiconductor |
US6323053B1 (en) * | 1997-06-16 | 2001-11-27 | Matsushita Electric Industrial Co., Ltd. | Growth of GaN on Si substrate using GaSe buffer layer |
US6750124B1 (en) * | 2001-02-06 | 2004-06-15 | Arizona Board Of Regents | Direct patterning of nanometer-scale silicide structures on silicon by ion-beam implantation through a thin barrier layer |
US20020163302A1 (en) * | 2001-04-09 | 2002-11-07 | Koichi Nitta | Light emitting device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070222466A1 (en) * | 2006-02-27 | 2007-09-27 | Keith Heinemann | Approach for fabricating probe elements for probe card assemblies using a reusable substrate |
US7637009B2 (en) * | 2006-02-27 | 2009-12-29 | Sv Probe Pte. Ltd. | Approach for fabricating probe elements for probe card assemblies using a reusable substrate |
US20080237867A1 (en) * | 2007-03-28 | 2008-10-02 | International Business Machines Corporation | Low contact resistance metal contact |
US7566651B2 (en) | 2007-03-28 | 2009-07-28 | International Business Machines Corporation | Low contact resistance metal contact |
US7749890B2 (en) | 2007-03-28 | 2010-07-06 | International Business Machines Corporation | Low contact resistance metal contact |
Also Published As
Publication number | Publication date |
---|---|
JP3866149B2 (en) | 2007-01-10 |
US20030209715A1 (en) | 2003-11-13 |
JP2003332259A (en) | 2003-11-21 |
US6936487B2 (en) | 2005-08-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11699748B2 (en) | Normally-off HEMT transistor with selective generation of 2DEG channel, and manufacturing method thereof | |
JP4221697B2 (en) | Semiconductor device | |
US8823013B2 (en) | Second Schottky contact metal layer to improve GaN schottky diode performance | |
US6064082A (en) | Heterojunction field effect transistor | |
US6531383B1 (en) | Method for manufacturing a compound semiconductor device | |
JP5183913B2 (en) | Manufacturing method of semiconductor device | |
US20050280027A1 (en) | Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method | |
JP2010522432A (en) | Cascode circuit using depletion mode GaN-based FET | |
JP2007149794A (en) | Field effect transistor | |
JP5202897B2 (en) | Field effect transistor and manufacturing method thereof | |
EP1424726B1 (en) | N-electrode for III-group nitride based compound semiconductor element and methof of manufacture thereof | |
JP2011210751A (en) | Group iii nitride semiconductor element, method of manufacturing group iii nitride semiconductor element, and electronic device | |
JP2004165387A (en) | Gan-based field effect transistor | |
JP2011238866A (en) | Semiconductor device and method for producing the same | |
JP3812366B2 (en) | Method for producing group III nitride compound semiconductor device | |
JP2006237430A (en) | Nitride semiconductor device | |
US7238970B2 (en) | Semiconductor device and method for fabricating the same | |
JPH11354817A (en) | Electrode for forming schottky barrier and manufacture thereof | |
US20040164415A1 (en) | Electrode employing nitride-based semiconductor of III-V group compound, and producing method thereof | |
JP2005159310A (en) | Semiconductor device and method of manufacturing the same | |
JP2004153189A (en) | GaN BASED III-V NITRIDE SEMICONDUCTOR SWITCHING ELEMENT | |
JP2006237162A (en) | Semiconductor apparatus and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |