US20040069644A1

US20040069644A1 - Preparing a wafer for electroplating

Info

Publication number: US20040069644A1
Application number: US10/260,363
Authority: US
Inventors: David Nelsen; Rajiv Rastogi
Original assignee: Intel Corp
Current assignee: Intel Corp
Priority date: 2002-09-30
Filing date: 2002-09-30
Publication date: 2004-04-15

Abstract

A wafer is prepared for electroplating via a spin, rinse and dry process performed on the wafer prior to electroplating. The process may be performed in a standalone tool or may be performed in a preclean module integrated into an electroplating tool.

Description

BACKGROUND

The present invention relates to the manufacture of semiconductor devices and more particularly to the preparation of a wafer for electroplating.

Manufacture of semiconductor devices typically involves a series of processes in which various layers are deposited and patterned on a substrate to form a device of the desired type. Semiconductor devices are typically formed from a semiconductor wafer which can have a plurality of individual dice, each of which includes the circuitry for an individual device. One problem in the manufacture of devices from a wafer is that a defect on the wafer, which may occur at any stage of the manufacturing process, can render useless the die or dice containing the defect.

Certain semiconductor devices, particularly advanced integrated circuits of the 0.18 micron (μm) technology node and beyond, have a metal layer electroplated thereon during manufacture. Such a metal layer, which is typically copper, may be used for interconnections. As a result of the electroplating process, wafers often have one or more defects. One type of defect commonly occurring as a result of the electroplating process is a comet defect, which is a defect that generally appears with a comet-like pattern, namely an eye with a following tail. A comet defect, along with other defects, can cause appreciable number of dice on a wafer to be rendered useless. Thus a need exists to reduce or eliminate this and other defects.

A further problem in the manufacture of semiconductor devices is that the various processes required are time consuming and may involve the use of a number of different pieces of equipment and/or tools. Because of this, the throughput, or the number of wafers capable of being processed during a given time frame, is reduced. Thus a need exists to increase throughput and enable high volume wafer processing.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an isometric view of a spin rinse dry (SRD) module in accordance with one embodiment of the invention. [0005]
FIG. 2 is a partial cutaway view of the SRD module in accordance with one embodiment of the invention. [0006]
FIG. 3 is a cross section view of the SRD module in accordance with one embodiment of the invention. [0007]
FIG. 4 is a top view of a semiconductor tool having a preclean module in accordance with one embodiment of the invention.[0008]

DETAILED DESCRIPTION

As discussed above, the manufacture of semiconductor devices requires many different processing stages. For devices implementing a metal layer, one manner of depositing the metal is by electroplating, also known as electrochemical deposition (ECD). Such electroplating may be used to deposit, for example, a copper (Cu) layer onto the substrate (generally over preformed layers). Although Cu electroplating will be discussed herein, it is to be understood that embodiments of the present invention may be used with the electroplating of other metals such as aluminum and the like. [0009]
A defect that may result from the formation of a copper layer is a comet defect. The comet defect has minimal Cu deposition in the eye of the comet, leading to missing metal after further processing, such as chemical mechanical polishing (CMP). This missing metal may cause an open circuit for the metal line covered by the defect. As discussed above, such a defect can impact or “kill” one or more of the production die on a wafer. [0010]
The Cu electroplating process typically occurs after a barrier/seed deposition process in which a thin Cu seed film is first deposited. A physical vapor deposition (PVD) process may be used to deposit the seed layer. Such deposition may occur in a PVD tool. After the seed layer is deposited, an oxidation process may be performed to provide an oxide layer over the seed layer. Although an oxidation layer may be created by contact with the ambient atmosphere of the fabrication facility, such a layer may be deposited via chemical vapor deposition (CVD) for uniformity. [0011]
The electroplating process occurs in a different tool than the above seed deposition and oxidation processes. Because of the process flow in a fabrication facility, a wafer batch may remain idle for differing time periods, often more than several days, between the seed and oxidation processes and the later electroplating process. Such a delay increases the chances of defects, particularly comet defects. [0012]
In one embodiment of a process according to the present invention, a wafer may be prepared prior to electroplating to prevent or reduce defects such as comet defects. In one embodiment a spin rinse dry (SRD) process may be performed prior to copper electroplating and after Cu seed deposition. In such an embodiment, a wafer is placed into a tool, such as a SRD module, and is rinsed with an aqueous solution, such as deionized (DI) water, while being subjected to spinning at a relatively low rate. While the embodiments discussed herein use DI water, it is to be understood that other aqueous solutions may be used in various embodiments. In certain embodiments, the spin rate during rinsing may be between approximately 60 revolutions per minute (RPM) to approximately 120 RPM, while other embodiments may encompass higher or lower rates. The rinsing may be performed for various time periods. In certain embodiments, the rinse time may be between approximately 15 to 45 seconds, and more particularly about 30 seconds. Other time periods may be desired for other embodiments. [0013]
The DI water may be applied at various flow rates, which in certain embodiments may be approximately 1.5 liters per minute. Other flow rates may be desired for other embodiments. The DI water cleans the wafer as it spins. The DI water is turned off at the conclusion of the rinsing. In some embodiments, after rinsing the wafer may be dried by spinning it at a higher rate. While the rate of spinning may vary, in certain embodiments, the rate may be between approximately 1200 and 1600 RPM, and more particularly between about 1350 and 1450 RPM. [0014]
The DI water rinse cleans the wafer surface to reduce or eliminate organic contamination prior to further processing of the wafer. Surface contamination is a precursor for plating defects, such as comet defects. Such cleaning thus reduces or eliminates a defect mode that “kills” production die. [0015]
In one embodiment, a SRD tool may be a commercially available tool, such as those available from Applied Materials (Santa Clara, Calif.) or Novellus (San Jose, Calif.), or the tool may be another commercially available or custom tool. Such a tool may include at least one nozzle for delivery of the aqueous solution over the front surface (and rear surface in certain embodiments) of a wafer to be engaged in the tool. In one embodiment, the wafer may be mechanically held in the proper location in the tool by a spider assembly, for example. Such an assembly may include a plurality of spider legs extending from a center portion. Adapted on the distal end of each of the spider legs may be a clip assembly having a clip, a capture post and an O-ring, all of which may be used to constrain the wafer in its desired position by limiting X,Y,Z movement and wafer slippage. Conventionally, the SRD tool may include other components such as a lift assembly to lift the wafer into the desired position and an in-station to provide the wafer to another location. [0016]
In accordance with one embodiment, a SRD tool receives wafers after a seed deposition process. The wafers are then subjected to a spin, rinse, and dry process as discussed above. After such processing, the wafers are then ready for electroplating. Depending on process capabilities, the wafers may proceed directly to such electroplating, or they may be stored prior to electroplating. It is desirable to perform such electroplating within several days (approximately 48 hours) of the SRD process in order to prevent defects such as comet defects. If, for some reason, one or more wafers previously subjected to a SRD process is not electroplated in such time, it may be desirable to prepare the wafer for electroplating by again performing the SRD process. [0017]
In a second embodiment, the SRD process may be performed in situ to an electroplating tool. In certain processes, such an embodiment may create process efficiencies in addition to cost savings and defect reduction. Such process efficiencies may occur because the wafers need only be processed within a single tool, thus avoiding the time and effort associated with causing the wafers to travel to different tools. Also in certain embodiments, the wafers may pass directly from an SRD module within the electroplating tool to the electroplating module itself, avoiding any delay and potential defects caused by such a delay. Further, the cost of a separate SRD tool can be saved in such embodiments. [0018]
Referring now to FIG. 1, an isometric view of [0019] SRD module 200 in accordance with this second embodiment is shown. SRD module 200 is designed to be an integrated preclean module for another tool, such as an electroplating tool. The SRD module 200 includes a bowl 210, which may be, for example, aluminum. Within the bowl 210 may be a plastic insert 215. SRD module 200 also includes chuck 220 for support of the wafer. In one embodiment, the chuck 220 may be a backside vacuum chuck which supports the wafer. Further support for the wafer exists in wafer pins 230 which are located around the perimeter of the wafer. Although only one such pin is shown in FIG. 1, it is to be understood that three or more pins may be present. SRD module 200 also includes a rinse arm 240 which may be adapted to move from the center of the wafer to the edge and back while providing the aqueous solution. It is to be understood that SRD module 200 may have additional components not relevant to the present discussion.
Shown in FIG. 2 is a partial cutaway view of [0020] SRD module 200 in accordance with one embodiment showing air flow through the module during the drying process. As shown in FIG. 2, air 310, which may be HEPA-filtered air from a mainframe, passes through the bowl 210 (and across the surface of a wafer, not shown in FIG. 2). From there, the air exits through exhaust ports 320 and an exhaust plenum 330.
Now referring to FIG. 3, shown is a cross section view of [0021] SRD module 200 in accordance with one embodiment showing other aspects of the module. Specifically, FIG. 3 shows that the plastic insert 215 may be located within a first insert 250 which may be made from ceramics or polyvinylidene fluoride (PVDF), in certain embodiments. The module 200 may also include an inner ring 260, which may also be made from PVDF. Further, module 200 also includes conventional electromechanical devices to provide for wafer support and movement. These devices may include spindle 270, lift pin 280, and pin lift mechanism 285. In various embodiments, SRD module 200 may be commercially available from Applied Materials, Novellus, or another supplier, or it may be a custom tool.
As discussed above, [0022] SRD module 200 is desirably located in another tool to avoid process delays and expense. In one embodiment, SRD module 200 may be located within a Cu electroplating tool, such as the IECP™ tool commercially available from Applied Materials.
In operation, [0023] SRD module 200 may process wafers in accordance with one embodiment of the invention as follows. The wafers are placed in SRD module 200 and grabbed with wafer chuck 220. The wafer is then spun, and rinsed with DI water flowing from rinse arm 240. In certain embodiments, the rinse arm 240 may move from the wafer center to the edge of the wafer and back again. After rinsing, the wafer is then dried by spinning at a higher speed. In certain embodiments, such spin rinse dry processes may be performed in accordance with the parameters discussed above.
Referring now to FIG. 4, shown is a top view of an [0024] electroplating tool 300 in accordance with one embodiment of the present invention. Although shown with certain modules covered, FIG. 4 provides an indication of wafer flow through electroplating tool 300, namely from entry port 305 to exit port 340. As shown in FIG. 4, electroplating tool 300 includes preclean module 308 which, in this embodiment may be implemented with two of the SRD modules 200 discussed above. Electroplating tool 300 also includes a plurality of plating cells 310 which may be used to electroplate a metal onto desired portions of the wafers. Also included in electroplating tool 300 is a plurality of SRD modules 320, which may be used to spin rinse and dry the wafers after the electroplating process is performed. The electroplating tool 300 also includes one or more transport mechanisms which may be used to transport the wafers between the various modules of the tool 300. As shown in FIG. 4, such transport mechanisms may include robotic member 315 adapted to transfer wafers 325 between preclean module 308, plating cells 310, and SRD modules 320. Additional transport mechanisms, such as front opening universal pods 335 (FOUPs) may be adapted to transfer wafers 325 to the exit port 340 after processing in SRD modules 320.
In the embodiment shown in FIG. 4, because [0025] preclean module 308 is in situ, the wafers may proceed directly to electroplating module 310 from preclean module 308. Thus this embodiment cleans/prepares the wafer surface in-situ, just prior to the electroplating process. Such processing may save money and increase wafer throughout though the tool to enable high volume manufacturing. In certain embodiments, tool throughput may increase significantly. For example, use of preclean module 308 in certain embodiments may increase tool throughput to above approximately 50 wafers per hour. That is, in certain embodiments, a wafer may be subjected to a SRD process and then electroplated within a short time period, often between about one to ten minutes.
After electroplating, the wafers may be provided to [0026] SRD modules 320 for a final spin, rinse, and dry prior to leaving electroplating tool 300. In the embodiment shown in FIG. 4, SRD modules 320 cannot be used to preclean the wafers prior to plating, as tool 300 requires a process flow from entry port 305 to exit port 340. Thus in one embodiment, provision of preclean module 308 may be used to significantly increase wafer throughput through electroplating tool 300, and reduce or prevent common wafer defects such as comet defects.
While the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of this present invention. [0027]

Claims

What is claimed is:

1. A method comprising:

rinsing a wafer with an aqueous solution;

drying the wafer; and

electroplating a metal onto at least a portion of the wafer after rinsing the wafer and drying the wafer.

2. The method of claim 1, wherein electroplating the metal comprises electroplating copper.

3. The method of claim 1, further comprising depositing a metal seed layer onto the portion of the wafer prior to rinsing the wafer.

4. The method of claim 1, wherein rinsing the wafer comprises applying deionized water to the wafer.

5. The method of claim 2, further comprising using the copper for interconnections.

6. The method of claim 1, further comprising preventing comet defects on the wafer by rinsing the wafer and drying the wafer.

7. The method of claim 2, further comprising electroplating the metal within 48 hours after rinsing the wafer and drying the wafer.

8. The method of claim 1, further comprising spinning the wafer while rinsing the wafer and drying the wafer.

9. A method comprising:

placing a wafer in a spin rinse dry module integrated within a tool;

rinsing the wafer with an aqueous solution;

drying the wafer; and

10. The method of claim 9, further comprising transporting the wafer to an electroplating module integrated within the tool to electroplate the metal.

11. The method of claim 9, further comprising depositing a metal seed layer onto the portion of the wafer prior to rinsing the wafer.

12. The method of claim 9, wherein rinsing the wafer comprises applying deionized water to the wafer.

13. The method of claim 12, further comprising providing the deionized water from a center of the wafer to an edge of the wafer.

14. The method of claim 9, further comprising spinning the wafer while rinsing the wafer and drying the wafer.

15. The method of claim 10, further comprising electroplating the metal within ten minutes after rinsing the wafer and drying the wafer.

16. An apparatus comprising:

a semiconductor tool having at least a first module and a second module integrated therein;

the first module comprising a spin rinse dry module to spin, rinse, and dry a wafer;

the second module comprising an electroplating module to electroplate a metal onto at least a portion of the wafer; and

a transport mechanism to deliver the wafer to the electroplating module from the spin rinse dry module.

17. The apparatus of claim 16, wherein the electroplating module comprises a copper electroplating module.

18. The apparatus of claim 16, wherein the first module comprises an introduction mechanism to provide an aqueous solution to the wafer.

19. The apparatus of claim 16, wherein the first module is stationed adjacent an entry port of the semiconductor tool.