US20020067140A1

US20020067140A1 - Push-pull based voltage-clamping electronic ballast

Info

Publication number: US20020067140A1
Application number: US09/730,619
Authority: US
Inventors: Jinrong Qian; DaFeng Weng
Original assignee: Individual
Current assignee: Koninklijke Philips NV
Priority date: 2000-12-06
Filing date: 2000-12-06
Publication date: 2002-06-06
Anticipated expiration: 2020-12-06
Also published as: US6417629B1

Abstract

An electronic ballast that includes a DC power source and a transformer comprising first, second and third windings. The first, second and third windings being inductively coupled, and the third winding is connected in parallel with a load. The ballast also includes first and second circuit pathways connected in parallel. The first circuit pathway comprises a first switch connected in series with the first winding, and the second circuit pathway comprises the second winding connected in series with a second switch. The DC power source is connected in parallel with the first and second circuit paths to provide an input voltage source. A capacitor connects the point between the first switch and first winding of the first circuit pathway with the point between the second switch and the second winding of the second circuit pathway.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to electronic ballasts, and more particularly to electronic ballasts that clamp a voltage across a switch and recycle leakage energy of a transformer such that a power converter has high power conversion efficiency with no voltage spike in the switch.

2. Description of the Related Art

Traditional ballasts for use in fluorescent lamps consisted of large and heavy magnetic coils. These have been replaced by electronic ballasts that are compact and light. A common device used as an electronic ballast is a self-oscillating, push-pull converter. One well-known push-pull converter is shown in FIG. 1. As shown in FIG. 1, the converter consists of a DC power source V _in, switches S₁and S₂, and transformer T. The switches S₁and S₂are each a standard metal-oxide semiconductor, field-effect transistor (MOSFET). D_s1and C_s1represent body diode and internal capacitance, respectively, of switch S_1,and D_s2and C_s2represent body diode and internal capacitance, respectively, of switch S₂. Transformer T contains three windings, N1, N2 and N3, and is designed such that a current present in either winding N1 or N2 produces a current in winding N3 to drive the load Ro, typically a fluorescent lamp. Inductor L_rand capacitor C_rform a standard resonant tank to provide high frequency voltage to the load Ro. Three current paths flowing in the circuit are represented as having currents i_s1, i_s2and i_Lr. Voltage V₀is shown across load Ro.

FIG. 2 is a graph of the waveforms associated with the conventional push-pull electronic ballast circuit of FIG. 1. As shown in FIG. 2 and also found in other like electronic ballasts is a phenomenon of overvoltage or high voltage spikes that occur across the switches when the device is switched off. For example, at t ₀when S₁is switched off a spike is shown in FIG. 2 to occur in the voltage across S₁, i.e. V_ds1. The principle reason for the voltage spike is that the opening of switch S₁creates an abrupt interruption (discontinuity) in the current through N₁. There is an release of stored energy due to a leakage inductance associated with winding N₁(represented as L_k1in FIG. 1), thereby inducing a current that charges C_S1and consequently creating a high voltage spike across switch S₁.

The same voltage spike characteristic occurs in the voltage across S ₂, i.e. V_ds2, at time t₂when S₂is switched off The voltage spike is caused by transient or leakage inductance L_k2associated with transformer winding N₂. The circuit of FIG. 1 provides no avenue for the released energy of the winding to flow other than the internal capacitance of the adjacent switch, which results in the voltage spike. In the prior art the leakage inductances are always present to some extent and there is always a danger of inducing these high voltage transients when switching off. The faster the switching the greater the voltage spikes. An excessive voltage spike will result in permanent damage to the switching device such as a burn through of the semiconductor layers.

One method of reducing the voltage spikes is to include a “snubber” circuit comprised of an additional diode, capacitor and resistor, connected in parallel with the switch (such as S 1 and S2). While the snubber circuit can limit the peak voltage of the spike, it slows down the effective switching speed of the circuit, and in doing so it absorbs energy that is dissipated as heat, thus reducing the overall power conversion efficiency of the ballast.

Another method of reducing the voltage spikes is to “clamp” the voltage across the switch (such as S 1 and S2). This is accomplished by two conventional methods. A first method connects a zener diode across the switch. As the voltage spike occurs the Zener diode turns on allowing the current to flow through, thus reducing or eliminating the voltage spike across the switch. A second method connects a diode in series with a with a parallel capacitor and resistor network across the switch. The capacitor charges to a constant voltage through a current flow, thus absorbing the voltage spikes. The resistor dissipates the stray inductances while maintaining the voltage across the capacitor. As with any clamping circuit, stray circuit inductances exist, and voltage spikes will be produced. Also, a diode by its nature does not provide an instantaneous clamping action.

SUMMARY OF THE INVENTION

It is therefore an aspect of the present invention to provide an electronic ballast that clamps the voltage across the main switch and eliminates voltage spikes due to the leakage inductance of the transformer.

It is another aspect of the present invention to provide an electronic ballast that recycles the leakage energy of the transformer to improve the power consumption efficiency of the circuit.

These and other aspects of the present invention are achieved by providing an electronic ballast that incorporates a clamping capacitor therein in such a manner that the overall circuit eliminates voltage spikes across the switches and recycles the transient leakage inductances of the transformer.

Thus, the invention comprises an electronic ballast that includes a DC power source and a transformer comprising first, second and third windings. The first, second and third windings being inductively coupled, and the third winding is connected in parallel with a load. The ballast also includes first and second circuit pathways connected in parallel. The first circuit pathway comprises a first switch connected in series with the first winding, and the second circuit pathway comprises the second winding connected in series with a second switch. The DC power source is connected in parallel with the first and second circuit paths to provide an input voltage source. A capacitor connects the point between the first switch and first winding of the first circuit pathway with the point between the second switch and the second winding of the second circuit pathway.

The first and second switches may be transistors, for example, metal-oxide semiconductor field-effect transistors. The first switch and the second switch are electrically connected to a digital controller or some other switching source that provides switching signals to the first and second switches. The first and second switches are switched off and on in a repeating cycle, the first switch switched on while the second switch is switched off and the first switch switched off while the second switch is switched on. When the first switch is switched off, a current in the first winding provides a charging of the capacitor. Likewise, when the second switch is switched off, a current in the second winding provides a charging of the capacitor. The voltage across the first and second switches is substantially constant over the interval that the respective switch is turned off.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings in which: [0014]
FIG. 1 is a circuit diagram of a conventional push-pull electronic ballast; [0015]
FIG. 2 is a graph of typical switching waveforms of the circuit of FIG. 1; [0016]
FIG. 3 is a circuit diagram of a push-pull based voltage clamping electronic ballast according to an embodiment of the present invention; [0017]
FIG. 4 is a graph of switching waveforms of the circuit of FIG. 3; [0018]
FIG. 5 is a circuit diagram representing the circuit of FIG. 3 when switch S[0019] ₁is on; and
FIG. 6 is a circuit diagram representing the circuit of FIG. 3 when switch S[0020] ₂is on.

DETAILED DESCRIPTION OF INVENTION

Preferred embodiments of the present invention will be described herein below with reference to the accompanying drawings. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. [0021]
FIG. 3 is a circuit diagram of a preferred embodiment of the present invention. A DC power source V[0022] _insupplies DC power to the circuit. L_k1and L_k2represent the leakage inductances of windings N₁, N₂of transformer T. D_s1represents body diode of switch S₁. D_s2represents body diode of switch S₂. C_Sis a clamping capacitor that, as described farther below, acts to absorb and recycle leakage energy of transformer T. Transformer T has three coupled windings, primary windings N₁and N₂and secondary winding N₃. In the preferred embodiment, the number of windings of N₁is equal to the number of windings of N₂. The normal current paths through switches S₁and S₂and windings N₁and N₂are represented by i_s1, i_s2, i_n1and i_n2x, respectively, having the sign conventions as shown. The voltages across switches S₁and S₂and capacitor C_sare represented by V_s1, V_s2and V_C, respectively, having the sign conventions as shown. Inductor L_rand capacitor C_rform a resonant tank and resonant tank current i_Lrinduced in N₃, provides a high frequency voltage V₀across the load R₀, i.e. a fluorescent lamp. The operation of FIG. 3 will be described with reference to FIG. 4.
FIG. 4 is a graph of the various waveforms associated with the switching of the circuit of FIG. 3 during a steady state switching. Waveforms i and ii give the relative switching cycles of S[0023] ₁and S₂, respectively. Just prior to t₀, switch S₂is conducting and carries its maximum current (see waveform vi) at t₀, which is equal to i_n2-i_n1. Since switch S₂has been on for the duration of a switching cycle at t₀, the current i_n2through N₂due to V_inhas increased to a maximum (see waveform viii), while capacitor C_Sis discharging a voltage (described further below), thus creating a negative current i_n1(see waveform vii). By the sign convention of i_n1shown in FIG. 3, both of these currents add to i_s2.
During the time period t[0024] ₀to t₂, switch S₁is conducting or on and switch S₂is off During t₂to t₄switch S₂is on and switch S₁is off (see waveforms i and ii of FIG. 4). It is noted that a switch is also considered “on” where the associated body diode is conducting. Thus, for example, waveform v at t₀shows that i_s1has a negative value even though waveform i shows that switch S₁remains off for a brief period after t₀. The negative current flow in this interval is through D_s1.
FIG. 5 is the equivalent circuit of FIG. 3 during time period t[0025] ₀to t₂, when S₁is on and S₂is off. (For ease of description, the leakage inductances L_k1, L_k2associated with windings N₁and N₂are omitted from the description of the basic operation of FIG. 5 (and FIG. 6 below); the impact of the leakage inductance at switch off will be considered in further detail below.) As shown in FIG. 5, the input source voltage V_inis applied to winding N₁. Since winding N₁is coupled to winding N₂the increasing current i_n1created by V_ininduces a voltage and a resulting current i_n2in N₂. Since the number of windings of N₁and N₂are equal (have a turns ratio of 1:1), the induced voltage across N₂is equal to (N₂/N₁)*V_in, and thus is equal to V_in. By the dot convention of N₁and N₂, the voltage drop is across N₂in the upward direction in FIG. 5 (i.e., in the direction of point Z to X). Because point X in the circuit has a voltage level V_in, the voltage at point Z must be 2V_in. Because the voltage at point Y also has voltage level V_in, the voltage drop from Z to Y is equal to V_in. Thus, capacitor voltage V_cs=V_in.
Because of the coupling between N[0026] ₂and N₁, current i_n2is equivalent to −i_n1, with a slight DC bias voltage offset due to energy absorbed from V_inas shown in waveforms vii and viii of FIG. 4. The current i_cs, of capacitor C_Smust equal the current i_n2flowing through N₂, as shown in waveforms viii and ix. Thus, from time t₀to t₁the current i_csacts to charge capacitor C_s, whereas from time t₁to t₂the current i_csacts to discharge C_s.
As noted, the voltage at point Z of the circuit of FIG. 5 is equal to [0027] 2V_in. This is also the voltage drop across the open switch S₂in the time interval t₀to t₂, as shown in waveform iv of FIG. 5. Focusing again on t₀of FIG. 4, it is seen from waveforms ii and iv that switch S₂does not have the voltage spike when switched from on to off, as in the prior art devices. Instead, waveform iv shows that the voltage across S₂rises directly to a value of 2V_inand is maintained at that level for the duration t₀to t₂. When S₂is turned off at t₀, the current i_n2flowing in N₂is immediately shunted to the circuit loop that includes capacitor C_s, thus immediately charging C_swith the current i_n2. Thus, any current contributed to i_n2by a release of magnetic energy stored in leakage inductor L_k2associated with N₂at t₀acts to charge C_sfrom t₀to t₁. Thus, there is no mechanism in the circuit that creates a voltage spike across S₂.
It is again observed that the discharge of capacitor C[0028] _sfrom t₁to t₂creates a negative current in _cs(which is equivalent to i_n2) as shown in FIG. 5 by the sign convention. The current thus flows counter-clockwise around the loop including C_s, N₂and S₁, thus contributing (along with the current i_n1through N₁created by V_in) to the relatively large positive current i_s1through switch S₁from t₁to t₂.
By symmetry, analogous description applies during the portion of the switching cycle when S[0029] ₁is off and S₂is on during t₂to t₄, as shown in FIG. 6. In short, supply voltage V_inis applied across N₂(including associated leakage inductor L_k2). Thus, current i_n2, which now flows through closed switch S₂, begins to build from a negative value at t₂to a positive value at t₄. By the coupling of N₂and N₁, voltage V_inis induced across N₁in the upward direction (by the dot convention). This implies that the voltage at point Z′ is −V_in, V_C=V_inand V_s1=V_in−(−V_in)=2V_in, as shown in waveform iii of FIG. 4.
Input voltage V[0030] _inapplied to N₂acts to reverse current i_n2, as shown in waveform viii of FIG. 4. A closed circuit is also formed by the loop including C_S, N₁and S₂; thus i_n1and i_csare equal from t₂to t₄, as shown in waveforms vii and ix of FIG. 4. Currents i_n1and i_csare positive from t₂to t₃, thus charging capacitor C_Sas the current in N₁is reduced. As described above, this shunting of the current to C_savoids a voltage spike across S₁at t₂. (See waveform iii at t₂). The combination of current i_n1(or equivalently, i_cs) and current i_n2through switch S₂from t₂to t₄results in a relatively large current through S₂at the end of the cycle t₄. (See waveforms vii, ix and vi at t₂to t₄.)
Subsequent switching cycles are analogously described. Thus, the inventive circuit avoids the voltage spikes across the switches when a switching off occurs. [0031]
The winding currents i[0032] _n1and i_n2through N₁and N₂are always continuous sinusoidal waves as long as the switching frequency is chosen close to the resonant frequency, which is determined by the values of resonant inductor L_rand resonant capacitor C_r. In any operation mode, the winding currents are always continuous and the switch voltages are always clamped up to two times the input voltage. Actually, the leakage inductances of transformer T can be used as part of the resonant inductance. In any operation mode, there are two sub circuits operating in parallel. There is no source within the circuit that generates the high voltage spike since the current flowing through windings N₁and N₂is always continuous. The leakage energy is thus recycled.
Given again that the number of windings of N[0033] ₁equals those of N₂, the maximum voltage across switches S₁and S₂is equal to twice the input voltage V_in. Compared with the conventional push-pull resonant inverter, in the present invention the windings N₁and N₂carry continuous current and work together at all times to produce the resonant tank current i_Lr, and the voltages across the switches S₁and S₂are always equal to twice the input voltage V_in. As a result, the present invention has a high efficiency and low voltage stress. And due to the fact that the present invention recycles the leakage inductances, there is no requirement for the leakage inductances of the transformer to be taken into effect during design.
It will be understood that the invention is not limited to a particular type of switching device, and that other switching devices such as bipolar-junction transistors (BJTs) or junction field-effect transistors (JFETs) can be used. [0034]
While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. [0035]

Claims

What is claimed is:

1. An electronic ballast, comprising:

a DC power source;

a transformer comprising first, second and third windings, said first, second and third windings being inductively coupled, the third winding being connected in parallel with a load;

first and second circuit pathways connected in parallel, the first circuit pathway comprising a first switch connected in series with the first winding, and the second circuit pathway comprising the second winding connected in series with a second switch, the DC power source also connected in parallel with the first and second circuit paths to provide an input voltage source;

a capacitor connecting the point between the first switch and first winding of the first circuit pathway with the point between the second switch and the second winding of the second circuit pathway.

2. The electronic ballast of claim 1, further comprising:

a first diode connected in parallel with said first switch; and

a second diode connected in parallel with said second switch.

3. The electronic ballast of claim 1, wherein said load is a resonant circuit comprising a fluorescent lamp.

4. The electronic ballast of claim 3, wherein said resonant circuit is comprised of an inductor in series with a capacitor and a fluorescent lamp, said capacitor and said fluorescent lamp being in parallel with each other.

5. The electronic ballast of claim 1, wherein said first and second switches are transistors.

6. The electronic ballast of claim 5, wherein said transistors is a metal-oxide semiconductor field-effect transistors.

7. The electronic ballast of claim 1, wherein the first switch and the second switch are electrically connected to a controller, the controller providing switching signals to the first and second switches.

8. The electronic ballast of claim 7, wherein the switching signals provided by the controller switches the first and second switches off and on in a repeating cycle, the first switch switched on while the second switch is switched off and the first switch switched off while the second switch is switched on.

9. The electronic ballast of claim 8, wherein the voltage across the first and second switches is substantially constant.

10. The electronic ballast of claim 9, wherein a current in the first winding provides a charging of the capacitor when the first switch is switched off and a current in the second winding provides a charging of the capacitor over the interval that the respective switch is turned off