US20010054599A1 - Etching method - Google Patents

Etching method Download PDF

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Publication number
US20010054599A1
US20010054599A1 US09/861,763 US86176301A US2001054599A1 US 20010054599 A1 US20010054599 A1 US 20010054599A1 US 86176301 A US86176301 A US 86176301A US 2001054599 A1 US2001054599 A1 US 2001054599A1
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US
United States
Prior art keywords
etching
polyimide
mask
plasma
temperatures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/861,763
Inventor
Manfred Engelhardt
Volker Weinrich
Carlos Mazure-Espejo
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Individual
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Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of US20010054599A1 publication Critical patent/US20010054599A1/en
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Definitions

  • the invention lies in the materials processing field and relates, more specifically, to a method for plasma-structuring by etching, particularly for the plasma-structuring of materials at high temperatures.
  • Platinum which is utilized as the electrode material in ferroelectric storage capacitors for producing non-volatile data memories (Fe-RAM), belongs to the class of materials which are advantageously structured at high temperatures.
  • the object of the present invention is to provide an etching process which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this general kind, and which provides for a mask that allows chemical plasma etching at high temperatures.
  • an improved plasma-etching process at temperatures above 100° C is provided.
  • the novel method provides for the application of a polyimide mask prior to the etching of the structure.
  • the subject matter of the invention is a method for plasma-etching at temperatures above b 100 ° C. wherein a polyimide mask is applied prior to the etching of the structure.
  • the polyimide mask on the electrode makes it possible to etch at temperatures of up to 500° C. at that location. Consequently, chemical etching of the electrodes is possible, because volatile noble metal compounds, which do not arise at lower temperatures, can form with the etching gasses.
  • a chemical etching of noble metal electrodes is superior to physical etching with respect to selectivity, etch rate, edge angle, avoidance of topographies, and so on.
  • the polyimide mask can be easily removed after structuring by incineration.
  • the polyimide mask is made of a polyimide containing fluorine.
  • the polyimide is formed on the wafer by cross-linking.
  • a method for the plasma-etching of metals which comprises applying a polyimide mask to a metal layer, and chemically etching the metal layer, aided by the mask, with a plasma etching process at an elevated temperature.
  • the metal layer consists of a noble metal.
  • the etching process is carried out at temperatures between 150° C. and 600° C., and preferably between 200° C. and 550° C.
  • a specifically advantageous temperature range is between 300° C. and 500° C.
  • the invention makes it possible for the first time to carry out a chemical etching at elevated temperatures.
  • the application is made possible by the prior deposition of a polyimide mask.

Abstract

The method deals with plasma-structuring by etching, in particular with the plasma-structuring of materials at high temperatures. The application of a chemical etching process at high temperatures is made possible by the prior deposition of a polyimide mask.

Description

    BACKGROUND OF THE INVENTION FIELD OF THE INVENTION
  • The invention lies in the materials processing field and relates, more specifically, to a method for plasma-structuring by etching, particularly for the plasma-structuring of materials at high temperatures. [0001]
  • Platinum, which is utilized as the electrode material in ferroelectric storage capacitors for producing non-volatile data memories (Fe-RAM), belongs to the class of materials which are advantageously structured at high temperatures. [0002]
  • Methods are also known for plasma-structuring using physical etching processes at relatively low temperatures (less than or equal to 100° C.), whereby the electrode (v) is primarily etched and structured by physical sputter erosion. When pure noble gases are used, a subsequent cleaning step is required owing to the formation of redepositions on the sidewall of the mask, which raises the cost of the process. When primarily reactive gases are used, intermediate redepositions also form but are removed in the course of the etching process. Since these redepositions are very voluminous, they lead to a large expansion in the etch dimensions. In addition, the physical sputter erosion and the use of reactive gases are responsible for intensive faceting of the mask and a low mask selectivity. [0003]
  • The use of a hard oxide mask for etching at high or elevated temperatures has also been considered. However, owing to the identical substrate material (typically oxide), topographies form when the mask is removed subsequent to etching. It is also known to utilize a metallic mask for etching at elevated temperatures. However, the disadvantage of this is that at elevated temperatures the metal diffuses from the mask into the electrode, impairing its high conductivity. [0004]
  • When photosensitive masks are used, the etching process is confined to low temperatures (see Nishikawa et al., [0005] Platinum Etching and Plasma Characteristics in RF Magnetron and Electron Cyclotron Resonance Plasmas, Jpn. J. Appl. Phys., Vol. 32 (1993): 6102-08). On the other hand, a plasma-etching method for etching titanates is taught in U.S. Pat. No. 5,653,851.
    • SUMMARY OF THE INVENTION
  • The object of the present invention is to provide an etching process which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this general kind, and which provides for a mask that allows chemical plasma etching at high temperatures. [0006]
  • With the above and other objects in view there is provided, in accordance with the invention, an improved plasma-etching process at temperatures above 100° C. The novel method provides for the application of a polyimide mask prior to the etching of the structure. [0007]
  • The subject matter of the invention is a method for plasma-etching at temperatures above b [0008] 100° C. wherein a polyimide mask is applied prior to the etching of the structure.
  • The polyimide mask on the electrode makes it possible to etch at temperatures of up to 500° C. at that location. Consequently, chemical etching of the electrodes is possible, because volatile noble metal compounds, which do not arise at lower temperatures, can form with the etching gasses. A chemical etching of noble metal electrodes is superior to physical etching with respect to selectivity, etch rate, edge angle, avoidance of topographies, and so on. [0009]
  • Polyimides have been used hitherto as “low-∈ dielectric” (Japanese patent application JP 05-072736 A), as the material for deposit formation in galvanic deposition processes (A. B. Frazier, “Development of Micromachined Devices Using Polyimide-Based Processes”, Sensors and Actuators A 45 (1994): 47-55) and as a shadow mask (European patent application EP 0 230 615). [0010]
  • The polyimide mask can be easily removed after structuring by incineration.[0011]
  • In accordance with an added feature of the invention, the polyimide mask is made of a polyimide containing fluorine. [0012]
  • In accordance with another feature of the invention, the polyimide is formed on the wafer by cross-linking. [0013]
  • There is also provide, in an advantageous mode of the invention, a method for the plasma-etching of metals, which comprises applying a polyimide mask to a metal layer, and chemically etching the metal layer, aided by the mask, with a plasma etching process at an elevated temperature. [0014]
  • Preferably, the metal layer consists of a noble metal. [0015]
  • In accordance with an additional feature of the invention, the etching process is carried out at temperatures between 150° C. and 600° C., and preferably between 200° C. and 550° C. A specifically advantageous temperature range is between 300° C. and 500° C. [0016]
  • The invention makes it possible for the first time to carry out a chemical etching at elevated temperatures. The application is made possible by the prior deposition of a polyimide mask. [0017]

Claims (7)

We claim:
1. An improved plasma-etching process at temperatures above 100° C., which comprises applying a polyimide mask prior to etching a structure.
2. The method according to
claim 1
, wherein the polyimide contains fluorine.
3. The method according to
claim 1
, which comprises forming the polyimide on a wafer by cross-linking.
4. A method for the plasma-etching of metals, which comprises applying a polyimide mask to a metal layer, and chemically etching the metal layer, aided by the mask, with a plasma etching process at temperatures between 300° C. and 500° C.
5. The method according to
claim 4
, wherein the metal layer consists of a noble metal.
6. The method according to
claim 4
, wherein the polyimide contains fluorine.
7. The method according to
claim 4
, which comprises forming the polyimide on a wafer by cross-linking.
US09/861,763 2000-05-19 2001-05-21 Etching method Abandoned US20010054599A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10025550.7 2000-05-19
DE10025550A DE10025550A1 (en) 2000-05-19 2000-05-19 Plasma etching process used in the production of Fe-RAMs comprises applying a polyimide mask before the structure is etched

Publications (1)

Publication Number Publication Date
US20010054599A1 true US20010054599A1 (en) 2001-12-27

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Family Applications (1)

Application Number Title Priority Date Filing Date
US09/861,763 Abandoned US20010054599A1 (en) 2000-05-19 2001-05-21 Etching method

Country Status (2)

Country Link
US (1) US20010054599A1 (en)
DE (1) DE10025550A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130237963A1 (en) * 2012-03-12 2013-09-12 Medtronic Vascular, Inc. Guidewire with integral radiopque markers
US20210175092A1 (en) * 2016-06-01 2021-06-10 Asm Ip Holding B.V. Deposition of organic films
US11654454B2 (en) 2015-10-09 2023-05-23 Asm Ip Holding B.V. Vapor phase deposition of organic films

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4692205A (en) * 1986-01-31 1987-09-08 International Business Machines Corporation Silicon-containing polyimides as oxygen etch stop and dual dielectric coatings
JPH0572736A (en) * 1991-09-18 1993-03-26 Hitachi Chem Co Ltd Production of fluorine-contained polyimide resin film pattern

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130237963A1 (en) * 2012-03-12 2013-09-12 Medtronic Vascular, Inc. Guidewire with integral radiopque markers
US9358370B2 (en) * 2012-03-12 2016-06-07 Medtronic Vascular, Inc. Guidewire with integral radiopaque markers
US10722689B2 (en) 2012-03-12 2020-07-28 Medtronic Vascular, Inc. Guidewire with integral radiopaque markers
US11654454B2 (en) 2015-10-09 2023-05-23 Asm Ip Holding B.V. Vapor phase deposition of organic films
US20210175092A1 (en) * 2016-06-01 2021-06-10 Asm Ip Holding B.V. Deposition of organic films
US11728175B2 (en) * 2016-06-01 2023-08-15 Asm Ip Holding B.V. Deposition of organic films

Also Published As

Publication number Publication date
DE10025550A1 (en) 2001-11-29

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