US20010036754A1 - Film forming method and manufacturing method of semiconductor device - Google Patents

Film forming method and manufacturing method of semiconductor device Download PDF

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US20010036754A1
US20010036754A1 US09/804,142 US80414201A US2001036754A1 US 20010036754 A1 US20010036754 A1 US 20010036754A1 US 80414201 A US80414201 A US 80414201A US 2001036754 A1 US2001036754 A1 US 2001036754A1
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film
phosphorus
forming method
silicon
forming
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Kazuo Maeda
Noboru Tokumasu
Yuki Ishii
Toshiro Nishiyama
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Semiconductor Process Laboratory Co Ltd
Canon Marketing Japan Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31625—Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819—Smoothing of the dielectric

Definitions

  • the present invention relates to a method for forming a flattened interlayer insulating film to cover the wiring layer or the like of a semiconductor integrated circuit device, and a method for manufacturing a semiconductor device.
  • a semiconductor integrated circuit device hereinafter, referred to as a semiconductor IC device
  • a progress has been made to achieve a much higher density, and an increasing number of the structures having a multilayer wiring extended over several layers has been used.
  • a strong request has been made to develop a method for forming a flattened interlayer insulating film, which can be formed at a low temperature equal to 500° C. or lower.
  • Conventionally available flattening methods include: one like that shown in FIG. 1, which performs flattening by forming a film by a thermal chemical vapor deposition method (hereinafter, referred to as a TH-CVD method), a plasma enhanced chemical vapor deposition method (hereinafter, referred to as a PE-CVD method) or the like, heating the formed film, and then fluidizing the film; and one like an etch back method shown in FIG. 2 or a chemical mechanical polishing method (hereinafter, referred to as a CMP method) shown in FIG. 3, which performs flattening by removing unevenness on the surface of the insulating film by etching or polishing.
  • a thermal chemical vapor deposition method hereinafter, referred to as a TH-CVD method
  • PE-CVD method plasma enhanced chemical vapor deposition method
  • CMP method chemical mechanical polishing method
  • a boro-phospho silicate glass film (hereinafter, referred to as a BPSG film) 4 is formed by a TH-CVD method, which uses any one of the following deposition gases:
  • TEOS+TMOP+TMB or TEB+O 2 or O 3 TEOS: tetraethylorthosilicate (Si(OC 2 H 5 ) 4 ), TMOP: trimethylphosphate (PO(OCH 3 ) 3 )).
  • a BPSG film 4 is formed by a PE-CVD method, which uses any one of the following deposition gases:
  • the formed BPSG film 4 is heated at a temperature of about 850° C., and fluidized to be flattened.
  • a film is formed by a TH-CVD method, a PE-CVD method or the like, which uses deposition gas generated by eliminating boron containing gas (B 2 H 6 , TMB or TEB) from the foregoing gas, then heated at a temperature equal to 1000° C. or lower, and fluidized to be flattened.
  • a non-doped silicate glass (hereinafter, referred to as an NSG film) 5 is formed by a TH-CVD method, a PE-CVD method or the like, which uses one of the following deposition gases, and then flattened:
  • a resist film 6 is formed on the NSG film 5 by coating method, and its surface is flattened. Then, as shown in FIG. 2C, the film 6 is subjected to etching from above to form a flattened NSG film 5 a .
  • the CMP method as shown in FIG. 3B, the NSG film 5 is formed, and then polished to flatten the surface of an NSG film 5 b.
  • a reference numeral 1 denotes a semiconductor substrate; 2 a base insulating film; and 3 a and 3 b wiring layers formed on the base insulating film 2 .
  • the above-described flattening methods based on the etch back method or the CMP method are effective especially when a low temperature is required, because these methods can be executed without heating unlike the case of the flattening method based on fluidizing by heating.
  • the voids are left unchanged even after flattening.
  • insulating films having good gap-filling capabilities include a high-density PE-CVD method, a PE-CVD method, an atmospheric pressure TH-CVD method, an spin-on-glass (hereinafter, referred to as SOG) coating method, and the like.
  • SOG spin-on-glass
  • a GeBPSG film formed by adding GeO 2 to the BPSG film has been developed.
  • the temperature can be lowered to about 750° C. at least.
  • a fluidization temperature should preferably be set as low as possible not only when aluminum, copper or the like is used for wiring in a semiconductor large scale integrated circuit (hereinafter, referred to as LSI) or the like, but also to prevent the re-distribution of impurities in an impurity introduction region generally caused by heat.
  • LSI semiconductor large scale integrated circuit
  • An object of the present invention is to provide a method for forming an insulating film, capable of greatly reducing a fluidization temperature for flattening a surface, and a manufacturing method of a semiconductor device.
  • the BPSG film or the phospho-silicate glass film (hereinafter, referred to as PSG film) of the conventional example is a mixture of SiO 2 +P 2 O 5 +B 2 O 3 , or of SiO 2 +P 2 O 5 (PH 3 of deposition gas SiH 4 +PH 3 +B 2 H 6 +O 2 is III valance phosphorus, and bonded with externally supplied oxygen to generate not P 2 O 3 but P 2 O 5 .
  • PH 3 of deposition gas SiH 4 +PH 3 +B 2 H 6 +O 2 is III valance phosphorus
  • a eutectic point for the composition of 20 to 80 % of P 2 O 5 is 850° C. theoretically, and its fluidization temperature is dependent on the melting point of P 2 O 5 itself;
  • P 2 O 3 has a melting point much lower than that of P 2 O 5 as described on Table 1. TABLE 1 Melting point Boiling point P 2 O 3 (III valance) 23.8° C. 175.4° C. P 2 O 5 (V valance) 580 to 585° C. 300° C. (sublimation)
  • a fluidization temperature would be lowered by mainly containing P 2 O 3 , instead of P 2 O 5 , in the BPSG film or the PSG film.
  • the inventors came up with the idea of oxidizing a phosphorus containing compound in a state of oxygen shortage to form a BPSG or PSG film having a high-concentration of P 2 O 3 .
  • the followings may be possible. That is, (1) a silicon and phosphorus-containing compound, containing phosphorus atom (P atom) in the form of III valance is used as deposition gas; and (2) by using a silicon containing compound or a silicon and phosphorus-containing compound containing oxygen, a film is formed without adding any oxygen or ozone.
  • silicon and phosphorus-containing compound containing III valance P atom
  • a PSG film or the like was formed by using deposition gas containing the silicon and phosphorus-containing compound, and by a TH-CVD method or a PE-CVD method, and examination was made as to components in the formed film by X-ray fluorescence analysis (XRF) or Fourier transform infrared spectroscopy (FTIR). Then, the presence of high-concentration P 2 O 3 in the formed film was verified. Then, a fluidization temperature of 700° C. or lower was obtained.
  • XRF X-ray fluorescence analysis
  • FTIR Fourier transform infrared spectroscopy
  • the inventors also found that it is possible to easily adjust a concentration of P 2 O 3 by controlling a deposition temperature and the gas flow rate of the silicon and phosphorus-containing compound (flow rate of inert gas carrier), or by controlling a concentration of oxidizing gas when the oxidizing gas is added.
  • N 2 nitrogen
  • inert gas e.g., argon or helium is used as carrier gas. Because of little reactivity of argon or helium itself, the amount of ammonia in the film can be reduced substantially to zero.
  • inert gas e.g., argon or helium
  • carrier gas e.g., argon or helium
  • the amount of carbon left in the formed film can be greatly reduced.
  • the adjustment of a phosphorus concentration can be made by controlling the ratio of flow rates between the silicon and phosphorus-containing compound and the foregoing inert gas in the deposition gas. Accordingly, though a silicon containing compound containing no phosphorus is added in the deposition gas in the conventional method in order to adjust a phosphorus concentration, the silicon containing compound containing no phosphorus can be eliminated from the deposition gas.
  • the silicon containing compound containing no phosphorus has Si—C bonding, causing carbon to be left during deposition.
  • the addition of such a compound should be prevented as much as possible.
  • the compound can be added as occasion demands.
  • the film that has been formed is subjected to nitrogen annealing and oxygen annealing, and then heated in atmosphere containing moisture. This process is called steam annealing. Since the steam annealing has an oxidizing force stronger than that for normal oxygen annealing, residual III valance phosphorus is oxidized, and the moisture absorption resistance of the formed film is enhanced, making it possible to improve film quality.
  • FIGS. 1A and 1B are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by fluidization due to heating, according to a conventional example.
  • FIGS. 2A to 2 C are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by etch back, according to a conventional example.
  • FIGS. 3A and 3B are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by CMP, according to a conventional example.
  • FIGS. 4A to 4 D are sectional views showing a method for forming a PSG film, which comprises a series of steps including a film-forming step, according to a first embodiment of the present invention.
  • FIG. 5 is a graph associated with the amount of ammonia in the PSG film formed by the film-forming method of the first embodiment of the present invention and showing substrate temperature dependence thereof.
  • FIG. 6 is a graph showing a relation between phosphorus concentration in the PSG film formed by the film-forming method of the first embodiment of the present invention, and a temperature of annealing after film formation.
  • FIG. 7 is a graph showing the amount of carbon in the PSG film formed by the film-forming method of the first embodiment of the present invention.
  • FIG. 8 is a flowchart showing the film-forming method of the embodiment of the present invention.
  • FIGS. 9A to 9 E are sectional views showing a method for forming a PSG film, which comprises a series of steps including a film-forming step, according to a second embodiment of the present invention.
  • a series of steps include, a film-forming step, an N 2 annealing step, an O 2 annealing step, and a steam annealing step.
  • deposition gas in the film-forming step gas generated by mixing a silicon and phosphorus-containing compound, inert gas and oxidizing gas was used. Silicon containing compounds containing no phosphorus should not be used.
  • a phosphorus containing compound For a phosphorus containing compound, one can be selected from silicon and phosphorus-containing compounds having Si—O—P structures, for which the structural formulas is shown below:
  • a silicon and phosphorus-containing compound having III valance phosphorus, and oxygen being bonded to at least one of the bonding hands of the phosphorus can be used.
  • SOP-11(b) was used.
  • inert gas to be added to the silicon and phosphorus-containing compound inert gas of argon (Ar) or helium (He) can be used.
  • argon (Ar) was used for the inert gas.
  • oxidizing gas it is not always necessary to contain oxidizing gas in the deposition gas.
  • ozone (O 3 ), oxygen (O 2 ), NO, N 2 O, NO 2 , CO, CO 2 , H 2 O, or the like can be used as oxidizing gas.
  • oxygen (O 2 ) is used as oxidizing gas.
  • a silicon containing compound containing no phosphorus may be added to the deposition gas.
  • R is an alkyl group, an aryl group or its derivative.
  • HMDSO hexamethyl disiloxane
  • TMDSO tetramethyl disiloxane
  • TEOS tetraethyl orthosilicate
  • trimethoxy silane (TMS: HSi(OCH 3 ) 3 ).
  • the steam annealing step one made by mixing oxygen and hydrogen in a predetermined ratio is reacted to generate water molecules, and heating is carried out in atmosphere containing the water molecules.
  • the substrate temperature was changed to 100, 200, and 300° C. Since SOP-11(b) is liquid at a normal temperature, it is contained in carrier gas by bubbling.
  • the inventors prepared two kinds of compounds, i.e., one using Ar carrier as carrier gas, and one using N 2 carrier as such. When inert gas (Ar) was used as carrier gas, the content of SOP-11(b) in deposition gas was adjusted by controlling the flow rate of carrier gas.
  • the heat treatment temperature was changed to 250, 500, and 750° C.
  • similar processing was carried out for a film formed by containing N 2 instead of Ar in the deposition gas.
  • a substrate 101 to be deposited shown in FIG. 4A is placed in the chamber of a PE-CVD apparatus. Then, substrate heating is carried out to hold a specified substrate temperature.
  • the foregoing deposition gas is introduced into the chamber, and plasma is generated and held for a predetermined time.
  • a PSG film 21 having a specified thickness containing high-concentration P 2 O 3 is formed.
  • the PSG film 21 may be fluidized at a temperature substantially equal to the substrate temperature during film formation. Accordingly, flattening is achieved simultaneously with the film formation.
  • FIG. 5 shows the dependence of the amount of ammonia in the formed film after film formation on a substrate temperature during film formation, in which an ordinate axis shows the amount of ammonia (wt. %) in the formed film, expressed in linear scale and an abscissa axis shows a substrate temperature (°C.), expressed in linear scale.
  • TDS thermal desorption spectroscopy
  • Detection was also carried out for a concentration of phosphorus in the formed film by means of X-ray fluorescence analysis (XRF).
  • XRF X-ray fluorescence analysis
  • FIG. 6 shows the dependence of a phosphorus concentration in the formed Film 21 a on the heat treatment temperature of N 2 annealing after film formation, in which an ordinate axis shows a P concentration (wt. %) in the PSG film, and an abscissa axis shows a heat treatment temperature (°C.), expressed in linear scale.
  • As depo denotes a concentration of phosphorus in the PSG film 21 immediately after film formation and before N 2 annealing.
  • a melting temperature or a fluidization temperature of the PSG film 21 a for each of the above case becomes lower as the concentration of P 2 O 3 or the ratio of P 2 O 3/ P 2 O 5 is higher.
  • a melting temperature or a fluidization temperature equal to 700° C. or lower was obtained.
  • FIG. 7 shows the result of examining the amount of Si—CH 3 bonding, i.e., a carbon content, in the formed film 21 b.
  • an ordinate axis of FIG. 7 shows an absorption intensity (arbitrary unit) by Fourier transform infrared spectroscopy (FTIR), while an abscissa axis shows the number of waves (cm ⁇ 1).
  • FTIR Fourier transform infrared spectroscopy
  • a content of Si—C H 3 bonding in the formed film 21 b varies between the case of using Ar as carrier gas and the case of using N 2 as the same.
  • a peak height of an absorption intensity is lower in the case of using Ar as carrier gas than that in the case of using N 2 as the same, and thus a content of Si—CH 3 bonding in the formed film 21 b is smaller.
  • inert gas e.g., argon or helium
  • carrier gas e.g., argon or helium
  • the amount of ammonia in the formed film can be set substantially to zero.
  • the quality of the formed film can be improved.
  • FIG. 8 is a flowchart showing a film-forming method according to the second embodiment of the invention.
  • a set of FIGS. 9A to 9 F is a sectional view of the film-forming method of the second embodiment of the present invention.
  • deposition gas mixed gas of SOP-11(b)+Ar was used. To set a sufficient state of oxygen shortage, no oxygen (O 2 ) was added different from the case of the first embodiment.
  • Plasma enhanced method by the parallel plate type electrode is a method for applying an RF power between upper and lower electrodes placed oppositely to each other, and then converting deposition gas between these electrodes into plasma.
  • the lower electrode serves also as a substrate holder and, as occasion demands, power for substrate biasing may be applied to the lower electrode.
  • a deposition condition is described below.
  • FIG. 9A is a sectional view of a substrate 101 to be deposited before film formation.
  • the substrate 101 is constructed in a manner that a base insulating film 12 , e.g., a silicon oxidized film, is formed on a silicon substrate (semiconductor substrate) 11 , and wiring layers 13 a and 13 b composed of, e.g., aluminum films, are formed on the base insulating film 12 .
  • a base insulating film 12 e.g., a silicon oxidized film
  • wiring layers 13 a and 13 b composed of, e.g., aluminum films
  • the substrate 101 is placed on the substrate holder in a deposition chamber. Subsequently, the substrate 101 is heated or controlled to a temperature of the range of 20 to 400° C.
  • mixed gas of SOP-11(b)+Ar is introduced into a plasma chamber, and gas pressure is maintained at 0.5 to 20 Torr.
  • Ar is used as carrier gas of SOP-11(b).
  • a flow rate of Ar carrier gas containing SOP-11(b) was set in the range of 0.1 to 2 SLM, and a flow rate of added Ar was set in the range of 0.1 to 1 SLM.
  • reaction occurs in the plasma of the deposition gas, and the deposition of a reactive product on the substrate 101 is started.
  • a PSG film 16 under film formation showed a flowability to flow into a recessed part between the wiring layers 13 a and 13 b even at the substrate temperature of about 200° C.
  • phosphorus may be contained in the PSG film 16 in the form of III valance P 2 O 3 . Because of no external supply of oxygen, the state of an oxygen shortage is maintained in a reaction system, and Si and P may be respectively contained in the PSG film 16 in the form of Si—O and P—O being bonded with oxygen atoms present in molecules.
  • the substrate 101 is conveyed in vacuum or atmosphere, and set in a heat treatment furnace held at a deposition temperature or lower.
  • N 2 is introduced into the heat treatment furnace at a flow rate of 10 SLM, and the substrate 101 is heated.
  • a temperature rising rate is set about 10° C./min., and after the substrate temperature reaches 650° C, this state is maintained for several minutes.
  • the processing comes to an end with the passage of about 15 minutes after the temperature rising.
  • N 2 annealing breaks the glass structure of a formed film 15 a , and re-flowing brings about void filling and formed film flattening.
  • a gas component contained in the formed film 15 a is eliminated therefrom during heating, and thus a PSG film 15 a having III valance phosphorus is formed.
  • III valance phosphorus has very high reactivity, and is prone to be oxidized.
  • the phosphorus can be converted into stable V valance phosphorus by exposing it to oxygen atmosphere at a high temperature. In this way, the PSG film 15 a containing the unstable III valance phosphorus becomes a PSG film 15 b containing stable V valance phosphorus.
  • P 2 O 3 is converted into P 2 O 5 to stabilize the PSG film 15 b .
  • the final composition of P 2 O 5 provides a passivation effect to the PSG film 15 b , and contributes to the stabilization of an interface characteristic. Noted that residual carbon in the formed film is simultaneously oxidized by the annealing.
  • an oxygen flow rate is adjusted to 6 SLM while the substrate temperature is maintained at 650° C.
  • hydrogen is newly added at a flow rate of 5 SLM, and then these are introduced through a burning heater into the chamber.
  • the burning heater is heated to 850° C. beforehand.
  • Mixed gas is ignited to cause reaction so as to generate water molecules, and as shown in FIG. 9E, heating is carried out in atmosphere containing moisture for about 15 minutes. Since an oxidizing force for the heating carried out in the moisture containing atmosphere, so-called steam annealing is stronger than that for normal oxygen annealing, film quality can be further improved by oxidizing residual III valance phosphorus, and increasing the moisture absorption resistance.
  • a fluidization temperature can be reduced to 700° C. or much lower. Accordingly, such a film can be used as an interlayer insulating film to cover aluminum wiring. Moreover, even when such a film is used as the base insulating film of a wiring layer in a semiconductor device having a narrower diffused layer with a higher densification of the semiconductor device, impurities in the diffused layer can be prevented from being re-distributed.
  • the necessity of a flattening processing technology such as a CMP method or the like can be eliminated, and the interlayer insulating film can be flattened by thermally fluidizing the formed film.
  • a recessed part between the wiring layers can be filled without any gaps.
  • N 2 is a diatomic molecule
  • inert gas e.g., argon or helium
  • argon or helium is used as carrier gas. Because of little reactivity of argon or helium itself, such interference compound can be prevented from forming.
  • the amount of carbon left in the formed film can be greatly reduced.
  • the adjustment of concentration of phosphorus can be made by controlling the ratio of flow rates between the silicon and phosphorus-containing compound and the inert gas in the deposition gas.
  • the addition of a compound containing silicon but no phosphorus, which is conventionally added to the deposition gas was made unnecessary in principle.
  • the compound containing silicon but no phosphorus has Si—C bonding, causing carbon to be left in the formed film.
  • such a compound should preferably be added as little as possible. However, addition thereof may be permitted as occasion demands.
  • steam annealing is carried out, which heats the formed film in atmosphere containing moisture after nitrogen annealing and oxygen annealing. Since the steam annealing has a stronger oxidizing force than that of normal oxygen annealing, film quality can be further improved.
  • a melting temperature or a fluidization temperature can be adjusted by controlling a concentration of P 2 O 3 or the ratio of P 2 O 3 /P 2 O 5 .
  • a melting temperature or a fluidization temperature can also be adjusted through the adjustment of a concentration of P 2 O 3 or the ratio of P 2 O 3 /P 2 O 5 .
  • the PE-CVD method is used.
  • a TH-CVD method for activating deposition gas by heat may be used.
  • deposition conditions described in Table 7 can be used.
  • TABLE 7 TH-CVD Method Deposition parameter Deposition condition Substrate temperature 200 to 400° C. Ozone concentration 0.3 to 2.5% Gas flow rate of SOP-11(b) 0.1 to 1.5 slm Gas flow rate of TMB or TEB 0.1 to 1.0 slm
  • ammonia may be generated when N 2 is contained in deposition gas.
  • the amount of ammonia in the formed film can be reduced substantially to zero.
  • a cover insulating film for moisture absorption prevention may be formed on the PSG film 15 b.
  • the TH-CVD apparatus or the PE-CVD apparatus is used, and the furnace for annealing is used to improve the film quality.
  • a film forming apparatus entirely having a constitution, where the CVD apparatus and the annealing furnace are connected by a load-lock chamber should preferably be used.
  • the present invention is advantageous in the following respects. Since the PSG film or the BPSG film is formed in a state of oxygen shortage, the PSG film or the BPSG film having a high-concentration of P 2 O 3 as a phosphorous component can be formed, making it possible to reduce a fluidization temperature to 700° C. or much lower. Thus, such a film can be used as a flattened base film below the wiring layer, or a flattened interlayer insulating film to cover the wiring layer.
  • the interlayer insulating film can be flattened by thermally fluidizing the formed film, a recessed part between the wiring layers can be filled without any gaps.
  • Inert gas e.g., argon or helium
  • carrier gas e.g., argon or helium
  • the amount of ammonia in the formed film can be reduced substantially to zero, making it possible to improve film quality.

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Abstract

The present invention discloses a method for forming a flattened interlayer insulating film to cover the wiring layer or the like of a semiconductor IC device, and a manufacturing method of a semiconductor device. The film-forming method of the present invention comprises the steps of preparing deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which oxygen is bonded to at least one of bonding hands of phosphorous, and forming a silicon containing insulating film 21 containing P2O3 on a substrate 101 by using said deposition gas.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to a method for forming a flattened interlayer insulating film to cover the wiring layer or the like of a semiconductor integrated circuit device, and a method for manufacturing a semiconductor device. [0002]
  • 2. Description of the Prior Art [0003]
  • In recent years, with regard to a semiconductor integrated circuit device (hereinafter, referred to as a semiconductor IC device), a progress has been made to achieve a much higher density, and an increasing number of the structures having a multilayer wiring extended over several layers has been used. In such a case, because of the frequent use of, especially an aluminum material for a wiring layer, a strong request has been made to develop a method for forming a flattened interlayer insulating film, which can be formed at a low temperature equal to 500° C. or lower. [0004]
  • Conventionally available flattening methods include: one like that shown in FIG. 1, which performs flattening by forming a film by a thermal chemical vapor deposition method (hereinafter, referred to as a TH-CVD method), a plasma enhanced chemical vapor deposition method (hereinafter, referred to as a PE-CVD method) or the like, heating the formed film, and then fluidizing the film; and one like an etch back method shown in FIG. 2 or a chemical mechanical polishing method (hereinafter, referred to as a CMP method) shown in FIG. 3, which performs flattening by removing unevenness on the surface of the insulating film by etching or polishing. [0005]
  • In the case of the former method, as shown in FIG. 1A, a boro-phospho silicate glass film (hereinafter, referred to as a BPSG film) 4 is formed by a TH-CVD method, which uses any one of the following deposition gases: [0006]
  • (1) SiH[0007] 4+PH3+B2H6+O2 (PH3: phosphine)
  • (2) TEOS+TMOP+TMB or TEB+O[0008] 2 or O3 (TEOS: tetraethylorthosilicate (Si(OC2H5)4), TMOP: trimethylphosphate (PO(OCH3)3)).
  • Alternatively, as shown in FIG. 1A, a [0009] BPSG film 4 is formed by a PE-CVD method, which uses any one of the following deposition gases:
  • (1) SiH[0010] 4+PH3+B2H6+O2
  • (2) TEOS+TMOP+TMB or TEB+O[0011] 2.
  • For reference, see documents: J. Electrochem. Soc., 134.3,: 657, 1987, by Williams, D. S. and Dein, E. A; J. Vac. Sci. Technol., B1, 1:54, 1983, by Levin, R. M. and Evans-Lutterodt, K; Extended Abstract of Electrochem. Soc. Spring Meeting: 31, 1971, by Sato, J. and Maeda, K. [0012]
  • Then, as shown in FIG. 1B, the formed BPSG [0013] film 4 is heated at a temperature of about 850° C., and fluidized to be flattened. In the case of a phospho-silicate glass film (hereinafter, referred to as a PSG film), a film is formed by a TH-CVD method, a PE-CVD method or the like, which uses deposition gas generated by eliminating boron containing gas (B2H6, TMB or TEB) from the foregoing gas, then heated at a temperature equal to 1000° C. or lower, and fluidized to be flattened.
  • In the case of the latter method, as shown in FIG. 2A and FIG. 3A, firstly, a non-doped silicate glass (hereinafter, referred to as an NSG film) [0014] 5 is formed by a TH-CVD method, a PE-CVD method or the like, which uses one of the following deposition gases, and then flattened:
  • (1) SiH[0015] 4+O2 (TH-CVD method or PE-CVD method)
  • (2) TEOS+O[0016] 2 or O3 (TH-CVD method)
  • (3) TEOS+O[0017] 2 (PE-CVD method)
  • In the etch back method, as shown in FIG. 2B, a resist film [0018] 6 is formed on the NSG film 5 by coating method, and its surface is flattened. Then, as shown in FIG. 2C, the film 6 is subjected to etching from above to form a flattened NSG film 5 a. In the CMP method, as shown in FIG. 3B, the NSG film 5 is formed, and then polished to flatten the surface of an NSG film 5 b.
  • In FIGS. [0019] 1 to 3, a reference numeral 1 denotes a semiconductor substrate; 2 a base insulating film; and 3 a and 3 b wiring layers formed on the base insulating film 2.
  • Incidentally, the above-described flattening methods based on the etch back method or the CMP method are effective especially when a low temperature is required, because these methods can be executed without heating unlike the case of the flattening method based on fluidizing by heating. However, as shown in FIGS. 2 and 3, if any voids are formed between the [0020] wiring layers 3 a and 3 b or in other recessed parts immediately after the insulating film 5, the voids are left unchanged even after flattening. Currently available methods for forming insulating films having good gap-filling capabilities include a high-density PE-CVD method, a PE-CVD method, an atmospheric pressure TH-CVD method, an spin-on-glass (hereinafter, referred to as SOG) coating method, and the like. However, since the described flattening methods use no thermal fluidity, particularly when a high densification is attained to narrow a space between the wiring layers, recessed parts cannot be completely filled.
  • On the other hand, in the flattening method based on fluidizing by heating, since thermal fluidity is utilized, as shown in FIG. 1, complete filling can be expected. At present, especially the BPSG [0021] film 4 is frequently used for such a purpose. However, heating of at least a temperature of 850° C. must be carried out for fluidization. Thus, such a film cannot be applied to the base film 2 of the wiring layers 3 a and 3 b or the interlayer insulating film 4, where a low temperature is needed for formation. In particular, the film cannot be applied to an insulating film to cover the aluminum wiring layer. In this case, the temperature of fluidization can be somewhat lowered by increasing the concentration of boron or phosphorus. Even so, the temperature is not yet sufficiently low. Rather, new problems may occur, such as a reduction in the stability or humidity resistance of the insulating films 2 and 4. Similar problems may occur in the case of the PSG film, because the temperature of fluidization substantially equal to that for the BPSG film is necessary.
  • As an insulating film having a low fluidization temperature, a GeBPSG film formed by adding GeO[0022] 2 to the BPSG film has been developed. However, the temperature can be lowered to about 750° C. at least. Thus, it is difficult to apply this film to the base film or the interlayer insulating film, in which a much lower temperature is required.
    • SUMMARY OF THE INVENTION
  • A fluidization temperature should preferably be set as low as possible not only when aluminum, copper or the like is used for wiring in a semiconductor large scale integrated circuit (hereinafter, referred to as LSI) or the like, but also to prevent the re-distribution of impurities in an impurity introduction region generally caused by heat. [0023]
  • An object of the present invention is to provide a method for forming an insulating film, capable of greatly reducing a fluidization temperature for flattening a surface, and a manufacturing method of a semiconductor device. [0024]
  • The inventors focused on the following points: [0025]
  • (1) the BPSG film or the phospho-silicate glass film (hereinafter, referred to as PSG film) of the conventional example is a mixture of SiO[0026] 2+P2O5+B2O3, or of SiO2+P2O5 (PH3 of deposition gas SiH4+PH3+B2H6+O2 is III valance phosphorus, and bonded with externally supplied oxygen to generate not P2O3 but P2O5. This may be attributed to the fact that since PH3 itself contains no oxygen, when it is bonded with externally supplied oxygen, stable P2O5 is easily generated.);
  • (2) in the BPSG film having the P[0027] 2O5-SiO2, a eutectic point for the composition of 20 to 80 % of P2O5 is 850° C. theoretically, and its fluidization temperature is dependent on the melting point of P2O5 itself; and
  • (3) P[0028] 2O3 has a melting point much lower than that of P2O5 as described on Table 1.
    TABLE 1
    Melting point Boiling point
    P2O3 (III valance) 23.8° C. 175.4° C.
    P2O5 (V valance) 580 to 585° C. 300° C. (sublimation)
  • Accordingly, the inventors considered that a fluidization temperature would be lowered by mainly containing P[0029] 2O3, instead of P2O5, in the BPSG film or the PSG film.
  • Then, the inventors came up with the idea of oxidizing a phosphorus containing compound in a state of oxygen shortage to form a BPSG or PSG film having a high-concentration of P[0030] 2O3. As methods for such a purpose, the followings may be possible. That is, (1) a silicon and phosphorus-containing compound, containing phosphorus atom (P atom) in the form of III valance is used as deposition gas; and (2) by using a silicon containing compound or a silicon and phosphorus-containing compound containing oxygen, a film is formed without adding any oxygen or ozone.
  • Regarding a silicon and phosphorus-containing compound, containing III valance P atom, which can be applied to the method of (1), one may be selected from silicon and phosphorus-containing compounds having the following structural formulas: [0031]
    Figure US20010036754A1-20011101-C00001
  • A PSG film or the like was formed by using deposition gas containing the silicon and phosphorus-containing compound, and by a TH-CVD method or a PE-CVD method, and examination was made as to components in the formed film by X-ray fluorescence analysis (XRF) or Fourier transform infrared spectroscopy (FTIR). Then, the presence of high-concentration P[0032] 2O3 in the formed film was verified. Then, a fluidization temperature of 700° C. or lower was obtained.
  • In addition, the inventors found that it is possible to adjust a fluidization temperature by controlling a concentration of P[0033] 2O3.
  • The inventors also found that it is possible to easily adjust a concentration of P[0034] 2O3 by controlling a deposition temperature and the gas flow rate of the silicon and phosphorus-containing compound (flow rate of inert gas carrier), or by controlling a concentration of oxidizing gas when the oxidizing gas is added.
  • It is now assumed that nitrogen (N[0035] 2) is used as carrier gas of the silicon and phosphorus-containing compound. Since N2 is a diatomic molecule, when a film is formed by reaction of plasma enhanced deposition gas, N2 is prone to be dissociated, and bonded with hydrogen in the film, leaving ammonia (NH3) in the film. According to the present invention, inert gas, e.g., argon or helium is used as carrier gas. Because of little reactivity of argon or helium itself, the amount of ammonia in the film can be reduced substantially to zero.
  • Further, the use of inert gas, e.g., argon or helium, as carrier gas, resulted in the great reduction in the concentration of phosphorus during heat treatment after deposition, enhancing controllability of the concentration of Phosphorus. [0036]
  • In addition, by forming a film using only the silicon and phosphorus-containing compound, containing III valance phosphorus, the amount of carbon left in the formed film can be greatly reduced. In this case, the adjustment of a phosphorus concentration can be made by controlling the ratio of flow rates between the silicon and phosphorus-containing compound and the foregoing inert gas in the deposition gas. Accordingly, though a silicon containing compound containing no phosphorus is added in the deposition gas in the conventional method in order to adjust a phosphorus concentration, the silicon containing compound containing no phosphorus can be eliminated from the deposition gas. The silicon containing compound containing no phosphorus has Si—C bonding, causing carbon to be left during deposition. Thus, preferably, the addition of such a compound should be prevented as much as possible. However, the compound can be added as occasion demands. [0037]
  • Furthermore, the film that has been formed is subjected to nitrogen annealing and oxygen annealing, and then heated in atmosphere containing moisture. This process is called steam annealing. Since the steam annealing has an oxidizing force stronger than that for normal oxygen annealing, residual III valance phosphorus is oxidized, and the moisture absorption resistance of the formed film is enhanced, making it possible to improve film quality. [0038]
  • The foregoing can be established similarly for the BPSG film.[0039]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. 1A and 1B are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by fluidization due to heating, according to a conventional example. [0040]
  • FIGS. 2A to [0041] 2C are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by etch back, according to a conventional example.
  • FIGS. 3A and 3B are sectional views showing a method for forming an interlayer insulating film, which includes flattening carried out by CMP, according to a conventional example. [0042]
  • FIGS. 4A to [0043] 4D are sectional views showing a method for forming a PSG film, which comprises a series of steps including a film-forming step, according to a first embodiment of the present invention.
  • FIG. 5 is a graph associated with the amount of ammonia in the PSG film formed by the film-forming method of the first embodiment of the present invention and showing substrate temperature dependence thereof. [0044]
  • FIG. 6 is a graph showing a relation between phosphorus concentration in the PSG film formed by the film-forming method of the first embodiment of the present invention, and a temperature of annealing after film formation. [0045]
  • FIG. 7 is a graph showing the amount of carbon in the PSG film formed by the film-forming method of the first embodiment of the present invention. [0046]
  • FIG. 8 is a flowchart showing the film-forming method of the embodiment of the present invention. [0047]
  • FIGS. 9A to [0048] 9E are sectional views showing a method for forming a PSG film, which comprises a series of steps including a film-forming step, according to a second embodiment of the present invention.
    • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Next, the preferred embodiments of the present invention will be described with reference to the accompanying drawings. [0049]
    • (1) First Embodiment
  • Description will be made of a method for forming a PSG film through a series of steps including a film-forming step according to a first embodiment of the present invention. [0050]
  • As shown in FIG. 8, a series of steps include, a film-forming step, an N[0051] 2 annealing step, an O2 annealing step, and a steam annealing step.
  • With regard to deposition gas in the film-forming step, gas generated by mixing a silicon and phosphorus-containing compound, inert gas and oxidizing gas was used. Silicon containing compounds containing no phosphorus should not be used. [0052]
  • For a phosphorus containing compound, one can be selected from silicon and phosphorus-containing compounds having Si—O—P structures, for which the structural formulas is shown below: [0053]
  • (i) phosphorus acid dimethyl trimethylsilylester (referred to as SOP-11(a), hereinafter); [0054]
    Figure US20010036754A1-20011101-C00002
  • (ii) phosphorous acid dimethoxy trimethylsilylester (referred to as SOP-11(b), hereinafter); [0055]
    Figure US20010036754A1-20011101-C00003
  • (iii) P (OSi (CH[0056] 3)3)3: or
    Figure US20010036754A1-20011101-C00004
  • (iv) P (OSi (CH[0057] 3))2OCH3.
    Figure US20010036754A1-20011101-C00005
  • Other than the above, a silicon and phosphorus-containing compound having III valance phosphorus, and oxygen being bonded to at least one of the bonding hands of the phosphorus, can be used. In the described embodiment, SOP-11(b) was used. [0058]
  • For inert gas to be added to the silicon and phosphorus-containing compound, inert gas of argon (Ar) or helium (He) can be used. In the embodiment, argon (Ar) was used for the inert gas. [0059]
  • With regard to oxidizing gas, it is not always necessary to contain oxidizing gas in the deposition gas. However, when contained, ozone (O[0060] 3), oxygen (O2), NO, N2O, NO2, CO, CO2, H2O, or the like can be used as oxidizing gas. In the embodiment, oxygen (O2) is used as oxidizing gas.
  • As occasion demands, a silicon containing compound containing no phosphorus may be added to the deposition gas. In this case, as such a silicon containing compound, one can be selected from alkylsilane or arylsilane (general formula R[0061] nSiH4-n (n=1 to 4)), alkoxysilane (general formula (RO) nSiH4-n (n=1 to 4)), chain siloxane (general formula RnH3-nSiO (RkH2-kSiO) mSiH3-nRn (n=1 to 3; k=0 to 2; m∞0)), a derivative of cyclic siloxane (general formula (RO)nH3-nSiOSiH3-n(OR)n(n=1 to 3), chain siloxane (general formula (RkH2-kSiO)m(k=1, 2; m∞2)), and the like. In this case, R is an alkyl group, an aryl group or its derivative.
  • Compounds containing silicon but no phosphorus are mainly as follows: [0062]
  • (i) hexamethyl disiloxane (HMDSO): (CH[0063] 3)3SiOSi(CH3)3);
    Figure US20010036754A1-20011101-C00006
  • (ii) tetramethyl disiloxane (TMDSO): H(CH[0064] 3)2SiOSi(CH3 )2H);
    Figure US20010036754A1-20011101-C00007
  • (iii) hexaethyl disiloxane (HEDSO): (C[0065] 2H5)3SiOSi(C2H5)3);
    Figure US20010036754A1-20011101-C00008
  • (iv) tetraethyl orthosilicate (TEOS: Si(OC[0066] 2H5)4);
    Figure US20010036754A1-20011101-C00009
  • (v) triethoxy silane (TRIES: HSi(OC[0067] 2H5)3); and
    Figure US20010036754A1-20011101-C00010
  • (vi) trimethoxy silane (TMS: HSi(OCH[0068] 3)3).
    Figure US20010036754A1-20011101-C00011
  • In the steam annealing step, one made by mixing oxygen and hydrogen in a predetermined ratio is reacted to generate water molecules, and heating is carried out in atmosphere containing the water molecules. [0069]
  • Conditions for a series of steps are described below. Standard processing conditions are shown in tables. Processing parameters having conditions varied to obtain comparison data are described outside the tables. [0070]
    • (1) Deposition Condition
  • [0071]
    TABLE 2
    Deposition Standard set value
    Substrate temperature
    250° C.
    RF power 150 W
    Total gas flow rate  1.0 slm
    Amount of added O 2  2 sccm
  • The substrate temperature was changed to 100, 200, and 300° C. Since SOP-11(b) is liquid at a normal temperature, it is contained in carrier gas by bubbling. The inventors prepared two kinds of compounds, i.e., one using Ar carrier as carrier gas, and one using N[0072] 2 carrier as such. When inert gas (Ar) was used as carrier gas, the content of SOP-11(b) in deposition gas was adjusted by controlling the flow rate of carrier gas.
  • (ii) N[0073] 2 annealing
    TABLE 3
    Processing Standard set value
    Temperature rising rate  10° C./min.
    N 2 gas flow rate  10 slm
    Holding temperature 650° C.
    Holding time
     15 min.
  • For comparison, the heat treatment temperature was changed to 250, 500, and 750° C. In addition, similar processing was carried out for a film formed by containing N[0074] 2 instead of Ar in the deposition gas.
  • (iii) O[0075] 2 annealing
    TABLE 4
    Processing Standard set value
    O2 gas flow rate  10 slm
    Holding temperature 650° C.
    Holding time
     15 min.
  • (iv) Steam annealing [0076]
    TABLE 5
    Processing Standard set value
    O2 gas flow rate  6 slm
    H2 gas flow rate  5 slm
    Holding temperature 650° C.
    Holding time
    15 min.
  • Any one of O[0077] 2 annealing and steam annealing among above annealing processes can be ommited.
  • First, a [0078] substrate 101 to be deposited shown in FIG. 4A is placed in the chamber of a PE-CVD apparatus. Then, substrate heating is carried out to hold a specified substrate temperature.
  • Subsequently, the foregoing deposition gas is introduced into the chamber, and plasma is generated and held for a predetermined time. In this way, a [0079] PSG film 21 having a specified thickness containing high-concentration P2O3 is formed. In this case, depending on the concentration of P2O3 or the ratio of P2O3/P2O5, the PSG film 21 may be fluidized at a temperature substantially equal to the substrate temperature during film formation. Accordingly, flattening is achieved simultaneously with the film formation.
  • Then, as shown in FIG. 4B, after the formation of the [0080] PSG film 21 on the substrate 101, heating for flattening is carried out in N2 atmosphere. A PSG film 21 a is fluidized to be flattened.
  • Then, as shown in FIG. 4C, heating is carried out in atmosphere containing oxygen. In this way, P[0081] 2O3 in a PSG film 14 a is oxidized and converted to P2O5. As a result, a P2O5 concentration in a PSG film 21 b is increased to thereby stabilize the PSG film 14 a.
  • Then, as shown in FIG. 4D, heating is carried out in atmosphere containing moisture. Because of a high oxidizing force of the moisture, the conversion of P[0082] 2O3 to P2O5 is further promoted. Accordingly, a P2O5 concentration in the PSG film 21 b becomes much higher.
  • With regard to the [0083] PSG film 21 formed in the above film-forming method, the amount of ammonia in the film immediately after its formation was examined.
  • The result of the examination is shown in FIG. 5. Specifically, FIG. 5 shows the dependence of the amount of ammonia in the formed film after film formation on a substrate temperature during film formation, in which an ordinate axis shows the amount of ammonia (wt. %) in the formed film, expressed in linear scale and an abscissa axis shows a substrate temperature (°C.), expressed in linear scale. [0084]
  • In the examination, a sample is subjected to thermal desorption spectroscopy (TDS) analysis, thermally desorbed ammonia gas is quantitatively measured, and then comparison is made. [0085]
  • As can be understood from the result of FIG. 5, there are differences in the tendency of dependence and contents between the case of using Ar as carrier gas and the case of using N[0086] 2 as the same. When carrier gas is Ar, the substrate temperature is not affected, and little ammonia is contained in the formed film. When carrier gas is N2, a content of ammonia is equal to 5 wt. % or higher, and the content is increased corresponding to the increase of the substrate temperature.
  • Detection was also carried out for a concentration of phosphorus in the formed film by means of X-ray fluorescence analysis (XRF). By the XRF, a total concentration of P[0087] 2O3+P2O5 in the formed film can be detected.
  • The result of analysis is shown in FIG. 6. Specifically, FIG. 6 shows the dependence of a phosphorus concentration in the formed [0088] Film 21 a on the heat treatment temperature of N2 annealing after film formation, in which an ordinate axis shows a P concentration (wt. %) in the PSG film, and an abscissa axis shows a heat treatment temperature (°C.), expressed in linear scale. “As depo” denotes a concentration of phosphorus in the PSG film 21 immediately after film formation and before N2 annealing.
  • As can be understood from FIG. 6, there is a difference in the concentration of P[0089] 2O3 or in the ratio of P2O3/P2O5 in the formed PSG film 21 a between the case of using Ar as carrier gas and the case of using N2 as the same. The concentration of P2O3 or the ratio of P2O3/P2O5 can be reduced more when Ar is used as carrier gas than when N2 is used as the same. For both cases, it was discovered that the concentration of phosphorus can be adjusted by a heat treatment temperature.
  • In addition, a melting temperature or a fluidization temperature of the [0090] PSG film 21 a for each of the above case becomes lower as the concentration of P2O3 or the ratio of P2O3/P2O5 is higher. In the experiment, a melting temperature or a fluidization temperature equal to 700° C. or lower was obtained.
  • Further, FIG. 7 shows the result of examining the amount of Si—CH[0091] 3 bonding, i.e., a carbon content, in the formed film 21 b. Specifically, an ordinate axis of FIG. 7 shows an absorption intensity (arbitrary unit) by Fourier transform infrared spectroscopy (FTIR), while an abscissa axis shows the number of waves (cm−1).
  • According to the result shown in FIG. 7, a content of Si—C H[0092] 3 bonding in the formed film 21 b varies between the case of using Ar as carrier gas and the case of using N2 as the same. In other words, a peak height of an absorption intensity is lower in the case of using Ar as carrier gas than that in the case of using N2 as the same, and thus a content of Si—CH3 bonding in the formed film 21 b is smaller.
  • As apparent from the foregoing, according to the first embodiment of the present invention, since a phosphorus containing compound, which contains III valance phosphorus, is used for deposition gas, it is possible to form a PSG film having a high P[0093] 2O3 content immediately after film formation. Accordingly, the PSG film can be fluidized at a low temperature.
  • Moreover, inert gas, e.g., argon or helium, is used as carrier gas in the deposition gas. Because of little reactivity of argon or helium itself, the amount of ammonia in the formed film can be set substantially to zero. Thus, the quality of the formed film can be improved. [0094]
    • (2) Second Embodiment
  • Next, description will be made of a method for forming a PSG film containing P[0095] 2O3 by means of PE-CVD method according to a second embodiment of the present invention.
  • FIG. 8 is a flowchart showing a film-forming method according to the second embodiment of the invention. a set of FIGS. 9A to [0096] 9F is a sectional view of the film-forming method of the second embodiment of the present invention.
  • As deposition gas, mixed gas of SOP-11(b)+Ar was used. To set a sufficient state of oxygen shortage, no oxygen (O[0097] 2) was added different from the case of the first embodiment.
  • As a film-forming method, a PE-CVD method by a film forming apparatus having a well-known parallel plate type electrode was used. Plasma enhanced method by the parallel plate type electrode is a method for applying an RF power between upper and lower electrodes placed oppositely to each other, and then converting deposition gas between these electrodes into plasma. The lower electrode serves also as a substrate holder and, as occasion demands, power for substrate biasing may be applied to the lower electrode. [0098]
  • A deposition condition is described below. [0099]
    TABLE 6
    Deposition parameter Deposition condition
    SOP-11(b) (bubbling by Ar)  0.1 to 2 slm
    Ar  0.1 to 1 slm
    Substrate temperature  20 to 400° C.
    Pressure range  66 to 2667 Pa
    RF power
    100 to 700 W
    Frequency  13.56 MHz
    Substrate bias power  0 to 300 W
    Frequency  13.56 MHz or 400 kHz
  • FIG. 9A is a sectional view of a [0100] substrate 101 to be deposited before film formation. The substrate 101 is constructed in a manner that a base insulating film 12, e.g., a silicon oxidized film, is formed on a silicon substrate (semiconductor substrate) 11, and wiring layers 13 a and 13 b composed of, e.g., aluminum films, are formed on the base insulating film 12.
  • In this state, first, the [0101] substrate 101 is placed on the substrate holder in a deposition chamber. Subsequently, the substrate 101 is heated or controlled to a temperature of the range of 20 to 400° C.
  • Then, as shown in FIG. 9B, mixed gas of SOP-11(b)+Ar is introduced into a plasma chamber, and gas pressure is maintained at 0.5 to 20 Torr. Ar is used as carrier gas of SOP-11(b). A flow rate of Ar carrier gas containing SOP-11(b) was set in the range of 0.1 to 2 SLM, and a flow rate of added Ar was set in the range of 0.1 to 1 SLM. [0102]
  • Then, power 0 to 300 W of a frequency 13.56 MHz is applied to the substrate holder, and a bias voltage is applied to the [0103] substrate 101. Further, power 50 to 2.3 kW of a frequency 13.56 MHz is applied to the upper electrode, and deposition gas is converted into plasma.
  • Accordingly, reaction occurs in the plasma of the deposition gas, and the deposition of a reactive product on the [0104] substrate 101 is started. A PSG film 16 under film formation showed a flowability to flow into a recessed part between the wiring layers 13 a and 13 b even at the substrate temperature of about 200° C. In this case, phosphorus may be contained in the PSG film 16 in the form of III valance P2O3. Because of no external supply of oxygen, the state of an oxygen shortage is maintained in a reaction system, and Si and P may be respectively contained in the PSG film 16 in the form of Si—O and P—O being bonded with oxygen atoms present in molecules.
  • Then, after its removal from the film-forming apparatus, the [0105] substrate 101 is conveyed in vacuum or atmosphere, and set in a heat treatment furnace held at a deposition temperature or lower. Subsequently, as shown in FIG. 9C, N2 is introduced into the heat treatment furnace at a flow rate of 10 SLM, and the substrate 101 is heated. A temperature rising rate is set about 10° C./min., and after the substrate temperature reaches 650° C, this state is maintained for several minutes. The processing comes to an end with the passage of about 15 minutes after the temperature rising. N2 annealing breaks the glass structure of a formed film 15 a, and re-flowing brings about void filling and formed film flattening. In addition, a gas component contained in the formed film 15 a is eliminated therefrom during heating, and thus a PSG film 15 a having III valance phosphorus is formed.
  • Then, as shown in FIG. 9D, while the substrate temperature is maintained at 650° C., oxygen is introduced at a flow rate of 10 SLM, and the [0106] substrate 101 is heated in oxygen atmosphere for about 15 minutes. III valance phosphorus has very high reactivity, and is prone to be oxidized. Thus, the phosphorus can be converted into stable V valance phosphorus by exposing it to oxygen atmosphere at a high temperature. In this way, the PSG film 15 a containing the unstable III valance phosphorus becomes a PSG film 15 b containing stable V valance phosphorus.
  • As described above, by annealing carried out in atmosphere containing oxygen after film formation, P[0107] 2O3 is converted into P2O5 to stabilize the PSG film 15 b. Moreover, the final composition of P2O5 provides a passivation effect to the PSG film 15 b, and contributes to the stabilization of an interface characteristic. Noted that residual carbon in the formed film is simultaneously oxidized by the annealing.
  • Then, an oxygen flow rate is adjusted to 6 SLM while the substrate temperature is maintained at 650° C., hydrogen is newly added at a flow rate of 5 SLM, and then these are introduced through a burning heater into the chamber. The burning heater is heated to 850° C. beforehand. Mixed gas is ignited to cause reaction so as to generate water molecules, and as shown in FIG. 9E, heating is carried out in atmosphere containing moisture for about 15 minutes. Since an oxidizing force for the heating carried out in the moisture containing atmosphere, so-called steam annealing is stronger than that for normal oxygen annealing, film quality can be further improved by oxidizing residual III valance phosphorus, and increasing the moisture absorption resistance. By examination, the reduction in the amount of moisture in the film to about {fraction (1/10)} was verified. A reason for such a reduction is not yet definite. However, a likely reason may be that a moisture absorbing site remaining in the network of SiO[0108] 2 can be greatly reduced by strong oxidation provided by the steam annealing.
  • As apparent from the foregoing, according to the second embodiment of the present invention, since insulating [0109] films 21 and 15 having high-concentration of P2O3 as a phosphorous component are formed, a fluidization temperature can be reduced to 700° C. or much lower. Accordingly, such a film can be used as an interlayer insulating film to cover aluminum wiring. Moreover, even when such a film is used as the base insulating film of a wiring layer in a semiconductor device having a narrower diffused layer with a higher densification of the semiconductor device, impurities in the diffused layer can be prevented from being re-distributed.
  • Further, the necessity of a flattening processing technology such as a CMP method or the like can be eliminated, and the interlayer insulating film can be flattened by thermally fluidizing the formed film. Thus, a recessed part between the wiring layers can be filled without any gaps. [0110]
  • Assuming that nitrogen is used as carrier gas, since N[0111] 2 is a diatomic molecule, when a film is formed by reaction of the plasma enhanced deposition gas, N2 is prone to be dissociated, leaving ammonia (NH3) in the formed film. According to the second embodiment of the present invention, inert gas, e.g., argon or helium, is used as carrier gas. Because of little reactivity of argon or helium itself, such interference compound can be prevented from forming.
  • Further, by using inert gas as carrier gas, a concentration of phosphorus was greatly reduced during heat treatment after film formation, enhancing controllability of the concentration of phosphorus. [0112]
  • In addition, by forming a film using only a phosphorus containing compound, which contains III valance phosphorus, the amount of carbon left in the formed film can be greatly reduced. In this case, the adjustment of concentration of phosphorus can be made by controlling the ratio of flow rates between the silicon and phosphorus-containing compound and the inert gas in the deposition gas. Thus, the addition of a compound containing silicon but no phosphorus, which is conventionally added to the deposition gas was made unnecessary in principle. Also, the compound containing silicon but no phosphorus has Si—C bonding, causing carbon to be left in the formed film. Thus, such a compound should preferably be added as little as possible. However, addition thereof may be permitted as occasion demands. [0113]
  • In addition, after film formation, so-called steam annealing is carried out, which heats the formed film in atmosphere containing moisture after nitrogen annealing and oxygen annealing. Since the steam annealing has a stronger oxidizing force than that of normal oxygen annealing, film quality can be further improved. [0114]
  • The invention has been described in detail with reference to the preferred embodiments. However, the scope of the invention is not limited to the specified embodiments. Various changes and modifications can be made without departing from the gists of the invention, and such changes and modifications are within the scope of the invention. [0115]
  • For example, in the second embodiment, no oxygen is used for deposition gas. Needless to say, however, as in the case of the first embodiment, by adding oxygen, a melting temperature or a fluidization temperature can be adjusted by controlling a concentration of P[0116] 2O3 or the ratio of P2O3/P2O5. In addition, by controlling other deposition parameters, e.g., a substrate temperature and the flow rate of inert gas, as in the case of the first embodiment, a melting temperature or a fluidization temperature can also be adjusted through the adjustment of a concentration of P2O3 or the ratio of P2O3/P2O5.
  • Further, the PE-CVD method is used. However, a TH-CVD method for activating deposition gas by heat may be used. In this case, for example, deposition conditions described in Table 7 can be used. [0117]
    TABLE 7
    TH-CVD Method
    Deposition parameter Deposition condition
    Substrate temperature
    200 to 400° C.
    Ozone concentration  0.3 to 2.5%
    Gas flow rate of SOP-11(b)  0.1 to 1.5 slm
    Gas flow rate of TMB or TEB  0.1 to 1.0 slm
  • Also, in the case of the TH-CVD method, ammonia may be generated when N[0118] 2 is contained in deposition gas. However, by using a compound containing no N2 in the deposition gas, the amount of ammonia in the formed film can be reduced substantially to zero.
  • In stead of the foregoing annealing, or together with annealing, a cover insulating film for moisture absorption prevention may be formed on the [0119] PSG film 15 b.
  • As a CVD apparatus, the TH-CVD apparatus or the PE-CVD apparatus is used, and the furnace for annealing is used to improve the film quality. However, in order to enable the film to be reformed without exposure to atmosphere after film formation, a film forming apparatus entirely having a constitution, where the CVD apparatus and the annealing furnace are connected by a load-lock chamber should preferably be used. [0120]
  • As apparent from the foregoing detailed description, the present invention is advantageous in the following respects. Since the PSG film or the BPSG film is formed in a state of oxygen shortage, the PSG film or the BPSG film having a high-concentration of P[0121] 2O3 as a phosphorous component can be formed, making it possible to reduce a fluidization temperature to 700° C. or much lower. Thus, such a film can be used as a flattened base film below the wiring layer, or a flattened interlayer insulating film to cover the wiring layer.
  • Since the interlayer insulating film can be flattened by thermally fluidizing the formed film, a recessed part between the wiring layers can be filled without any gaps. [0122]
  • Inert gas, e.g., argon or helium, is used as carrier gas,. Because of little reactivity of argon or helium itself, the amount of ammonia in the formed film can be reduced substantially to zero, making it possible to improve film quality. [0123]
  • Furthermore, by using inert gas as carrier gas, a concentration of phosphorus is greatly reduced during heat treatment after film formation, making it possible to enhance controllability of the concentration of phosphorus. [0124]

Claims (16)

What is claimed is:
1. A film-forming method, comprising the steps of:
preparing deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which oxygen is bonded to at least one of bonding hands of phosphorous; and
forming a silicon containing insulating film containing P2O3 on a substrate by using said deposition gas.
2. The film-forming method according to
claim 1
, wherein said silicon and phosphorus-containing compound, having III valence phosphorus in which oxygen is bonded to at least one of bonding hands of phosphorous, is one selected from the group consisting of silicon and phosphorus-containing compounds having structural formulas described below.
Figure US20010036754A1-20011101-C00012
3. The film-forming method according to
claim 1
, wherein said inert gas is the one selected from the group consisting of argon (Ar) and helium (He).
4. The film-forming method according to
claim 1
, wherein said deposition gas contains a silicon compound containing no phosphorus.
5. The film-forming method according to
claim 1
, wherein said deposition gas contains oxygen atoms.
6. The film-forming method according to
claim 1
, wherein said deposition gas is excited by heating, alternatively by conversion into plasma.
7. The film-forming method according to
claim 1
, wherein said substrate during the film formation is heated to a temperature set in a range of 20 to 400° C., alternatively the temperature is adjusted.
8. The film-forming method according to
claim 1
, wherein said silicon containing insulating film containing P2O3 is the one selected from the group consisting of a phospho-silicate glass film (PSG film) and a boro-phospho silicate glass film (BPSG film).
9. The film-forming method according to
claim 1
, wherein after the step of forming said silicon containing insulating film containing P2O3, said formed film is further heated, fluidized and flattened.
10. The film-forming method according to
claim 9
, wherein a temperature for heating said formed film is set equal to 700° C., alternatively lower.
11. The film-forming method according to
claim 9
, wherein after said formed film is heated, fluidized and flattened, said formed film is further heated in atmosphere containing oxygen, and P2O3 in said formed film is converted into P2O5.
12. The film-forming method according to
claim 11
, wherein after said formed film is heated, and P2O3 in said formed film is converted into P2O5, said formed film is further heated in atmosphere containing moisture.
13. The film-forming method according to
claim 1
, wherein after said silicon containing insulating film containing P2O3 is formed, said formed film is further heated in atmosphere containing oxygen, and P2O3 in said formed film is converted into P2O5.
14. The film-forming method according to
claim 13
, wherein after said formed film is heated, and P2O3 in said formed film is converted into P2O5, said formed film is further heated in atmosphere containing moisture.
15. A manufacturing method of a semiconductor device, comprising the steps of:
forming a wiring layer on an insulating film;
preparing deposition gas containing an inert gas, and a silicon and phosphorus-containing compound having III valance phosphorus in which oxygen is bonded to at least one of bonding hands of phosphorous; and
forming a flattened silicon containing insulating film containing P2O3 and covering said wiring layer by using said deposition gas.
16. The manufacturing method of a semiconductor device according to
claim 15
, wherein a material for said wiring layer is the one selected from the group consisting of aluminum, an aluminum alloy, copper, and a copper alloy.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030118872A1 (en) * 2001-09-15 2003-06-26 Jashu Patel Methods of forming nitride films
US10441138B2 (en) 2016-07-29 2019-10-15 Plympus Winter & Ibe Gmbh Optical system and a surgical instrument with such an optical system
US20220267903A1 (en) * 2021-02-25 2022-08-25 Asm Ip Holding B.V. Methods of forming phosphosilicate glass layers, structures formed using the methods and systems for performing the methods

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Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4708884A (en) 1984-07-11 1987-11-24 American Telephone And Telegraph Company, At&T Bell Laboratories Low temperature deposition of silicon oxides for device fabrication
DE58908376D1 (en) 1988-04-26 1994-10-27 Siemens Ag Process for producing boron-containing and / or phosphorus-containing silicate glass layers for highly integrated semiconductor circuits.
JPH04320338A (en) 1991-04-19 1992-11-11 Fujitsu Ltd Manufacture of semiconductor device related with psg vapor phase growth
DE69311184T2 (en) 1992-03-27 1997-09-18 Matsushita Electric Ind Co Ltd Semiconductor device including manufacturing process
US5409743A (en) 1993-05-14 1995-04-25 International Business Machines Corporation PECVD process for forming BPSG with low flow temperature
EP0736905B1 (en) * 1993-08-05 2006-01-04 Matsushita Electric Industrial Co., Ltd. Semiconductor device having capacitor and manufacturing method thereof
JP2965188B2 (en) 1993-11-26 1999-10-18 キヤノン販売 株式会社 Film formation method
JP2701751B2 (en) * 1994-08-30 1998-01-21 日本電気株式会社 Method for manufacturing semiconductor device
US6121163A (en) * 1996-02-09 2000-09-19 Applied Materials, Inc. Method and apparatus for improving the film quality of plasma enhanced CVD films at the interface
JP2983476B2 (en) 1996-10-30 1999-11-29 キヤノン販売株式会社 Film forming method and method for manufacturing semiconductor device
US6271150B1 (en) * 1998-11-30 2001-08-07 North Carolina State University Methods of raising reflow temperature of glass alloys by thermal treatment in steam, and microelectronic structures formed thereby

Cited By (5)

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US20030118872A1 (en) * 2001-09-15 2003-06-26 Jashu Patel Methods of forming nitride films
US6929831B2 (en) * 2001-09-15 2005-08-16 Trikon Holdings Limited Methods of forming nitride films
US10441138B2 (en) 2016-07-29 2019-10-15 Plympus Winter & Ibe Gmbh Optical system and a surgical instrument with such an optical system
US11160439B2 (en) 2016-07-29 2021-11-02 Olympus Winter & Ibe Gmbh Optical system and a surgical instrument with such an optical system
US20220267903A1 (en) * 2021-02-25 2022-08-25 Asm Ip Holding B.V. Methods of forming phosphosilicate glass layers, structures formed using the methods and systems for performing the methods

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