US12493420B2 - Configuring data in power management integrated circuit based on circuit board architecture type in a display panel - Google Patents

Configuring data in power management integrated circuit based on circuit board architecture type in a display panel

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US12493420B2
US12493420B2 US17/623,561 US202117623561A US12493420B2 US 12493420 B2 US12493420 B2 US 12493420B2 US 202117623561 A US202117623561 A US 202117623561A US 12493420 B2 US12493420 B2 US 12493420B2
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pmic
architecture
board
storage module
reading
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US20240045600A1 (en
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Kai Wang
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TCL China Star Optoelectronics Technology Co Ltd
Huizhou China Star Optoelectronics Display Co Ltd
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TCL China Star Optoelectronics Technology Co Ltd
Huizhou China Star Optoelectronics Display Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0625—Power saving in storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/70—Software maintenance or management
    • G06F8/76—Adapting program code to run in a different environment; Porting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a data and architecture for configuring data in a power management integrated circuit (PMIC), and a display panel.
  • PMIC power management integrated circuit
  • a display panel driving circuit data is required to be configured in a power management integrated circuit (PMIC).
  • the configuration data of the PMIC is mainly stored in a control board flash memory of a control board (C-Board), a driving board flash memory on a driving board (X-Board), or an electrically erasable programmable read-only memory (EEPROM) on the driving board (X-Board).
  • Current display devices models mainly have two architectures, a separated architecture in which the X-Board and the C-Board are separated and a combined architecture in which the X-Board and the C-Board are combined.
  • TCON timing controller
  • TCON When the TCON is used in a different model, data of which memory (C-Board Flash, X-Board Flash, or EEPROM) is required to be selected according to an architecture type of a current model for loading, and a storage address of PMIC data in the memory is changed according to a size of the memory. Therefore, lots of modifications are required during preparation of TCON code for a different model.
  • a different type of PMIC brings a different device address and a different register address of the PMIC. Therefore, the TCON code is required to be modified accordingly. In case of a larger quantity of models, maintenance of the TCON code is complex.
  • Embodiments of the present disclosure provide a method and architecture for configuring data in a power management integrated circuit (PMIC) and a display panel, to resolve the difficulty in porting TCON code into different models.
  • PMIC power management integrated circuit
  • the embodiments of the present disclosure provide a method for configuring data in a PMIC.
  • the method includes following steps:
  • the step of reading the configuration information to determine the circuit board architecture type further includes: determining whether the circuit board architecture type is a separated architecture; and if a determination result is no, determining that the circuit board architecture type is a combined architecture.
  • the step of reading the configuration information to determine the circuit board architecture type further includes: determining whether the circuit board architecture type is a separated architecture; and if a determination result is yes, determining that the circuit board architecture type is the separated architecture.
  • the step of reading the configuration information to determine the circuit board architecture type further includes: determining a type of a driving board storage module according to driving board storage module type information in the configuration information.
  • the step of reading the configuration information to determine the circuit board architecture type further includes: checking a change of the configuration information and/or the PMIC configuration data according to a cyclic redundancy check (CRC) value in the configuration information.
  • CRC cyclic redundancy check
  • the embodiments of the present disclosure further provide an architecture for configuring data in a power management integrated circuit (PMIC).
  • the architecture includes: a circuit board; a storage module disposed on the circuit board and storing configuration information and PMIC configuration data, wherein the configuration information includes circuit board architecture type information indicating a circuit board architecture type; a reading and loading module disposed on the circuit board and electrically connected to the storage module to read the configuration information and load the PMIC configuration data; and a PMIC disposed on the circuit board and electrically connected to the reading and loading module, wherein the reading and loading module configures the PMIC configuration data to the PMIC to realize the configuration of the data in the PMIC.
  • the circuit board includes a control board and a driving board
  • the circuit board architecture type is a combined architecture or a separated architecture.
  • the combined architecture means that the control board and the driving board are combined, the storage module is a control board flash memory, and the configuration information and the PMIC configuration data are stored in at least one sector of the control board flash memory.
  • the separated architecture means that the control board and the driving board are separated, and the storage module includes a control board flash memory disposed on the control board and a driving board storage module disposed on the driving board, the reading and loading module is disposed on the control board, and the control board flash memory and the driving board storage module are electrically connected to the reading and loading module.
  • the configuration information is stored in at least one sector of the control board flash memory, the configuration information includes driving board storage module type information indicating a driving board storage module type, and the PMIC configuration data is stored in the driving board storage module.
  • the embodiments of the present disclosure further provide a display panel.
  • the display panel includes a power management integrated circuit (PMIC) and the architecture for configuring data in a PMIC as described above.
  • PMIC power management integrated circuit
  • the architecture for configuring data in a PMIC is electrically connected to the PMIC.
  • the configuration information is stored in the storage module of the circuit board, and after the circuit board is powered on, the reading and loading module reads the configuration information, determines a circuit board architecture type according to the circuit board architecture type information included in the configuration information, loads the PMIC configuration data from the storage module corresponding to the circuit board architecture, and then configures the loaded PMIC configuration data to the PMIC. Therefore, the times of rewriting reading and loading module code for architectures of different models are reduced.
  • a same configuration format is used for each reading and loading module model, facilitating porting of the storage module or the reading and loading module into different models. For different models, only the configuration information is required to be rewritten, and the reading and loading module performs corresponding actions according to the corresponding settings, facilitating the control of products.
  • FIG. 1 is a schematic diagram of a structure of a combined architecture.
  • FIG. 2 is a schematic diagram of a structure of a separated architecture.
  • FIG. 3 is a flowchart of a method for configuring data in a power management integrated circuit (PMIC) according to an exemplary embodiment of the present disclosure.
  • PMIC power management integrated circuit
  • FIG. 4 is a flowchart of a method for configuring data in a PMIC according to an exemplary embodiment of the present disclosure.
  • FIG. 5 is a flowchart of a method for configuring data in a PMIC according to an exemplary embodiment of the present disclosure.
  • Configuration architecture 110 .
  • Circuit board 111 .
  • Control board 112 .
  • Driving board 1121 .
  • Driving board storage module 120 .
  • Storage module 121 , 121 ′.
  • Driving board flash memory, 130 .
  • Reading and loading module 140 . Power management integrated circuit.
  • configuration information is stored in a storage module of a circuit board, and after the circuit board is powered on, a reading and loading module reads the configuration information, determines a circuit board architecture type according to circuit board architecture type information included in the configuration information, loads PMIC configuration data from a storage module corresponding to the circuit board architecture, and then configures the loaded PMIC configuration data to the PMIC. Therefore, the times of rewriting timing controller (TCON) code for architectures of different models are reduced.
  • TCON rewriting timing controller
  • the method for configuring data in a PMIC is applicable to a display panel, such as a thin film transistor liquid crystal display panel (TFT LCD).
  • TFT LCD thin film transistor liquid crystal display panel
  • Data is configured in a PMIC of the display panel by using the method for configuring data in a PMIC described above.
  • the display panel is applicable to a mobile terminal.
  • the mobile terminal includes a terminal body and a display panel.
  • the mobile terminal may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, or a navigator.
  • the configuration architecture 100 includes a circuit board 110 , a storage module 120 , and a reading and loading module 130 .
  • the storage module 120 is disposed on the circuit board 110 .
  • the storage module 120 stores configuration information and PMIC configuration data.
  • the configuration information includes circuit board architecture type information.
  • the reading and loading module 130 is disposed on the circuit board 110 .
  • the reading and loading module 130 is connected to the storage module 120 . After the circuit board 110 is powered on, the reading and loading module 130 reads the configuration information in the storage module 120 to determine a circuit board architecture type. After determining the circuit board architecture type, the reading and loading module 130 loads the PMIC configuration data from the corresponding storage module.
  • the PMIC 140 is disposed on the circuit board 110 and is electrically connected to the reading and loading module 130 , the reading and loading module 130 configures the loaded PMIC configuration data to the PMIC 140 , and the PMIC 140 generates, according to the received PMIC configuration data, various operating voltages required for the operation of a display panel (not shown in the figure), such as a digital operating voltage (DVDD) provided to each chip in the display panel, an analog voltage (AVDD) provided to a gamma chip and a VCOM circuit, a turn-on voltage (Vgh or Von) and a turn-off voltage (Vgl or Voff) provided to a gate of a scan driving integrated circuit, and the like.
  • DVDD digital operating voltage
  • AVDD analog voltage
  • Vgh or Von turn-on voltage
  • Vgl or Voff turn-off voltage
  • the circuit board 110 includes a control board (C-Board) and a driving board (X-Board).
  • the circuit board architecture type is a combined architecture or a separated architecture. Referring to FIG. 1 , in the combined architecture, the control board and the driving board are combined to form the circuit board 110 , the storage module 120 is a control board flash memory 121 disposed on the circuit board 110 , the PMIC configuration data is stored in the control board flash memory 121 , and the PMIC 140 is disposed on the circuit board 110 .
  • C-Board control board
  • X-Board driving board
  • the control board 111 and the driving board 112 are separated to form the circuit board 110
  • the storage module 120 includes a control board flash memory 121 ′ disposed on the control board 111 and a driving board storage module 1121 disposed on the driving board 112
  • the reading and loading module 130 is disposed on the control board 111
  • the PMIC 140 is disposed on the control board 111
  • the driving board 112 is connected to the reading and loading module 130 by the driving board storage module 1121
  • the PMIC configuration data is stored in the driving board storage module 1121 .
  • the reading and loading module 130 is a chip having a reading function and a data loading function.
  • the reading and loading module 130 is a TCON.
  • the configuration information is stored at a fixed position in the control board flash memory 121 ( 121 ′), for example, in a last sector of the control board flash memory 121 ( 121 ′).
  • the configuration information further includes type information indicating a type of the driving board storage module 1121 .
  • the type of the driving board storage module 1121 is a driving board flash memory (X-Board Flash) (not shown in the figure) or an electrically erasable programmable read-only memory (EEPROM) (not shown in the figure).
  • the reading and loading module 130 reads the type information, and determines the type of the driving board storage module.
  • a method for configuring data in a PMIC using the configuration architecture 100 provided in the embodiments includes the following steps:
  • the configuration information further includes PMIC address information and PMIC configuration data length information.
  • the reading and loading module 130 reads the PMIC address information and the PMIC configuration data length information in the configuration information, and generates corresponding PMIC configuration code. Therefore, during the configuration of the loaded configuration data to the PMIC 140 , the reading and loading module 130 may configure PMIC configuration data of a corresponding length according to the PMIC configuration code.
  • the PMIC 140 has a register 141 disposed therein, and the reading and loading module 130 configures the generated PMIC configuration code to the register 141 .
  • the configuration information further includes PMIC configuration data disable code. If the determination result of the reading and loading module 130 is yes (indicating that the architecture type is the separated architecture), the reading and loading module 130 reads the PMIC configuration data disable code in the configuration information, loads the PMIC configuration data from the control board flash memory 121 , and configures the loaded PMIC configuration data to the PMIC 140 , to complete the data configuration of the PMIC 140 .
  • second PMIC configuration data disable code is added to the configuration information. Therefore, when the circuit board architecture type is the separated architecture, the reading and loading module 130 does not load the PMIC configuration data from the driving board storage module 1121 . Instead, the reading and loading module reads the PMIC configuration data from the control board flash memory 121 , to adapt to the requirements of a different model.
  • the configuration information further includes a cyclic redundancy check (CRC) value used to reflect an information change in the configuration information.
  • CRC cyclic redundancy check
  • the configuration information mechanism is defined, so that the times of rewriting the TCON code for different models are reduced.
  • a same configuration format is used for each TCON model, facilitating porting into different models.
  • the configuration information is required to be rewritten, and the TCON performs corresponding actions according to the corresponding settings, facilitating the control of products.
  • a domain of another function selection (such as disable code) may be added to the configuration information to facilitate the maintenance of the configuration information.
  • the model information is reflected in the configuration information, and the CRC value is added to the configuration information. When there is any change in the PMIC data or the type information, the change can be reflected by the CRC value, facilitating the maintenance of the PMIC data and the type information.

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  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

A method and architecture for configuring data in a power management integrated circuit (PMIC), and a display panel are disclosed. By means of the method for configuring data, the times of rewriting reading and loading module code for architectures of different models are reduced. A same configuration format is used for each reading and loading module model, facilitating porting of the storage module or the reading and loading module into different models. For different models, only the configuration information is required to be rewritten, and the reading and loading module performs corresponding actions according to the corresponding settings, facilitating the control of products.

Description

CROSS-REFERENCE TO RELATED APPLICATION
This application is a national phase application under 35 U.S.C. § 371 of PCT Application No. PCT/CN2021/138188, filed Dec. 15, 2021, which claims priority to Chinese Application No. 202111368522.3, filed Nov. 18, 2021, the contents of which are incorporated herein by reference in their entirety.
FIELD OF INVENTION
The present disclosure relates to the field of display technologies, and in particular, to a data and architecture for configuring data in a power management integrated circuit (PMIC), and a display panel.
BACKGROUND OF INVENTION
In a display panel driving circuit, data is required to be configured in a power management integrated circuit (PMIC). The configuration data of the PMIC is mainly stored in a control board flash memory of a control board (C-Board), a driving board flash memory on a driving board (X-Board), or an electrically erasable programmable read-only memory (EEPROM) on the driving board (X-Board). Current display devices (models) mainly have two architectures, a separated architecture in which the X-Board and the C-Board are separated and a combined architecture in which the X-Board and the C-Board are combined. For the combined architecture, only a C-Board Flash is present, and a timing controller (TCON) configures data in the C-Board Flash to the PMIC. For the separated architecture, the TCON preferentially configures the data in the X-Board Flash or the X-Board EEPROM to the PMIC.
When the TCON is used in a different model, data of which memory (C-Board Flash, X-Board Flash, or EEPROM) is required to be selected according to an architecture type of a current model for loading, and a storage address of PMIC data in the memory is changed according to a size of the memory. Therefore, lots of modifications are required during preparation of TCON code for a different model. In addition, a different type of PMIC brings a different device address and a different register address of the PMIC. Therefore, the TCON code is required to be modified accordingly. In case of a larger quantity of models, maintenance of the TCON code is complex.
SUMMARY OF INVENTION Technical Problem
Embodiments of the present disclosure provide a method and architecture for configuring data in a power management integrated circuit (PMIC) and a display panel, to resolve the difficulty in porting TCON code into different models.
Technical Solution
The embodiments of the present disclosure provide a method for configuring data in a PMIC. The method includes following steps:
    • reading configuration information to determine a circuit board architecture type;
    • loading PMIC configuration data; and
    • configuring the loaded PMIC configuration data to the PMIC.
Optionally, the step of reading the configuration information to determine the circuit board architecture type further includes: determining whether the circuit board architecture type is a separated architecture; and if a determination result is no, determining that the circuit board architecture type is a combined architecture.
Optionally, the step of reading the configuration information to determine the circuit board architecture type further includes: determining whether the circuit board architecture type is a separated architecture; and if a determination result is yes, determining that the circuit board architecture type is the separated architecture.
Optionally, the step of reading the configuration information to determine the circuit board architecture type further includes: determining a type of a driving board storage module according to driving board storage module type information in the configuration information.
Optionally, the step of reading the configuration information to determine the circuit board architecture type further includes: checking a change of the configuration information and/or the PMIC configuration data according to a cyclic redundancy check (CRC) value in the configuration information.
The embodiments of the present disclosure further provide an architecture for configuring data in a power management integrated circuit (PMIC). The architecture includes: a circuit board; a storage module disposed on the circuit board and storing configuration information and PMIC configuration data, wherein the configuration information includes circuit board architecture type information indicating a circuit board architecture type; a reading and loading module disposed on the circuit board and electrically connected to the storage module to read the configuration information and load the PMIC configuration data; and a PMIC disposed on the circuit board and electrically connected to the reading and loading module, wherein the reading and loading module configures the PMIC configuration data to the PMIC to realize the configuration of the data in the PMIC.
Optionally, the circuit board includes a control board and a driving board, and the circuit board architecture type is a combined architecture or a separated architecture.
Optionally, the combined architecture means that the control board and the driving board are combined, the storage module is a control board flash memory, and the configuration information and the PMIC configuration data are stored in at least one sector of the control board flash memory.
Optionally, the separated architecture means that the control board and the driving board are separated, and the storage module includes a control board flash memory disposed on the control board and a driving board storage module disposed on the driving board, the reading and loading module is disposed on the control board, and the control board flash memory and the driving board storage module are electrically connected to the reading and loading module.
Optionally, the configuration information is stored in at least one sector of the control board flash memory, the configuration information includes driving board storage module type information indicating a driving board storage module type, and the PMIC configuration data is stored in the driving board storage module.
The embodiments of the present disclosure further provide a display panel. The display panel includes a power management integrated circuit (PMIC) and the architecture for configuring data in a PMIC as described above. The architecture for configuring data in a PMIC is electrically connected to the PMIC.
Beneficial Effects
The beneficial effects of the present disclosure are as follows: According to the method for configuring data in a PMIC that is provided, the configuration information is stored in the storage module of the circuit board, and after the circuit board is powered on, the reading and loading module reads the configuration information, determines a circuit board architecture type according to the circuit board architecture type information included in the configuration information, loads the PMIC configuration data from the storage module corresponding to the circuit board architecture, and then configures the loaded PMIC configuration data to the PMIC. Therefore, the times of rewriting reading and loading module code for architectures of different models are reduced. A same configuration format is used for each reading and loading module model, facilitating porting of the storage module or the reading and loading module into different models. For different models, only the configuration information is required to be rewritten, and the reading and loading module performs corresponding actions according to the corresponding settings, facilitating the control of products.
BRIEF DESCRIPTION OF DRAWINGS
The following describes specific implementations of the present disclosure in detail with reference to the accompanying drawings, so as to make the technical solutions and other beneficial effects of the present disclosure obvious.
FIG. 1 is a schematic diagram of a structure of a combined architecture.
FIG. 2 is a schematic diagram of a structure of a separated architecture.
FIG. 3 is a flowchart of a method for configuring data in a power management integrated circuit (PMIC) according to an exemplary embodiment of the present disclosure.
FIG. 4 is a flowchart of a method for configuring data in a PMIC according to an exemplary embodiment of the present disclosure.
FIG. 5 is a flowchart of a method for configuring data in a PMIC according to an exemplary embodiment of the present disclosure.
The component numbers in the figure are as follows:
100. Configuration architecture, 110. Circuit board, 111. Control board, 112. Driving board, 1121. Driving board storage module, 120. Storage module, 121, 121′. Driving board flash memory, 130. Reading and loading module, 140. Power management integrated circuit.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS
The following clearly and completely describes the technical solutions in the embodiments of the present disclosure with reference to the accompanying drawings in the embodiments of the present disclosure. Apparently, the described embodiments are merely a part rather than all of the embodiments of the present disclosure. All other embodiments obtained by a person skilled in the art based on the embodiments of the present disclosure without creative efforts shall fall within the protection scope of the present disclosure.
According to a method for configuring data in a PMIC, configuration information is stored in a storage module of a circuit board, and after the circuit board is powered on, a reading and loading module reads the configuration information, determines a circuit board architecture type according to circuit board architecture type information included in the configuration information, loads PMIC configuration data from a storage module corresponding to the circuit board architecture, and then configures the loaded PMIC configuration data to the PMIC. Therefore, the times of rewriting timing controller (TCON) code for architectures of different models are reduced. A same configuration format is used for each TCON model, facilitating porting of the storage module or a TCON into different models. For different models, only the configuration information is required to be rewritten, and the TCON performs corresponding actions according to the corresponding settings, facilitating the control of products. As a typical application, the method for configuring data in a PMIC is applicable to a display panel, such as a thin film transistor liquid crystal display panel (TFT LCD). Data is configured in a PMIC of the display panel by using the method for configuring data in a PMIC described above. The display panel is applicable to a mobile terminal. The mobile terminal includes a terminal body and a display panel. The mobile terminal may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, or a navigator.
In an embodiment of the present disclosure, the configuration architecture 100 includes a circuit board 110, a storage module 120, and a reading and loading module 130. The storage module 120 is disposed on the circuit board 110. The storage module 120 stores configuration information and PMIC configuration data. The configuration information includes circuit board architecture type information. The reading and loading module 130 is disposed on the circuit board 110. The reading and loading module 130 is connected to the storage module 120. After the circuit board 110 is powered on, the reading and loading module 130 reads the configuration information in the storage module 120 to determine a circuit board architecture type. After determining the circuit board architecture type, the reading and loading module 130 loads the PMIC configuration data from the corresponding storage module.
During data configuration of a PMIC 140, the PMIC 140 is disposed on the circuit board 110 and is electrically connected to the reading and loading module 130, the reading and loading module 130 configures the loaded PMIC configuration data to the PMIC 140, and the PMIC 140 generates, according to the received PMIC configuration data, various operating voltages required for the operation of a display panel (not shown in the figure), such as a digital operating voltage (DVDD) provided to each chip in the display panel, an analog voltage (AVDD) provided to a gamma chip and a VCOM circuit, a turn-on voltage (Vgh or Von) and a turn-off voltage (Vgl or Voff) provided to a gate of a scan driving integrated circuit, and the like.
In some embodiments, the circuit board 110 includes a control board (C-Board) and a driving board (X-Board). The circuit board architecture type is a combined architecture or a separated architecture. Referring to FIG. 1 , in the combined architecture, the control board and the driving board are combined to form the circuit board 110, the storage module 120 is a control board flash memory 121 disposed on the circuit board 110, the PMIC configuration data is stored in the control board flash memory 121, and the PMIC 140 is disposed on the circuit board 110. Referring to FIG. 2 , in the separated architecture, the control board 111 and the driving board 112 are separated to form the circuit board 110, the storage module 120 includes a control board flash memory 121′ disposed on the control board 111 and a driving board storage module 1121 disposed on the driving board 112, the reading and loading module 130 is disposed on the control board 111, the PMIC 140 is disposed on the control board 111, the driving board 112 is connected to the reading and loading module 130 by the driving board storage module 1121, and the PMIC configuration data is stored in the driving board storage module 1121.
The reading and loading module 130 is a chip having a reading function and a data loading function. In the present embodiment, the reading and loading module 130 is a TCON.
In detail, the configuration information is stored at a fixed position in the control board flash memory 121 (121′), for example, in a last sector of the control board flash memory 121 (121′). The configuration information further includes type information indicating a type of the driving board storage module 1121. The type of the driving board storage module 1121 is a driving board flash memory (X-Board Flash) (not shown in the figure) or an electrically erasable programmable read-only memory (EEPROM) (not shown in the figure). The reading and loading module 130 reads the type information, and determines the type of the driving board storage module.
Referring to FIG. 3 , a method for configuring data in a PMIC using the configuration architecture 100 provided in the embodiments includes the following steps:
    • causing the circuit board 110 to be powered on;
    • reading, by the reading and loading module 130, circuit board architecture type information in configuration information in the control board flash memory 121;
    • determining, by the reading and loading module 130, whether the circuit board architecture is a separated architecture according to the circuit board architecture type information;
    • if a determination result of the reading and loading module 130 is no (indicating that the circuit board architecture type is a combined architecture), loading, by the reading and loading module 130, PMIC configuration data from the control board flash memory 121;
    • configuring, by the reading and loading module 130, the loaded PMIC configuration data to the PMIC 140; and
    • completing the data configuration of the PMIC 140; or
    • if the determination result of the reading and loading module 130 is yes (indicating that the architecture type is the separated architecture), reading, by the reading and loading module 130, driving board storage module type information in the configuration information to determine a driving board storage module type;
    • if the reading and loading module 130 determines that the driving board storage module type is a driving board flash memory, loading, by the reading and loading module 130, second PMIC configuration data from the driving board flash memory by using a serial peripheral interface (SPI) bus;
    • configuring, by the reading and loading module 130, the loaded second PMIC configuration data to the PMIC 140; and
    • completing the data configuration of the PMIC 140; or
    • if the reading and loading module 130 determines that the driving board storage module type is an EEPROM, loading, by the reading and loading module 130, the second PMIC configuration data from the EEPROM by using an I2C bus;
    • configuring, by the reading and loading module 130, the loaded second PMIC configuration data to the PMIC 140; and
    • completing the data configuration of the PMIC 140.
As an improvement, referring to FIG. 4 , the configuration information further includes PMIC address information and PMIC configuration data length information. The reading and loading module 130 reads the PMIC address information and the PMIC configuration data length information in the configuration information, and generates corresponding PMIC configuration code. Therefore, during the configuration of the loaded configuration data to the PMIC 140, the reading and loading module 130 may configure PMIC configuration data of a corresponding length according to the PMIC configuration code. The PMIC 140 has a register 141 disposed therein, and the reading and loading module 130 configures the generated PMIC configuration code to the register 141.
As another improvement, referring to FIG. 5 , the configuration information further includes PMIC configuration data disable code. If the determination result of the reading and loading module 130 is yes (indicating that the architecture type is the separated architecture), the reading and loading module 130 reads the PMIC configuration data disable code in the configuration information, loads the PMIC configuration data from the control board flash memory 121, and configures the loaded PMIC configuration data to the PMIC 140, to complete the data configuration of the PMIC 140. In the present embodiment, second PMIC configuration data disable code is added to the configuration information. Therefore, when the circuit board architecture type is the separated architecture, the reading and loading module 130 does not load the PMIC configuration data from the driving board storage module 1121. Instead, the reading and loading module reads the PMIC configuration data from the control board flash memory 121, to adapt to the requirements of a different model.
As a preferred manner, the configuration information further includes a cyclic redundancy check (CRC) value used to reflect an information change in the configuration information. When the configuration information and/or the PMIC configuration data is changed, the change may be reflected by the CRC value.
According to the method and architecture for configuring data in a PMIC provided in the present disclosure, the configuration information mechanism is defined, so that the times of rewriting the TCON code for different models are reduced. A same configuration format is used for each TCON model, facilitating porting into different models. For different models, only the configuration information is required to be rewritten, and the TCON performs corresponding actions according to the corresponding settings, facilitating the control of products. A domain of another function selection (such as disable code) may be added to the configuration information to facilitate the maintenance of the configuration information. The model information is reflected in the configuration information, and the CRC value is added to the configuration information. When there is any change in the PMIC data or the type information, the change can be reflected by the CRC value, facilitating the maintenance of the PMIC data and the type information.
In conclusion, although the present application has been disclosed as above in preferred embodiments, the above preferred embodiments are not intended to limit the present application. Those of ordinary skill in the art can make various decisions without departing from the spirit and the scope of the present application. Therefore, the protection scope of the present application is subject to the scope defined by the claims.

Claims (16)

What is claimed is:
1. A method for configuring data in a power management integrated circuit (PMIC), comprising following steps:
reading, by a reading and loading integrated circuit, configuration information from a storage module to determine an architecture type of a circuit board, wherein the configuration information comprises circuit board architecture type information indicating the circuit board is a combined architecture or a separated architecture;
loading, by the reading and loading integrated circuit, PMIC configuration data according to the architecture type; and
configuring the loaded PMIC configuration data to the PMIC; and
generating according to the PMIC configuration data, various operating voltages required for operation of a display panel;
wherein the reading and loading integrated circuit is a timing controller;
wherein the configuration information is stored at a fixed position in the storage module.
2. The method for configuring data in a PMIC as claimed in claim 1, wherein
the step of reading the configuration information to determine the architecture type of the circuit board further comprises following steps:
determining whether the circuit board is the separated architecture according to the circuit board architecture type information; and
if a determination result is no, determining that the circuit board is the combined architecture.
3. The method for configuring data in a PMIC as claimed in claim 2, wherein
the step of reading the configuration information to determine the architecture type of the circuit board further comprises following steps:
determining whether the circuit board is the separated architecture according to the circuit board architecture type information; and
if a determination result is yes, determining that the circuit board is the separated architecture.
4. The method for configuring data in a PMIC as claimed in claim 3, wherein
the step of reading the configuration information to determine the architecture type of the circuit board further comprises a following step:
determining a type of a driving board storage module according to driving board storage module type information in the configuration information.
5. The method for configuring data in a PMIC as claimed in claim 4, wherein
the step of reading the configuration information to determine the architecture type of the circuit board further comprises a following step:
checking a change of the configuration information or the PMIC configuration data according to a cyclic redundancy check (CRC) value in the configuration information.
6. An architecture for configuring data in a power management integrated circuit (PMIC), the architecture comprising:
a circuit board comprising a control board and a driving board;
a storage module disposed on the circuit board and storing configuration information and PMIC configuration data, wherein the configuration information comprises circuit board architecture type information indicating the circuit board is a combined architecture or a separated architecture; and
a reading and loading integrated circuit disposed on the circuit board and electrically connected to the storage module to read the configuration information and load the PMIC configuration data according to the architecture type;
wherein the PMIC generates according to the PMIC configuration data, various operating voltages required for operation of a display panel;
wherein the reading and loading integrated circuit is a timing controller;
wherein the configuration information is stored at a fixed position in the storage module.
7. The architecture for configuring data in a PMIC as claimed in claim 6, wherein the combined architecture means that the control board and the driving board are combined, the storage module is a control board flash memory, and the configuration information and the PMIC configuration data are stored in at least one sector of the control board flash memory.
8. The architecture for configuring data in a PMIC as claimed in claim 6, wherein
the separated architecture means that the control board and the driving board are separated;
and
the storage module comprises a control board flash memory disposed on the control board and a driving board storage module disposed on the driving board, the reading and loading integrated circuit is disposed on the control board, and the control board flash memory and driving board storage module are electrically connected to the reading and loading integrated circuit.
9. The architecture for configuring data in a PMIC as claimed in claim 8, wherein the configuration information is stored in at least one sector of the control board flash memory;
the configuration information comprises driving board storage module type information indicating a driving board storage module type; and
the PMIC configuration data is stored in the driving board storage module.
10. The architecture for configuring data in a PMIC as claimed in claim 9, wherein the driving board storage module type comprises a driving board flash memory and an electrically erasable programmable read-only memory.
11. A display panel, comprising a power management integrated circuit (PMIC) and an architecture for configuring data in a PMIC, wherein the architecture for configuring data in a PMIC is electrically connected to the PMIC and comprises:
a circuit board comprising a control board and a driving board;
a storage module disposed on the circuit board and storing configuration information and PMIC configuration data, wherein the configuration information comprises circuit board architecture type information indicating the circuit board is a combined architecture or a separated architecture; and
a reading and loading integrated circuit disposed on the circuit board and electrically connected to the storage module to read the configuration information and load the PMIC configuration data according to the architecture type, wherein
the PMIC is disposed on the circuit board, and the reading and loading integrated circuit is electrically connected to the PMIC;
wherein the PMIC generates according to the PMIC configuration data, various operating voltages required for operation of the display panel;
wherein the reading and loading integrated circuit is a timing controller;
wherein the configuration information is stored at a fixed position in the storage module.
12. The display panel according to claim 11, wherein a register is disposed in the PMIC, and the reading and loading integrated circuit configures the loaded PMIC configuration data to the register.
13. The display panel according to claim 11, wherein the combined architecture means that the control board and the driving board are combined, the storage module is a control board flash memory, and the configuration information and the PMIC configuration data are stored in at least one sector of the control board flash memory.
14. The display panel according to claim 11, wherein
the separated architecture means that the control board and the driving board are separated; the storage module comprises a control board flash memory disposed on the control board and a driving board storage module disposed on the driving board, the reading and loading integrated circuit is disposed on the control board, and the control board flash memory and the driving board storage module are electrically connected to the reading and loading integrated circuit; and
the PMIC is disposed on the control board.
15. The display panel according to claim 14, wherein
the configuration information is stored in at least one sector of the control board flash memory;
the configuration information comprises driving board storage module type information indicating a driving board storage module type; and
the PMIC configuration data is stored in the driving board storage module.
16. The display panel according to claim 15, wherein the driving board storage module type comprises a driving board flash memory and an electrically erasable programmable read-only memory.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114141966B (en) * 2021-11-18 2024-12-10 惠州华星光电显示有限公司 OLED display panel and OLED display device
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Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101154247A (en) 2006-09-29 2008-04-02 富士通株式会社 Circuit board information acquisition and conversion method, program and device
US20090303227A1 (en) * 2008-06-04 2009-12-10 Lg Display Co., Ltd. Video display capable of compensating for display defects
US20120057082A1 (en) * 2009-02-16 2012-03-08 Manufacturing Resources International, Inc. System and Method for Remotely Identifying Display Components
CN103927566A (en) 2014-03-24 2014-07-16 上海真灼电子技术有限公司 Embedded RFID read-write device, monitoring system and monitoring method
CN107680554A (en) 2017-11-22 2018-02-09 深圳市华星光电技术有限公司 Display device drive system and method
US20180322848A1 (en) * 2017-05-03 2018-11-08 Innolux Corporation Display device
CN109712555A (en) 2019-02-25 2019-05-03 合肥京东方显示技术有限公司 Control circuit board, additional circuit boards and display device
US20190346818A1 (en) 2018-05-11 2019-11-14 Wiwynn Corporation Method for configuring input and output interfaces, i/o interface configuration device and control system
CN110890076A (en) 2019-11-25 2020-03-17 Tcl华星光电技术有限公司 Display panel drive system
US20200103998A1 (en) 2018-09-27 2020-04-02 Hefei Xinsheng Optoelectronics Technology Co., Ltd. Circuit board, display control device and display device
CN111786872A (en) 2020-06-29 2020-10-16 北京天融信网络安全技术有限公司 Data processing method and device for VPN (virtual private network) equipment
CN112086078A (en) 2020-09-18 2020-12-15 Tcl华星光电技术有限公司 Data protection device and method for driving circuit
US20210065641A1 (en) * 2019-07-29 2021-03-04 Shenzhen China Star Optoelectronics Technology Co., Ltd. Application method of demura data having uniform format
WO2021072806A1 (en) 2019-10-18 2021-04-22 深圳市华星光电技术有限公司 Display panel driving device and configuration method therefor
US20210200181A1 (en) * 2019-12-27 2021-07-01 Fanuc Corporation Components, controller, and industrial machine
WO2021208782A1 (en) 2020-04-14 2021-10-21 咸阳彩虹光电科技有限公司 Liquid crystal display panel drive apparatus and liquid crystal display apparatus

Patent Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101154247A (en) 2006-09-29 2008-04-02 富士通株式会社 Circuit board information acquisition and conversion method, program and device
US20090303227A1 (en) * 2008-06-04 2009-12-10 Lg Display Co., Ltd. Video display capable of compensating for display defects
US20120057082A1 (en) * 2009-02-16 2012-03-08 Manufacturing Resources International, Inc. System and Method for Remotely Identifying Display Components
CN103927566A (en) 2014-03-24 2014-07-16 上海真灼电子技术有限公司 Embedded RFID read-write device, monitoring system and monitoring method
US20180322848A1 (en) * 2017-05-03 2018-11-08 Innolux Corporation Display device
CN107680554A (en) 2017-11-22 2018-02-09 深圳市华星光电技术有限公司 Display device drive system and method
CN110471811A (en) 2018-05-11 2019-11-19 纬颖科技服务股份有限公司 One is applied to the control system of input/output interface configuration
US20190346818A1 (en) 2018-05-11 2019-11-14 Wiwynn Corporation Method for configuring input and output interfaces, i/o interface configuration device and control system
US20200103998A1 (en) 2018-09-27 2020-04-02 Hefei Xinsheng Optoelectronics Technology Co., Ltd. Circuit board, display control device and display device
CN109712555A (en) 2019-02-25 2019-05-03 合肥京东方显示技术有限公司 Control circuit board, additional circuit boards and display device
US20210065641A1 (en) * 2019-07-29 2021-03-04 Shenzhen China Star Optoelectronics Technology Co., Ltd. Application method of demura data having uniform format
WO2021072806A1 (en) 2019-10-18 2021-04-22 深圳市华星光电技术有限公司 Display panel driving device and configuration method therefor
CN110890076A (en) 2019-11-25 2020-03-17 Tcl华星光电技术有限公司 Display panel drive system
US20210335205A1 (en) * 2019-11-25 2021-10-28 Tcl China Star Optoelectronics Technology Co., Ltd. Display panel driving system and display device
US20210200181A1 (en) * 2019-12-27 2021-07-01 Fanuc Corporation Components, controller, and industrial machine
WO2021208782A1 (en) 2020-04-14 2021-10-21 咸阳彩虹光电科技有限公司 Liquid crystal display panel drive apparatus and liquid crystal display apparatus
CN111786872A (en) 2020-06-29 2020-10-16 北京天融信网络安全技术有限公司 Data processing method and device for VPN (virtual private network) equipment
CN112086078A (en) 2020-09-18 2020-12-15 Tcl华星光电技术有限公司 Data protection device and method for driving circuit

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
Chinese Office Action issued in corresponding Chinese Patent Application No. 202111368522.3 dated Jan. 30, 2024, pp. 1-8.
International Search Report in International application No. PCT/CN2021/138188, mailed on Aug. 16, 2022.
Written Opinion of the International Search Authority in International application No. PCT/CN2021/138188, mailed on Aug. 16, 2022.
Chinese Office Action issued in corresponding Chinese Patent Application No. 202111368522.3 dated Jan. 30, 2024, pp. 1-8.
International Search Report in International application No. PCT/CN2021/138188, mailed on Aug. 16, 2022.
Written Opinion of the International Search Authority in International application No. PCT/CN2021/138188, mailed on Aug. 16, 2022.

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