US11493969B2 - Information processing apparatus, controlling method thereof, and program - Google Patents

Information processing apparatus, controlling method thereof, and program Download PDF

Info

Publication number
US11493969B2
US11493969B2 US16/716,215 US201916716215A US11493969B2 US 11493969 B2 US11493969 B2 US 11493969B2 US 201916716215 A US201916716215 A US 201916716215A US 11493969 B2 US11493969 B2 US 11493969B2
Authority
US
United States
Prior art keywords
power
power source
voltage
switch
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US16/716,215
Other versions
US20200201406A1 (en
Inventor
Ryotaro Okuzono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Assigned to CANON KABUSHIKI KAISHA reassignment CANON KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: OKUZONO, RYOTARO
Publication of US20200201406A1 publication Critical patent/US20200201406A1/en
Application granted granted Critical
Publication of US11493969B2 publication Critical patent/US11493969B2/en
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters

Definitions

  • the present disclosure relates to an information processing apparatus, a controlling method thereof, and a program.
  • An information processing apparatus such as a multi function peripheral (MFP) includes a power source switch for switching on or off a power source of the apparatus, and, when a user operates the power source switch, supply of power to the apparatus is started or stopped.
  • MFP multi function peripheral
  • Japanese Patent Laid-Open No. 2012-115995 discloses that a power source switch and a DCDC converter are arranged on an identical power source line.
  • the power source switch 35 In a case where the power source switch 35 is on, power is supplied to a DCDC converter 31 from an AC adapter 2 via the power source switch 35 . Meanwhile, in a case where the power source switch is off, power is supplied to the power source switch 35 from the AC adapter 2 , but supply of power to the DCDC converter 31 is stopped.
  • a minimum load current is defined to guarantee switching on/off operation, and, in order to cause the minimum load current to flow when the power source switch is turned on, it is necessary to supply power even in a state in which the power source is off.
  • An information processing apparatus disclosed in the present disclosure includes, a first converter configured to convert AC power to DC power of a first voltage, a power source switch operated by a user, a second converter configured to, after the power source switch is switched on, convert the DC power of the first voltage converted by the first converter to DC power of a second voltage lower than the first voltage, and a first power source controlling unit configured to change, from either the first converter or the second converter, power supplied to the power source switch, in accordance with a state of a power source of the information processing apparatus.
  • FIG. 1 is a schematic diagram showing an information processing apparatus according to an embodiment of the present disclosure.
  • FIG. 2 is a block diagram showing an internal configuration of a controller unit according to an embodiment of the present disclosure.
  • FIG. 3 is a block diagram showing an internal configuration of a power-source-switch power supply unit and a controller power supply unit according to an embodiment of the present disclosure.
  • FIG. 4 is a timing chart showing operation of a power-source-switch power supply unit and a controller power supply unit at the time of starting up the information processing apparatus according to an embodiment of the present disclosure.
  • FIG. 5 is a timing chart showing operation of a power-source-switch power supply unit and a controller power supply unit at the time of turning off a power source of the information processing apparatus according to an embodiment of the present disclosure.
  • an MFP will be exemplified as an information processing apparatus.
  • the information processing apparatus is not limited to the MFP and may be an information processing apparatus such as an SFP or a PC.
  • FIG. 1 is a schematic diagram showing a configuration of an MFP 100 in this embodiment.
  • the MFP 100 includes a controller unit 101 , an AC plug 102 , a power source unit 103 , a power source switch 104 , an operation unit 105 , and a power supply unit 106 .
  • the MFP 100 further includes a scanner unit 107 and a printer unit 108 .
  • the controller unit 101 is connected to the power source unit 103 , the power source switch 104 , the operation unit 105 , the power supply unit 106 , the scanner unit 107 , and the printer unit 108 .
  • the AC plug 102 is connected to the power source unit 103 .
  • the MFP 100 can execute various processes such as a scanning process and a print process.
  • the controller unit 101 comprehensively controls the whole MFP 100 .
  • the AC plug 102 is inserted into an external outlet serving as a power source.
  • Commercial AC power is supplied to the power source unit 103 from the external outlet via the AC plug 102 .
  • the power source unit 103 converts AC power supplied from the external outlet to DC power and supplies the power to the controller unit 101 and the power supply unit 106 .
  • the power source switch 104 is a switch for allowing a user to control start-up and stop of the MFP 100 .
  • the power source switch 104 is, for example, a rocker switch that physically maintains a state showing start-up or stop of the MFP 100 . Note that, in this embodiment, power is supplied to the power source switch 104 and the operation unit 105 via the controller unit 101 .
  • the power source switch 104 notifies the controller unit 101 that the MFP 100 is in an activated state (on state) or a shutdown state (off state).
  • the operation unit 105 includes a display unit and an operation key (not shown) and accepts an instruction to execute each process input from the user.
  • the scanner unit 107 reads a document placed on a platen (not shown) and generates image data.
  • the printer unit 108 prints on a sheet of paper on the basis of image data or the like generated in the scanner unit 107 .
  • the power supply unit 106 supplies power supplied from the power source unit 103 to the scanner unit 107 and the printer unit 108 . Whether or not the power supply unit 106 supplies power to the printer unit 108 and the scanner unit 107 is controlled by a CPU 204 of the controller unit 101 .
  • FIG. 2 is a block diagram schematically showing an internal configuration of the controller unit 101 in FIG. 1 .
  • the controller unit 101 includes a controller power supply unit 201 , a voltage conversion unit 202 , a power-source-switch power supply unit 203 , the CPU 204 , a memory 205 , an HDD 206 , and an image processing unit 207 .
  • the controller power supply unit 201 monitors a state of the power source switch 104 and, when the power source switch is changed from the off state to the on state, supplies DC power supplied from the power source unit 103 to the voltage conversion unit 202 . Because DC power is supplied to the voltage conversion unit 202 from the power source unit 103 , the CPU 204 starts to execute a start-up program and executes a start-up process of the MFP 100 . As described above, the controller power supply unit 201 controls power to be supplied to a control unit including a CPU, a memory, a DHH, and the like.
  • the voltage conversion unit 202 converts a voltage of DC power supplied from the controller power supply unit 201 to a voltage to be supplied to the CPU 204 , the memory 205 , the HDD 206 , the image processing unit 207 , and the power-source-switch power supply unit 203 .
  • DC power output by the voltage conversion unit 202 is supplied to the CPU 204 , the memory 205 , the HDD 206 , the image processing unit 207 , and the power-source-switch power supply unit 203 .
  • the voltage conversion unit 202 converts DC power supplied from the power source unit 103 to DC power having a voltage lower than that of the above-mentioned DC power and outputs the converted DC power.
  • the power-source-switch power supply unit 203 is connected to the power source unit 103 , the power source switch 104 , and the voltage conversion unit 202 .
  • the power-source-switch power supply unit 203 supplies DC power supplied from the power source unit 103 or DC power supplied from the voltage conversion unit 202 to the power source switch 104 .
  • the power-source-switch power supply unit 203 controls power to be supplied to the power source switch. Operation of the power-source-switch power supply unit 203 will be described below with reference to FIG. 3 .
  • the CPU 204 is connected to the operation unit 105 , the power supply unit 106 , the memory 205 , the HDD 206 , and the image processing unit 207 .
  • the CPU 204 executes programs stored on the HDD 206 and performs various kinds of control.
  • the CPU 204 controls whether to supply power to the printer unit 108 and the scanner unit 107 from the power supply unit 106 . For example, in a case where the MFP 100 transitions to a sleep mode that consumes less power than a standby mode while maintaining the power source switch 104 in an on state, the CPU 204 instructs the power supply unit 106 to stop supply of power to the printer unit 108 and the scanner unit 107 . With this, it is possible to restrain power consumption of the MFP 100 in the sleep mode.
  • the voltage conversion unit 202 generates DC power
  • the power-source-switch power supply unit 203 supplies DC power output by the voltage conversion unit 202 to the power source switch 104 .
  • the memory 205 is a volatile memory and is a main memory that stores data or the like generated by execution of each program of the CPU 204 .
  • the HDD 206 stores the programs executed by the CPU 204 , setting information regarding the MFP 100 , and the like.
  • the image processing unit 207 performs image processing such as color space conversion with respect to image data generated in the scanner unit 107 and outputs the converted image data to the printer unit 108 .
  • DC power output from the voltage conversion unit 202 is supplied to the CPU 204 .
  • the CPU 204 reads a program stored on the HDD 206 , executes the program, and starts a start-up process of the MFP 100 .
  • FIG. 3 is a block diagram showing an internal configuration of the power-source-switch power supply unit 203 and the controller power supply unit 201 in FIG. 2 .
  • the power-source-switch power supply unit 203 includes an FET 301 , a transistor 302 , a digital transistor 303 , and diodes 310 and 311 .
  • the FET 301 is a switching element that switches whether to supply DC power supplied from the power source unit 103 to the power source switch 104 .
  • a source terminal of the FET 301 is a terminal to which DC power 309 supplied from the power source unit 103 is supplied.
  • a gate terminal of the FET 301 is connected to a collector terminal of the transistor 302 . That is, the FET 301 is switched on/off in accordance with on/off operation of the transistor 302 .
  • a drain terminal of the FET 301 is connected to the power source switch 104 via the diode 310 .
  • the FET 301 is turned on when a potential difference between the gate and the source is equal to or more than a threshold value.
  • the FET 301 is a p-channel power MOSFET in this embodiment.
  • a base terminal of the transistor 302 is connected to a collector terminal of the digital transistor 303 .
  • the collector terminal thereof is connected to the gate terminal of the FET 301 .
  • An emitter terminal thereof is grounded.
  • the transistor 302 is turned on when a voltage applied to the base is equal to or more than a threshold value.
  • the transistor 302 is switched on/off in accordance with on/off operation of the digital transistor 303 .
  • a base terminal of the digital transistor 303 is connected to DC power 308 supplied from the voltage conversion unit 202 .
  • the collector terminal thereof is connected to the base terminal of the transistor 302 .
  • An emitter terminal thereof is grounded.
  • the digital transistor 303 is turned on when a voltage applied to the base is equal to or more than a threshold value. That is, the digital transistor 303 is switched on/off on the basis of a change in output from the voltage conversion unit 202 .
  • the gate terminal of the FET 301 and the base terminal of the transistor 302 are subjected to a pull-up process by using the DC power 309 supplied from the power source unit 103 .
  • DC power 306 of the power source switch 104 is connected to the drain terminal of the FET 301 via the diode 310 and is also connected to the DC power 308 supplied from the voltage conversion unit 202 via the diode 311 .
  • the controller power supply unit 201 includes an FET 304 , a digital transistor 305 , and a load resistor 312 .
  • the FET 304 is a switching element that switches whether to supply the DC power 309 supplied from the power source unit 103 to the voltage conversion unit 202 .
  • a source terminal of the FET 304 is connected to the DC power 309 supplied from the power source unit 103 .
  • a gate terminal of the FET 304 is connected to a collector terminal of the digital transistor 305 , and a drain terminal thereof is connected to the voltage conversion unit 202 . That is, the FET 304 is switched on/off on the basis of switching on/off of the digital transistor 305 .
  • the FET 304 is a p-channel power MOSFET in this embodiment.
  • a base terminal of the digital transistor 305 is connected to a power source switch signal 307 supplied from the power source switch 104 .
  • a collector terminal thereof is connected to the gate terminal of the FET 304 .
  • An emitter terminal thereof is grounded.
  • the digital transistor 305 is switched on/off on the basis of a signal input from the power source switch 104 via the power source switch signal 307 . In this embodiment, in a case where the power source switch 104 is turned on and the power source switch signal 307 is H (High), the digital transistor 305 is turned on.
  • the gate terminal of the FET 304 is subjected to a pull-up process by using the DC power 309 supplied from the power source unit 103 .
  • the load resistor 312 is a load resistor for causing a necessary minimum load current to flow to the power source switch 104 .
  • FIG. 4 is a timing chart showing processes of the power-source-switch power supply unit 203 and the controller power supply unit 201 at the time of turning on the power source switch.
  • the power source switch Before the AC plug is inserted into the external outlet, the power source switch is in an off state, and all the FET 301 , the transistor 302 , and the digital transistor 303 of the power-source-switch power supply unit 203 are in an off state. Further, the FET 304 and the digital transistor 305 of the controller power supply unit 201 are also in an off state.
  • the power source unit 103 converts the AC power to DC power and starts to output the DC power 309 (t 1 ).
  • the DC power is applied to the base terminal of the transistor 302 of the power-source-switch power supply unit 203 , and the transistor 302 is switched from the off state to an on state.
  • the transistor 302 becomes the on state and a current flows between the collector and the emitter of the transistor 302 , a potential difference is generated between the source and the gate of the FET 301 , and the FET 301 is switched from the off state to an on state (t 2 ).
  • the DC power 309 output from the power source unit 103 is input to the power source switch 104 via the diode 310 and the DC power 306 .
  • the collector terminal of the digital transistor 303 maintains the off state. Further, the FET 304 and the digital transistor 305 of the controller power supply unit 201 also maintain the off state.
  • the DC power 309 output by the power source unit 103 is applied to the power source switch 104 .
  • the user changes the state of the power source switch 104 to an on state.
  • the DC power 306 output from the power source unit 103 is input to the power source switch signal 307 via the power source switch 104 .
  • a power source voltage input to the power source switch signal 307 is applied to the base terminal of the digital transistor, and the digital transistor 305 is switched to an on state (t 4 ).
  • the digital transistor 305 When the digital transistor 305 is switched to the on state, a potential difference is generated between the source terminal and the gate terminal of the FET 304 , and the FET 304 is switched to an on state (t 5 ).
  • the FET 304 becomes the on state, the DC power 309 output from the power source unit 103 is supplied to the voltage conversion unit 202 via the FET 304 .
  • the voltage conversion unit 202 outputs the DC power 308 having a voltage lower than that of the DC power 309 supplied from the power source unit 103 .
  • the DC power 308 is supplied to the CPU 204 , the memory 205 , the HDD 206 , the image processing unit 207 , and the like. Further, the DC power 308 is applied to the base terminal of the digital transistor 303 of the power-source-switch power supply unit 203 . Because of application of the DC power 308 , the digital transistor 303 is changed to an on state (t 7 ).
  • a base potential of the transistor 302 is reduced, and the transistor 302 becomes the off state (t 8 ).
  • the transistor 302 becomes the off state no potential difference is generated between the source terminal and the gate terminal of the FET 301 , and the FET 301 becomes the off state (t 9 ).
  • the FET 301 becomes the off state supply of the DC power 309 output from the power source unit 103 to the power source switch 104 is stopped.
  • FIG. 5 is a timing chart showing operation of the power-source-switch power supply unit 203 and the controller power supply unit 201 at the time of plugging out the power source in this embodiment.
  • the power source switch 104 In a case where the power source switch 104 is in the on state, the FET 301 and the transistor 302 of the power-source-switch power supply unit 203 are off and the digital transistor 303 thereof is on. Meanwhile, both the digital transistor 305 and the FET 304 of the controller power supply unit 201 are on.
  • the user turns off the power source switch 104 .
  • a voltage of the power source switch signal 307 is reduced, and the digital transistor 305 becomes the off state (t 11 ).
  • the digital transistor 305 transitions to the off state, a potential difference between the source and the drain of the FET 304 is reduced, and the FET 304 becomes the off state (t 12 ).
  • the FET 304 becomes the off state
  • DC power is not supplied to the voltage conversion unit 202 , and the DC power 308 is reduced.
  • the digital transistor 303 transitions to the off state (t 13 ).
  • the transistor 302 becomes the on state (t 14 ).
  • the transistor 302 is turned on, a potential difference is generated between the source and the drain of the FET 301 , and the FET 301 is turned on (t 15 ).
  • the DC power 309 output by the power source unit 103 is supplied to the DC power 306 of the power source switch 104 .
  • a source of supply of power to the power source switch 104 is changed between when the power source switch is in the on state and when the power source switch 104 is in the off state, and when the power source is on, power is supplied to the power source switch at a lower voltage.
  • the power source switch is in the on state.
  • the DC power 309 is 12 V
  • the DC power 308 is 5 V
  • the minimum load current of the power source switch 104 is 1 mA
  • 12 mW is consumed if DC power supplied to the power source switch 104 is not switched and the DC power 309 is continuously supplied.
  • DC power supplied to the power source switch 104 is switched and the DC power 308 is supplied, 5 mW is consumed.
  • DC power to be supplied to the power source switch 104 is switched between DC power output by the power source unit and DC power output by the voltage conversion unit by using a voltage of DC power output by the voltage conversion unit.
  • the CPU 204 may control the power-source-switch power supply unit 203 after supply of power to the CPU 204 is started.
  • the CPU 204 may execute a start-up program of the MFP 100 and perform control so that power to be supplied to the power source switch 104 is switched from the DC power 309 output from the power source unit 103 to the DC power 308 output from the voltage conversion unit 202 .
  • an interrupt signal may be input to the CPU 204 in response to transition of the state of the power source switch 104 to the on state, and the CPU 204 may switch a path of supply of power to the power source switch 104 on the basis of the interrupt signal.
  • the present disclosure is also achieved by executing the following process.
  • the following process is such that software (program) that achieves a function of the above-mentioned embodiment is supplied to a system or an apparatus via a network or various storage media, and a computer (or CPU, MPU, or the like) of the system or the apparatus reads a program code and executes a program.
  • the computer program and a storage medium storing the computer program fall within the scope of the present disclosure.
  • the present disclosure can switch a voltage to be supplied to a power source switch in accordance with a state of a power source of an apparatus and can therefore restrain power consumption of the power source switch.
  • Embodiment(s) of the present disclosure can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be referred to more fully as a ‘non-transitory computer-readable storage medium’) to perform the functions of one or more of the above-described embodiment(s) and/or that includes one or more circuits (e.g., application specific integrated circuit (ASIC)) for performing the functions of one or more of the above-described embodiment(s), and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiment(s) and/or controlling the one or more circuits to perform the functions of one or more of the above-described embodiment(s).
  • computer executable instructions e.g., one or more programs
  • a storage medium which may also be referred to more fully as a
  • the computer may comprise one or more processors (e.g., central processing unit (CPU), micro processing unit (MPU)) and may include a network of separate computers or separate processors to read out and execute the computer executable instructions.
  • the computer executable instructions may be provided to the computer, for example, from a network or the storage medium.
  • the storage medium may include, for example, one or more of a hard disk, a random-access memory (RAM), a read only memory (ROM), a storage of distributed computing systems, an optical disk (such as a compact disc (CD), digital versatile disc (DVD), or Blu-ray Disc (BD)TM), a flash memory device, a memory card, and the like.

Abstract

The present disclosure is directed to switch a voltage to be supplied to a power source switch in accordance with a state of a power source of an apparatus and restrain power consumption of the power source switch.

Description

BACKGROUND OF THE INVENTION Field of the Invention
The present disclosure relates to an information processing apparatus, a controlling method thereof, and a program.
Description of the Related Art
There is known an MFP serving as an information processing apparatus that executes various processes such as a copy process, a print process, and a FAX process. An information processing apparatus such as a multi function peripheral (MFP) includes a power source switch for switching on or off a power source of the apparatus, and, when a user operates the power source switch, supply of power to the apparatus is started or stopped.
Japanese Patent Laid-Open No. 2012-115995 discloses that a power source switch and a DCDC converter are arranged on an identical power source line. In a case where the power source switch 35 is on, power is supplied to a DCDC converter 31 from an AC adapter 2 via the power source switch 35. Meanwhile, in a case where the power source switch is off, power is supplied to the power source switch 35 from the AC adapter 2, but supply of power to the DCDC converter 31 is stopped.
In the above-mentioned power source switch, a minimum load current is defined to guarantee switching on/off operation, and, in order to cause the minimum load current to flow when the power source switch is turned on, it is necessary to supply power even in a state in which the power source is off.
SUMMARY OF THE INVENTION
An information processing apparatus disclosed in the present disclosure includes, a first converter configured to convert AC power to DC power of a first voltage, a power source switch operated by a user, a second converter configured to, after the power source switch is switched on, convert the DC power of the first voltage converted by the first converter to DC power of a second voltage lower than the first voltage, and a first power source controlling unit configured to change, from either the first converter or the second converter, power supplied to the power source switch, in accordance with a state of a power source of the information processing apparatus.
Further features of the present disclosure will become apparent from the following description of exemplary embodiments (with reference to the attached drawings).
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic diagram showing an information processing apparatus according to an embodiment of the present disclosure.
FIG. 2 is a block diagram showing an internal configuration of a controller unit according to an embodiment of the present disclosure.
FIG. 3 is a block diagram showing an internal configuration of a power-source-switch power supply unit and a controller power supply unit according to an embodiment of the present disclosure.
FIG. 4 is a timing chart showing operation of a power-source-switch power supply unit and a controller power supply unit at the time of starting up the information processing apparatus according to an embodiment of the present disclosure.
FIG. 5 is a timing chart showing operation of a power-source-switch power supply unit and a controller power supply unit at the time of turning off a power source of the information processing apparatus according to an embodiment of the present disclosure.
DESCRIPTION OF THE EMBODIMENTS Embodiment
Hereinafter, this embodiment will be described in detail with reference to the drawings. In the following embodiment, an MFP will be exemplified as an information processing apparatus. However, the information processing apparatus is not limited to the MFP and may be an information processing apparatus such as an SFP or a PC.
FIG. 1 is a schematic diagram showing a configuration of an MFP 100 in this embodiment.
In FIG. 1, the MFP 100 includes a controller unit 101, an AC plug 102, a power source unit 103, a power source switch 104, an operation unit 105, and a power supply unit 106. The MFP 100 further includes a scanner unit 107 and a printer unit 108. The controller unit 101 is connected to the power source unit 103, the power source switch 104, the operation unit 105, the power supply unit 106, the scanner unit 107, and the printer unit 108. The AC plug 102 is connected to the power source unit 103.
The MFP 100 can execute various processes such as a scanning process and a print process. The controller unit 101 comprehensively controls the whole MFP 100. The AC plug 102 is inserted into an external outlet serving as a power source. Commercial AC power is supplied to the power source unit 103 from the external outlet via the AC plug 102. The power source unit 103 converts AC power supplied from the external outlet to DC power and supplies the power to the controller unit 101 and the power supply unit 106. The power source switch 104 is a switch for allowing a user to control start-up and stop of the MFP 100. The power source switch 104 is, for example, a rocker switch that physically maintains a state showing start-up or stop of the MFP 100. Note that, in this embodiment, power is supplied to the power source switch 104 and the operation unit 105 via the controller unit 101.
The power source switch 104 notifies the controller unit 101 that the MFP 100 is in an activated state (on state) or a shutdown state (off state). The operation unit 105 includes a display unit and an operation key (not shown) and accepts an instruction to execute each process input from the user. The scanner unit 107 reads a document placed on a platen (not shown) and generates image data. The printer unit 108 prints on a sheet of paper on the basis of image data or the like generated in the scanner unit 107. The power supply unit 106 supplies power supplied from the power source unit 103 to the scanner unit 107 and the printer unit 108. Whether or not the power supply unit 106 supplies power to the printer unit 108 and the scanner unit 107 is controlled by a CPU 204 of the controller unit 101.
FIG. 2 is a block diagram schematically showing an internal configuration of the controller unit 101 in FIG. 1.
In FIG. 2, the controller unit 101 includes a controller power supply unit 201, a voltage conversion unit 202, a power-source-switch power supply unit 203, the CPU 204, a memory 205, an HDD 206, and an image processing unit 207.
The controller power supply unit 201 monitors a state of the power source switch 104 and, when the power source switch is changed from the off state to the on state, supplies DC power supplied from the power source unit 103 to the voltage conversion unit 202. Because DC power is supplied to the voltage conversion unit 202 from the power source unit 103, the CPU 204 starts to execute a start-up program and executes a start-up process of the MFP 100. As described above, the controller power supply unit 201 controls power to be supplied to a control unit including a CPU, a memory, a DHH, and the like.
The voltage conversion unit 202 converts a voltage of DC power supplied from the controller power supply unit 201 to a voltage to be supplied to the CPU 204, the memory 205, the HDD 206, the image processing unit 207, and the power-source-switch power supply unit 203.
DC power output by the voltage conversion unit 202 is supplied to the CPU 204, the memory 205, the HDD 206, the image processing unit 207, and the power-source-switch power supply unit 203. Note that the voltage conversion unit 202 converts DC power supplied from the power source unit 103 to DC power having a voltage lower than that of the above-mentioned DC power and outputs the converted DC power.
The power-source-switch power supply unit 203 is connected to the power source unit 103, the power source switch 104, and the voltage conversion unit 202. The power-source-switch power supply unit 203 supplies DC power supplied from the power source unit 103 or DC power supplied from the voltage conversion unit 202 to the power source switch 104. The power-source-switch power supply unit 203 controls power to be supplied to the power source switch. Operation of the power-source-switch power supply unit 203 will be described below with reference to FIG. 3.
The CPU 204 is connected to the operation unit 105, the power supply unit 106, the memory 205, the HDD 206, and the image processing unit 207. The CPU 204 executes programs stored on the HDD 206 and performs various kinds of control. The CPU 204 controls whether to supply power to the printer unit 108 and the scanner unit 107 from the power supply unit 106. For example, in a case where the MFP 100 transitions to a sleep mode that consumes less power than a standby mode while maintaining the power source switch 104 in an on state, the CPU 204 instructs the power supply unit 106 to stop supply of power to the printer unit 108 and the scanner unit 107. With this, it is possible to restrain power consumption of the MFP 100 in the sleep mode. In this embodiment, even in a case where the MFP 100 is in the sleep mode, the voltage conversion unit 202 generates DC power, and the power-source-switch power supply unit 203 supplies DC power output by the voltage conversion unit 202 to the power source switch 104. With this, even in a case where the MFP 100 is in the sleep mode, it is possible to supply DC power generated by the voltage conversion unit 202 to the power source switch 104, instead of supplying DC power generated by the power source unit 103 to the power source switch 104.
The memory 205 is a volatile memory and is a main memory that stores data or the like generated by execution of each program of the CPU 204. The HDD 206 stores the programs executed by the CPU 204, setting information regarding the MFP 100, and the like. The image processing unit 207 performs image processing such as color space conversion with respect to image data generated in the scanner unit 107 and outputs the converted image data to the printer unit 108. When the MFP 100 is started up, DC power output from the voltage conversion unit 202 is supplied to the CPU 204. In response to the supply of power, the CPU 204 reads a program stored on the HDD 206, executes the program, and starts a start-up process of the MFP 100.
FIG. 3 is a block diagram showing an internal configuration of the power-source-switch power supply unit 203 and the controller power supply unit 201 in FIG. 2.
The power-source-switch power supply unit 203 includes an FET 301, a transistor 302, a digital transistor 303, and diodes 310 and 311. The FET 301 is a switching element that switches whether to supply DC power supplied from the power source unit 103 to the power source switch 104. A source terminal of the FET 301 is a terminal to which DC power 309 supplied from the power source unit 103 is supplied. A gate terminal of the FET 301 is connected to a collector terminal of the transistor 302. That is, the FET 301 is switched on/off in accordance with on/off operation of the transistor 302. A drain terminal of the FET 301 is connected to the power source switch 104 via the diode 310. The FET 301 is turned on when a potential difference between the gate and the source is equal to or more than a threshold value. Note that the FET 301 is a p-channel power MOSFET in this embodiment.
A base terminal of the transistor 302 is connected to a collector terminal of the digital transistor 303. The collector terminal thereof is connected to the gate terminal of the FET 301. An emitter terminal thereof is grounded. The transistor 302 is turned on when a voltage applied to the base is equal to or more than a threshold value. The transistor 302 is switched on/off in accordance with on/off operation of the digital transistor 303.
A base terminal of the digital transistor 303 is connected to DC power 308 supplied from the voltage conversion unit 202. The collector terminal thereof is connected to the base terminal of the transistor 302. An emitter terminal thereof is grounded. The digital transistor 303 is turned on when a voltage applied to the base is equal to or more than a threshold value. That is, the digital transistor 303 is switched on/off on the basis of a change in output from the voltage conversion unit 202.
Note that the gate terminal of the FET 301 and the base terminal of the transistor 302 are subjected to a pull-up process by using the DC power 309 supplied from the power source unit 103.
DC power 306 of the power source switch 104 is connected to the drain terminal of the FET 301 via the diode 310 and is also connected to the DC power 308 supplied from the voltage conversion unit 202 via the diode 311.
The controller power supply unit 201 includes an FET 304, a digital transistor 305, and a load resistor 312. The FET 304 is a switching element that switches whether to supply the DC power 309 supplied from the power source unit 103 to the voltage conversion unit 202. A source terminal of the FET 304 is connected to the DC power 309 supplied from the power source unit 103. A gate terminal of the FET 304 is connected to a collector terminal of the digital transistor 305, and a drain terminal thereof is connected to the voltage conversion unit 202. That is, the FET 304 is switched on/off on the basis of switching on/off of the digital transistor 305. Note that the FET 304 is a p-channel power MOSFET in this embodiment.
A base terminal of the digital transistor 305 is connected to a power source switch signal 307 supplied from the power source switch 104. A collector terminal thereof is connected to the gate terminal of the FET 304. An emitter terminal thereof is grounded. The digital transistor 305 is switched on/off on the basis of a signal input from the power source switch 104 via the power source switch signal 307. In this embodiment, in a case where the power source switch 104 is turned on and the power source switch signal 307 is H (High), the digital transistor 305 is turned on.
Note that the gate terminal of the FET 304 is subjected to a pull-up process by using the DC power 309 supplied from the power source unit 103. The load resistor 312 is a load resistor for causing a necessary minimum load current to flow to the power source switch 104.
Next, operation of the power-source-switch power supply unit 203 and the controller power supply unit 201 at the time of turning on the power source switch in this embodiment will be described with reference to FIG. 4. FIG. 4 is a timing chart showing processes of the power-source-switch power supply unit 203 and the controller power supply unit 201 at the time of turning on the power source switch.
Before the AC plug is inserted into the external outlet, the power source switch is in an off state, and all the FET 301, the transistor 302, and the digital transistor 303 of the power-source-switch power supply unit 203 are in an off state. Further, the FET 304 and the digital transistor 305 of the controller power supply unit 201 are also in an off state.
First, when the user inserts the AC plug 102 into the external outlet, supply of AC power to the power source unit 103 from the external outlet via the AC plug 102 is started (t0).
When AC power is supplied from the external outlet, the power source unit 103 converts the AC power to DC power and starts to output the DC power 309 (t1).
When supply of the DC power 309 is started, the DC power is applied to the base terminal of the transistor 302 of the power-source-switch power supply unit 203, and the transistor 302 is switched from the off state to an on state. When the transistor 302 becomes the on state and a current flows between the collector and the emitter of the transistor 302, a potential difference is generated between the source and the gate of the FET 301, and the FET 301 is switched from the off state to an on state (t2). With this, the DC power 309 output from the power source unit 103 is input to the power source switch 104 via the diode 310 and the DC power 306.
At this time, the collector terminal of the digital transistor 303 maintains the off state. Further, the FET 304 and the digital transistor 305 of the controller power supply unit 201 also maintain the off state.
As described above, in a case where the AC plug 102 is plugged in while the power source switch 104 is being in the off state, the DC power 309 output by the power source unit 103 is applied to the power source switch 104.
Next, operation after the user performs on operation of the power source switch 104 will be described. At t3, the user changes the state of the power source switch 104 to an on state. In response to the change of the state of the power source switch 104 to the on state, the DC power 306 output from the power source unit 103 is input to the power source switch signal 307 via the power source switch 104. Then, a power source voltage input to the power source switch signal 307 is applied to the base terminal of the digital transistor, and the digital transistor 305 is switched to an on state (t4).
When the digital transistor 305 is switched to the on state, a potential difference is generated between the source terminal and the gate terminal of the FET 304, and the FET 304 is switched to an on state (t5). When the FET 304 becomes the on state, the DC power 309 output from the power source unit 103 is supplied to the voltage conversion unit 202 via the FET 304. The voltage conversion unit 202 outputs the DC power 308 having a voltage lower than that of the DC power 309 supplied from the power source unit 103. The DC power 308 is supplied to the CPU 204, the memory 205, the HDD 206, the image processing unit 207, and the like. Further, the DC power 308 is applied to the base terminal of the digital transistor 303 of the power-source-switch power supply unit 203. Because of application of the DC power 308, the digital transistor 303 is changed to an on state (t7).
In response to the change of the state of the digital transistor 303 to the on state, a base potential of the transistor 302 is reduced, and the transistor 302 becomes the off state (t8). When the transistor 302 becomes the off state, no potential difference is generated between the source terminal and the gate terminal of the FET 301, and the FET 301 becomes the off state (t9). When the FET 301 becomes the off state, supply of the DC power 309 output from the power source unit 103 to the power source switch 104 is stopped. With this, in a case where the power source switch 104 is in the on state, it is possible to supply DC power having a voltage lower than that of output from the voltage conversion unit 202 to the power source switch 104, instead of supplying high-voltage DC power output from the power source unit 103 to the power source switch 104. With this, in a case where the MFP 100 is in the on state, it is possible to restrain power consumption of the power source switch 104.
FIG. 5 is a timing chart showing operation of the power-source-switch power supply unit 203 and the controller power supply unit 201 at the time of plugging out the power source in this embodiment. In a case where the power source switch 104 is in the on state, the FET 301 and the transistor 302 of the power-source-switch power supply unit 203 are off and the digital transistor 303 thereof is on. Meanwhile, both the digital transistor 305 and the FET 304 of the controller power supply unit 201 are on. At t10, the user turns off the power source switch 104. Then, a voltage of the power source switch signal 307 is reduced, and the digital transistor 305 becomes the off state (t11). When the digital transistor 305 transitions to the off state, a potential difference between the source and the drain of the FET 304 is reduced, and the FET 304 becomes the off state (t12).
When the FET 304 becomes the off state, DC power is not supplied to the voltage conversion unit 202, and the DC power 308 is reduced. Then, the digital transistor 303 transitions to the off state (t13). In response to the transition of the state of the digital transistor 303 to the off state, the transistor 302 becomes the on state (t14). When the transistor 302 is turned on, a potential difference is generated between the source and the drain of the FET 301, and the FET 301 is turned on (t15). With this, the DC power 309 output by the power source unit 103 is supplied to the DC power 306 of the power source switch 104. With the above-mentioned operation, when the power source switch 104 is turned off, it is possible to switch DC power supplied to the power source switch 104 from a power source voltage output by the voltage conversion unit 202 to DC power output by the power source unit 103. With this, it is possible to supply DC power to the power source switch 104 even in a case where the power source switch 104 is in the off state.
Further, when the power source is plugged out at t17, output from the power source unit 103 is reduced, and the transistor 302 is turned off accordingly (t18). Thereafter, the FET 301 also becomes the off state (t19).
As described above, in this embodiment, a source of supply of power to the power source switch 104 is changed between when the power source switch is in the on state and when the power source switch 104 is in the off state, and when the power source is on, power is supplied to the power source switch at a lower voltage. With this, it is possible to restrain power consumption of the power source switch 104 when the power source switch is in the on state. For example, in a case where the DC power 309 is 12 V, the DC power 308 is 5 V, and the minimum load current of the power source switch 104 is 1 mA, 12 mW is consumed if DC power supplied to the power source switch 104 is not switched and the DC power 309 is continuously supplied. Meanwhile, when DC power supplied to the power source switch 104 is switched and the DC power 308 is supplied, 5 mW is consumed. As described above, it is possible to restrain power consumption of the power source switch 104.
According to the embodiment of the present disclosure described above, it is possible to reduce power consumed in the power source switch 104 and the load resistor 312 by switching DC power flowing to the power source switch 104 to the DC power 308 having a voltage lower than that of the DC power 309 supplied from the power source unit 103.
Additional Embodiment
Note that, in this embodiment, DC power to be supplied to the power source switch 104 is switched between DC power output by the power source unit and DC power output by the voltage conversion unit by using a voltage of DC power output by the voltage conversion unit. The CPU 204 may control the power-source-switch power supply unit 203 after supply of power to the CPU 204 is started. The CPU 204 may execute a start-up program of the MFP 100 and perform control so that power to be supplied to the power source switch 104 is switched from the DC power 309 output from the power source unit 103 to the DC power 308 output from the voltage conversion unit 202. Further, an interrupt signal may be input to the CPU 204 in response to transition of the state of the power source switch 104 to the on state, and the CPU 204 may switch a path of supply of power to the power source switch 104 on the basis of the interrupt signal.
The present disclosure is also achieved by executing the following process. Specifically, the following process is such that software (program) that achieves a function of the above-mentioned embodiment is supplied to a system or an apparatus via a network or various storage media, and a computer (or CPU, MPU, or the like) of the system or the apparatus reads a program code and executes a program. In this case, the computer program and a storage medium storing the computer program fall within the scope of the present disclosure.
In view of the above circumstances, the present disclosure can switch a voltage to be supplied to a power source switch in accordance with a state of a power source of an apparatus and can therefore restrain power consumption of the power source switch.
Embodiment(s) of the present disclosure can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be referred to more fully as a ‘non-transitory computer-readable storage medium’) to perform the functions of one or more of the above-described embodiment(s) and/or that includes one or more circuits (e.g., application specific integrated circuit (ASIC)) for performing the functions of one or more of the above-described embodiment(s), and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiment(s) and/or controlling the one or more circuits to perform the functions of one or more of the above-described embodiment(s). The computer may comprise one or more processors (e.g., central processing unit (CPU), micro processing unit (MPU)) and may include a network of separate computers or separate processors to read out and execute the computer executable instructions. The computer executable instructions may be provided to the computer, for example, from a network or the storage medium. The storage medium may include, for example, one or more of a hard disk, a random-access memory (RAM), a read only memory (ROM), a storage of distributed computing systems, an optical disk (such as a compact disc (CD), digital versatile disc (DVD), or Blu-ray Disc (BD)™), a flash memory device, a memory card, and the like.
While the present disclosure has been described with reference to exemplary embodiments, it is to be understood that the disclosure is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2018-241725, filed Dec. 25, 2018, which is hereby incorporated by reference herein in its entirety.

Claims (11)

What is claimed is:
1. An information processing apparatus, comprising:
a first converter configured to generate DC power of a first voltage;
a power source switch of the information processing apparatus operated by a user;
a second converter configured to, after the power source switch is switched on, convert the DC power of the first voltage supplied from the first converter to DC power of a second voltage, wherein the second voltage is lower than the first voltage; and
a second control module configured to switch whether to supply the DC power of the first voltage output from the first converter to the second converter,
wherein the DC power of the first voltage is supplied to the power source switch in a situation that the power source switch is off and the DC power of the first voltage is not supplied to the second converter,
wherein the DC power of the second voltage is supplied to the power source switch in a situation that the power source switch is on and the DC power of the first voltage is supplied to the second converter, and
wherein the second control module switches whether to supply the DC power of the first voltage output from the first converter to the second converter on the basis of a voltage supplied via the power source switch.
2. The information processing apparatus according to claim 1 further comprising:
a first control module configured to change a source of power supply to the power source switch from the first converter to the second converter based on output from the second converter.
3. The information processing apparatus according to claim 2, wherein the first control module changes the source of power supply to the power source switch from the first converter to the second converter in a case that a voltage output from the second converter becomes higher than a threshold.
4. The information processing apparatus according to claim 2, wherein the first control module including a transistor.
5. The information processing apparatus according to claim 1, wherein the first converter converts AC power to the DC power of the first voltage.
6. The information processing apparatus according to claim 5, wherein the first converter generates the DC power of the first voltage regardless of a state of the power supply switch.
7. The information processing apparatus according to claim 1, wherein the power source switch is a rocker switch.
8. The information processing apparatus according to claim 1, wherein the DC power of the second voltage is supplied to a controller of the information processing apparatus from the second converter.
9. The information processing apparatus according to claim 8, wherein the controller executes a start-up program of the information processing apparatus.
10. The information processing apparatus according to claim 1, wherein the DC power of the first voltage is not supplied to the power source switch in a situation that the DC power of the second voltage is supplied to the power source switch.
11. The information processing apparatus according to claim 4, wherein the second control module including a transistor.
US16/716,215 2018-12-25 2019-12-16 Information processing apparatus, controlling method thereof, and program Active 2039-12-24 US11493969B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP2018-241725 2018-12-25
JP2018241725A JP7207993B2 (en) 2018-12-25 2018-12-25 Information processing device, its control method, and program
JP2018-241725 2018-12-25

Publications (2)

Publication Number Publication Date
US20200201406A1 US20200201406A1 (en) 2020-06-25
US11493969B2 true US11493969B2 (en) 2022-11-08

Family

ID=71098401

Family Applications (1)

Application Number Title Priority Date Filing Date
US16/716,215 Active 2039-12-24 US11493969B2 (en) 2018-12-25 2019-12-16 Information processing apparatus, controlling method thereof, and program

Country Status (2)

Country Link
US (1) US11493969B2 (en)
JP (1) JP7207993B2 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110064445A1 (en) * 2009-02-23 2011-03-17 Akira Yashiro Power source unit and image forming apparatus
JP2012115995A (en) 2010-11-29 2012-06-21 Seiko Epson Corp Recorder and power source device
US20150009516A1 (en) * 2013-07-03 2015-01-08 Samsung Electronics Co., Ltd Image forming apparatus and method of supplying power thereof
US9886079B2 (en) * 2013-11-29 2018-02-06 Canon Kabushiki Kaisha Information processing apparatus and method for supplying power to information processing apparatus
US20190214915A1 (en) * 2016-08-16 2019-07-11 Hewlett-Packard Development Company, L.P. Power supply device and image forming apparatus having the same
US10649512B2 (en) * 2017-07-25 2020-05-12 Quanta Computer Inc. High efficient battery backup system

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5864896B2 (en) 2010-06-18 2016-02-17 キヤノン株式会社 Electronic apparatus and image forming apparatus
JP2013092841A (en) 2011-10-24 2013-05-16 Oki Data Corp Information processor and image-forming device
JP2017032822A (en) 2015-08-03 2017-02-09 キヤノン株式会社 Image forming apparatus and power supply device
JP2017070183A (en) 2015-09-28 2017-04-06 株式会社リコー Power supply device, image forming apparatus, and power supply voltage monitoring method
JP6763224B2 (en) 2016-07-20 2020-09-30 株式会社リコー Image forming device and control device
JP6266061B2 (en) 2016-08-29 2018-01-24 キヤノン株式会社 Printing apparatus and control method thereof
JP6415632B2 (en) 2017-04-24 2018-10-31 キヤノン株式会社 Processing device and control method of processing device
JP2017140851A (en) 2017-04-24 2017-08-17 キヤノン株式会社 Printer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110064445A1 (en) * 2009-02-23 2011-03-17 Akira Yashiro Power source unit and image forming apparatus
JP2012115995A (en) 2010-11-29 2012-06-21 Seiko Epson Corp Recorder and power source device
US20150009516A1 (en) * 2013-07-03 2015-01-08 Samsung Electronics Co., Ltd Image forming apparatus and method of supplying power thereof
US9886079B2 (en) * 2013-11-29 2018-02-06 Canon Kabushiki Kaisha Information processing apparatus and method for supplying power to information processing apparatus
US20190214915A1 (en) * 2016-08-16 2019-07-11 Hewlett-Packard Development Company, L.P. Power supply device and image forming apparatus having the same
US10649512B2 (en) * 2017-07-25 2020-05-12 Quanta Computer Inc. High efficient battery backup system

Also Published As

Publication number Publication date
JP7207993B2 (en) 2023-01-18
JP2020100125A (en) 2020-07-02
US20200201406A1 (en) 2020-06-25

Similar Documents

Publication Publication Date Title
US10965122B2 (en) Information processing apparatus including plurality of power supply units for supplying power to fan
US6097616A (en) Drive-voltage control device having a switching element for a drive-voltage supply line and an image forming apparatus using the drive-voltage control device
US20150277466A1 (en) Data processing apparatus, method for controlling the same and storage medium
US11301026B2 (en) Information processing apparatus having volatile memory used to cache write data to nonvolatile memory, power supply method therefor, and storage medium storing program therefor
US20130219202A1 (en) Information processing apparatus with power shutoff switch and control method therefor
US10873181B2 (en) Electronic device and control method of electronic device
US11005362B2 (en) Power supply apparatus and method of controlling power supply apparatus
US9417593B2 (en) Image forming apparatus configured to switch between supplying and shutting-off of power to a portion of the image forming apparatus
US10015341B2 (en) Image forming apparatus, and method of controlling image forming apparatus
US10747163B2 (en) Printing apparatus, method for controlling same, and storage medium
US11493969B2 (en) Information processing apparatus, controlling method thereof, and program
US10095291B2 (en) Information processing apparatus
JP2019043029A (en) Image processing system, and control method for image processing system
EP2843928B1 (en) Electronic device, and method for controlling power to control unit of electronic device
US11843310B2 (en) Voltage conversion circuit and image forming apparatus
US9886218B2 (en) Information processing apparatus and control method for information processing apparatus
US20200145550A1 (en) Printing apparatus and control method of the printing apparatus
US11792347B2 (en) Electronic apparatus and control method of electronic apparatus
US20140218757A1 (en) Image forming apparatus, image forming apparatus control method, and program
US11394846B2 (en) Information processing apparatus and control method for information processing apparatus for transitioning from one power state to another power state
US20200177756A1 (en) Information processing apparatus capable of preventing unintended processing from being performed due to remaining electric charge, control method therefor, and storage medium
US9031445B2 (en) Power saving modes in an image forming apparatus
US20130265607A1 (en) Image forming apparatus, control method for image forming apparatus, and storage medium
US20190094934A1 (en) Information processing apparatus
US20200142651A1 (en) Image forming apparatus, control method thereof, and storage medium

Legal Events

Date Code Title Description
FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STPP Information on status: patent application and granting procedure in general

Free format text: APPLICATION DISPATCHED FROM PREEXAM, NOT YET DOCKETED

AS Assignment

Owner name: CANON KABUSHIKI KAISHA, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:OKUZONO, RYOTARO;REEL/FRAME:052093/0554

Effective date: 20191209

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: ADVISORY ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE AFTER FINAL ACTION FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: NOTICE OF ALLOWANCE MAILED -- APPLICATION RECEIVED IN OFFICE OF PUBLICATIONS

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT RECEIVED

STPP Information on status: patent application and granting procedure in general

Free format text: PUBLICATIONS -- ISSUE FEE PAYMENT VERIFIED

STCF Information on status: patent grant

Free format text: PATENTED CASE