US11108367B2 - Internal power supply for amplifiers - Google Patents
Internal power supply for amplifiers Download PDFInfo
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- US11108367B2 US11108367B2 US16/512,922 US201916512922A US11108367B2 US 11108367 B2 US11108367 B2 US 11108367B2 US 201916512922 A US201916512922 A US 201916512922A US 11108367 B2 US11108367 B2 US 11108367B2
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- range
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/4521—Complementary long tailed pairs having parallel inputs and being supplied in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/513—Indexing scheme relating to amplifiers the amplifier being made for low supply voltages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/516—Some amplifier stages of an amplifier use supply voltages of different value
Definitions
- the present disclosure relates to microelectronic integrated circuits (ICs) and more specifically to an amplifier with an internal power supply that floats to power a low voltage (LV) input stage of an amplifier.
- ICs microelectronic integrated circuits
- LV low voltage
- an input stage (i.e., core amplifier) of an amplifier can be designed using devices that are rated for the entire range of common mode voltages. In some circumstances, this requires the input stage of the amplifier to be designed using high-voltage (HV) devices (e.g., transistors). This approach, however, can reduce the overall performance of the amplifier.
- HV high-voltage
- the present disclosure describes a system that includes an external power supply and an amplifier.
- the external power supply is configured to generate a fixed voltage range defined by an upper external voltage (V DD ) and a lower external voltage (V GND ).
- the external power supply is coupled to the amplifier, which is configured to receive an input signal that has a common-mode voltage (V CM ) within a range of common-mode voltages.
- the amplifier in the system includes an internal power supply, a low voltage (LV) core amplifier, and at least one output stages.
- the LV core amplifier operates at a low voltage (i.e., low in relation to the range of common-mode voltages) and is configured to amplify an input voltage (V IN ).
- the internal power supply provides power to the LV core amplifier for operation and is configured to generate a floating voltage range that is defined by an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ).
- the at least one output stage is powered by the external power supply and is configured to level-shift an output of the LV core amplifier from the floating voltage range to an output voltage range that corresponds to (e.g., is equivalent to) the fixed voltage range.
- the present disclosure describes a method for operating an amplifier that uses low voltage devices over a high voltage range of common mode voltages that includes positive and negative voltages.
- a fixed voltage range defined by an upper external voltage (V DD ) and a lower external voltage (V GND )
- V DD upper external voltage
- V GND lower external voltage
- V MAX voltage maximum
- V MIN voltage minimum
- V MAX voltage maximum
- V MIN voltage minimum
- the floating voltage range is level-shifted to V MAX or V MN according to an input voltage (V IN ) to the input stage of the amplifier.
- the present disclosure describes an internal power supply for an amplifier that is configured to receive a range of common mode voltages that includes positive and negative voltages.
- the internal power supply includes a selector circuit that receives a common mode voltage (V CM ) from the input of the amplifier and also receives an upper external voltage (V DD ) and a lower external voltage (V GND ) from an external power supply.
- the selector circuit is configured to select a maximum voltage (V MAX ) and a minimum voltage (V MIN ) from V DD , V CM , and V GND .
- the internal power supply also includes a floating supply circuit that receives V MAX and V MIN from the selector circuit. Additionally, the internal power supply receives an input voltage from an input stage of the amplifier.
- the floating supply circuit is configured to generate a floating voltage range that is defined by an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ) and that is level-shifted to V CM based on V IN .
- FIG. 1 is a block diagram of a system for amplification according to an implementation of the present disclosure.
- FIG. 2 is a block diagram of an internal power supply for an amplifier according to an implementation of the present disclosure.
- FIG. 3A is a schematic of a first possible implementation of the selector circuit for the internal power supply shown in FIG. 2 .
- FIG. 3B is a schematic of a second possible implementation of the selector circuit for the internal power supply shown in FIG. 2 .
- FIG. 4 is a schematic of a possible implementation of the floating supply circuit for the internal power supply shown in FIG. 2 .
- FIG. 5A is a graph of a possible floating voltage range defined by an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ), the floating voltage range level shifted according to a common mode voltage (V CM ) and having a regulated range (V REG ) that is less than or equal to the external supply range (V DD -V GND ).
- FIG. 5B is a graph of a possible floating voltage range defined by a upper internal voltage (V INTP ) and a lower internal voltage (V INTN ), the floating voltage range level shifted according to a common mode voltage (V CM ) and having a regulated range (V REG ) that is greater than the external supply range (V DD -V GND ).
- FIG. 6 is a schematic of an amplifier according to a possible implementation of the present disclosure.
- FIG. 7 is a detailed schematic of a possible implementation of a portion of the amplifier shown in FIG. 6 .
- FIG. 8 is a schematic the amplifier shown in FIG. 6 configured as a current-sense amplifier (CSA) according to a possible implementation of the present disclosure.
- CSA current-sense amplifier
- FIG. 9 is a graph of possible floating voltage ranges that are associated with implementations of a current sense amplifier with different gains.
- FIG. 10 is a flow chart of a method for operating an amplifier over a range of possible common mode voltages.
- the present disclosure describes an amplifier having a floating internal power supply (i.e., internal power supply) for generating a regulated voltage in a low voltage range.
- the regulated voltage is used to supply an input stage (i.e., core amplifier) so that it may receive an input voltage in a high voltage range.
- the regulated voltage is level-shifted (i.e., floated) to a voltage (V IN ) appearing at an input stage so that the core amplifier may operate using low voltage (LV) devices, which can offer an improved performance (e.g., relative to a core amplifier that uses high voltage (HV) devices).
- LV low voltage
- the disclosed circuits and techniques can be used for general purpose amplifiers or current sense amplifiers and can be used with amplifiers that operate with a unidirectional (e.g., positive) or a bidirectional (e.g., positive and negative) power supply and/or common mode input voltages.
- the disclosed circuits and techniques can reduce the number of HV devices in the amplifier required for operation with HV input common mode voltages and/or a HV external power supply voltages.
- a reduction of the HV devices in the amplifier can result in a performance improvement.
- the performance improvement of the amplifier may correspond to an improvement (e.g., reduction) of a voltage offset (V OS ), an improvement (e.g., increase) of a common-mode rejection ratio (CMRR), and/or an improvement (e.g., reduction) of a die area for (e.g., required for) the amplifier.
- V OS voltage offset
- CMRR common-mode rejection ratio
- the disclosed circuits and techniques may result in a V OS that is approximately constant over a range of input common mode voltages.
- V CM common mode voltage
- V OS input offset voltage
- V OS input offset voltage
- an input stage with a differential pair including LV devices can be better matched.
- the improved matching decreases the variability in performance with V CM .
- the LV devices cannot handle a wide range of V CM .
- HV devices in an input stage can accommodate a wide range of V CM but can reduce the performance of the amplifier and increase the overall size of the amplifier.
- Schemes, such as chopping architectures have been devised to improve the performance of amplifiers using HV devices. These approaches, however, can significantly add complexity.
- the amplifiers described herein address these issues in that they handle wide variations in V CM with high performance (e.g., comparable to chopping architectures) but without significant added complexity.
- FIG. 1 is a block diagram of a system for amplification (i.e., system).
- the system 100 includes an external power supply 110 that generates voltages in a fixed voltage range defined by an upper (i.e., relatively positive, positive) external voltage (V DD ) and a lower (i.e., relatively negative, negative) external voltage (V GND ).
- the lower external voltage is negative in relation with (i.e., less than) the positive external voltage and not necessarily negative in an absolute sense.
- V GND may be zero volts
- V DD may be 5 volts.
- the voltages V DD and V GND area applied to an amplifier 120 to enable operation of certain circuits (e.g., an internal power supply, at least one output stage 150 , etc.).
- the amplifier 120 may be a general purpose amplifier (GPA), which can be configured for various functions (e.g., buffer amplifier, inverting amplifier, summing amplifier, etc.) through feedback.
- the amplifier 120 may be a current sense amplifier (CSA).
- the amplifier 120 may include a current sense (CS) resistor network 130 to sense a current and to provide a gain.
- CS current sense
- the amplifier 120 includes various stages to provide functions to receive an input signal (i.e., input) and provide an output signal.
- the amplifier 120 may be configured to amplify an input signal defined as a voltage different between a relatively positive (i.e., positive) input terminal (INP) of the amplifier 120 and a relatively negative (i.e., negative) input terminal (INN) of the amplifier.
- the input signal includes a common mode voltage (V CM ), and in some applications, such current sensing, it is desirable to ignore, reduce, or eliminate the V CM .
- V CM common mode voltage
- a differential amplifier that responds only to voltage differences may be included in the amplifier to effectively eliminate the V CM . As shown in FIG.
- the amplifier 120 includes a core amplifier (i.e., input stage, first stage, etc.) 140 to perform this function.
- the core amplifier 140 can amplify a voltage difference at its input (i.e., INP_AMP_INN_AMP) using a differential pair of transistors provided that the transistors are biased appropriately. For example, if the voltage difference at the input of the core amplifier is 5V but the common mode voltage is 20V then the core amplifier can (e.g., must) be powered by at least the common mode voltage in order to perform the voltage difference amplification. This condition implies that high power supply voltages and/or transistors with high voltage ratings (i.e., HV transistors) can (e.g., must) be used for the core amplifier if large V CM are possible.
- HV transistors high voltage ratings
- high voltage transistors in the input stage can negatively affect the overall size and performance of the amplifier 120 .
- accommodating a range of V CM using HV devices and/or high power supplies may lead to amplifiers that have large (e.g., >5 millivolt (mV)) V OS variations or the range of V CM .
- the disclosed circuits and techniques can accommodate for a range of V CM that includes high voltages with a low voltage (LV) core amplifier 140 that includes low voltage devices (e.g., transistors) to avoid the reduction in performance.
- the amplifier 120 includes an internal power supply 200 capable of floating with V CM so that the LV core amplifier 140 is properly biased to amplify the difference signal (i.e., INP_AMP ⁇ INN_AMP) regardless of the V CM at the input.
- the internal power supply 200 (i.e., internal floating power supply) is configured to generate a floating voltage range defined by an upper internal voltage (V INTP ) and a lower internal voltage (V INTN ), the floating voltage range is level-shifted to a voltage based on a V CM at the input of the amplifier 120 and based on an a voltage (V IN ) at the input of the core amplifier 140 so that the output of the core amplifier is in a first voltage range that corresponds to (e.g., is equivalent to) the floating voltage range (i.e., V INTN to V INTP ).
- V INTP upper internal voltage
- V INTN lower internal voltage
- the amplifier 120 further includes at least one output stage 150 to convert the first voltage range at the output of the LV core amplifier 140 to a second (i.e., output) voltage range at the output of the amplifier 120 .
- the second voltage range at the output of the amplifier corresponds to (e.g., is equivalent to) the voltage range provided by the external power supply 110 (i.e., the fixed voltage range, V GND to V DD ).
- the one or more output stages may function to convert (e.g., level shift) high voltages to low voltages or convert low voltages to high voltages depending on the implementation. Accordingly, the output stage(s) may include HV devices to perform the conversion. The inclusion of HV devices after the input stage does not significantly affect the overall performance of the amplifier 120 .
- high voltage (HV) and low voltage (LV) are relative to the scenario of a particular fixed voltage range provided to an amplifier designed for a V CM of zero. Voltages outside this particular fixed range can be considered as high voltages while voltages within this particular fixed range can be considered as low voltages.
- V CM may be in a range of ⁇ 80V to +80V.
- One advantage of the disclosed circuits and techniques is that they can accommodate a range of V CM that may include both positive and negative voltages.
- FIG. 2 is a block diagram of an implementation of the internal power supply 200 for the amplifier 120 .
- the internal power supply 200 includes a selector circuit 210 that receives V DD and V GND from the external power supply 110 and that receives V CM from the input of the amplifier 120 .
- the selector circuit 210 is configured to select a maximum voltage (V MAX ) and a minimum voltage (V MIN ) from the received V DD , V CM , and V GND and to provide (i.e., output) these voltages to a floating supply circuit 220 .
- V MAX maximum voltage
- V MIN minimum voltage
- the selector circuit 210 may be implemented in a variety of ways.
- FIG. 3A is a schematic of a first possible implementation of the selector circuit 210 .
- a pair of drain-connected PMOS transistors are coupled between, and switched by, V CM and V DD .
- V DD is lower than V CM
- a first p-type metal oxide semiconductor (PMOS) transistor 211 turns ON (i.e., conducts) while a second PMOS transistor 212 turns OFF (i.e., opens) so that V CM is coupled to an output, V MAX .
- PMOS p-type metal oxide semiconductor
- V CM when V CM is lower than V DD , then the second PMOS transistor 212 turns ON (i.e., conducts) while the first PMOS transistor 211 turns OFF (i.e., opens) so that V DD is coupled to the output, V MAX .
- V GND need not be considered when determining V MAX because it is assumed that V GND is less than V DD .
- a pair of drain-connected n-type metal oxide semiconductor (NMOS) transistors is coupled between, and switched by, V CM and V GND .
- NMOS n-type metal oxide semiconductor
- V GND is higher than V CM
- a first NMOS transistor 213 turns ON (i.e., conducts) while a second NMOS transistor 214 turns OFF (i.e., opens) so that V CM is coupled to an output, V MIN .
- V CM when V CM is higher than V GND , then the second NMOS transistor 214 turns ON (i.e., conducts) while the first NMOS transistor 213 turns OFF (i.e., opens) so that V GND is coupled to the output, V MIN .
- V DD need not be considered when determining V MIN because it is assumed that V DD is higher than V GND .
- FIG. 3B is a schematic of a second possible implementation of the selector circuit 210 for the internal power supply shown in FIG. 2 .
- the selector circuit includes a first pair of cathode connected Schottky diodes cathode connected between V CM and V DD to determine V MAX . For example, when V CM is greater than V DD then a first Schottky diode 215 may couple V CM to an output, V MAX , and when V DD is greater than V CM , then a second Schottky diode 216 may couple V DD to the output, V MAX .
- 3B also includes a second pair of anode connected Schottky diodes cathode connected between V CM and V GND to determine V MIN .
- a third Schottky diode 217 may couple V CM to the output, V MIN
- a fourth Schottky diode 218 may couple V GND to the output, V MIN .
- the internal power supply 200 also includes a floating supply circuit 220 .
- the floating supply circuit 220 receives the selected V MAX and V MIN from the selector circuit 210 . Additionally, the floating supply circuit 220 receives an input voltage (V IN ) from the input to the LV core amplifier 140 .
- V IN is equivalent to V CM
- V IN may differ from V CM due to the resistor network 130 for current sensing.
- V IN might be received at the floating supply circuit 220 from the positive input terminal (INP_AMP) of the core amplifier 140
- V IN may be received at the floating supply circuit 220 from the negative input terminal (INN_AMP) of the core amplifier 140 .
- the floating supply circuit 220 is configured to generate a voltage range defined by an upper (i.e., relatively positive) internal voltage (V INTP ) and a lower (i.e., relatively negative) internal voltage (V INTN ), which are provided to the LV core amplifier 140 for operation.
- FIG. 4 is a schematic of a possible implementation of a floating supply circuit 220 for the internal power supply 200 .
- the circuit includes an NMOS transistor 221 and a PMOS transistor 223 that are controlled based on the input voltage (V IN ) to the LV core amplifier to operate in a complementary fashion.
- the PMOS transistor 223 and the NMOS transistor 221 are configured so that when the NMOS transistor 221 is controlled (e.g. by VIN) to pass (i.e., regulate) a voltage, the PMOS transistor 223 is controlled to not pass (i.e., regulate) a voltage, and vice versa.
- the complementary operation may be achieved through fabrication (e.g., channel dimensioning) or via a bias voltage that can applied to a gate of either the NMOS transistor 221 or the PMOS transistor 223 to compensate for differences, thereby insuring complementary operation.
- the floating supply circuit effectively level shifts (i.e., floats) a regulated voltage range (V REG ) that is determined by a regulation device 225 (e.g., a voltage regulation device).
- the regulation device 225 may be a Zener diode or other regulating device (e.g., a PN diode, a diode-connected transistor, etc.). When a Zener diode is used as the regulation device 225 , the breakdown voltage of the Zener diode corresponds to V REG .
- the floating supply circuit 220 may pull-up (i.e., float, regulate, set, etc.) the regulated voltage range to V MAX using the sourcing current source 222 and the NMOS transistor 221 .
- V MAX V CM
- the NMOS transistor 221 and the sourcing current source 222 will operate together (i.e., based on V MAX and V IN ) to effectively pull (i.e., regulate, set, etc.) V INTP up to V MAX .
- V INTN is regulated below V INTP .
- V INTP is pulled up to V MAX
- the regulation device 225 e.g., biased by sinking current source 224
- V REG regulated voltage drop
- the floating supply circuit 220 may pull-down (i.e., float, regulate, set, etc.) the regulated voltage range to V MIN using the sinking current source 224 and the PMOS transistor 223 .
- V CM V GND
- V MIN V CM
- the PMOS transistor 223 and the sinking current source 224 will operate together (i.e., based on V MIN and V IN ) to effectively pull (i.e., regulate, set, etc.) V INTN down to V MIN .
- V INTN is set, then V INTP is regulated above V INTN .
- V INTN is pulled down to V MIN
- the regulation device 225 e.g., biased by sourcing current source 222
- V REG regulated voltage rise
- the internal power supply 200 self-regulates according to the voltage level (e.g., V CM ) at the input of the core amplifier.
- V CM voltage level
- This self-regulation is useful in accommodating a large range of voltages that includes both positive and negative voltages.
- the range of voltages may extend to voltages that are much higher than the devices in the LV core amplifier are rated.
- V CM may be in a range of voltages that correspond to the limits of a device technology (e.g., ⁇ 80V to +80V for devices with a maximum (e.g., V DS ) rating of 80V), while the devices in the LV core amplifier are rated to receive less than the limits of the device technology (e.g., less than 10 volts).
- the fixed voltage range of an external power supply is smaller than the range of common-mode voltages, and the range of common-mode voltages is limited by a device technology, which may be selected as required.
- the internal power supply provides a consistent voltage level to the LV core amplifier even when V CM changes.
- This constant power corresponds to a voltage offset V OS of the LV core amplifier and is nearly constant as V CM varies.
- V OS of a CSA amplifier implementation may have a maximum value of 2 millivolts (mV) over a full V CM range from ⁇ 80V to +80V.
- a power supply rejection ratio (i.e., PSRR) of the LV core amplifier in the CSA amplifier implementation may have a minimum value of 90 dB over the same range. The values of these parameters are similar to those expected from CSA amplifiers that utilize offset compensation techniques.
- FIG. 5A is a graph of a possible floating voltage range (i.e., V INTP -V INTN ) appearing at the output of the internal power supply 200 for a first possible implementation.
- the floating voltage range is level shifted (i.e., floated) according to a common mode voltage (V CM ).
- V CM common mode voltage
- V REG i.e., the floated voltage range
- V DD -V GND the fixed voltage range supplied by the external power supply 110 . Accordingly, the voltage regulation device 225 operates for all V CM values.
- V CM when V CM is in the range V GND ⁇ V CM ⁇ V DD , the voltage appearing at the terminals of the regulation device 225 in the floating supply circuit 220 remains large enough to maintain voltage regulation.
- a Zener diode used as the regulation device 225 will remain in breakdown (i.e., will regulate) across the entire range of V CM when V REG ⁇ (V DD -V GND ).
- the graph shown in FIG. 5A shows no variation of V REG with V CM .
- FIG. 5B is a graph of a possible floating voltage range (i.e., V INTP -V INTN ) appearing at the output of the internal power supply 200 for a second possible implementation.
- the floating voltage range is level shifted according to a common mode voltage (V CM ).
- V REG i.e., the floated voltage range
- V CM when V CM is in a range 500 where V GND ⁇ V CM ⁇ V DD , the voltage appearing at the terminals of the regulation device 225 in the floating supply circuit 220 is not large enough to maintain voltage regulation.
- V DD and V GND appear at the output of the floating supply circuit 220 as V INTP and V INTN respectively.
- a Zener diode used as the regulation device 225 will not remain in breakdown (i.e., will not regulate) in the range 500 where V GND ⁇ V CM ⁇ V DD .
- the graph shown in FIG. 5A shows a V REG that varies slightly with V CM .
- V REG can be selected close (e.g., within a couple of volts) to V DD -V GND . Accordingly, the LV core amplifier 140 can still operate with LV devices and any V OS variation with V CM will remain small.
- FIG. 6 is a schematic of an amplifier 120 according to a possible implementation of the present disclosure.
- FIG. 6 illustrates the details of the amplifier 120 of FIG. 1 , including the connections between the internal power supply 200 , the core amplifier 140 , and the at least one output stage 150 .
- the internal supply 200 shown in FIG. 6 produces a low voltage (V INTP -V INTN ) based on V MAX , V MIN , and the input (INN_AMP) to the LV core amplifier 140 .
- the sourcing current source 222 i.e., CS 1
- the sinking current source 224 i.e., CS 2
- the sourcing current source 222 and the sinking current source 224 are implemented as current mirror circuits.
- the NMOS transistor 221 i.e., M 1
- the PMOS transistor 223 i.e., M 2
- the NMOS transistor 221 and the PMOS transistor 223 are controlled by the positive input, INP_AMP.
- the gate voltage of the NMOS transistor 221 is at a voltage relative to the gate voltage off PMOS transistor 223 .
- INN_AMP and INP_AMP may be coupled to opposite sides of a current carrying resistor.
- the LV core amplifier 140 shown in FIG. 6 can be a differential amplifier.
- the inputs to the amplifier (INP_AMP, INN_AMP) can accommodate high voltages but the differential amplifier is implemented with LV devices because it is powered by a low voltage difference (V INTP ⁇ V INTN ).
- a first output stage 151 shown in FIG. 6 can be configured to convert (i.e., level shifts) a high voltage to a low voltage, although in some implementations, the first output stage 151 can convert a low voltage to a high voltage. In either case, the first output stage 151 can include summing nodes and high voltage protection circuits that are implemented with one or more high voltage devices.
- a second (i.e., final) output stage 152 shown in FIG. 6 can be a standard amplifier output stage to provide the output signal with sufficient output power in the form of voltage or current.
- the final output stage 152 can be a class AB amplifier stage.
- FIG. 7 is a detailed schematic of a possible implementation of a portion of the amplifier shown in FIG. 6 .
- the portion shown includes the LV core amplifier 140 , the first output stage 151 , and the second (i.e., final) output stage 152 .
- a differential pair 700 of the LV core amplifier 140 is supplied between V INTP and V INTN .
- the voltage range shift from the LV core amplifier 140 stage to the final output stage 152 can be accomplished using current mirrors, which have HV protection.
- These circuits are the circuits (e.g., only circuits) in which HV devices are used.
- One advantage of this implementation is the fact that the HV devices after the input stage do not negatively affect the performance (e.g., V OS ) of the amplifier 120 .
- FIG. 8 is a schematic the amplifier shown in FIG. 6 configured as a current-sense amplifier (CSA) according to a possible implementation of the present disclosure.
- the amplifier 120 includes a current-sense (CS) resistor network 130 for sensing the current.
- the transistors M 1 and M 2 may be biased at different points along the CS resistor network 130 .
- An advantage of this approach is that the various bias points can be used to adjust the gate to source voltages of the transistor M 1 and M 2 to ensure a correct voltage level for VINTP and/or VINTN.
- the disclosure circuits and techniques may offer similar performance as CSA amplifiers that utilize chopping to improve CMRR.
- the CSA amplifier of the disclosure may have a minimum CMRR of 90 dB.
- the input of the LV core amplifier 140 (i.e., INN_AMP, INP_AMP) is coupled to the input of the amplifier 120 (I.e., INN, INP) through the CS resistor network.
- a voltage (e.g., VCM) at the input of the amplifier 120 may differ from a voltage (e.g., VIN) at the input of the LV core amplifier 140 .
- the difference can depend on the implementation (e.g., resistor values) of the CS resistor network 130 and/or how it is coupled to the other stages in the amplifier 120 .
- the LV core amplifier includes feedback through the CS resistor network 130 . Accordingly, the CS resistor network 130 provides a gain (G).
- the gain of the CS resistor network 130 shown in FIG. 8 R 3 /(R 1 +R 2 ). When the gain is high, V IN is approximately equal to V CM . However, as the gain is reduced, the difference between V IN and V IN becomes larger.
- FIG. 9 is a graph of possible floating voltage ranges for current sense amplifiers having different gains. As shown, the slope of the floating voltage range changes but floats as expected for any gain option. All gain values can be accommodated because the input voltage of the core amplifier (V IN ) is used to control the floating supply circuit 220 rather than an input voltage of the amplifier (V CM ). This means that for gains in which V CM and V IN deviate from one another, the voltage supplying the LV core amplifier will always be floated by the appropriate amount.
- V IN input voltage of the core amplifier
- V CM input voltage of the amplifier
- FIG. 10 is a flow chart of a method for operating an amplifier over a range of possible common mode voltages without an input stage of the amplifier using (i.e., including) devices rated for the entire range of possible common mode voltage (i.e., the input stage of the amplifier uses only LV devices).
- the method 1000 includes receiving 1010 a fixed voltage range (V DD -V GND ) and an input voltage (V CM ) at the amplifier.
- V MAX a fixed voltage range
- V MIN minimum
- V DD , V GND and V CM are the selected 1020 and used to generate 1020 a floating voltage range.
- the floating voltage range is a regulated voltage range that is level shifted to VMAX or VMIN according got an input voltage (V IN ) at a first (i.e., input) stage of the amplifier.
- the floated voltage range allows the amplifier to include (e.g., only include) device rated for the regulated voltage range (i.e., not the common mode voltage at the input to the first stage).
- a terminal i.e., connector, input
- this description is in reference to a voltage/current expected at the terminal in relation to the other terminal and not necessarily in reference to the absolute value of the voltage/current at the terminal.
- Some implementations may be implemented using various semiconductor processing and/or packaging techniques. Some implementations may be implemented using various types of semiconductor processing techniques associated with semiconductor substrates including, but not limited to, for example, Silicon (Si), Gallium Arsenide (GaAs), Gallium Nitride (GaN), Silicon Carbide (SiC) and/or so forth.
- semiconductor substrates including, but not limited to, for example, Silicon (Si), Gallium Arsenide (GaAs), Gallium Nitride (GaN), Silicon Carbide (SiC) and/or so forth.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
Description
Claims (19)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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US16/512,922 US11108367B2 (en) | 2019-02-04 | 2019-07-16 | Internal power supply for amplifiers |
CN201922345701.XU CN211296691U (en) | 2019-02-04 | 2019-12-24 | System for amplification and internal power supply for amplifier |
US17/444,888 US20210376806A1 (en) | 2019-02-04 | 2021-08-11 | Internal power supply for amplifiers |
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US201962800633P | 2019-02-04 | 2019-02-04 | |
US16/512,922 US11108367B2 (en) | 2019-02-04 | 2019-07-16 | Internal power supply for amplifiers |
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US17/444,888 Continuation US20210376806A1 (en) | 2019-02-04 | 2021-08-11 | Internal power supply for amplifiers |
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US20200252038A1 US20200252038A1 (en) | 2020-08-06 |
US11108367B2 true US11108367B2 (en) | 2021-08-31 |
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US16/512,922 Active 2039-12-01 US11108367B2 (en) | 2019-02-04 | 2019-07-16 | Internal power supply for amplifiers |
US17/444,888 Abandoned US20210376806A1 (en) | 2019-02-04 | 2021-08-11 | Internal power supply for amplifiers |
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US17/444,888 Abandoned US20210376806A1 (en) | 2019-02-04 | 2021-08-11 | Internal power supply for amplifiers |
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CN (1) | CN211296691U (en) |
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WO2022198184A1 (en) * | 2021-03-15 | 2022-09-22 | Semiconductor Components Industries, Llc | Precision operational amplifier with a floating input stage |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090174479A1 (en) | 2008-01-04 | 2009-07-09 | Texas Instruments Incorporated | High-voltage differential amplifier and method using low voltage amplifier and dynamic voltage selection |
US20100164631A1 (en) * | 2008-12-31 | 2010-07-01 | Cirrus Logic, Inc. | Electronic system having common mode voltage range enhancement |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8902005B2 (en) * | 2012-09-25 | 2014-12-02 | Analog Devices, Inc. | Apparatus and method for wide common mode difference |
-
2019
- 2019-07-16 US US16/512,922 patent/US11108367B2/en active Active
- 2019-12-24 CN CN201922345701.XU patent/CN211296691U/en active Active
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2021
- 2021-08-11 US US17/444,888 patent/US20210376806A1/en not_active Abandoned
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090174479A1 (en) | 2008-01-04 | 2009-07-09 | Texas Instruments Incorporated | High-voltage differential amplifier and method using low voltage amplifier and dynamic voltage selection |
US20100164631A1 (en) * | 2008-12-31 | 2010-07-01 | Cirrus Logic, Inc. | Electronic system having common mode voltage range enhancement |
Non-Patent Citations (3)
Title |
---|
Huijsing, "SEC. 9.6.1," Operational Amplifiers, Theory and Design, 2001, (One page). |
Norhholt, "Extending Op Amp Capabilities by Using a Current-Source Power Supply," IEE Trans. Circuits and Systems, vol. CAS-29, No. 6, Jun. 1982. |
Prakash, et al., "Extending Beyond the Max Common-Mode Range of Discrete Current-Sense Amplifiers," TI Tech Notes, SBOA198—Jul. 2017. |
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CN211296691U (en) | 2020-08-18 |
US20210376806A1 (en) | 2021-12-02 |
US20200252038A1 (en) | 2020-08-06 |
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