US10783923B2 - Data coding method and data coding device - Google Patents
Data coding method and data coding device Download PDFInfo
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- US10783923B2 US10783923B2 US16/293,735 US201916293735A US10783923B2 US 10783923 B2 US10783923 B2 US 10783923B2 US 201916293735 A US201916293735 A US 201916293735A US 10783923 B2 US10783923 B2 US 10783923B2
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- 238000000034 method Methods 0.000 title claims description 16
- 238000006243 chemical reaction Methods 0.000 claims abstract description 70
- 238000001514 detection method Methods 0.000 claims description 55
- 230000003287 optical effect Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 5
- 238000001228 spectrum Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
Definitions
- the present disclosure relates to a data coding method for converting user data into modulated code data according to a prescribed rule and a data coding device for converting user data into modulated code data according to a prescribed rule.
- modulated code data In recording data on an optical disc, to secure necessary accuracy of detection of a reproduction signal, modulated code data is used that is generated according to a modulation rule that is restricted in code bandwidth so as to conform to the bandwidth restriction of an optical disc reproduction signal.
- the RLL constraint is a constraint that relates to the minimum number and the maximum number of times of repetition of the same bit (run) in modulated code data and is represented by coefficients d and k.
- the repetition number d is equal to 1 if the minimum number of consecutive, same modulated bits is 2 and the repetition number k is equal to 7 if the maximum number of is consecutive, same modulated bits is 8.
- the purpose of the RMTR constraint is to, for example, prevent occurrence of errors during reproduction (refer to JP-B-4998472).
- the PCWA is a concept, which is an extension of the parity preservation (PP) principle, means that two user data that are different from each other in parity are kept different from each other in parity even after being converted into modulated codes.
- FIG. 7 illustrates spectra of optical disc reproduction signals.
- An RF signal 701 is an example RF signal reproduced from an optical disc having a disc capacity of 33 GB per layer
- an RF signal 702 is an example RF signal reproduced from an optical disc having a disc capacity of 55 GB per layer (about 1.67 times as high in linear density as in the case of the RF signal 701 ).
- the RF signal 701 does not contain a 2T signal and the RF signal 702 does not contain a 2T signal and a 3T signal as a component(s) outside the signal frequency range.
- FIG. 8 illustrates example modulation patterns in which short patterns are concentrated.
- a signal component of a repetition of such short patterns is outside a restricted frequency range of an RF signal and it is highly probable that detection errors occur during reproduction.
- the present disclosure provides a data coding method characterized by comprising an error correction coding step of converting user data into error correction codes; a modulation coding step of converting the error correction codes into a series of modulated code data according to a modulation rule that is based on a prescribed conversion constraint and has coding rate that is smaller than 1; a detection step of detecting a local concentration of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N from the series of modulated code data, N being an integer that is larger than or equal to 0; a conversion judging step of judging whether to convert the series of modulated code data into another series of modulated code data, according to a manner of concentration, detected by the detection step, of the modulation marks/modulation spaces; and a modulation data conversion step of converting the series of modulated code data into another series of modulated code data if the conversion judging step judges that the conversion should be made.
- a data coding device characterized by comprising an error correction coder which converts user data into error correction codes; a modulation coder which converts the error correction codes into a series of modulated code data according to a modulation rule that is based on a prescribed conversion constraint and has coding rate that is smaller than 1; a detector which detects a local concentration of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N from the series of modulated code data, N being an integer that is larger than or equal to 0; a conversion determiner which judges whether to convert the series of modulated code data into another series of modulated code data, according to a manner of concentration, detected by the detector, of the modulation marks/modulation spaces; and a modulation data converter which converts the series of modulated code data into another series of modulated code data if the conversion determiner judges that the conversion should be made.
- the data coding method makes it possible to detect occurrence of an error due to a succession of short patterns or a local concentration of patterns before recording and avoiding its use and to thereby prevent occurrence of an error due to those patterns.
- FIG. 1 is a block diagram illustrating an example configuration of a data coding device according to a first embodiment of the present disclosure.
- FIG. 2 is a time chart illustrating an example short mark/space detecting operation which is performed by a detector.
- FIG. 3 is a time chart illustrating an example operation including short mark/space detection and conversion judgment and modulated code data conversion.
- FIG. 4 is a time chart illustrating an example short mark/space detecting operation which is performed by the detector employed in a second embodiment of the disclosure.
- FIG. 5 is a block diagram illustrating an example configuration of a data coding device according to a third embodiment of the disclosure.
- FIG. 6 is a time chart illustrating an example operation including short mark/space detection and conversion judgment and modulated code data conversion which is performed in the third embodiment.
- FIG. 7 are graphs illustrating spectra of reproduction signals from optical discs each of which has a high linear density.
- FIG. 8 is diagrams illustrating example modulation patterns in which short patterns are concentrated.
- FIG. 1 is a block diagram illustrating an example configuration of a data coding device 100 according to a first embodiment.
- the data coding device 100 includes an error correction coder 101 , a modulation coder 102 , a detector 103 , a conversion determiner 104 , and a modulation data converter 105 .
- the ECC coder 101 receives user data and outputs ECC (error correction code) data.
- the ECC coder 101 generates the ECC data by adding error correction parity to the user data according to a generation matrix for an error correction code that is selected properly to correct errors during reproduction.
- the modulation coder 102 receives the ECC data output from the error correction coder 101 and generates modulated code data according to a modulation rule that is based on a prescribed conversion constraint while performing a DC (direct current) control.
- the modulation coder 102 performs the DC control by inserting DC control (DCC) bits into the ECC data, to suppress a low-frequency variation of modulated codes.
- the modulation coder 102 generates modulated code data according to the modulation rule that is based on a prescribed conversion constraint and have a coding rate that is smaller than 1 from the ECC data in which the DCC bits are inserted.
- the modulation rule is selected properly according to a recording/reproduction transmission line characteristic of an optical disc.
- the detector 103 detects local concentrations of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N (N: an integer that is larger than or equal to 0) from a series of modulated code data.
- N an integer that is larger than or equal to 0
- consecutive short modulation marks/modulation spaces are detected as an example local concentration of modulation marks/modulation spaces.
- FIG. 2 illustrates an example short mark/space detecting operation which is performed by the detector 103 .
- modulated code data that is input in synchronism with a channel clock is indicated by one rectangle and corresponds to “0” or “1.”
- the detector 103 detects short modulation marks/modulation spaces that are shorter than or equal to a preset, prescribed minimum run-length plus N (N: an integer that is larger than or equal to 0) from a series of modulated code data and generates a short mark/space flag signal.
- N an integer that is larger than or equal to 0
- the minimum run-length corresponds to a 2T mark or space.
- shortest marks and spaces detected have a run-length “3.” In this case, the short mark/space flag signal becomes active (high in FIG. 2 ) at positions where 2T or 3T exists.
- the detector 103 stores, by means of a succession number counter, a succession number that is counted in units of a mark or space based on the short mark/space flag signal. If the count of the succession number counter exceeds a preset detection succession number, the detector 103 establishes an excess detection flag. In the example of FIG. 2 , since the preset detection succession number is “3,” the excess detection flag is rendered active when the count of the succession number counter exceeds “3,” that is, when it becomes “4.” The detector 103 includes an excess number counter for counting the number of times the excess detection flag is rendered active. The detector 103 outputs a count of the excess number counter as detection data which means a detection result of a local concentration of modulation marks/modulation spaces.
- the conversion determiner 104 judges whether to convert a pattern in which modulation marks/modulation spaces are concentrated locally in the modulated code data on the basis of the received detection data. If the detection data, that is, the count of the excess number counter, exceeds a preset conversion threshold value, the conversion determiner 104 outputs a high judgment data signal as a conversion urging flag.
- FIG. 3 illustrates an example operation including short mark/space detection and conversion judgment and modulated code data conversion.
- one modulated code data block is of 3573498T, 3580776T, 440319T, or 447597T or of T multiplied by some other number.
- a corresponding modulated code block (mi) is generated from one user data block (ui, i being an integer). Then the detector 103 outputs a count (ci) of the excess number counter as short mark/space detection data of the corresponding modulated code block.
- the conversion determiner 104 judges whether to perform block-by-block conversion.
- FIG. 3 illustrates a case that a count c 2 of the excess number counter exceeds a preset conversion threshold value.
- the conversion determiner 104 outputs a high judgment data signal as a flag for urging conversion of the interval in which the excess number counter holds the count c 2 on a block-by-block basis.
- the modulation data converter 105 converts, in response to the received conversion urging flag, user data corresponding to the modulated code data block for which the conversion execution judgment has been made into another form by performing bit scrambling using a predetermined random number series on the user data and outputs resulting user data.
- the converted user data is again subjected to error correction coding and modulation coding and is thereby converted into another piece of modulated code data.
- the modulation data converter 105 holds past user data.
- a system that outputs user data to the device 100 may the hold past user data and switches the manner of output of the user data to the device 100 according to a conversion urging flag.
- the random number series consists of fixed values or is generated according to a predetermined rule so that a reproduction device can also use it.
- the modulation data converter 105 outputs received user data as it is if the conversion urging flag is inactive.
- a modulated code data block (m 2 in FIG. 3 ) before conversion is not recorded on a disc or, if it is recorded, the same user data is recorded as a different modulated code data block (m 2 ′).
- this modulated code data block is managed properly as a block that need not be reproduced. For example, it is managed as an unreproducible region or a region that need not be reproduced by, for example, a method for managing a defect on a disc as a replaced region.
- this embodiment prevents recording of modulated code data containing a succession of short modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N (N: an integer that is larger than or equal to 0).
- N an integer that is larger than or equal to 0.
- a low-probability event that short modulation patterns occur successively can be prevented by properly setting, in advance, the above-described parameters, that is, the prescribed detection run-length, the detection succession number, and the conversion threshold value. Occurrence of detection errors during reproduction can be prevented by imposing a constraint that is extended from the conventional RMTR constraint while making reduction in modulation coding rate as small as possible.
- FIG. 4 illustrates an example short mark/space detecting operation which is performed by a detector 103 employed in the second embodiment.
- the number of short modulation marks/modulation spaces in a prescribed interval is detected as a local concentration of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N (N: an integer that is larger than or equal to 0).
- the second embodiment is different from the first embodiment in that a detection window is newly introduced.
- a modulated code data series is scanned from the head using a detection window having a prescribed interval.
- the detector 103 stores, in an intra-window detection number counter, the number of short marks/spaces in the detection window.
- the detector 103 establishes an excess detection flag.
- the subsequent operation is the same as in the first embodiment.
- a local concentration of modulation patterns can be detected instead of a succession of short modulation patterns and more patterns can be detected than in the first embodiment, whereby modulated code data can be formed according to a constraint that is extended even further. Detection errors during reproduction can thus be prevented.
- FIG. 5 is a block diagram illustrating an example configuration of a data coding device 500 according to the third embodiment.
- FIG. 6 illustrates an essential operation of a conversion determiner 504 illustrated in FIG. 5 .
- the detector 103 illustrated in FIG. 5 holds, by means of a succession number counter, a succession number that is counted in units of a mark or space.
- the conversion determiner 504 inserts a modulated code pattern having a predetermined fixed length into the succession of the short marks/spaces of the modulated code data to prevent occurrence of a local concentration of short marks/spaces of the modulated code data.
- the conversion determiner 504 illustrated in FIG. 5 inserts a modulated code pattern having a predetermined fixed length into the succession of the short marks/spaces of the modulated code data in synchronism with the received conversion judgment flag.
- a modulated code pattern having the predetermined fixed length that is inserted in converted modulated code data is indicated by black rectangles.
- data a and b immediately before and after the inserted modulated code pattern are included in an interval of a succession of short marks/spaces of an original modulated code data series and adjoin a mark/space boundary.
- the data coding device 500 may be configured in such a manner that a modulated code pattern having a predetermined fixed length is inserted into a local concentration of marks/spaces detected using a detection window illustrated in FIG. 4 .
- data a and b immediately before and after the inserted modulated code pattern are included in a pattern that corresponds to an excess detection flag and is included in the detection window.
- This embodiment makes it possible to prevent a succession of short modulation patters and a local concentration of modulation patterns that may occur at a low probability and to thereby impose a constraint that is extended from the conventional RMTR constraint while making reduction in modulation coding rate as small as possible. As a result, occurrence of a detection error during reproduction due to a succession short mark/spaces or a concentration of mark/spaces can be prevented.
- the data coding method according to the present disclosure can be applied to optical disc devices which record and reproduce data.
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JP2018-041486 | 2018-03-08 | ||
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JP2018-238611 | 2018-12-20 | ||
JP2018238611A JP2019160385A (en) | 2018-03-08 | 2018-12-20 | Data encoding method and data encoder |
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US10783923B2 true US10783923B2 (en) | 2020-09-22 |
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US20090015446A1 (en) | 2005-12-19 | 2009-01-15 | Koninklijke Philips Electronics, N.V. | Coder and a Method of Coding For Codes With a Parity-Complementary Word Assignment Having a Constraint of D1=,R=2 |
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US20090015446A1 (en) | 2005-12-19 | 2009-01-15 | Koninklijke Philips Electronics, N.V. | Coder and a Method of Coding For Codes With a Parity-Complementary Word Assignment Having a Constraint of D1=,R=2 |
JP4998472B2 (en) | 2005-12-19 | 2012-08-15 | ソニー株式会社 | Encoding apparatus and method for encoding PCWA code having constraints of d = 1 and r = 2 |
Non-Patent Citations (1)
Title |
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Wim Coene et al. "A new d=1, k=10 Soft-Decodable RLL Code with r=2 MTR Constraint and a 2-to-3 PCWA mapping for DC-control", Optical Data Storage 2006:Apr. 23-26, 2006, Montreal, Canada, pp. 168-170. |
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