US10438810B2 - Method of forming photoresist pattern and method of fabricating semiconductor device using the same - Google Patents
Method of forming photoresist pattern and method of fabricating semiconductor device using the same Download PDFInfo
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- US10438810B2 US10438810B2 US15/243,128 US201615243128A US10438810B2 US 10438810 B2 US10438810 B2 US 10438810B2 US 201615243128 A US201615243128 A US 201615243128A US 10438810 B2 US10438810 B2 US 10438810B2
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3088—Process specially adapted to improve the resolution of the mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00912—Treatments or methods for avoiding stiction of flexible or moving parts of MEMS
- B81C1/0092—For avoiding stiction during the manufacturing process of the device, e.g. during wet etching
- B81C1/00952—Treatments or methods for avoiding stiction during the manufacturing process not provided for in groups B81C1/00928 - B81C1/00944
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
Definitions
- Example embodiments relate to a method of forming a photoresist pattern and/or a method of fabricating a semiconductor device using the same.
- a photoresist layer as a photoresist pattern having a fine line width. To this end, it is advantageous to substantially prevent the photoresist pattern from lifting, and to improve line edge roughness and line width roughness of the pattern.
- Example embodiments relate to a method of fabricating a semiconductor device with improved reliability.
- Example embodiments relate to a method of fabricating a semiconductor device including forming a semiconductor pattern having a uniform and fine line width.
- Example embodiments relate to providing a method of forming a photoresist pattern having a uniform and fine line width.
- Example embodiments relate to a method of forming a photoresist pattern by which the pattern is refrained from collapsing during a process of forming the pattern, and a method of fabricating a semiconductor device using the same.
- Example embodiments relate to a method of fabricating a semiconductor device, the method includes forming a mask layer on a substrate, forming a photoresist pattern on the mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions to the same etchant, removing the first liquid, etching the pattern filler after removing the first liquid, etching the mask layer via the photoresist pattern to form a mask pattern and etching the substrate via the mask pattern to form a fine pattern.
- the first height is larger than the second height, and the etch rate of the pattern filler is smaller as a difference between the first height and the second height is larger.
- the etching the pattern filler comprises at least partially etching the pattern portions so that the pattern portions have a third height that is lower than the first height by a first difference, and the etch rate of the pattern filler is larger as a difference between the first difference and the second height is larger.
- the second height is about 30% of the first height or greater.
- the etch rate of the pattern filler is about 150% of the etch rate of the pattern portions or greater.
- the pattern filler contains oxygen atoms, and includes a material having an Ohnishi parameter of about 4 or greater.
- the pattern filler includes at least one of a dextrin material, a dextrin derivative material and a polyester-based material.
- the etching of the pattern filler comprises etching the pattern filler via a dry etching process.
- Example embodiments relate to a method of fabricating a semiconductor device that includes forming a photoresist pattern on a mask layer, the photoresist pattern having pattern portions at a first height and recess portions, applying a first liquid onto the photoresist pattern, filling the recess portions with a pattern filler at a second height, the pattern filler having an higher etch rate than the etch rate of the pattern portions with respect to the same etchant, removing the first liquid, and after removing the first liquid, etching the pattern filler to form the photoresist pattern such that the pattern portions is at least partially etched so that the pattern portions have a third height that is lower than the first height by a first difference.
- the first height is larger than the second height, and the etch rate of the pattern filler is smaller as a difference between the first height and the second height is larger.
- the etch rate of the pattern filler is larger as a difference between the first difference and the second height is larger.
- the second height is about 30% of the first height or greater.
- the etch rate of the pattern filler is about 150% of the etch rate of the pattern portions or greater.
- the pattern filler contains oxygen atoms, and includes a material having an Ohnishi parameter of about 4 or greater.
- the pattern filler includes at least one of a dextrin material, a dextrin derivative material and a polyester-based material.
- Example embodiments relate to a method of reducing or preventing deterioration of a photoresist pattern during a manufacturing process thereof, the method including forming the photoresist pattern on a mask layer, and at least one recessed portion adjacent to the at least one pattern portion, the photoresist pattern having at least one pattern portion having a first height, adding a pattern filler to the at least one recessed portion up to a second height, the second height being lower than the first height and greater than a threshold height, and removing the pattern filler.
- FIG. 1 is a flow chart for illustrating a method of forming a photoresist pattern according to some example embodiments
- FIGS. 2 to 12 are views for illustrating processing steps of a method of forming a photoresist pattern according to some example embodiments
- FIG. 13 is a cross-sectional view of a processing step of a method of forming a photoresist pattern according to some example embodiments
- FIG. 14 is a flowchart for illustrating a method of fabricating a semiconductor device according to some example embodiments.
- FIGS. 15 to 20 are cross-sectional views for illustrating processing steps of a method for fabricating a semiconductor device according to some example embodiments
- FIG. 21 is a block diagram of an electronic system including a semiconductor device according to some example embodiments.
- FIG. 22 shows an example of a semiconductor system that can employ the semiconductor devices fabricated according to some example embodiments.
- inventive concepts may be understood more readily by reference to the following detailed description of example embodiments and the accompanying drawings.
- inventive concepts may, however, be embodied in many different forms and should not be construed as being limited to the example embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the disclosure to those skilled in the art; and the inventive concepts will only be defined by the appended claims.
- the thickness of layers and regions are exaggerated for clarity.
- first, second, and the like may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer and/or section from another element, component, region, layer and/or section. Thus, for example, a first element, a first component or a first section discussed below could be termed a second element, a second component or a second section without departing from the teachings of the present inventive concepts.
- spatially relative terms such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the example term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
- Example embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of example embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region.
- a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.
- the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of example embodiments.
- tubular elements of the embodiments may be cylindrical, other tubular cross-sectional forms are contemplated, such as square, rectangular, oval, triangular and others.
- the cross-sectional view(s) of device structures illustrated herein provide support for a plurality of device structures that extend along two different directions as would be illustrated in a plan view, and/or in three different directions as would be illustrated in a perspective view.
- the two different directions may or may not be orthogonal to each other.
- the three different directions may include a third direction that may be orthogonal to the two different directions.
- the plurality of device structures may be integrated in a same electronic device.
- an electronic device may include a plurality of the device structures (e.g., memory cell structures or transistor structures), as would be illustrated by a plan view of the electronic device.
- the plurality of device structures may be arranged in an array and/or in a two-dimensional pattern.
- FIGS. 1 to 12 a method of forming a photoresist pattern according to some example embodiments will be described with reference to FIGS. 1 to 12 .
- FIG. 1 is a flow chart for illustrating a method of forming a photoresist pattern according to some example embodiments.
- FIGS. 2 to 12 are views for illustrating processing steps of a method of forming a photoresist pattern according to some example embodiments.
- FIGS. 2 to 10 are cross-sectional views
- FIG. 11 is a perspective view
- FIG. 12 is a cross-sectional view taken along line A-A′ of FIG. 11 .
- a method of forming a photoresist includes forming a photoresist layer on a mask layer (step S 100 ), exposing the photoresist layer to light to form a pattern (step S 110 ), applying a developing solution onto the photoresist layer to form a photoresist pattern (step S 120 ), applying a first liquid on the photoresist pattern (step S 130 ), filling the photoresist pattern with a pattern filler (step S 140 ), removing the first liquid (step S 150 ), and etching the pattern filler (step S 160 ).
- a photoresist layer is formed on a mask layer (step S 100 ).
- the mask layer 11 may be made of, but is not limited to, a material including at least one of a silicon oxide film, a silicon nitride film and a silicon oxynitride.
- the mask layer 11 may be formed on a substrate 10 .
- the mask layer 11 may be made of or include a material having an etch selectivity that is different from the etch sensitivity of the substrate 10 .
- the photoresist layer 13 may be made by, e.g., chemical vapor deposition, spin coating, plasma enhanced CVD (PECVD), high density plasma CVD (HDP-CVD), etc.
- PECVD plasma enhanced CVD
- HDP-CVD high density plasma CVD
- the thickness of the photoresist layer 13 on the mask layer 11 may range from about 30 to about 60 nm.
- the thickness of the photoresist layer 13 on the mask layer 11 may be about 50 nm.
- the thickness of the photoresist layer 13 may be determined taking into account the size of a target pattern.
- a part of the pattern formed as the photoresist layer 13 may be removed during a subsequent process of removing a pattern filler. Accordingly, the thickness of the photoresist layer 13 may be determined taking into account the removed part of the pattern.
- photoresist is sprayed onto the mask layer 11 while the mask layer 11 is rotating at a low speed, and then the mask layer 11 is accelerated up to a desired, or alternatively predetermined rotation speed so that it rotates at a high speed, thereby adjusting the thickness of the photoresist layer 13 to a desired thickness.
- the mask layer is decelerated to a low speed, to remove residuals.
- a chemical treatment may be performed on the surface of the mask layer 11 or the substrate 10 before forming the photoresist layer 13 , in order to enhance adhesion with the photoresist layer 13 .
- the chemical treatment may be or include, hexamethyldisilazane (HMDS) treatment, for example. If the surface of the mask layer 11 or the substrate 10 is hydrophilic, the surface may be changed to be hydrophobic via the chemical treatment, so as to enhance the adhesion with the photoresist layer 13 .
- HMDS hexamethyldisilazane
- a first baking process may be performed.
- the photoresist layer 13 applied on the mask layer 11 is heated, so that a solvent contained in the photoresist layer 13 may be removed.
- the first baking process H 1 may be performed at a temperature between about 50° C. and about 250° C. for about 30 to about 180 seconds, so that a solvent contained in the photoresist layer 13 may be removed.
- the density of the photoresist layer 13 can be increased via the first baking process H 1 to thereby reduce the sensitivity to the environmental change.
- contamination of the exposure equipment and the mask due to residual organic solvents can be reduced or substantially prevented, and the light-sensitive characteristics of the photoresist layer 13 can be maintained substantially constant.
- the photoresist layer is exposed to light to thereby form patterns (step S 110 ).
- a photomask ML for forming patterns on the photoresist layer 13 is placed, and light L is subsequently irradiated thereon to form first and second patterns 13 a and 13 b.
- the first pattern 13 a may be formed where the light L is not irradiated, whereas the second pattern 13 b may be formed where the light L is irradiated. If the photoresist layer 13 is a positive photoresist, a chemical reaction takes place in the area where the light L is irradiated, so that the area is removed by a developing solution. If the photoresist layer 13 is a negative photoresist, the area where the light L is not irradiated is removed by a developing solution.
- the photoresist layer 13 is a positive photoresist in this example embodiment, it is to be understood that the photoresist layer 13 is not limited to the positive photoresist.
- the exposure process at this step may be an extreme ultraviolet (EUV) exposure process for forming a fine pattern, and may irradiate the light L using i-line, a krypton fluoride (KrF) laser, or an argon fluoride (ArF) laser, for example.
- EUV extreme ultraviolet
- KrF krypton fluoride
- ArF argon fluoride
- the exposure process is performed using the photo mask ML in this example embodiment, it is merely illustrative and is not limiting.
- the exposure process may be performed without using the photo mask, i.e., a maskless exposure process.
- a second baking process may be performed.
- the photoresist layer 13 may be dried.
- the second baking process H 2 may be performed at a temperature between about 50° C. and about 250° C. for about 50 to about 250 seconds. However, this is merely illustrative and other temperature ranges and time ranges may be applicable.
- the photoresist layer 13 may be an ArF photoresist using the wavelength of about 193 nm, the photoresist layer 13 may be a chemical amplified resist.
- the second baking process H 2 may affect the sensitivity of the photoresist layer 13 .
- a developing solution may be applied onto the photoresist layer, thereby forming a photoresist pattern (step S 120 ).
- FIG. 6A shows a resulting photoresist pattern according to this example embodiment where the photoresist layer 13 is a positive photoresist.
- FIG. 6A shows a resulting photoresist pattern according to this example embodiment where the photoresist layer 13 is a negative photoresist.
- the photoresist pattern 14 may include pattern portions 14 a and recess portions 14 b . As shown in FIG. 6A , if the photoresist layer 13 is a positive photoresist, the first pattern 13 a (see FIG. 4 ) may become the pattern portions 14 a , and the second pattern 13 b (see FIG. 4 ) is removed such that the recess portions 14 b may be formed.
- the photoresist layer 13 is a negative photoresist
- the first pattern 13 a (see FIG. 4 ) is removed such that the recess portions 14 b may be formed, and the second pattern 13 b (see FIG. 4 ) may become the pattern portions 14 a.
- the developing solution 15 may include, e.g., a water-soluble alkali solution such as tetramethyl-ammonium-hydroxide (TMAH) water solution.
- TMAH tetramethyl-ammonium-hydroxide
- the developing solution 15 may include, but is not limited to, e.g., n-BA(n-butyl acetate) or 2-heptanone.
- the developing time with the developing solution 15 may be determined based on the thickness of the photoresist layer 11 .
- a first liquid is applied onto the photoresist pattern (step S 130 ).
- the first liquid 17 is applied onto the photoresist pattern 14 including the pattern portions 14 a and the recess portions 14 b , thereby removing impurities created during the process of developing with the developing solution 15 .
- the first liquid 17 may be, but is not limited to, a cleaning solution.
- the first liquid 17 may be a mixed solution of the cleaning solution and the developing solution 15 . If the first liquid 17 is a cleaning solution, it may be, but is not limited to, e.g., deionized (DI) water or an organic solvent.
- DI deionized
- the type of the first liquid 17 is not particularly limited as long as it can generate surface tension with the side walls of the pattern portions 14 a . A more detailed description thereof will be made below.
- the photoresist pattern is filled with a pattern filler (step S 140 ).
- the recess portions 14 b of the photoresist pattern 14 are filled with a pattern filler 19 . Since the density of the pattern filler 19 is higher than the density of the first liquid 17 , the first liquid 17 can float on the pattern filler 19 . That is, by utilizing the difference in density, the recess portions 14 b can be filled with the pattern filler 19 without removing the first liquid 17 in the recess portions 14 b.
- a pattern portion 14 a may have a first height H 1 and a first width W 1 .
- the pattern filler 19 with which the recess portion 14 b is filled, may have a second height H 2 and a second width W 2 . Accordingly, the pattern filler 19 and the first liquid 17 may exist together in the recessed portion 14 b . However, this is merely illustrative. For example, only the pattern filler 19 may exist in the recessed portion 14 b.
- the recess portions 14 b of the photoresist pattern 14 are filled with the pattern filler 19 , so that it is possible to substantially prevent the pattern portions 14 b from falling down and/or collapsing during the subsequent process of removing the first liquid 17 .
- FIGS. 9A and 9B a more detailed description will be given with reference to FIGS. 9A and 9B .
- FIG. 9A is a cross-sectional view showing an example where no pattern filler exists in the recess portions 14 b of the photoresist pattern 14 .
- FIG. 9B is a set of cross-sectional views showing examples where the pattern filler 19 exists in the recess portions 14 b at different heights.
- the first liquid 17 existing in a recess portion 14 b may have a high surface tension on the interface with a pattern portion 14 a .
- a force is created that pulls the pattern portions 14 a laterally.
- the surface tension may be about 72 dyne/cm.
- the surface tension may be about 30 dyne/cm.
- the pattern portion 14 a is likely to collapse.
- the recess portions 14 b are filled with the pattern filler 19 to thereby reduce the capillary force, so that it is possible to substantially prevent the pattern portions 14 a from collapsing.
- the height H 2 of the pattern filler 19 differs in cases (a), (b) and (c).
- the height-to-width ratio of the pattern portions 14 a may be 2 or greater.
- the second height H 2 may be about 10% of the first height H 1 or less. In this case, it is somewhat possible to substantially prevent the pattern portions 14 a from being lifted. However, the area of the interface between the pattern portions 14 a and the first liquid 17 is still sufficiently large, so that it is difficult to substantially prevent the pattern portions 14 a from collapsing due to the capillary force.
- the second height H 2 is about 30% of the first height H 1 or greater. Accordingly, the area of the interface between the first liquid 17 and the pattern portions 14 a is reduced, so that the capillary force can be reduced. As a result, it is possible to substantially prevent the pattern portions 14 a from collapsing.
- the first height H 1 of the pattern portions 14 a may be about 50 nm, and the second height H 2 of the pattern filler 19 may be about 25 nm.
- the area of the interface between the first liquid 17 existing in the recess portions 14 b and the pattern portions 14 a is reduced by about 50% or more, compared to the area where no pattern filler exists, so that the capillary force can be reduced as well.
- the second height H 2 of the pattern filler 19 may be about 30% of the first height H 1 or greater.
- the recess portions 14 b can be substantially filled with the pattern filler 19 . Only if the second height H 2 of the pattern filler 19 is at least about 30% of the first height H 1 , the surface tension of the first liquid 17 in contact with the pattern portions 14 a can be reduced, and in turn the capillary force generated when the first liquid 17 is substantially removed can be reduced such that the pattern portions 14 a can stand against the capillary force.
- the etch rate of the pattern filler 19 may be higher than the etch rate of the pattern portions 14 a with respect to the same etchant. Specifically, the etch rate of the pattern filler 19 may be about 150% of the etch rate of the pattern portions 14 a with respect to the same etchant.
- the pattern filler 19 may be substantially removed. Accordingly, after the first liquid 17 is removed, the pattern filler 19 is no longer necessary and thus may be removed. Detailed description thereof will be made below with respect to removing the pattern filler 19 .
- the first liquid 17 covering the photoresist pattern 14 is removed, thereby exposing the upper surface of the pattern filler 19 .
- the pattern portions 14 a of the photoresist pattern 14 do not collapse or fall down even after the first liquid 17 is removed.
- the first liquid 17 may be removed by, but is not limited to, spin dry.
- the method of forming a photoresist pattern includes filling the recess portions 14 b with the pattern filler 19 , so that the area of the interface between the pattern portions 14 a and the first liquid 17 is reduced with the surface tension. As a result, the capillary force due to the surface tension is reduced when the first liquid 17 is removed. Accordingly, it is possible to substantially prevent the pattern portions 14 a of the photoresist pattern 14 from collapsing and/or falling down.
- defects in the photoresist pattern are minimized, and thus it is possible to form a substantially uniform and fine semiconductor pattern in a subsequent process by using the photoresist pattern.
- step S 160 the pattern filler existing in the recess portions of the photoresist pattern is etched out and thus removed.
- the pattern filler 19 existing in the recess portions 14 b of the photoresist pattern 14 is removed, thereby completing the photoresist pattern 14 .
- the pattern filler 19 may be removed via, e.g., an etching process.
- the etching process may be a dry etch process.
- the dry etch process may use a fluorine gas as an etching gas.
- fluorine gas is merely illustrative and other gases may be used.
- the pattern filler 19 and the pattern portions 14 a may undergo the same etching process in a single chamber. Accordingly, the pattern filler 19 may include a material having a higher etch rate than the etch rate of the pattern portions 14 a with respect to the same etchant. Specifically, the etch rate of the pattern filler 19 may be about 150% of the etch rate of the pattern portions 14 a or greater.
- the pattern filler 19 may be substantially removed while the pattern portions 14 a are partially removed. It is to be noted that the pattern portions 14 a is also partially removed and thus the height of the pattern portions 14 a may be changed from the first height H 1 to a third height H 3 that is lower than the first height H 1 .
- the third height H 3 may be the minimum height that allows the pattern portions 14 a to work as a photoresist pattern. That is, the pattern portions 14 a have to maintain at least the third height H 3 in order to work as a photoresist pattern.
- the first height H 1 of the pattern portions 14 a may be about 50 nm
- the second height H 2 of the pattern filler 19 may be about 15 nm.
- the second height H 2 may be about 30% of the first height H 1 .
- the etch rate of the pattern filler 19 is about 150% of the etch rate of the pattern portions 14 a
- the patterned filler 19 of about 15 nm can be substantially removed while the height of the pattern portions 14 a is reduced by about 10 nm.
- the third height H 3 of the pattern portions 14 a after the pattern filler 19 is removed may be about 40 nm.
- the first height H 1 of the pattern portions 14 a may be about 50 nm
- the second height H 2 of the pattern filler 19 may be about 25 nm.
- the second height H 2 may be about 50% of the first height H 1 .
- the etch rate of the pattern filler 19 is about 250% of the etch rate of the pattern portions 14 a
- the patterned filler 19 can be substantially removed while the height of the pattern portions 14 a is reduced by about 10 nm.
- the third height H 3 of the pattern portions 14 a may be about 40 nm after the pattern filler 19 is removed.
- the etch rate of the pattern filler 19 may be relatively high when the difference between the first height H 1 of the pattern portions 14 a and the second height H 2 of the pattern filler 19 is small, since a relatively large amount of pattern filler 19 has to be removed while a certain amount of the pattern portions 14 a is removed.
- the etch rate of the pattern filler 19 may be relatively low when the difference between the first height H 1 of the pattern portions 14 a and the second height H 2 of the pattern filler 19 is large, since a relatively small amount of pattern filler 19 may be removed while the certain amount of the pattern portions 14 a is removed. That is, the etch rate of the pattern filler 19 may be in inverse proportion to the difference between the first height H 1 and the second height H 2 .
- the pattern portions 14 a may have the third height H 3 of, for example, about 20 nm or higher.
- the etch rate of the pattern filler 19 may be in proportion to the difference between a first difference and the second height H 2 , wherein the first difference refers to the difference between the first height H 1 and the third height H 3 .
- the pattern filler 19 can be substantially removed even if the etch rate of the pattern filler 19 is low.
- the pattern filler 19 can be substantially removed only if the etch rate of the pattern filler 19 is relatively high.
- the etch rate of the pattern filler 19 has to be larger as the difference between the first difference and the second height H 2 is larger.
- the pattern filler 19 may contain oxygen atoms and may be or include a material having an Ohnishi parameter of about 4 or greater. A higher Ohnishi parameter typically indicates a higher etch rate of a material. In this example embodiment, the pattern filler 19 may be a material having an Ohnishi parameter of about 4 or greater.
- the pattern filler 19 may be a dextrin material.
- the dextrin material may be expressed in Formula 1 below:
- the pattern filler 19 may be a dextrin derivative material.
- the dextrin derivative material may be expressed in Formula 2 below:
- the recess portions 14 b of the photoresist pattern 14 are filled with the pattern filler 19 . Accordingly, it is possible to substantially prevent the pattern portions 14 a from collapsing or falling down due to the capillary force generated when the first liquid 17 such as a cleaning solution and/or a developing solution is removed.
- the photoresist pattern 14 with improved line edge roughness (LER) and line width roughness (LWR) can be formed, as shown in FIG. 11 .
- FIG. 13 is a cross-sectional view of a processing step of a method of forming a photoresist pattern according to some example embodiments.
- the method of forming a photoresist pattern according to this example embodiment is substantially identical to the method described above with respect to FIGS. 1 to 12 , except for the processing step shown in FIG. 8 .
- the processing step shown in FIG. 13 is the subsequent processing step to the processing step shown in FIG. 7 .
- Like reference numerals used in FIGS. 1 to 12 denote like elements in FIG. 13 , and descriptions of the identical elements will not be made to avoid redundancy.
- the pattern filler 19 may cover the photoresist pattern 14 .
- the photoresist pattern 14 may include pattern portions 14 a and recess portions 14 b .
- the recess portions 14 b may be substantially filled with the pattern filler 19 .
- the height of the pattern filler 19 may be larger than the height of the pattern portions 14 b.
- the density of the pattern filler 19 is higher than the density of the first liquid 17 , and thus the pattern filler 19 can spread into the recess portions 14 b . Accordingly, the first liquid 17 in the recess portions 14 b can be substantially removed, and thus the capillary force generated when the first liquid 17 is removed in a subsequent process may not cause a problem.
- the etch rate of the pattern filler 19 may be larger than the etch rate of the pattern portions 14 a.
- FIG. 14 is a flowchart for illustrating a method of fabricating a semiconductor device according to some example embodiments.
- FIGS. 15 to 20 are cross-sectional views for illustrating processing steps of a method for fabricating a semiconductor device according to some example embodiments.
- the method includes forming a mask layer on a substrate (step S 200 ), forming a photoresist layer on the mask layer (step S 100 ), exposing the photoresist layer to light to form a pattern (step S 110 ), applying a developing solution onto the photoresist layer to form a photoresist pattern (step S 120 ), applying a first liquid on the photoresist pattern (step S 130 ), filling the photoresist pattern with a pattern filler (step S 140 ), removing the first liquid (step S 150 ), etching the pattern filler (step S 160 ), etching the mask layer via the photoresist pattern to form a mask pattern (step S 170 ), and etching the substrate via the mask pattern to form a fine pattern (step S 180 ).
- the method of fabricating a semiconductor device includes the method of forming a photoresist pattern described above with respect to FIGS. 1 to 12 . Accordingly, steps S 100 to S 160 according to this example embodiment are substantially identical to steps S 100 to S 160 of the method of forming a photoresist pattern described above with respect to FIGS. 1 to 12 . Therefore, descriptions of the identical elements will not be made to avoid redundancy.
- the double patterning technology (DPT) process will be described. It is to be noted that the DPT process is merely an example and the method of forming a photoresist pattern described above with respect to FIGS. 1 to 12 is not limited thereto.
- a mask layer is formed on a substrate (S 200 ).
- the substrate may include a semiconductor material.
- the substrate may include at least one of Si, Ge, SiGe, GaP, GaAs, SiC, SiGeC, InAs and InP.
- the substrate includes a semiconductor material herein, the example embodiments are not limited thereto.
- the substrate may include any material as long as a fine pattern can be formed via etching.
- Another target layer may or may not be formed on the substrate. That is, if the substrate itself is a target layer, another target layer may not be formed thereon.
- the mask layer may be made of or include a material having an etch selectivity relative to the substrate.
- the mask layer may be one of silicon nitride, silicon oxide and silicon oxynitride.
- the mask layer may be formed by deposition via a PE-CVD process.
- the mask layer may be formed by using silicon-based spin-on hard mask (Si—SOH) such as spin-on glass (SOG).
- the example method includes forming a photoresist layer on a mask layer (step S 100 ), exposing the photoresist layer to light to form a pattern (step S 110 ), applying a developing solution onto the photoresist layer to form a photoresist pattern (step S 120 ), applying a first liquid on the photoresist pattern (step S 130 ), filling the photoresist pattern with a pattern filler (step S 140 ), removing the first liquid (step S 150 ), and etching the pattern filler (step S 160 ).
- Steps S 110 to S 160 are substantially identical to those described above with reference to FIGS. 1 to 12 , and thus will not be described to avoid redundancy.
- the mask layer is etched via the photoresist pattern, thereby forming a mask pattern (step S 170 ).
- the mask film 11 may be etched via the photoresist pattern 14 , such that a mask pattern 11 a may be formed.
- step S 180 the substrate is etched via the mask pattern, thereby forming a fine pattern.
- a spacer film 21 may be formed on the mask pattern 11 a.
- the spacer film 21 may be formed along the mask pattern 11 a such that it conforms to the mask pattern 11 a , and may cover the upper surface and side walls of the mask pattern 11 a.
- the spacer film 21 may be made of or include a material having an etch selectivity relative to the mask pattern 11 a .
- the spacer film 21 may include, but is not limited to, e.g., silicon oxide such as a medium temperature oxide (MTO), a high-temperature oxide (HTO) or an atomic layer deposition (ALD) oxide.
- MTO medium temperature oxide
- HTO high-temperature oxide
- ALD atomic layer deposition
- a part of the spacer film 21 is removed.
- a part of the spacer film 21 may be removed by using an etch back process. That is, a part of the spacer film 21 is removed by an etch back process to thereby form spacers 21 a . By doing so, the upper surface of the mask pattern 11 a may be exposed.
- the mask layer 11 a is removed.
- the upper surface of the substrate 10 may be exposed.
- the substrate 10 is etched using the spacers 21 a as masks, thereby forming a fine pattern 10 a .
- the fine pattern 10 a may have, but is not limited to, a fin shape.
- the fine pattern is formed by using the photoresist pattern produced by the above-described method of forming a photoresist pattern, so that the fine pattern is more uniform and has less defects.
- FIG. 21 is a block diagram of an electronic system including a semiconductor device according to some example embodiments.
- the electronic system 1100 may include a controller 1110 , an I/O (input/output) device 1120 , a memory device 1130 , an interface 1140 and a bus 1150 .
- the controller 1110 , the I/O device 1120 , the memory device 1130 and/or the interface 1140 may be connected to one another via the bus 1150 .
- the bus 1150 may serve as a path via which data is transferred.
- the controller 1110 may include at least one of a microprocessor, a digital signal processor, a microcontroller and logic elements capable of performing similar functions.
- the I/O device 1120 may include a keypad, a keyboard, a display device, etc.
- the memory device 1130 may store therein data and/or instructions, for example.
- the interface 1140 may be capable of transmitting/receiving data to/from a communication network.
- the interface 1140 may be either a wired or wireless interface.
- the interface 1140 may include an antenna, a wired/wireless transceiver or the like.
- the electronic system 1100 may be an operational memory for improving the operation of the controller 1110 and may further include a high-speed DRAM and/or SRAM, for example.
- the semiconductor devices 1 to 11 may be provided in the memory device 1130 or may be provided as a part of the controller 1110 , the I/O device 1120 , for example.
- the electronic system 11000 may be applied to a PDA (personal digital assistant portable computer, a web tablet, a wireless phone, a smart phone, a mobile phone, a digital music player, a memory card, or any electronic device capable of transmitting/receiving information in a wireless environment.
- PDA personal digital assistant portable computer
- web tablet a wireless phone
- smart phone a smart phone
- mobile phone a digital music player
- memory card or any electronic device capable of transmitting/receiving information in a wireless environment.
- FIG. 22 shows an example of a semiconductor system that can employ the semiconductor devices fabricated according to some example embodiments.
- FIG. 22 shows a tablet PC.
- the semiconductor devices fabricated according to some example embodiments may be used for a table PC, a laptop computer, etc.
- the semiconductor devices fabricated according to some example embodiments may be employed by other integrated circuit devices than those mentioned above.
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Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07142349A (en) | 1993-11-16 | 1995-06-02 | Mitsubishi Electric Corp | Method for preventing tilting of photoresist pattern in developing step |
JPH07335519A (en) | 1994-06-03 | 1995-12-22 | Hitachi Ltd | Formation of pattern |
KR100269616B1 (en) | 1997-12-30 | 2000-12-01 | 김영환 | Method of forming resist pattern |
JP2003142368A (en) | 2001-10-31 | 2003-05-16 | Matsushita Electric Ind Co Ltd | Method for forming pattern |
US20060040216A1 (en) | 2004-08-20 | 2006-02-23 | Dongbuanam Semiconductor, Inc. | Method of patterning photoresist film |
US7119025B2 (en) * | 2004-04-08 | 2006-10-10 | Micron Technology, Inc. | Methods of eliminating pattern collapse on photoresist patterns |
US7214474B2 (en) | 2004-06-29 | 2007-05-08 | Intel Corporation | Wash composition with polymeric surfactant |
US20100278922A1 (en) * | 2008-01-08 | 2010-11-04 | Oshadi Drug Administration Ltd. | Methods and compositions for oral administration of insulin |
US20110061908A1 (en) * | 2009-09-14 | 2011-03-17 | Konica Minolta Holdings, Inc. | Pattern electrode manufacturing method and pattern electrode |
US20110111604A1 (en) | 2007-10-23 | 2011-05-12 | Eui Kyoon Kim | Plasma surface treatment to prevent pattern collapse in immersion lithography |
JP2013021152A (en) | 2011-07-12 | 2013-01-31 | Dainippon Printing Co Ltd | Method for forming resist pattern |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970008372A (en) * | 1995-07-31 | 1997-02-24 | 김광호 | Fine Pattern Formation Method of Semiconductor Device |
KR100567874B1 (en) * | 2003-02-04 | 2006-04-04 | 동부아남반도체 주식회사 | Patterning method in a semiconductor |
KR20070051196A (en) * | 2005-11-14 | 2007-05-17 | 삼성전자주식회사 | Method for forming patterns of semiconductor device |
-
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Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07142349A (en) | 1993-11-16 | 1995-06-02 | Mitsubishi Electric Corp | Method for preventing tilting of photoresist pattern in developing step |
JPH07335519A (en) | 1994-06-03 | 1995-12-22 | Hitachi Ltd | Formation of pattern |
KR100269616B1 (en) | 1997-12-30 | 2000-12-01 | 김영환 | Method of forming resist pattern |
JP2003142368A (en) | 2001-10-31 | 2003-05-16 | Matsushita Electric Ind Co Ltd | Method for forming pattern |
US7119025B2 (en) * | 2004-04-08 | 2006-10-10 | Micron Technology, Inc. | Methods of eliminating pattern collapse on photoresist patterns |
US8956981B2 (en) | 2004-04-08 | 2015-02-17 | Micron Technology, Inc. | Methods of eliminating pattern collapse on photoresist patterns |
US7214474B2 (en) | 2004-06-29 | 2007-05-08 | Intel Corporation | Wash composition with polymeric surfactant |
US20060040216A1 (en) | 2004-08-20 | 2006-02-23 | Dongbuanam Semiconductor, Inc. | Method of patterning photoresist film |
US20110111604A1 (en) | 2007-10-23 | 2011-05-12 | Eui Kyoon Kim | Plasma surface treatment to prevent pattern collapse in immersion lithography |
US20100278922A1 (en) * | 2008-01-08 | 2010-11-04 | Oshadi Drug Administration Ltd. | Methods and compositions for oral administration of insulin |
US20110061908A1 (en) * | 2009-09-14 | 2011-03-17 | Konica Minolta Holdings, Inc. | Pattern electrode manufacturing method and pattern electrode |
JP2013021152A (en) | 2011-07-12 | 2013-01-31 | Dainippon Printing Co Ltd | Method for forming resist pattern |
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