TWM630924U - Chip testing equipment - Google Patents
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本創作之實施例係有關於一種晶片測試設備,特別係有關於一種具有真空吸附定位功能之晶片測試設備。The embodiments of the present invention relate to a chip testing apparatus, and particularly relate to a chip testing apparatus having a vacuum adsorption positioning function.
習知之晶片測試設備具有測試頭以及托盤,晶片由該托盤進行輸送。測試頭適於從該托盤上取起該晶片以進行測試。在習知技術中,托盤在移動過程中,例如是啟動與停止時,特別是突然停止時,容易發生過度的震動,造成晶片從托盤上震出,造成產品的損耗,甚至可能會影響生產良率以及產線的運行效率。A conventional wafer testing apparatus has a test head and a tray from which the wafers are transported. A test head is adapted to pick up the wafer from the tray for testing. In the prior art, during the movement of the tray, such as when starting and stopping, especially when suddenly stopped, excessive vibration is likely to occur, causing the wafer to shake out of the tray, resulting in product loss, and may even affect the production quality. rate and the operating efficiency of the production line.
本創作之實施例係為了欲解決習知技術之問題而提供之一種晶片測試設備,適於對一晶片進行測試,包括一第一真空吸力單元、一第二真空吸力單元、一托盤以及一測試頭。托盤包括一晶片容置部以及一真空吸口,該真空吸口設於該晶片容置部,該第二真空吸力單元連通該真空吸口,其中,當該晶片置於該晶片容置部之內時,該第二真空吸力單元適於透過該真空吸口對該晶片提供吸力以對該晶片進行限位。測試頭包括至少一真空吸嘴,該第一真空吸力單元連通該真空吸嘴,該第一真空吸力單元適於透過該真空吸嘴對該晶片進行真空吸附,以將該晶片帶離該托盤。The embodiment of the present invention provides a wafer testing apparatus to solve the problems of the prior art, which is suitable for testing a wafer, and includes a first vacuum suction unit, a second vacuum suction unit, a tray and a tester head. The tray includes a wafer accommodating portion and a vacuum suction port, the vacuum suction port is disposed in the wafer accommodating portion, and the second vacuum suction unit communicates with the vacuum suction port, wherein, when the wafer is placed in the wafer accommodating portion, The second vacuum suction unit is adapted to provide suction to the wafer through the vacuum suction port to limit the position of the wafer. The test head includes at least one vacuum suction nozzle, the first vacuum suction unit is connected with the vacuum suction nozzle, and the first vacuum suction unit is adapted to vacuum suction the wafer through the vacuum suction nozzle, so as to bring the wafer away from the tray.
在一實施例中,該晶片測試設備更包括一第一感測單元以及一處理單元,該處理單元耦接該第一感測單元以及該第二真空吸力單元,該測試頭適於在一第一測試頭位置以及一第二測試頭位置之間移動,當該測試頭位於該第二測試頭位置時,在該測試頭適於從該托盤取起該晶片,在該測試頭從該第一測試頭位置移動至該第二測試頭位置的過程中,該第一感測單元被該測試頭啟動而傳送一第一感測訊號,該處理單元依據該第一感測訊號而關閉該第二真空吸力單元。In one embodiment, the wafer testing apparatus further includes a first sensing unit and a processing unit, the processing unit is coupled to the first sensing unit and the second vacuum suction unit, and the test head is suitable for a first Moves between a test head position and a second test head position, when the test head is in the second test head position, where the test head is adapted to pick up the wafer from the tray, and when the test head is at the second test head position During the process of moving the test head position to the second test head position, the first sensing unit is activated by the test head to transmit a first sensing signal, and the processing unit turns off the second sensing signal according to the first sensing signal Vacuum suction unit.
在一實施例中,該第一感測單元包括一第一發送元件以及一第一接受元件,該第一發送元件對該第一接受元件發送一第一感測光束,在該測試頭從該第一測試頭位置移動至該第二測試頭位置的過程中,該第一感測光束被該測試頭遮擋,而該第一感測單元因此被啟動而傳送該第一感測訊號。In one embodiment, the first sensing unit includes a first transmitting element and a first receiving element, the first transmitting element transmits a first sensing beam to the first receiving element, and the test head transmits a first sensing beam from the test head to the first receiving element. When the position of the first test head is moved to the position of the second test head, the first sensing beam is blocked by the test head, and the first sensing unit is thus activated to transmit the first sensing signal.
在一實施例中,該晶片測試設備更包括一第二感測單元,該處理單元耦接該第二感測單元以及該第二真空吸力單元,當該晶片被置於該晶片容置部時,該第二感測單元被該啟動而傳送一第二感測訊號,該處理單元適於依據該第二感測訊號而開啟該第二真空吸力單元。In one embodiment, the wafer testing apparatus further includes a second sensing unit, and the processing unit is coupled to the second sensing unit and the second vacuum suction unit, when the wafer is placed in the wafer accommodating portion , the second sensing unit is activated to transmit a second sensing signal, and the processing unit is adapted to turn on the second vacuum suction unit according to the second sensing signal.
在一實施例中,當該處理單元接收到該第二感測訊號而未收到該第一感測訊號時,該處理單元開啟該第二真空吸力單元,而該第二真空吸力單元透過該真空吸口對該晶片提供吸力以對該晶片進行限位。In one embodiment, when the processing unit receives the second sensing signal but does not receive the first sensing signal, the processing unit turns on the second vacuum suction unit, and the second vacuum suction unit passes the The vacuum suction port provides suction to the wafer to restrain the wafer.
在一實施例中,當該處理單元同時接收到該第一感測訊號以及該第二感測訊號時,該處理單元關閉該第二真空吸力單元,而該第一真空吸力單元透過該真空吸嘴對該晶片進行真空吸附,以將該晶片帶離該托盤。In one embodiment, when the processing unit receives the first sensing signal and the second sensing signal at the same time, the processing unit turns off the second vacuum suction unit, and the first vacuum suction unit passes through the vacuum suction unit. The nozzle vacuums the wafer to bring the wafer away from the tray.
在一實施例中,當該處理單元未接收到該第二感測訊號而時,該處理單元關閉該第二真空吸力單元。In one embodiment, when the processing unit does not receive the second sensing signal, the processing unit turns off the second vacuum suction unit.
在一實施例中,該第二感測單元包括一第二發送元件以及一第二接受元件,該第二發送元件對該第二接受元件發送一第二感測光束,當該晶片被置於該晶片容置部時,該第二感測光束被該晶片遮擋,而該第二感測單元因此被啟動而傳送該第二感測訊號。In one embodiment, the second sensing unit includes a second transmitting element and a second receiving element, the second transmitting element transmits a second sensing beam to the second receiving element, and when the wafer is placed on the When the chip accommodating portion is used, the second sensing beam is blocked by the chip, and the second sensing unit is thus activated to transmit the second sensing signal.
在一實施例中,該托盤沿一托盤軌道移動,該第二發送元件以及該第二接受元件分別設於該托盤軌道的兩側。In one embodiment, the tray moves along a tray track, and the second sending element and the second receiving element are respectively disposed on two sides of the tray track.
在一實施例中,該測試頭沿一第一方向移動以於該托盤取放該晶片,該托盤沿一第二方向移動以輸送該晶片,該第一方向垂直於該第二方向。In one embodiment, the test head moves along a first direction to pick and place the wafer on the tray, and the tray moves along a second direction to transport the wafer, the first direction being perpendicular to the second direction.
在本創作的實施例中,第二真空吸力單元適於透過真空吸口對晶片提供吸力以對晶片進行限位,使晶片穩定的停留於托盤之上。應用本創作實施例之晶片測試設備,托盤在移動過程中,例如是啟動與停止時,特別是突然停止時,晶片可以穩定的停留於托盤之上,避免產品的損耗,因此可改善生產良率並維持產線的運行效率。In the embodiment of the present invention, the second vacuum suction unit is adapted to provide suction to the wafer through the vacuum suction port to limit the position of the wafer, so that the wafer can stay on the tray stably. By applying the chip testing equipment of this creative embodiment, during the movement of the tray, for example, when the tray is started and stopped, especially when suddenly stopped, the chip can stably stay on the tray to avoid product loss, thus improving the production yield. And maintain the operating efficiency of the production line.
第1圖係顯示本創作實施例之晶片測試設備。搭配參照第1圖,本創作之實施例係為了欲解決習知技術之問題而提供之一種晶片測試設備E,適於對一晶片C進行測試,包括一第一真空吸力單元(未顯示)、一第二真空吸力單元(未顯示)、一托盤2以及一測試頭1。FIG. 1 shows the chip testing equipment of the inventive embodiment. Referring to FIG. 1, the embodiment of the present invention provides a chip testing apparatus E to solve the problems of the prior art, which is suitable for testing a chip C, including a first vacuum suction unit (not shown), A second vacuum suction unit (not shown), a
第2A、2B圖係顯示本創作實施例之托盤的細部結構。參照第2A圖,在一實施例中,托盤2包括一晶片容置部21以及一真空吸口22,該真空吸口22設於該晶片容置部21,該第二真空吸力單元29連通該真空吸口22,其中,當該晶片C置於該晶片容置部21之內時,該第二真空吸力單元29適於透過該真空吸口22對該晶片C提供吸力以對該晶片C進行限位。參照第2B圖,在一實施例中,該托盤2上形成有環狀槽24,環狀槽24可供置入晶片C之晶片引腳。
Figures 2A and 2B show the detailed structure of the tray of this creative embodiment. 2A, in one embodiment, the
再參照第1圖,測試頭1包括至少一真空吸嘴11,該第一真空吸力單元(未顯示)連通該真空吸嘴11,該第一真空吸力單元(未顯示)適於透過該真空吸嘴11對該晶片C進行真空吸附,以將該晶片C帶離該托盤2。
Referring to FIG. 1 again, the
第3圖係顯示本創作實施例之系統方塊圖。參照第3圖,在一實施例中,該晶片測試設備更包括一第一感測單元31以及一處理單元4,該處理單元4耦接該第一感測單元31以及該第二真空吸力單元29。
FIG. 3 is a block diagram of a system of this creative embodiment. Referring to FIG. 3, in one embodiment, the wafer testing apparatus further includes a
第4圖係顯示本創作實施例之測試頭對晶片進行夾持的情形。搭配參照第1、3、4圖,在一實施例中,該測試頭1適於在一第一測試頭位置(第1圖)以及一第二測試頭位置(第4圖)之間移動,當該測試頭1位於該第二測試頭位置時(第4圖),在該測試頭1適於從該托盤2取起該晶片C,在該測試頭從該第一測試頭位置(第1圖)移動至該第二測試頭位置(第4圖)的過程中,該第一感測單元31被該測試頭1啟動而傳送一第一感測訊號,該處理單元4依據該第一感測訊號而關閉該第二真空吸力單元29。藉此,該測試頭1可以順利的從該托盤2取起該晶片C。
FIG. 4 shows the situation in which the test head of the inventive embodiment clamps the wafer. Referring to Figures 1, 3 and 4, in one embodiment, the
搭配參照第1、4圖,在一實施例中,該第一感測單元31包括一第一發送元件311以及一第一接受元件312,該第一發送元件311對該第一接受元件312發送一第一感測光束313,在該測試頭1從該第一測試頭位置(第1圖)移動
至該第二測試頭位置(第4圖)的過程中,該第一感測光束313被該測試頭1遮擋,而該第一感測單元31因此被啟動而傳送該第一感測訊號。在一實施例中,該第一發送元件311以及該第一接受元件312設置於測試頭1兩側的側柱之上,上述揭露並未限制本創作。
Referring to FIGS. 1 and 4 , in one embodiment, the
再參照第1、2A、3圖,在一實施例中,該晶片測試設備E更包括一第二感測單元32,該處理單元4耦接該第二感測單元32以及該第二真空吸力單元29,當該晶片C被置於該晶片容置部21時,該第二感測單元32被該啟動而傳送一第二感測訊號,該處理單元4適於依據該第二感測單元32而開啟該第二真空吸力單元29。
Referring to FIGS. 1 , 2A and 3 again, in one embodiment, the wafer testing apparatus E further includes a
第5A以及5B圖係顯示本創作實施例之處理單元的控制情形。參照第5A圖,在一實施例中,當該處理單元4接收到該第二感測訊號而未收到該第一感測訊號時(代表有晶片被置於晶片容置部而測試頭尚未下降至定位),該處理單元4開啟該第二真空吸力單元29,而該第二真空吸力單元29透過該真空吸口對該晶片提供吸力以對該晶片進行限位。參照第5B圖,在一實施例中,當該處理單元4同時接收到該第一感測訊號以及該第二感測訊號時(代表有晶片被置於晶片容置部而測試頭下降至定位),該處理單元4關閉該第二真空吸力單元29,而該第一真空吸力單元19透過該真空吸嘴對該晶片進行真空吸附,以將該晶片帶離該托盤。Figures 5A and 5B show the control situation of the processing unit of the present creative embodiment. Referring to FIG. 5A, in one embodiment, when the
在一實施例中,當該處理單元4未接收到該第二感測訊號而時(代表沒有晶片被置於晶片容置部),該處理單元4關閉該第二真空吸力單元29。In one embodiment, when the
參照第1圖,在一實施例中,該第二感測單元包括一第二發送元件321以及一第二接受元件322,該第二發送元件321對該第二接受元件322發送一第二感測光束323,當該晶片C被置於該晶片容置部時,該第二感測光束323被該晶片C遮擋,而該第二感測單元32因此被啟動而傳送該第二感測訊號。在一實施例中,該托盤2表面具有直線溝槽23,以供該第二感測光束323通過以對該晶片C進行偵測。Referring to FIG. 1 , in one embodiment, the second sensing unit includes a
參照第1圖,在一實施例中,該托盤2沿一托盤軌道T移動,該第二發送元件321以及該第二接受元件322分別設於該托盤軌道T的兩側。Referring to FIG. 1 , in one embodiment, the
參照第1圖,在一實施例中,該測試頭1沿一第一方向移動Z以於該托盤2取放該晶片C,該托盤2沿一第二方向X移動以輸送該晶片C,該第一方向Z垂直於該第二方向X。Referring to FIG. 1, in one embodiment, the
參照第1圖,在一實施例中,晶片測試設備包括一進料作業區A1、一測試區A2以及一出料作業區A3。該測試頭1、該第一感測單元31以及該第二感測單元32位於該測試區A2。該托盤2沿該軌道T,於該進料作業區A1、該測試區A2以及該出料作業區A3之間移動。夾取頭51設於進料作業區A1,以將晶片C置於托盤2。夾取頭52設於進料作業區出料作業區A3,以從托盤2取起晶片C。Referring to FIG. 1, in one embodiment, the wafer testing equipment includes a feeding operation area A1, a testing area A2, and a material discharging operation area A3. The
參照第1圖,在一實施例中,該晶片測試設備E更包括一第三感測單元33、一第四感測單元34以及一第五感測單元35。第三感測單元33位於進料作業區A1,以確認托盤2上是否存在晶片C。第四感測單元34位於出料作業區A3,以確認托盤2上是否存在晶片C。第五感測單元35位於出料作業區A3,以確認夾取頭52是否下降至定位。Referring to FIG. 1 , in one embodiment, the wafer testing apparatus E further includes a
以下描述本創作之晶片測試設備E的測試流程。首先,夾取頭51於進料作業區A1,將晶片C置於托盤2。接著,第三感測單元33偵測到托盤2存在晶片C,因此通知處理單元啟動該第二真空吸力單元以對該晶片進行限位。接著,托盤2被移動至測試區A2。再,測試頭1下降至定位,此時該第一感測單元31偵測到測試頭1的下降,因此通知處理單元關閉該第二真空吸力單元,該測試頭1得以取起晶片C並移至他處進行測試。再,測試頭1將測試完的晶片放回托盤2,第二感測單元32偵測到托盤2存在晶片C,因此通知處理單元啟動該第二真空吸力單元以對該晶片進行限位。接著,托盤2被移動至出料作業區A3。再,夾取頭52下降至定位,此時該第五感測單元35偵測到夾取頭52的下降,因此通知處理單元關閉該第二真空吸力單元,該夾取頭52得以取起晶片C並將晶片C送出。最後,第四感測單元34偵測到托盤2沒有存在晶片C,因此通知處理單元持續關閉該第二真空吸力單元,該托盤2再回到進料作業區A1進行下一輪的取料測試動作。The testing process of the chip testing equipment E of the present invention is described below. First, the
在本創作的實施例中,第二真空吸力單元適於透過真空吸口對晶片提供吸力以對晶片進行限位,使晶片穩定的停留於托盤之上。應用本創作實施例之晶片測試設備,托盤在移動過程中,例如是啟動與停止時,特別是突然停止時,晶片可以穩定的停留於托盤之上,避免產品的損耗,因此可改善生產良率並維持產線的運行效率。 In the embodiment of the present invention, the second vacuum suction unit is adapted to provide suction to the wafer through the vacuum suction port to limit the position of the wafer, so that the wafer can stay on the tray stably. By applying the chip testing equipment of this creative embodiment, during the movement of the tray, for example, when the tray is started and stopped, especially when suddenly stopped, the chip can stably stay on the tray to avoid product loss, thus improving the production yield. And maintain the operating efficiency of the production line.
雖然本創作已以具體之較佳實施例揭露如上,然其並非用以限定本創作,任何熟習此項技術者,在不脫離本創作之精神和範圍內,仍可作些許的更動與潤飾,因此本創作之保護範圍當視後附之申請專利範圍所界定者為準。 Although this creation has been disclosed above with specific preferred embodiments, it is not intended to limit this creation. Anyone who is familiar with this technology can still make some changes and modifications without departing from the spirit and scope of this creation. Therefore, the scope of protection of this creation should be determined by the scope of the appended patent application.
E:晶片測試設備 E: Wafer Test Equipment
C:晶片 C: wafer
1:測試頭 1: Test head
11:真空吸嘴 11: Vacuum nozzle
19:第一真空吸力單元 19: The first vacuum suction unit
2:托盤 2: Tray
21:晶片容置部 21: Chip accommodating part
22:真空吸口 22: Vacuum suction port
23:直線溝槽 23: Straight groove
24:環狀槽 24: Annular groove
29:第二真空吸力單元 29: Second vacuum suction unit
31:第一感測單元 31: The first sensing unit
311:第一發送元件 311: First sending element
312:第一接受元件 312: The first receiving element
313:第一感測光束 313: First sensing beam
32:第二感測單元 32: The second sensing unit
321:第二發送元件 321: Second sending element
322:第二接受元件 322: Second receiving element
323:第二感測光束 323: Second sensing beam
33:第三感測單元 33: The third sensing unit
34:第四感測單元 34: Fourth sensing unit
35:第五感測單元 35: Fifth sensing unit
4:處理單元 4: Processing unit
51:夾取頭 51: Clamping head
52:夾取頭 52: Clamping head
T:托盤軌道 T: Tray track
Z:第一方向 Z: the first direction
X:第二方向 X: second direction
A1:進料作業區 A1: Feeding operation area
A2:測試區 A2: Test area
A3:出料作業區 A3: discharge operation area
第1圖係顯示本創作實施例之晶片測試設備。 第2A、2B圖係顯示本創作實施例之托盤的細部結構。 第3圖係顯示本創作實施例之系統方塊圖。 第4圖係顯示本創作實施例之測試頭對晶片進行夾持的情形。 第5A以及5B圖係顯示本創作實施例之處理單元的控制情形。 FIG. 1 shows the chip testing equipment of the inventive embodiment. Figures 2A and 2B show the detailed structure of the tray of this creative embodiment. FIG. 3 is a block diagram of a system of this creative embodiment. FIG. 4 shows the situation in which the test head of the inventive embodiment clamps the wafer. Figures 5A and 5B show the control situation of the processing unit of the present creative embodiment.
E:晶片測試設備 E: Wafer Test Equipment
C:晶片 C: wafer
1:測試頭 1: Test head
11:真空吸嘴 11: Vacuum nozzle
2:托盤 2: Tray
23:直線溝槽 23: Straight groove
31:第一感測單元 31: The first sensing unit
311:第一發送元件 311: First sending element
312:第一接受元件 312: The first receiving element
313:第一感測光束 313: First sensing beam
32:第二感測單元 32: The second sensing unit
321:第二發送元件 321: Second sending element
322:第二接受元件 322: Second receiving element
323:第二感測光束 323: Second sensing beam
33:第三感測單元 33: The third sensing unit
34:第四感測單元 34: Fourth sensing unit
35:第五感測單元 35: Fifth sensing unit
51:夾取頭 51: Clamping head
52:夾取頭 52: Clamping head
T:托盤軌道 T: Tray track
Z:第一方向 Z: the first direction
X:第二方向 X: second direction
A1:進料作業區 A1: Feeding operation area
A2:測試區 A2: Test area
A3:出料作業區 A3: discharge operation area
Claims (10)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW110215601U TWM630924U (en) | 2021-12-29 | 2021-12-29 | Chip testing equipment |
CN202222085938.0U CN218123379U (en) | 2021-12-29 | 2022-08-09 | Chip testing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW110215601U TWM630924U (en) | 2021-12-29 | 2021-12-29 | Chip testing equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
TWM630924U true TWM630924U (en) | 2022-08-21 |
Family
ID=83783791
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW110215601U TWM630924U (en) | 2021-12-29 | 2021-12-29 | Chip testing equipment |
Country Status (2)
Country | Link |
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CN (1) | CN218123379U (en) |
TW (1) | TWM630924U (en) |
-
2021
- 2021-12-29 TW TW110215601U patent/TWM630924U/en unknown
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2022
- 2022-08-09 CN CN202222085938.0U patent/CN218123379U/en active Active
Also Published As
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CN218123379U (en) | 2022-12-23 |
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GD4K | Issue of patent certificate for granted utility model filed before june 30, 2004 |