TWM571619U - Synchronous rectifier controller for off-line power converters - Google Patents

Abstract

A synchronous rectifier (SR) controller includes: a controller having an input adapted to be coupled to one of the drains of an SR transistor, and an output for providing a drive signal in response thereto; a gate driver having an input coupled to the output of the controller and an output adapted to be coupled to a gate of the SR transistor for providing a gate signal to the SR transistor a first transistor having a drain coupled to one of the gate terminals, a gate, and a source coupled to the ground; and a protection circuit coupled to the gate An input of the drain terminal and an output coupled to the gate of the first transistor. The protection circuit is responsive to a voltage on the drain terminal exceeding a first voltage, and providing a voltage on the gate of the first transistor, the voltage being greater than a turn-on voltage of the first transistor and less than the One of the first transistors is overvoltage.

Description

Synchronous rectifier controller for off-line power converters

The present disclosure relates generally to power conversion circuits, and more particularly to synchronous rectifier controllers for off-line power converters.

The switched mode power supply can be used to generate a direct current (DC) voltage from an alternating current (AC) voltage by switching current through an energy storage element, such as a transformer. The switching duty cycle is controlled to adjust the output voltage to the desired level. The flyback converter is a common type of switched mode power supply for AC to DC voltage applications. The flyback converter is based on a flyback transformer that alternately builds flux in the core and transfers energy to the output. When the current is switched through the primary winding, the primary current on the transformer increases, storing energy in the transformer. When the switch is turned off, the primary current in the transformer drops and a voltage is induced across the secondary winding. This secondary winding supplies current to the load. The controller changes the on and off times of the primary switch in series with the primary winding to adjust the output voltage to the desired level.

The flyback converter uses a rectifier connected to the secondary winding to prevent reverse current flow through the secondary winding. The rectifier can be in two forms. A passive rectifier, such as a diode, can be placed in series with the secondary winding to prevent reverse current flow. However, if the output power supply voltage exceeds the breakdown voltage of the diode, the diode cannot properly prevent the reverse current from flowing. In addition, the diode causes a forward voltage drop when conducting, and reduces the efficiency of the converter. To solve these problems, another form of rectifier called a synchronous rectifier is often used. The synchronous rectifier includes an active switch, typically an N-channel metal oxide semiconductor field effect transistor (MOSFET) connected in series with the secondary winding along with the controller, which causes the transistor to conduct at the appropriate time. Since the transistor can be fully turned on by biasing, the synchronous rectifier is substantially more efficient than the passive rectifier.

However, due to the capacitive coupling between the drain and the gate and the capacitive coupling between the gate and the source, when the gate voltage of the synchronous rectifier (SR) transistor is rapidly increased due to switching when energized, the SR The gate voltage of the crystal also rises rapidly before the SR controller is energized. The controller is unable to keep the gate voltage low when power is applied because the controller is not yet powered. If the voltage on the gate of the SR transistor rises too much, it will cause the SR transistor to become conductive, creating an undesired shoot-through current on the secondary side and causing potential damage to the system.

In one embodiment, a synchronous rectifier controller for controlling a synchronous rectifier transistor having a drain, a gate, and a source includes: a controller having an adaptation to couple to the An input of the drain of the synchronous rectifier transistor and an output for providing a drive signal in response thereto; a gate driver having an input coupled to the output of the controller, and adapted An output coupled to the gate of the synchronous rectifier transistor for providing a gate signal to the gate of the synchronous rectifier transistor; a first transistor having a coupling to the gate terminal a drain, a gate, and a source coupled to the ground; and a protection circuit having an input coupled to the drain terminal and coupled to the gate of the first transistor An output, wherein the protection circuit is responsive to a voltage on the drain terminal exceeding a first voltage, and providing a voltage on the gate of the first transistor, the voltage being greater than one of the first transistors Turn-on voltage and less than the first transistor An over-voltage.

In another embodiment, an off-line power converter includes: a transformer having: a primary winding having a first end for receiving an input voltage, and a second end; and a secondary winding having a first end for providing an output voltage and a second end; a power transistor having a drain coupled to the second end of the primary winding a gate, and a source coupled to the grounding terminal; a main controller having an input for receiving a feedback signal and coupled to the gate of the power transistor An output; a synchronous rectifier transistor having a drain coupled to the second end of the secondary winding, a gate, and a source coupled to a secondary ground terminal; and a synchronization a rectifier controller having: a power supply terminal coupled to the first end of the secondary winding for receiving a power supply voltage; and a drain terminal coupled to the secondary winding a second end portion; a grounding terminal coupled to the secondary grounding terminal; and a gate An end coupled to the gate of the synchronous rectifier transistor, wherein the synchronous rectifier controller includes circuitry that is powered by a voltage on the drain terminal and the secondary ground terminal instead of After energization of the power supply voltage supply, the circuitry discharges a voltage on the gate of the synchronous rectifier transistor.

FIG. 1 is a partial block diagram and a partial schematic diagram showing an off-line power converter 100 with secondary side synchronous rectification. The offline power converter 100 generally includes a transformer 110, a power transistor 120, a sensing resistor 130, an auxiliary circuit 140, a main controller 150, an output capacitor 160, and a synchronous rectifier (SR) transistor 170. A diode 172, an SR controller 180, and a load 190.

On the primary side, the transformer 110 has a primary winding 112, a secondary winding 114, and an auxiliary winding 116. The primary winding 112 has a first end, a second end, and a plurality of turns labeled "NP" for receiving an input voltage labeled "V _IN ". The secondary winding 114 has a first end, a second end, and a plurality of turns labeled "NS" for providing an output voltage labeled "V _O ". The auxiliary winding 116 has a first end, a second end connected to one ground, and a plurality of turns labeled "NA." The power transistor 120 is a high power N-channel power metal oxide semiconductor field effect transistor (MOSFET) having a drain, a gate, and a source connected to a second end of the primary winding 112. The current sensing resistor 130 has a first terminal connected to the source of the power transistor 120 and a second terminal connected to the ground once. The auxiliary circuit 140 generally includes resistors 142 and 144, a diode 146, and a capacitor 148. The resistor 142 has a first terminal connected to the first end of the auxiliary winding 116, and a second terminal. The resistor 144 has a first terminal connected to the second terminal of the resistor 142 and a second terminal connected to the primary ground. The diode 146 has an anode connected to the first end of the auxiliary winding 116, and a cathode. The capacitor 148 has a first terminal connected to the cathode of the diode 146 and a second terminal connected to the primary ground. The main controller 150 has a first power supply terminal connected to the cathode of the diode 146, a ground terminal (labeled "GND") connected to the ground once; and a first input terminal (labeled "VS"") is connected to the second terminal of the resistor 142; a second input terminal (labeled "CS") connected to the first terminal of the sense resistor 130; and an output terminal (labeled "SW") ), which is connected to the gate of the power transistor 120.

On the secondary side, the output capacitor 160 has a first terminal connected to the first end of the secondary winding 114 and a second end connected to the secondary ground. The SR transistor 170 is an N-channel power MOSFET having a drain connected to a second end of the secondary winding 114, a gate, and a source connected to the secondary ground. The diode 172 has an anode connected to the source of the SR transistor 170 and a cathode connected to the drain of the SR transistor 170. The SR controller 180 has a first power supply terminal (similarly labeled "VCC") connected to the first end of the secondary winding 114; a ground terminal (similarly labeled "GND") connected To the second ground; an input terminal (labeled "DRAIN"), the drain of the SR transistor 170; and an output terminal (labeled "GATE") connected to the gate of the SR transistor 170. The resistor 190 has a first terminal connected to the first end of the secondary winding 114 and a second terminal connected to the secondary ground.

In operation, the off-line power converter 100 uses the transformer 110 in a flyback configuration to convert the input voltage V _IN to the desired output voltage V _O . The sense resistor 130 also forms a voltage on its first terminal that is proportional to the amount of current flowing through the power transistor 120 and provides this voltage to the CS input terminal of the main controller 150. Reducing the voltage across the auxiliary winding 140 116 the auxiliary circuit, wherein a resistor divider formed by resistors 142 and 144, to provide a sensing voltage VS as a measure of the output voltage V _O of. The auxiliary circuit 140 also rectifies and filters the voltage on the auxiliary winding 116 to form a power supply voltage V _CC for the main controller 150. The main controller 150 uses a conventional pulse width modulation control, based on VS and CS changes power transistor 120 conduction time, the V _O to adjust to a desired level.

On the secondary side, the output capacitor 160 acts as an output capacitor that stores energy and smoothes the fluctuation of V _O . The SR controller 180 controls the conduction of the SR transistor 170 to cause the SR transistor to be non-conductive when a current is formed in the primary winding 112 and to cause the SR transistor to be fully conductive during the flyback period. The diode 172 allows current to flow from the secondary ground through the secondary winding 114 to clamp the voltage at the second end of the secondary winding 114 to a diode drop below the secondary ground.

After reset, the main controller 150 starts to switch the current through the primary winding 112, the controller 180 does not operate but the SR, V _O until sufficiently increased. However, at the switching event that begins before the SR controller 180 operates, the voltage on the second end of the secondary winding 114 (and therefore the voltage on the drain of the SR transistor 170) rises rapidly. This rapid switching boosts the voltage across the gate of the SR transistor 170 through the parasitic capacitance associated with the SR transistor 170. A parasitic capacitance named "Cgd" exists between the drain and the gate of the SR transistor 170. Another parasitic capacitance named "Cgs" exists between the gate and source of the SR transistor 170. The series combination of Cgd and Cgs transistors produces a voltage divider when the SR controller 180 is energized prior to being able to drive the gate of the SR transistor 170. If the voltage on the drain of the SR transistor 170 is too high, the gate-to-source voltage induced by the spike is sufficient to make the SR transistor 170 conductive, thereby making the SR transistor 170 completely conductive and causing the circuit to be damaged by the through current. . However, if the voltage spike on the gate terminal is small, the voltage will still be high enough to bias the SR transistor 170 to the secondary threshold and make the SR transistor partially conductive.

2 shows the SR controller 200 according to the first embodiment of the SR controller 180 of FIG. 1 in partial block diagram and partial schematic diagram. The SR controller 200 includes a gate terminal 201 labeled "DRAIN", a gate terminal 202 labeled "GATE", a controller 210, a gate driver 220, a transistor 230, and a protection circuit 240. . The controller 210 has a power supply terminal connected to the V _CC , a ground terminal connected to the secondary ground, an input terminal connected to the drain terminal 201, and an output terminal for providing a drive signal. The gate driver 220 has a first power supply terminal connected to the V _CC , a second power supply terminal connected to the secondary ground, an input connected to the output of the controller 210 for receiving the drive signal, and connected to An output of the gate terminal 202.

The protection circuit 240 includes a transistor 241, a Zener diode 242, and a bias circuit 243. The transistor 241 is a high voltage N-channel MOSFET having a drain connected to the DRAIN terminal 201, a gate, and a source connected to the gate of the transistor 230. Zener diode 242 has a cathode connected to the source of transistor 241 and an anode connected to the secondary ground. The bias circuit 243 includes a resistor 244 and a Zener diode 245. Resistor 244 has a first terminal connected to DRAIN terminal 201 and a second terminal connected to the gate of transistor 241. Zener diode 245 has a cathode connected to a second terminal of resistor 244 and an anode connected to a secondary ground.

In operation, controller 210 provides a drive signal to the input of gate driver 220, which provides a corresponding signal on gate terminal 202. Protection circuit 240 biases transistor 230 to conduct electricity when SR controller 200 detects a sufficiently high voltage on the DRAIN terminal. The transistor 241 operates as a source follower, wherein the voltage at the source of the transistor 241 follows the voltage across its gate minus a threshold voltage. When the voltage across the gate of transistor 230 approaches an overvoltage level, Zener diode 242 becomes conductive and effectively clamps the voltage across the gate of transistor 230 below a harmful voltage level. In addition, Zener diode 245 also becomes electrically conductive, and effectively clamps the voltage across the gate of transistor 241 below a harmful voltage level.

Transistors 230 and 241 are high voltage transistors capable of withstanding gate-to-source voltages above voltages that would damage and damage conventional low voltage transistors.

When the voltage at the drain terminal 201 rises rapidly, the voltage across the gate of the transistor 241 is clamped at its breakdown voltage by the Zener diode 245, which is selected to be higher than the threshold voltage of the transistor 241. In turn, the breakdown voltage of the Zener diode 242 is selected to be higher than the threshold voltage of the transistor 230. Zener diode 245 also protects the gate of transistor 241 and prevents the transistor from unsafely rising when its drain voltage rises rapidly from the same gate-to-source capacitance discussed above. Once the voltage on the DRAIN terminal 201 exceeds the breakdown voltage of the Zener diode 245, the transistors 241 and 230 are fully conductive to safely pull the gate voltage of the SR transistor 170 to ground.

Therefore, the protection circuit 240 provides a voltage on the gate of the transistor 230 in response to the voltage on the DRAIN terminal 201 exceeding the first voltage, which is greater than the turn-on voltage of the transistor 230, but less than the overvoltage of the transistor 230. The protection circuit 240 is small and self-powered, and prevents the SR transistor 170 from conducting, even preventing the bias from becoming biased in the next threshold region during energization of the off-line power converter 100. Only a few components (two transistors, two Zener diodes and one resistor) are used for implementation, but harmful operation is prevented during energization.

3 is a timing diagram 300 for understanding the operation of the synchronous rectifier controller of FIG. 2. In timing diagram 300, the horizontal axis represents time in microseconds (μsec) and the vertical axis represents the amplitude of various signals in volts (V). The timing diagram 300 depicts four waveforms of interest, including a waveform 310 representing the voltage on the drain terminal 201, a waveform 320 representing the voltage across the gate of the transistor 241, a waveform 330 representing the voltage across the gate of the transistor 230, and A waveform 340 representing the voltage across the gate terminal 202.

As shown in timing diagram 300, during the flyback cycle, the voltage on drain terminal 201 rises and the voltage across the gate of transistor 241 also rises until it is clamped at the clamp voltage labeled "V _D1 ". The voltage at the gate of transistor 230 follows the voltage on the gate of transistor 241 minus the threshold voltage of transistor 241. The voltage at the gate of transistor 230 is sufficiently large to cause transistor 230 to be fully conductive and rise until it is clamped by Zener diode 242 at a clamping voltage labeled "V _D2 ". Since the transistor 230 is fully conductive, the voltage on the gate of the SR transistor 170 is pulled to ground and rendered non-conductive.

During the forward cycle after the flyback cycle, the voltage on the drain terminal 201 drops rapidly, which causes the voltage on the gate of the SR transistor 170 to drop below ground due to parasitic capacitance coupling. The negative voltage on the gate of the SR transistor 170 (in this example, about -0.7) is clamped by the main body diode of the transistor 230 and the parasitic diode between the source and the gate.

4 is a partial block diagram and a partial schematic diagram showing the SR controller 400 of the second embodiment of the SR controller 180 of FIG. The SR controller 400 includes a drain terminal 201, a gate terminal 202, a controller 210, a gate driver 220, and a transistor 230, as previously illustrated in FIG. However, the SR controller 400 includes a protection circuit 440 instead of the protection circuit 240 of FIG. As shown in FIG. 4, the protection circuit 440 acts as a voltage controlled voltage source ("VCVS") that drives the gate of the transistor 230 with a voltage proportional to the voltage on the drain terminal 201. The protection circuit 440 can be used, for example, in a system that is sufficiently well characterized such that the transmission characteristics of the voltage controlled voltage source bias the gate of the transistor 230 to a level greater than the on voltage of the transistor but less than the breakdown voltage of the transistor. .

FIG. 5 illustrates the SR controller 500 of the third embodiment of the SR controller 180 of FIG. 1 in a partial block diagram and a partial schematic diagram. The SR controller 500 includes a drain terminal 201, a gate terminal 202, a controller 210, a gate driver 220, and a transistor 230, as shown in FIG. 2 above. However, the SR controller 500 includes a protection circuit 540 instead of the protection circuit 240 of FIG. The protection circuit 540 includes a transistor 241 and a Zener diode 242 as previously described with respect to the protection circuit 240 of FIG. 2, but includes a biasing circuit 543 instead of the biasing circuit 243 of FIG. The bias circuit 543 includes a resistor 544 and a series of diodes 545. The resistor 544 has a first terminal connected to the drain terminal 201 and a second terminal connected to the gate of the transistor 241. The diode 545 includes a set of three representative diodes of the N diodes, wherein the first diode has an anode connected to the second terminal of the resistor 544, and a cathode, and a first The diode has an anode connected to the cathode of the first diode, and so on until a final or "Nth" diode has an anode connected to the cathode of the previous diode of the series, And a cathode connected to the secondary ground.

Instead of the Zener diode in the SR controller 200 of FIG. 2, the SR controller 500 uses a pair of conductive diode chains and thus clamps the diode based on the number of diodes multiplied by the diode forward cut-in voltage. The voltage at the gate of transistor 241. If the forward biased cut-in voltage of the diode is reduced by about 0.7, the gate bias voltage on the gate of transistor 241 can be selected to be within about 0.7 accuracy.

FIG. 6 illustrates the SR controller 600 of the fourth embodiment of the SR controller 180 of FIG. 1 in a partial block diagram and a partial schematic diagram. The SR controller 600 includes a drain terminal 201, a gate terminal 202, a controller 210, a gate driver 220, and a transistor 230, as shown in FIG. 2 above. However, the SR controller 600 includes a protection circuit 640 instead of the protection circuit 240 of FIG. The protection circuit 640 includes a comparator 641 and a voltage divider 642. The comparator 641 has a power supply terminal connected to the DRAIN terminal 201, a positive input terminal, a negative input terminal for receiving the voltage labeled "V1", and an output terminal connected to the gate of the transistor 230. . Voltage divider 642 includes resistors 643 and 644. The resistor 643 has a first terminal connected to the drain terminal 201 and a second terminal connected to the positive terminal of the comparator 641. The resistor 644 has a first terminal connected to the second terminal of the resistor 643 and a second terminal connected to the secondary ground.

When the voltage across the drain terminal 201 divided by the divider ratio established by the resistors 643 and 644 exceeds the reference voltage V1, the comparator 641 provides a voltage at a logic high state to the gate of the transistor 230. The comparator 641 sets a logic high level with reference to the voltage on the drain terminal 201, and the comparator 641 internally adjusts the voltage to be greater than the turn-on voltage of the transistor 230 but less than the overvoltage of the transistor 230. Comparator 641 provides a clear on state and an off state and prevents transition through the secondary threshold region. By carefully matching the resistors 643 and 644 and carefully setting the reference voltage V1, the SR controller 600 allows the transistor 230 to be set to a conductive voltage with high accuracy.

FIG. 7 illustrates the SR controller 700 of the fifth embodiment of the SR controller 180 of FIG. 1 in a partial block diagram and a partial schematic diagram. The SR controller 700 includes a drain terminal 201, a gate terminal 202, a controller 210, a gate driver 220, and a transistor 230, as shown in FIG. 2 above. However, the SR controller 700 includes a protection circuit 740 instead of the protection circuit 240 of FIG. The protection circuit 740 includes a transistor 241 and a Zener diode 242 as previously described, and a bias circuit 743. The bias circuit 743 includes a resistor 744 and a shunt regulator 745. The resistor 744 has a first terminal connected to the drain terminal 201 and a second terminal connected to the gate of the transistor 241. The shunt regulator 745 has a first terminal connected to the second terminal of the resistor 744 and a second terminal connected to the secondary ground.

Instead of the Zener diode 245 used by the SR controller 200, the SR controller 700 uses a shunt regulator 745 to limit the gate voltage on the gate of the transistor 241. Since the breakdown voltage of the Zener diode can be relatively fixed, the SR controller 700 provides greater flexibility in setting the voltage.

The above-disclosed subject matter is considered to be illustrative and not limiting, and the scope of the appended claims is intended to cover all such modifications, modifications, and other embodiments. For example, five different synchronous rectifier controllers with different protection circuits are disclosed above. However, other protection circuits may be used in response to the voltage on the drain terminal 201 exceeding a first voltage, and providing a voltage on the gate of the first transistor that is greater than one of the first transistors. The turn-on voltage is less than one of the first transistors. Embodiments disclose the use of high voltage MOSFETs that can be in a variety of forms, such as dual diffused MOS (DMOS) transistors, laterally diffused MOS (LDMOS) transistors, and the like. Moreover, the synchronous rectifier controller as disclosed herein can be used to control synchronous rectifier transistors in different power supply topologies, such as clamps in active clamped flyback circuits. In addition, the disclosed circuitry for protection during power up can be used with controllers that implement a variety of control mechanisms.

In one form, an off-line power converter as disclosed herein includes a transformer, a power transistor, a main controller, a synchronous rectifier transistor, and a synchronous rectifier controller. The transformer has: a primary winding having a first end for receiving an input voltage, and a second end; and a secondary winding having a first end for providing an output voltage a part, and a second end. The power transistor has a drain coupled to the second end of the primary winding, a gate, and a source coupled to a primary ground terminal. The main controller has an input for receiving a feedback signal and an output coupled to the gate of the power transistor. The synchronous rectifier transistor has a drain coupled to the second end of the secondary winding, a gate, and a source coupled to a secondary ground terminal. The synchronous rectifier controller has: a power supply terminal coupled to the first end of the secondary winding for receiving a power supply voltage; and a drain terminal coupled to the secondary winding a second end portion; a grounding terminal coupled to the secondary grounding terminal; and a gate terminal coupled to the gate of the synchronous rectifier transistor, wherein the synchronous rectifier controller includes circuitry, The circuit discharges a voltage on the gate of the synchronous rectifier transistor by energizing a voltage on the drain terminal and the secondary ground terminal instead of being powered by the power supply voltage.

The synchronous rectifier controller can include a controller, a gate driver, a first transistor, and a protection circuit. The controller has an input coupled to the drain terminal and an output for providing a drive signal in response thereto. The gate driver has an input coupled to the output of the controller and an output coupled to the gate terminal. The first transistor has a drain coupled to the gate terminal, a gate, and a source coupled to the secondary ground terminal. The protection circuit has an input coupled to the drain terminal and an output coupled to the gate of the first transistor, wherein the protection circuit is responsive to a voltage on the gate terminal exceeding a first a voltage, and a voltage is provided on the gate of the first transistor, the voltage being greater than a turn-on voltage of the first transistor and less than an overvoltage of the first transistor.

According to an aspect, the controller is powered by a first power supply voltage, and the protection circuit is powered by a voltage at the drain terminal and the secondary ground terminal instead of the first power supply voltage Power is supplied.

According to another aspect, the protection circuit includes a second transistor, a first Zener diode, and a bias circuit. The second transistor has a drain coupled to the drain terminal, a gate, and a source coupled to the gate of the first transistor. The first Zener diode has a cathode coupled to the source of the second transistor and an anode coupled to ground. The biasing circuit has a first terminal coupled to the drain terminal, a second terminal coupled to the gate of the second transistor, and a third terminal coupled to the The grounding, wherein the biasing circuit is responsive to the voltage on the drain terminal, and biasing the gate of the second transistor to be higher than a breakdown voltage of the first Zener diode One of the second transistors is a voltage that is limited to a voltage.

According to another aspect, the bias circuit can include a resistor and a second Zener diode. The resistor has a first terminal coupled to the drain terminal and a second terminal coupled to the gate of the second transistor. The second Zener diode has a cathode coupled to the second terminal of the resistor and an anode coupled to the ground, wherein the second Zener diode has a breakdown voltage greater than the first One of the Zener diodes collapses voltage.

According to another aspect, the bias circuit can include a resistor and a shunt regulator. The resistor has a first terminal coupled to the drain terminal and a second terminal coupled to the gate of the second transistor. The shunt regulator has a first terminal coupled to the second terminal of the resistor and a second terminal coupled to the ground.

According to still another aspect, the protection circuit includes a voltage control voltage source having an input coupled to the drain terminal and an output coupled to the gate of the first transistor And when the voltage of one of the drain terminals exceeds a predetermined voltage, the voltage control voltage source biases the gate of the first transistor to be higher than a threshold voltage of the first transistor.

According to another aspect, the protection circuit includes a comparator and a voltage divider. The comparator has a power supply terminal coupled to the drain terminal, a positive input, a negative input for receiving a reference voltage, and an output coupled to the gate of the first transistor. The voltage divider has a first terminal coupled to the drain terminal, and a second terminal coupled to the positive input of the comparator for providing a divided voltage to the comparator Positive input; and a second terminal coupled to ground.

Therefore, to the extent permitted by law, the scope of the present invention is to be determined by the broadest permissible interpretation of the scope of the claims below and their equivalent interpretations, and should not be limited or limited by the above embodiments.

100‧‧‧Offline Power Converter

110‧‧‧Transformers

112‧‧‧First winding

114‧‧‧second winding

116‧‧‧Auxiliary winding

120‧‧‧Power transistor

130‧‧‧Sensor Resistors

140‧‧‧Auxiliary circuit

142‧‧‧Resistors

144‧‧‧Resistors

146‧‧ ‧ diode

148‧‧‧ capacitor

150‧‧‧Master controller

160‧‧‧ output capacitor

170‧‧‧Synchronous Rectifier (SR) Transistor

172‧‧‧ diode

180‧‧‧SR controller

190‧‧‧load

200‧‧‧SR controller

201‧‧‧Bungy terminal

202‧‧‧gate terminal

210‧‧‧ Controller

220‧‧‧gate driver

230‧‧‧Optoelectronics

240‧‧‧Protection circuit

241‧‧‧Optoelectronics

242‧‧‧Zina diode

243‧‧‧Bias circuit

244‧‧‧Resistors

245‧‧‧Zina diode

300‧‧‧ Timing diagram

310‧‧‧ Waveform voltage on the bungee terminal 201

320‧‧‧ Waveform of the voltage on the gate of transistor 241

330‧‧‧ Waveform of the voltage on the gate of transistor 230

340‧‧ ‧ Waveform voltage on gate terminal 202

400‧‧‧SR controller

440‧‧‧Protection circuit

500‧‧‧SR controller 500

540‧‧‧Protection circuit

543‧‧‧Bias circuit

544‧‧‧Resistors

545‧‧‧ diode

600‧‧‧SR controller

640‧‧‧Protection circuit

641‧‧‧ comparator

642‧‧ ‧ voltage divider

643‧‧‧Resistors

644‧‧‧Resistors

700‧‧‧SR controller

740‧‧‧Protection circuit

743‧‧‧bias circuit

744‧‧‧Resistors

745‧‧ ‧ shunt regulator

Cgd‧‧‧ parasitic capacitance

Cgs‧‧‧ parasitic capacitance

CS‧‧‧second input terminal

DRAIN‧‧‧Input terminal / bungee terminal

GND‧‧‧ Grounding terminal

GATE‧‧‧Output terminal/gate terminal

NA‧‧‧匝

NP‧‧‧匝

NS‧‧‧匝

SW‧‧‧output terminal

V1‧‧‧ reference voltage

VCC‧‧‧First power supply terminal/power supply voltage

VCVS‧‧‧ voltage control voltage source

V _D1 ‧‧‧Clamping voltage

V _D2 ‧‧‧Clamping voltage

V _IN ‧‧‧ input voltage

V _O ‧‧‧Output voltage

VS‧‧‧first input terminal/sensing voltage

Many of the features and advantages of the present disclosure will become more apparent from the aspects of the appended claims. An off-line power converter with secondary side synchronous rectification is shown; FIG. 2 is a partial block diagram and partial schematic diagram showing a synchronous rectifier (SR) controller of the first embodiment of the synchronous rectifier controller of FIG. 3 is a timing diagram for understanding the operation of the SR controller of FIG. 2. FIG. 4 is a partial block diagram and a partial schematic diagram showing the SR controller of the second embodiment of the synchronous rectifier controller of FIG. 5 is a partial block diagram and a partial schematic diagram showing the SR controller according to the third embodiment of the synchronous rectifier controller of FIG. 1. FIG. 6 is a partial block diagram and a partial schematic diagram showing the synchronous rectifier controller according to FIG. The SR controller of the fourth embodiment; and FIG. 7 shows the SR controller of the fifth embodiment of the synchronous rectifier controller according to FIG. 1 in partial block diagram and partial schematic diagram.

The use of the same reference symbols in different drawings indicates similar or equivalent components. Unless otherwise stated, the words "coupled" and their associated grammatical forms include both direct connections and indirect electrical connection by means of means known in the art, and unless otherwise stated, any description of the direct connection implicitly uses the appropriate form An alternate embodiment of an indirect electrical connection.

Claims (10)

A synchronous rectifier controller for controlling a synchronous rectifier transistor having a drain, a gate and a source, comprising: a controller having an adaptation adapted to be coupled to the synchronous rectifier transistor An input of the drain and an output for providing a drive signal in response thereto; a gate driver having an input coupled to the output of the controller and adapted to couple to the synchronization An output of the gate of the rectifier transistor for providing a gate signal to the gate of the synchronous rectifier transistor; a first transistor having a drain coupled to the gate terminal, a gate, and a source coupled to the ground; and a protection circuit having an input coupled to the gate terminal and an output coupled to the gate of the first transistor, wherein the gate The protection circuit is responsive to a voltage on the 汲 terminal exceeding a first voltage, and providing a voltage on the gate of the first transistor, the voltage being greater than a turn-on voltage of the first transistor and less than the first One of the transistors is over-powered . The synchronous rectifier controller of claim 1, wherein the controller is powered by a first power supply voltage, and the protection circuit is powered by a voltage at the anode terminal and the ground, instead of the first power The supply voltage is supplied. The synchronous rectifier controller of claim 1, wherein the protection circuit comprises: a second transistor having a drain coupled to the drain terminal, a gate, and the first transistor coupled to the first transistor a source of a gate; a first Zener diode having a cathode coupled to the source of the second transistor; and an anode coupled to the ground; and a bias circuit The first terminal is coupled to the 汲 terminal; the second terminal is coupled to the gate of the second transistor; and a third terminal is coupled to the ground. The bias circuit is responsive to the voltage on the drain terminal, and the gate of the second transistor is biased to be higher than a breakdown voltage of the first Zener diode plus the second transistor A voltage of a threshold voltage. The synchronous rectifier controller of claim 3, wherein the bias circuit comprises: a resistor having a first terminal coupled to the drain terminal and the gate coupled to the second transistor a second terminal; and a second Zener diode having a cathode coupled to the second terminal of the resistor and an anode coupled to the ground, wherein the second Zener diode The body has a breakdown voltage greater than a breakdown voltage of the first Zener diode. The synchronous rectifier controller of claim 3, wherein the bias circuit comprises: a resistor having a first terminal coupled to the drain terminal and the gate coupled to the second transistor a second terminal; and a plurality of diodes connected in series between the second terminal of the resistor and the ground, wherein the first one of the plurality of diodes is coupled to the resistor An anode of the second terminal, the last one of the plurality of diodes has a cathode coupled to the ground, wherein the plurality of diodes have a combined cut-in voltage greater than the first Zener One of the polar bodies collapses voltage. The synchronous rectifier controller of claim 3, wherein the bias circuit comprises: a resistor having a first terminal coupled to the drain terminal and the gate coupled to the second transistor a second terminal; and a shunt regulator having a first terminal coupled to the second terminal of the resistor and a second terminal coupled to the ground. The synchronous rectifier controller of claim 1, wherein the protection circuit comprises: a voltage control voltage source having an input coupled to the anode terminal and a gate coupled to the gate of the first transistor An output, wherein the voltage control voltage source biases the gate of the first transistor to be higher than a threshold voltage of the first transistor when a voltage of one of the NMOS terminals exceeds a predetermined voltage. The synchronous rectifier controller of claim 1, wherein the protection circuit comprises: a comparator having a power supply terminal coupled to the 汲 terminal, a positive input, a negative input for receiving a reference voltage, And an output coupled to the gate of the first transistor; and a voltage divider having: a first terminal coupled to the terminal; a second terminal coupled to the The positive input of the comparator is for providing a divided voltage to the positive input of the comparator; and a second terminal coupled to the ground. An off-line power converter comprising: a transformer having: a primary winding having a first end for receiving an input voltage, and a second end; and a secondary winding having a first end portion for providing an output voltage, and a second end portion; a power transistor having a drain, a gate, and a coupling coupled to the second end of the primary winding Connected to a source of the grounding terminal; a main controller having an input for receiving a feedback signal and an output coupled to the gate of the power transistor; a synchronous rectifier a crystal having a drain coupled to the second end of the secondary winding, a gate, and a source coupled to a secondary ground terminal; and a synchronous rectifier controller having: a power supply terminal coupled to the first end of the secondary winding for receiving a power supply voltage; a first terminal coupled to the second end of the secondary winding; a ground a terminal coupled to the secondary ground terminal; and a gate terminal, Coupling to the gate of the synchronous rectifier transistor, wherein the synchronous rectifier controller includes circuitry to supply voltage by one of voltages on the anode terminal and the secondary ground terminal instead of the power supply voltage After energization of the power supply, the circuitry discharges a voltage on the gate of the synchronous rectifier transistor. The off-line power converter of claim 9, wherein the synchronous rectifier controller comprises: a controller having an input coupled to the terminal and an output for providing a drive signal in response thereto; a gate driver having an input coupled to the output of the controller and an output coupled to the gate terminal; a first transistor having a coupling to the gate terminal a pole, a gate, and a source coupled to the secondary ground terminal; and a protection circuit having an input coupled to the gate terminal and the gate coupled to the first transistor An output of the pole, wherein the protection circuit is responsive to a voltage on the anode terminal exceeding a first voltage, and providing a voltage on the gate of the first transistor, the voltage being greater than the first transistor An on voltage and less than one of the first transistors.