TWM550465U - Semiconductor wafer analyzing system - Google Patents

Abstract

The present creation provides a wafer analyzing system, comprising: a conveyor device and a defect analyzing device, wherein the defect analyzing device comprises: an image capturing module and a processing module electrically connected with the image capturing module. The conveyor device delivers a wafer to the defect analyzing device and then the image capturing module captures an original image of the wafer. The processing module processes a defect analysis according to the original image, wherein the defect analysis comprises: performing a de-background and localization process; performing a partition and parameterization process to a parameter matrix; comparing the parameter matrix with a standard matrix to get a parameter difference; classifying the parameter difference with a classification database; and outputting an analysis result of the wafer.

Description

Semiconductor wafer inspection system

The present invention relates to a semiconductor wafer inspection system, and more particularly to a detection system capable of improving the efficiency and accuracy of semiconductor wafer inspection.

The semiconductor wafer manufacturing process can be broadly divided into several steps of forming a single crystal germanium wafer rod (Ingot), a tantalum wafer rod block cutting separation, a peripheral polishing, a block cutting, and a wafer polishing. While germanium wafers are fundamental to the formation of various semiconductor components, only a good and stable wafer processing process can stabilize subsequent semiconductor component production. In addition, more importantly, in recent years, with the development of technology and the smallest feature size of semiconductor components, the size of wafers has continued to increase, which means that the capital and technology invested and consumed are becoming increasingly large. And complex, therefore, the detection technology in the semiconductor wafer process is becoming more and more important.

The standard flaw detection of traditional semiconductor-related processes mostly relies on the operator to observe the wafer surface by various angles to perform inspection. Among them, the type of ruthenium that can be observed by the naked eye is usually characterized by abnormal lattice pattern and obvious difference in crystal color depth, but its more difficult and complicated is that even the same type of 瑕疵 on different semiconductor wafers will have different characteristics. Therefore, it is difficult to grasp the corresponding characteristics. Since the traditional standard test as mentioned above relies on manpower execution, it also faces many problems: (1) the speed of personnel detection directly affects the production speed, and (2) the training time of new recruits is long (requires relevant knowledge), (3) Fatigue problems (inclination of sight, confusion, etc.) caused by long-term work of staff, resulting in decreased work speed, misjudgment and accidental incidence, (4) high labor costs.

Therefore, the purpose of the present invention is to turn the defect detection process of a semiconductor wafer into an automated process without relying on manpower to provide an effective improvement program and system to increase the semiconductor wafer fabrication yield.

The invention provides a semiconductor wafer inspection system, comprising: a conveying device and a 瑕疵 identification device, wherein the 瑕疵 recognition device further comprises an image capturing module and a processing module, and is electrically connected to each other. After the transport device moves the wafer to be tested to the 瑕疵 identification device, the image capture module captures the original image of the wafer to be tested on the transport device, and the processing module performs 瑕疵 recognition according to the original image. The identification includes: de-background and positioning the original image and generating a wafer image, and then dicing the wafer image to divide the wafer image into a plurality of blocks, and then performing the block on any block. The parameterization program is programmed to produce a property matrix that describes the characteristics of each wafer corresponding to the above blocks. After comparing the characteristic matrix with the standard matrix, the parameter difference is obtained, and then the parameter difference is classified according to the classification database (including the intelligent classification algorithm, such as database, artificial intelligence technology), and the identification result is extracted.

In the preferred embodiment of the present invention, the image capturing module is a charge coupled camera (CCD) or a complementary metal oxide (CMOS) semiconductor image sensor, but is not limited thereto.

In a preferred embodiment of the present invention, the processing module is a central processing unit (CPU), which may be included, for example, in a personal computer, an embedded system, or any form of hardware computing platform.

In a preferred embodiment of the present invention, the classification database is stored in the recording medium, and the recording medium is electrically connected to the identification device.

In a preferred embodiment of the present invention, the parameter differences are classified according to a smart classification, and the intelligent classification includes: artificial intelligence, neural like, depth calculation, big data analysis, data mining, and decision tree (CART). Any or more of the taxonomies.

In a preferred embodiment of the present invention, the transport device moves the wafer to be tested under the image capture module of the identification device, and the image capture module is positioned downward from the appropriate angle above the wafer to be tested. Take the original image.

In the preferred embodiment of the present invention, the background and positioning procedure is to use the innovative specified range Otsu algorithm to de-background the original image, calculate the center of gravity of the wafer to be tested, and locate the crystal to be measured according to the position of the center of gravity. Circle to generate the image of the wafer to be tested after positioning.

In a preferred embodiment of the present invention, the semiconductor wafer inspection system is pre-configured with a plurality of physical characteristics (which may be for different wafers to be tested, possibly multiple physical characteristics), and is pre-configured with a plurality of physical characteristics. a standard matrix, and the parameterization procedure of the standard matrix of the wafer is converted according to the above plurality of physical characteristics, so that the selected block generates a characteristic matrix corresponding to different physical characteristics, and the parameters corresponding to the above-mentioned characteristic matrix and the standard matrix are obtained. The difference data; the classification data inventory has at least one 瑕疵 type and at least one detection threshold value corresponding to the 瑕疵 type; and 瑕疵 the identification result is categorized according to the threshold value of the classification database, and then is remitted to display different differences of different blocks.瑕疵 type.

In a preferred embodiment of the present invention, the classification database has an integrated property matrix to define a plurality of possible defect categories.

The present invention also provides a semiconductor wafer inspection method, which is completed after the semiconductor wafer is completed, and includes the following steps: step (S1) using the transport device to move the wafer to be tested into the 瑕疵 identification device; step (S2) 瑕疵 identification device The image capturing module captures the original image of the wafer to be tested on the conveying device; and (S3) the processing module in the identification device performs a background removal and positioning process on the original image to generate a wafer image; S4) performing a tiling process on the wafer image to divide the wafer image into a plurality of blocks; and (S5) performing a parameterization process on the block to generate a characteristic matrix corresponding to the block; step (S6) Determining whether there is a classified database of training completion, if yes, proceeding to step (S7), if not, proceeding to step (S10); step (S7) comparing the characteristic matrix with the standard matrix to obtain a parameter difference; step (S8) is based on The classification database and the above parameter difference are used to identify and classify the classification parameter difference; step (S9) determines whether to identify and classify another block, and if so, proceeds to step (S5), if not, The identification result is output; the step (S10) stores the above characteristic matrix and establishes a classification database; the step (S11) determines whether the parameterization procedure is performed on another block, and if so, proceeds to step (S5), and if not, proceeds to the step (S12); step (S12) classifying the characteristic matrix in the last classification database by the smart classification method to complete the training of the classification database; and step (S13) determining whether to input another wafer, and if so, proceeding to the step (S1), if it ends otherwise.

In a preferred embodiment of the present invention, the image capture module is a charge coupled camera (CCD), a complementary metal oxide (CMOS) semiconductor image sensor, or other device capable of capturing images. And for example, it can be placed in a dark environment.

In a preferred embodiment of the present invention, the step (S2) is that the transport device moves the wafer to be tested under the image capture module of the identification device, and the image capture module is at an appropriate angle above the wafer to be tested. Position down to capture the original image.

In a preferred embodiment of the present invention, the intelligent classification of step (S12) is selected from any one or more of artificial intelligence, neuron, depth calculation, big data analysis, data mining, and decision tree (CART) classification. One.

In a preferred embodiment of the present invention, the step (S3) includes: the step (S31) processing module receiving the original image; and the step (S32) performing multi-valued image cutting on the original image by using a specified range Otsu algorithm; (S33) excluding part of the original image falling outside the preset value range to define a first range of the wafer to be tested; step (S34) filling the first range to make the first range a complete circle, defining a complete circle The second range; the step (S35) calculates the center of gravity of the second range; and the step (S36) expands outward based on the center of gravity to locate the wafer image.

In the preferred embodiment of the present invention, after the step (S31) and before (S32), the method further comprises: (S31-1) optimizing the original image by using the perceptual color mode technique to improve the recognition rate.

In a preferred embodiment of the present invention, after the step (S34), before (S35), the method further comprises: (S34-1) excluding a portion of the first range having an area smaller than the second range.

In a preferred embodiment of the present invention, the plurality of characteristic matrices in the step (S5) correspond to a plurality of physical characteristics, and the standard matrices in the step (S6) are also plural, respectively corresponding to the characteristic matrices. Comparing the characteristic matrix with the standard matrix to obtain a plurality of parameter differences respectively corresponding to the physical characteristics.

In a preferred embodiment of the present invention, the step (S12) comprises: a step (S121) of establishing and analyzing a classification database using a smart classification method, an integration feature matrix of the step (S122), and a step (S123) according to the integrated characteristic matrix. The threshold values of the 瑕疵 type and the corresponding 瑕疵 type are defined to complete the training of the classification database (ie, the classification database that produces the training completion).

In a preferred embodiment of the present invention, step (S8) is to classify the parameter difference based on the threshold value to classify the result of the block.

Therefore, the present invention provides a detection system and method using an Image Parameterized Reference Model (IPRM) method for detecting defects in a wafer, in addition to being able to effectively identify a semiconductor wafer. In addition to the type and analysis of the data, it is stored in the classification database and the storage medium by using parameterized data, so it can save storage space, improve processing efficiency, and at the same time provide feedback analysis of the wafer manufacturing process. Advantages, combined with intelligent classification techniques, such as big data data exploration techniques, trace the possible causes and occurrences of defects in the process; in addition, the new model can also be combined with and effectively integrate different technologies, machines, systems (such as automation machines) Taiwan and the system) to achieve the wisdom of the production line to achieve the automation trend of Industry 4.0.

The present invention is to provide a system and method for semiconductor wafer inspection, which is suitable for Macro level detection, and utilizes parameterized model (IPRM) and automatic detection and classification techniques to improve the traditional standard detection and relies on various problems of human execution. The above and other objects, features and advantages of the present invention will become more apparent and understood. Structures and steps can be more easily understood.

FIG. 1 shows a semiconductor wafer inspection system according to the present invention, comprising: a conveying device 1 and a 瑕疵 identification device 2, wherein the conveying device 1 and the 瑕疵 identification device 2 are in communication or electrical connection with each other. The 瑕疵 recognition device 2 includes an image capture module 21 and a processing module 22, and is electrically connected to each other. When the system starts to function, the transport device 1 moves the wafer W to be tested to the 瑕疵 recognition device 2, and the image capture module 21 captures the original image of the wafer W to be tested on the transport device 1 and transmits it to the processing module. 22 for identification. The 瑕疵 identification includes: performing a background removal and locating process on the original image and generating a wafer image, and then dividing the wafer image into a plurality of equal-area blocks by a tiling process, and then performing parameters on any of the blocks. The program is programmed to generate a property matrix corresponding to the physical characteristics of the block. By comparing the parameter matrix and the standard matrix to obtain the parameter difference, the parameter difference is classified according to the classification database, and finally the 瑕疵 identification result is extracted. In order to avoid interference, the original image of the wafer W needs to be imaged uniformly in the light source, or in the absence of light source interference or in a dark environment. Therefore, in an embodiment of the present invention, identification is performed. The device 2 is a black box, which is mounted on the conveying device 1. The wafer to be tested W is transported into the black box, so that the image capturing module 21 can perform image capturing without interference from the light source. In addition, the image capturing module 21 can be any image capturing device, such as a charge coupled camera (CCD) or a complementary metal oxide semiconductor (CMOS) image sensor; the processing module 22 can be a central processing unit (CPU). The above-mentioned classification database may be stored in a recording medium (not shown), and the recording medium is communicatively or electrically connected to the identification device 2, for example, embedded or built in a central processing unit. The memory, or for example, an external hard disk, a cloud database, and the like.

The present invention also provides a semiconductor wafer inspection method, the main steps of which are shown in Figure 2 (瑕疵 Modeling and Identification Classification System Flowchart), and in order to make the present invention easier to understand, the following is a schematic diagram of the system shown in Figure 1. The component numbers in the description are explained. The method for detecting semiconductor wafers provided by the present invention comprises: (S1) moving the wafer to be tested W to the identification device 2 by using the conveying device 1; (S2) capturing the image capturing module 21 in the identification device 2 for sampling The wafer W is located on the original image on the transport device 1; (S3) the processing module 22 in the identification device 2 performs a background removal and positioning process on the original image to generate a wafer image; (S4) blocks the wafer image a program for dividing the wafer image into a plurality of blocks; (S5) parameterizing a block of the wafer image to generate a characteristic matrix corresponding to the block; (S6) determining whether there is a training completed classification The database, if yes, proceeds to step (S7), if not, proceeds to step (S10); (S7) compares the characteristic matrix with the standard matrix to obtain a parameter difference; (S8) according to the above-mentioned training classification database and parameter difference The value is identified and classified; (S9) determining whether to identify and classify another block, if yes, proceeding to step (S5), if not, exporting the identification result; (S10) storing the above characteristic matrix and Establish a classification database (classification data at this time) Still in the training phase); (S11) determining whether to parameterize another block, if yes, proceeding to step (S5), if not, proceeding to step (S12); (S12) classifying the classified data by intelligent classification a property matrix in the library to complete the training of the classification database (this step will generate a training database of training completions); and (S13) determine whether to input another wafer, and if so, proceed to step (S1), if otherwise terminate .

In the above step (S2), the transport device 1 moves the wafer W to be tested under the image capturing module 21 of the identification device 2, and the image capturing module 21 is positioned downward from the appropriate angle above the wafer W to be tested. The above-mentioned original image is captured; and the above step (S3), as shown in FIG. 3, includes: (S31) the processing module 21 receives the original image; (S32) multi-values the original image by using the specified range Otsu algorithm. (image cutting); (S33) excluding part of the original image falling outside the preset value range, defining a portion of the original image retained as the first range; (S34) filling the hole in the first range, so that the first range includes one a complete circle defining a complete circle as a second range; (S35) calculating a center of gravity of the second range; and (S36) positioning the wafer image based on the center of gravity. Wherein, after the step (S34) and before the step (S35), the remaining portion other than the complete circle may be selectively included (S34-1); in addition, in order to make the subsequent recognition more accurate, the steps (S31) and (S32) Between the two, it is possible to selectively include (S31-1) the use of perceptual color space (HSV technology) to optimize the original image.

In order to make the step (S3) of the present invention easier to understand with the background and positioning program included therein, an embodiment of the present invention is taken as an example, as shown in FIGS. 3a-3e. After receiving the original image, the processing module 21 optimizes the original image by using HSV technology, as shown in FIG. 3a (optimization can make subsequent identification more accurate, but the optimization step can be omitted in other embodiments according to requirements; and in other embodiments The optimization step may also be a grayscale step. The different fill effects (such as check patterns and dot patterns) in FIG. 3a represent different colors in the original image of the embodiment. Then, using the specified range Otsu algorithm, the original image is multi-valued image cut, and then the original image falling outside the preset value range is excluded to define the first range of the wafer W to be tested, as shown in the figure. 3b is shown. Assuming that the normal normal wafer has a color range of 50 to 150, this range is defined as a preset range (a range of 5 to 150 can define a binarization threshold), and a multi-valued value falls within this range. The image is retained, and the portion falling outside this range is excluded. The wafer W to be tested in the original image is mostly retained because the value range is close to the preset value range, but the wafer W to be tested is The edge block is excluded due to the fact that some of the block values do not conform to the range due to the shooting relationship, or the defective portion of the wafer is excluded due to the color drop. The range shown in Figure 3b is defined as the first range, followed by filling the voids in the first range such that the first range contains a complete circle, defining the complete circle as the second range, as shown in Figure 3c. Moreover, in order to calculate the center of gravity more accurately later, in this embodiment, a portion of the first range having an area smaller than the second range is excluded, that is, a portion of the original image remaining outside the wafer to be tested is excluded. Finally, the center of gravity of the second range is calculated, and the wafer image is positioned with reference to the center of gravity. As shown in FIG. 3d, the background and positioning process is completed and an accurate wafer image is generated. Since the exact size of the wafer W to be tested can be known before the semiconductor process and the germanium detection, the actual size of the wafer can be accurately positioned based on the center of gravity after accurately calculating the center of gravity, that is, the wafer position can be accurately located. , produces a background image without a background for further analysis.

The background-free wafer image generated by the step (S3) then proceeds to the steps (S4) to (S5) shown in FIG. 2 to perform the tiling and parameterization process, and convert the image into parameters representing the feature of the block. Facilitate the establishment and training of comparison, analysis, identification and intelligent classification database. Since different blocks on the surface of the wafer may be different in quality and speed of wafer formation, the parameter conditions and small changes in the environment during wafer formation may also result in different quality of different blocks of a single wafer. . Therefore, in order to more accurately analyze the difference in the quality of different blocks, the background-free wafer image generated in the step (S3) is first subjected to the step (S4), and the wafer image is subjected to a sharding process to divide the wafer image into In a plurality of blocks, taking an embodiment of the present invention as an example, the wafer image is divided into a plurality of blocks in a square mesh manner with equal length and width. After the defragmentation process is completed, the step (S5) is performed, and a parameterization procedure is performed on any of the blocks to generate a characteristic matrix corresponding to the above blocks. The characteristic matrix represents the physical characteristics, and the physical properties of the selected block are parameterized to be the above-mentioned characteristic matrix. The physical property may be, for example, the image intensity, color, color block size, surface roughness, texture, etc. of the block in the wafer, and the type and quantity of the physical characteristics are not limited, and are built in the identification device 2, The physical characteristics can also be modified, added or deleted manually, and each physical characteristic has a corresponding characteristic matrix by a parameterization program. Therefore, each block may have one or one according to the number of preset physical characteristics. Multiple feature matrices. Therefore, it can be understood from this description that when a selected block is subjected to parameter analysis, a corresponding number of characteristic matrices are generated along with the number of physical property types analyzed.

According to the above method and system of the present invention, the system and method of the present invention, after obtaining the above-mentioned characteristic matrix, further classify the characteristics collected on the wafer by the analysis system based on the trained classification database. Therefore, the system first determines whether there is a training-completed classification database in the system that can be further used as a tool for feature classification analysis. When the system is used for the first time, or if the classification database without pre-prepared training is available as a classification tool, the system first establishes and trains the classification database (called modeling rules). Therefore, taking a new embodiment of the classification database without training completion as an example, the flow chart shown in FIG. 4 (the flowchart of the modeling system) is a modeling rule in the novel method and system. After the foregoing steps (S1)~(S5), the system does not have a classified database with training completion, and step (S6) determines that the classification database is to be established and trained, and the system will select the execution step in the next step (S10). ). At this time, the characteristic matrix generated by the foregoing step (S5) is stored in the specified database to establish a classification database, and the system can determine the required classification database according to the user's preset classification requirements. The size and the amount of data required to accumulate. Next, the step (S11) determines whether the parameterization procedure is performed on another block. Generally, the system repeats the foregoing steps (S5), (S6), and (S10) until the classified data in the training accumulates sufficient data. The quantity is entered in the step (S12) after the classification database for generating the training is completed, or all the blocks on the wafer W to be tested are subjected to the parameterization process. Next, the step (S12) classifies and analyzes the characteristic matrix in the classified database in the training by using the intelligent classification method to complete the training of the classification database. Smart classifications include artificial intelligence, neuroscience, deep computation, big data, data mining, decision making (CART), etc., or other well-known intelligent classification techniques. And the step (S12) includes: (S121) calculating the classification database in the training by using the smart classification method; (S122) integrating the parameter difference values; (S123) defining at least the parameter difference values after the integration At least one threshold value of the type and the corresponding type to generate a classification database of the above training completion. In step (S121), the above-mentioned one or more intelligent classification methods are applied, and the classification database of the training in which the plurality of parameter differences are stored is calculated, for example, the conversion representation mode enables the data to be more intuitively understood, so that The data in the classified database in training is easier to analyze and integrate. Then, the step (S122) integrates the calculated characteristic matrix, for example, whether a block has "surface damage", and can pass the characteristic matrix corresponding to "color" in the block, the characteristic matrix corresponding to the "color block size", and the corresponding The characteristic matrix of "surface roughness" and the characteristic matrix corresponding to "texture" are obtained by integration of the four characteristic matrices. Therefore, in step (S122), the characteristic matrix is integrated to facilitate the step (S123). Finally, the step (S123) performs the definition of the 瑕疵 type and the classification threshold based on the integrated characteristic matrix to generate a trained classification database. For example, the above-mentioned "surface damage" can be defined as two types of "scratch" or "breakage" depending on the size and depth of the damage range, so even the characteristic matrix corresponding to the same physical property depends on the numerical range. Differences may also be classified as different types of defects. Therefore, according to the integrated property matrix, at least one 瑕疵 type can be defined, and the threshold value corresponding to each 瑕疵 type. In some embodiments of the present invention, depending on the intelligent classification used and its settings, it is also possible to determine whether it is likely to cause fragmentation probability, process problems or product problems that may be caused, as a basis for future product control and process improvement. In addition, once the training database of the new type is completed, it can be used for later identification, and the amount of data of the classified database can be expanded according to the increase of the number of executions of the identification.

On the other hand, if it is determined in the step (S6) that there is a classification database in which the training is completed, the wafer W to be directly processed may be identified (referred to as an execution rule). According to the embodiment of the present invention, there is an example of a trained classification database, and the flow chart shown in FIG. 5 (the flowchart of the identification classification system) is an execution rule in the novel method and system, and the foregoing steps are performed. After (S1)~(S5), since the system already has the classified database of training completion, step (S6) determines that the classified database is used for identification and classification, and then the system selects the execution step (S7). Calculating and comparing the difference between the characteristic matrix and the standard matrix, the parameter difference is obtained. According to different embodiments, the parameter difference may be a difference matrix, and the foregoing “parameter difference value” is not limited to a single value, and may be one. Matrix). In addition, as with the above characteristic matrix, each physical property has a corresponding standard matrix, and the standard matrix represents a standard value of the corresponding physical property. For example, the "color" of the normal wafer has a corresponding standard matrix, and the block is in the block. The parameter matrix corresponding to the physical property of "color" is compared with the standard matrix, and the difference value between the "color" and the standard value of the block can be obtained, which is the parameter difference value described above. And the standard matrix is built into the identification device 2 like the above physical characteristics, and can also be modified, added or deleted manually. Since the semiconductor industry currently uses wafers as a raw material, it has been a technology for many years. Therefore, it is possible to define a standard matrix of physical properties such as color and texture that a wafer should have according to different customer and process requirements. Then, the step (S8) is performed, and the classified database of the training completion is imported, and the plurality of parameter differences corresponding to the plurality of physical characteristics in the block are analyzed according to the threshold value defined in the classified database, so A report that classifies and summarizes each block. When the parameter difference of a block is classified, the system proceeds to step (S9) to determine whether to repeatedly enter the above step (S5) to perform identification and classification on another block. After all the blocks of the wafer W to be tested have been identified/classified, the system will selectively perform the step (S9-1) to determine whether to import another wafer, and if otherwise, directly extract the identification result, if yes Go back to step (S1). According to different embodiments, the step (S9-1) may be selected or skipped. For example, the preset is to separately extract the 瑕疵 identification result of each wafer, and the step (S9-1) is not required, if the preset is hope Steps (S9-1) are performed by retrieving the enthalpy identification results for each batch of wafers.

The format of the extracted 瑕疵 identification result is not limited. FIG. 6 shows an embodiment of the present invention, wherein x represents a non-wafer portion (ie, a background portion removed in the above step (S3)), and N represents a normal block. , S stands for scratching, and U stands for lattice color is not normal. In other embodiments, the format of the 瑕疵 recognition result may be displayed in a color or other manner, and is not limited herein, and the size and cutting manner of the block are not limited.

According to the description of the above embodiments, the semiconductor detection system and the method thereof can be integrated with the existing wafer processing machine, and the machine does not need to be replaced, thereby greatly reducing the cost, and the classified database can be stored in the embedded or It is cloud memory, which is convenient for direct application to existing systems and machines. Furthermore, the novel semiconductor wafer inspection system can effectively detect, intelligently analyze and classify the fabricated wafer defects to effectively improve the yield of the semiconductor wafer process. On the other hand, the system can be used as a benchmark for individual semiconductor wafers and produces classification criteria that can replace manual operations without the need for standard template alignment. The system uses parametric model analysis based on image characteristics, which can describe various characteristics with more accurate parameters and store them in the classification database, saving a lot of manpower, time and material costs, and accessing and reading information. convenient. Therefore, this method can simultaneously have the characteristics of fast processing capability and simple operation. Furthermore, the above-mentioned database can be used for the classification of data and for the analysis of big data to analyze the reasons for the often embarrassing problems in the production process, which will facilitate the continuous improvement of the overall production process or the different classification and data collection. Exported for the follow-up of relevant personnel to achieve effective management of quality control.

Although the present invention has been disclosed above by way of example, it is not intended to limit the present invention. Anyone with ordinary knowledge in the field can make some changes and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of this new type is subject to the definition of the scope of the patent application.

1‧‧‧ delivery device

2‧‧‧瑕疵 Identification device

21‧‧‧Image capture module

22‧‧‧Processing module

W‧‧‧ wafer

S1~S13, S31-S36, S31-1, S34-1, S121-S123, S9-1‧‧

The above and other objects, features, and advantages of the present invention will become more apparent from the aspects of the invention. 2 is a schematic diagram of the main steps of a semiconductor wafer inspection method according to the present invention; FIG. 3 is a schematic diagram of the above method in accordance with an embodiment of the present invention. S3) is a schematic diagram of a detailed step of the process; FIG. 3a to FIG. 3d are schematic diagrams showing different stages of performing the step (S3) of the original image of the semiconductor wafer according to an embodiment of the present invention; FIG. 4 is an embodiment according to the present invention. FIG. 5 is a schematic diagram of a process of executing a rule program according to an embodiment of the present invention; and FIG. 6 is a schematic diagram of a recognition result according to an embodiment of the present invention.

1‧‧‧ delivery device

2‧‧‧瑕疵 Identification device

21‧‧‧Image capture module

22‧‧‧Processing module

W‧‧‧ wafer

Claims (10)

A semiconductor wafer inspection system, comprising: a conveying device; and a plurality of identification devices, comprising an image capturing module and a processing module electrically connected to each other, wherein the conveying device moves a wafer to be tested to The image capture module captures an original image of the wafer to be tested on the transport device, and the processing module performs a frame identification, and the image recognition includes: performing a background on the original image And a positioning program, generating a wafer image, performing a tiling process on the wafer image to divide the wafer image into a plurality of blocks, and performing a parameterization process on a block to generate a characteristic matrix Corresponding to the block, a parameter difference is obtained after comparing the characteristic matrix with a standard matrix, and a classification database based on the training and the parameter difference are used for identification and classification, and a recognition result is extracted. The system of claim 1, wherein the image capturing module is a charge coupled camera (CCD) or a complementary metal oxide (CMOS) semiconductor image sensor. The semiconductor wafer inspection system of claim 1, wherein the processing module is a central processing unit (CPU). The semiconductor wafer inspection system of claim 1, wherein the defect recognition device is a black box. The semiconductor wafer inspection system of claim 1, wherein the classification database is stored in a recording medium, and the recording medium is electrically connected to the UI recognition device. The semiconductor wafer inspection system of claim 1, wherein the transport device moves the wafer to be tested under the image capture module of the UI device, and the image capture module is used by the wafer to be tested The original image is captured downward at a predetermined angular position. The semiconductor wafer inspection system of claim 1, wherein the de-background and positioning program uses a specified range-type Otsu algorithm to de-background the original image, and after calculating a center of gravity of the wafer to be tested, Positioning the wafer to be tested according to the position of the center of gravity to generate the wafer image. The semiconductor wafer inspection system of claim 1, wherein the semiconductor wafer inspection system is pre-configured with a plurality of physical characteristics, and a plurality of standard matrices corresponding to the physical characteristics are pre-set, the parameterization program is based on The physical characteristics are such that the block generates a plurality of characteristic matrices corresponding to the characteristics, and the plurality of parameter differences corresponding to the characteristic matrices and the standard matrices are obtained; the classified data stock has at least one type and Corresponding to at least one threshold value of the 瑕疵 type; and the 瑕疵 identification result is categorized according to the threshold value of the classification database and then remitted. The semiconductor wafer inspection system of claim 1, wherein the characteristic matrix is plural, the classification data inventory has the characteristic matrix, and the training of the classification database is performed by differentiating the different blocks. a program, after accumulating a sufficient number of the characteristic matrices, calculating the classified database by a smart classification method, integrating the characteristic matrices, and defining at least one type according to the integrated characteristic matrices and corresponding to each of the matrices At least one threshold value of the type to complete the training of the classification database. The semiconductor wafer inspection system of claim 9, wherein the intelligent classification is any one or more of artificial intelligence, neural like, depth calculation, big data analysis, data exploration, and decision tree (CART) classification. .