TWM523965U - Flip chip tray structure with scrape-resistance and high heat dissipation - Google Patents

Flip chip tray structure with scrape-resistance and high heat dissipation Download PDF

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Publication number
TWM523965U
TWM523965U TW105202053U TW105202053U TWM523965U TW M523965 U TWM523965 U TW M523965U TW 105202053 U TW105202053 U TW 105202053U TW 105202053 U TW105202053 U TW 105202053U TW M523965 U TWM523965 U TW M523965U
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Taiwan
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substrate
wafer
polymer coating
heat dissipation
flip
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TW105202053U
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Chinese (zh)
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Zheng-Yi Chen
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Jhihsin Automation Co Ltd
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Description

具有防刮及高散熱的覆晶載板機構 Chip-on-board mechanism with scratch resistance and high heat dissipation

本創作係有關於覆晶載板機構,尤其是一種具有防刮及高散熱的覆晶載板機構。 This creation is about the flip-chip carrier mechanism, especially a flip-chip carrier mechanism with scratch resistance and high heat dissipation.

如圖1及圖2所示為一般習知的具覆晶之半導體基板的覆晶載板機構,其主要結構包含一基板10’用於承載位在其上方的半導體結構。該基板10’的表面具有多個穿透的孔位11’。該基板10’係用於乘載位於其上方的半導體結構。而且在該基板10’上也可以形成晶片的各種接腳及焊接結構,以使得該晶片30’可以跟電路板(圖中未顯示)的其他元件相連結。一晶片30’位在該基板10’上。該晶片30’的下方拉伸出多個接腳31’,該多個接腳31’穿過該基板10’的孔位11’,而在該基板10’的底部顯示多個接點。使得該晶片30’的電訊號可透過該多個接腳31’傳輸到外部的設備。其中該基板10’的該多個孔位11’的位置係對應於該晶片30’的該多個接腳31’。在安裝狀態下,該晶片30’的該多個接腳31’係穿越該基板10’上對應的孔位11’,而在該 基板10’的底側形成多個接點,該多個接點可電連接外部的線路,使得外部的信號可輸入該晶片30’內。 1 and 2 show a conventional flip-chip carrier structure with a flip-chip semiconductor substrate, the main structure of which comprises a substrate 10' for carrying a semiconductor structure positioned thereon. The surface of the substrate 10' has a plurality of penetrating holes 11'. The substrate 10' is used to carry a semiconductor structure located above it. Also, various pins and solder structures of the wafer may be formed on the substrate 10' such that the wafer 30' may be coupled to other components of a circuit board (not shown). A wafer 30' is positioned on the substrate 10'. A plurality of pins 31' are stretched under the wafer 30', and the plurality of pins 31' pass through the hole 11' of the substrate 10', and a plurality of contacts are displayed at the bottom of the substrate 10'. The electrical signal of the wafer 30' is transmitted to the external device through the plurality of pins 31'. The positions of the plurality of holes 11' of the substrate 10' correspond to the plurality of pins 31' of the wafer 30'. In the mounted state, the plurality of pins 31' of the wafer 30' traverse the corresponding hole positions 11' on the substrate 10', and The bottom side of the substrate 10' forms a plurality of contacts that electrically connect external lines such that external signals can be input into the wafer 30'.

由於半導體晶片的速度越來越快,而且體積越來越小,所以散熱形成一個相當嚴重且必須要解決的問題。然而上述習知技術中並沒有配置額外的散熱設備,其散熱效率有限,並不足以快速而有效的將半導體晶片所散發的熱向外傳遞,如需加裝散熱結構以增加散熱面積,往往導致整個體積的加大,惟現今電子設備的要求是體積越來越小,但是散熱設備的體積較大及重量較重,也無法符合目前半導體晶片機構越來越要求輕量化的訴求。所以均需要有一種不占體積而且效率高的散熱方式,以解決現今半導體晶片散熱的問題。 As semiconductor wafers become faster and smaller, the heat dissipation creates a rather serious problem that must be solved. However, the above-mentioned prior art does not have an additional heat dissipating device, and the heat dissipating efficiency is limited, which is not enough to quickly and effectively transfer the heat radiated from the semiconductor wafer to the outside. If a heat dissipating structure is required to increase the heat dissipating area, the The whole volume has increased, but the requirements of today's electronic equipment are getting smaller and smaller, but the heat-dissipating equipment is larger and heavier, and it cannot meet the demands of the current semiconductor wafer organization for increasing weight. Therefore, there is a need for a heat dissipation method that does not occupy a volume and is highly efficient, so as to solve the problem of heat dissipation of semiconductor wafers today.

再者習知技術結構的防刮效果也不佳,因此當整個晶片或其基板受到外力碰撞時容易產生刮痕。 Furthermore, the anti-scratch effect of the prior art structure is not good, so that scratches are likely to occur when the entire wafer or its substrate is hit by an external force.

故本案希望提出一種嶄新的具有防刮及高散熱的覆晶載板機構,以解決先前技術上的缺陷。 Therefore, the present invention hopes to propose a brand new flip-chip carrier mechanism with scratch resistance and high heat dissipation to solve the defects of the prior art.

所以本創作的目的係為解決上述習知技術上的問題,本創作中提出一種具有防刮及高散熱的覆晶載板機構,係將晶片及基板上塗布有機或無機的高分子材料,而形成一高分子塗層。該高分子塗層具有散熱及防刮的作用,因此不會使熱量累積在該晶片及該基板內部,而損壞該晶片及該基板內部 的電子元件。該高分子塗層的防刮特性可以有效的吸收外界尖銳的施力,不會使得該施力在該晶片及該基板上形成刮痕。再者該高分子塗層提供整個覆晶載板機構高度的韌性,使得受到外力碰撞時不會輕易產生碎裂。本案中該高分子塗層為相當薄的一層,並不會明顯的增加該晶片及該基板的厚度。因此相較於傳統具覆晶之半導體載板結構沒有配置額外的散熱結構,本案具有更佳的散熱效率與防刮能力,並且達到輕量化的目的。 Therefore, the purpose of the present invention is to solve the above-mentioned problems in the prior art. In the present invention, a flip-chip carrier mechanism with scratch resistance and high heat dissipation is proposed, which is to apply an organic or inorganic polymer material to a wafer and a substrate. A polymer coating is formed. The polymer coating has the functions of dissipating heat and scratching, so that heat is not accumulated in the wafer and the inside of the substrate, and the wafer and the inside of the substrate are damaged. Electronic components. The scratch-resistant property of the polymer coating can effectively absorb the sharp external force, and does not cause the force to form scratches on the wafer and the substrate. Furthermore, the polymer coating provides a high degree of toughness of the entire flip-chip carrier mechanism so that it does not easily break when subjected to an external force. In this case, the polymer coating is a relatively thin layer and does not significantly increase the thickness of the wafer and the substrate. Therefore, compared with the conventional flip-chip semiconductor carrier structure, no additional heat dissipation structure is disposed, and the present invention has better heat dissipation efficiency and scratch resistance, and achieves the purpose of weight reduction.

為達到上述目的本創作中提出一種具有防刮及高散熱的覆晶載板機構,包含:一基板,其表面具有多個穿透的孔位,係用於乘載位於其上方的半導體結構;一晶片附著在該基板上;該晶片的下方拉伸出多個接腳穿過該基板的孔位,而在該基板的底部顯示多個接點,以將該晶片的電訊號傳輸到外部的設備;一高分子塗層,係塗布在該晶片及該基板的上方所形成的一層,以形成對該晶片及該基板的高度保護;該高分子塗層緊緊地貼附在該晶片及該基板的上方,形成一體的結構;基本上該高分子塗層為相當薄的一層,並不會明顯的增加該晶片及該基板的厚度;該高分子塗層該高分子塗層具有散熱及防刮的作用;並提供整個覆晶載板機構高度的韌性,使得受到外力碰撞時不會輕易產生碎裂。。 In order to achieve the above object, a flip chip carrier mechanism with scratch resistance and high heat dissipation is proposed in the present invention, comprising: a substrate having a plurality of penetrating holes on its surface for carrying a semiconductor structure located thereon; a wafer is attached to the substrate; a plurality of pins are drawn through the hole of the substrate under the wafer, and a plurality of contacts are displayed at the bottom of the substrate to transmit the electrical signal of the chip to the outside a polymer coating applied to a layer formed on the wafer and the substrate to form a high degree of protection for the wafer and the substrate; the polymer coating is tightly attached to the wafer and the Forming an integrated structure above the substrate; basically the polymer coating is a relatively thin layer, and does not significantly increase the thickness of the wafer and the substrate; the polymer coating has a heat dissipation and prevention The role of scraping; and provides the high toughness of the entire flip-chip carrier mechanism, so that it will not easily break when subjected to external force. .

由下文的說明可更進一步瞭解本創作的特徵及其優點,閱讀時並請參考附圖。 The features of the present invention and its advantages can be further understood from the description below, and please refer to the attached drawings when reading.

10‧‧‧基板 10‧‧‧Substrate

10’‧‧‧基板 10'‧‧‧Substrate

11‧‧‧孔位 11‧‧‧ hole position

11’‧‧‧孔位 11’‧‧‧ hole

12‧‧‧接點 12‧‧‧Contacts

30‧‧‧晶片 30‧‧‧ wafer

30’‧‧‧晶片 30’‧‧‧ wafer

31‧‧‧接腳 31‧‧‧ pins

31’‧‧‧接腳 31’‧‧‧ feet

50‧‧‧高分子塗層 50‧‧‧ polymer coating

圖1顯示習知之覆晶載板機構之元件組合圖。 Figure 1 shows a combination of components of a conventional flip chip carrier mechanism.

圖2顯示習知之覆晶載板機構之元件組合剖面圖。 Figure 2 shows a cross-sectional view of a component combination of a conventional flip chip carrier mechanism.

圖3顯示本案之元件組合圖。 Figure 3 shows the component combination diagram of this case.

圖4顯示本案之元件組合之側視剖面圖。 Figure 4 shows a side cross-sectional view of the component combination of the present invention.

圖5顯示本案之元件組合之頂面圖。 Figure 5 shows a top view of the component combination of the present case.

圖6顯示本案之元件組合之底面圖。 Figure 6 shows a bottom view of the component combination of the present case.

圖7顯示本案之元件組合圖之側視剖面圖之另一說明例。 Fig. 7 is a view showing another illustrative example of a side sectional view of the component combination diagram of the present invention.

茲謹就本案的結構組成,及所能產生的功效與優點,配合圖式,舉本案之一較佳實施例詳細說明如下。 In view of the structural composition of the case, and the functions and advantages that can be produced, in conjunction with the drawings, a preferred embodiment of the present invention is described in detail below.

請參考圖3至圖7所示,顯示本創作之具有防刮及高散熱的覆晶載板機構,包含下列元件: 一基板10用於承載位在其上方的半導體結構。該基板10的表面具有多個穿透的孔位11。該基板10係用於乘載位於其上方的半導體結構。而且在該基板10上也可以形成晶片的各種接腳及焊接結構,以使得該晶片可以跟電路板(圖中未顯示)的其他元件相連結。 Please refer to FIG. 3 to FIG. 7 , which shows the scratch-carrying and high heat-dissipating flip-chip carrier mechanism of the present invention, which includes the following components: A substrate 10 is used to carry a semiconductor structure over it. The surface of the substrate 10 has a plurality of penetrating holes 11 . The substrate 10 is used to carry a semiconductor structure located above it. Also, various pins and solder structures of the wafer can be formed on the substrate 10 such that the wafer can be bonded to other components of a circuit board (not shown).

一晶片30附著在該基板10上。該晶片30的下方拉伸出多個接腳31,該多個接腳31穿過該基板10的孔位11,而在該基板10的底部顯示多個接點12。使得該晶片30的電訊號 可透過該多個接腳31傳輸到外部的設備。 A wafer 30 is attached to the substrate 10. A plurality of pins 31 are drawn under the wafer 30, and the plurality of pins 31 pass through the hole 11 of the substrate 10, and a plurality of contacts 12 are displayed at the bottom of the substrate 10. Making the signal of the wafer 30 The device can be transmitted to the outside through the plurality of pins 31.

其中該基板10的該多個孔位11的位置係對應於該晶片30的該多個接腳31。在安裝狀態下,該晶片30的該多個接腳31係穿越該基板10上對應的孔位11,而在該基板10的底側形成該多個接點12,該多個接點12可電連接外部的線路,使得外部的信號可輸入該晶片30內。 The positions of the plurality of holes 11 of the substrate 10 correspond to the plurality of pins 31 of the wafer 30. In the mounted state, the plurality of pins 31 of the wafer 30 traverse the corresponding hole positions 11 on the substrate 10, and the plurality of contacts 12 are formed on the bottom side of the substrate 10, and the plurality of contacts 12 can be The external wiring is electrically connected so that an external signal can be input into the wafer 30.

一高分子塗層50,係將有機或無機的高分子材料塗布在該晶片30及該基板10的上方所形成的一層,以形成對該晶片30及該基板10的高度保護。該高分子塗層50緊緊地貼附在該晶片30及該基板10的上方,形成一體的結構。基本上該高分子塗層50為相當薄的一層,並不會明顯的增加該晶片30及該基板10的厚度。 A polymer coating 50 is a layer formed by coating an organic or inorganic polymer material on the wafer 30 and the substrate 10 to form a high degree of protection for the wafer 30 and the substrate 10. The polymer coating 50 is closely attached to the wafer 30 and the substrate 10 to form an integrated structure. Basically, the polymer coating 50 is a relatively thin layer and does not significantly increase the thickness of the wafer 30 and the substrate 10.

本案中該高分子塗層50可以是有機高分子塗層或無機高分子塗層。其中該高分子塗層50中尚可加入氮化硼粉末、碳化矽粉末、三氧化二鋁粉末、鑽石粉末及石墨烯粉末中至少一種,以提升散熱效果。 In the present case, the polymer coating 50 may be an organic polymer coating or an inorganic polymer coating. At least one of boron nitride powder, tantalum carbide powder, aluminum oxide powder, diamond powder and graphene powder may be added to the polymer coating 50 to enhance the heat dissipation effect.

該高分子塗層50具有散熱及防刮的作用。該高分子塗層50可以將內部由該晶片30及該基板10內部所產生的熱迅速的移走,因此不會使熱量累積在該晶片30及該基板10內部,而損壞該晶片30及該基板10內部的電子元件。該高分子塗層50的防刮特性可以有效的吸收外界尖銳的施力,不會使得 該施力在該晶片30及該基板10上形成刮痕。再者該高分子塗層50提供整個覆晶載板機構高度的韌性,使得受到外力碰撞時不會輕易產生碎裂,主要是由於該高分子塗層50強烈的附著在該晶片30及該基板10上面,因此當碰撞時產生的應力不會輕易的沿著該晶片30及該基板10傳遞而導致碎裂的情況。 The polymer coating 50 has a function of heat dissipation and scratch resistance. The polymer coating 50 can quickly remove the heat generated inside the wafer 30 and the substrate 10, so that heat is not accumulated in the wafer 30 and the substrate 10, thereby damaging the wafer 30 and the Electronic components inside the substrate 10. The scratch-resistant property of the polymer coating 50 can effectively absorb the sharp external force of the outside, and does not make The urging force forms a scratch on the wafer 30 and the substrate 10. Furthermore, the polymer coating 50 provides a high degree of toughness of the entire flip chip carrier mechanism, so that it does not easily break when subjected to an external force collision, mainly because the polymer coating 50 strongly adheres to the wafer 30 and the substrate. 10 above, so that stress generated when a collision does not easily pass along the wafer 30 and the substrate 10 to cause chipping.

如圖7所示,該高分子塗層50也可以包覆該基板10的周圍側面,達到更佳的保護效果。 As shown in FIG. 7, the polymer coating 50 can also coat the peripheral side of the substrate 10 for better protection.

由於半導體晶片的速度越來越快,而且體積越來越小,所以散熱形成一個相當嚴重且必須要解決的問題。傳統的散熱方式效率有限,並不足以快速而有效的將半導體晶片所散發的熱向外傳遞,再者傳統的散熱結構為了增加散熱面積,往往導致整個體積的加大,惟現今電子設備的要求是體積越來越小,所以均需要有一種不占體積而且效率高的散熱方式,以解決現今半導體晶片散熱的問題。 As semiconductor wafers become faster and smaller, the heat dissipation creates a rather serious problem that must be solved. The traditional heat dissipation method has limited efficiency, and is not enough to quickly and effectively transfer the heat emitted by the semiconductor wafer. In addition, the conventional heat dissipation structure often increases the entire volume in order to increase the heat dissipation area, but the requirements of today's electronic equipment. The volume is getting smaller and smaller, so it is necessary to have a heat dissipation method that does not occupy a volume and is efficient, so as to solve the problem of heat dissipation of the current semiconductor wafer.

本案的優點在於將晶片及基板上塗布有機或無機的高分子材料,而形成一高分子塗層。該高分子塗層具有散熱及防刮的作用,因此不會使熱量累積在該晶片及該基板內部,而損壞該晶片及該基板內部的電子元件。該高分子塗層的防刮特性可以有效的吸收外界尖銳的施力,不會使得該施力在該晶片及該基板上形成刮痕。再者該高分子塗層提供整個覆晶 載板機構高度的韌性,使得受到外力碰撞時不會輕易產生碎裂。本案中該高分子塗層為相當薄的一層,並不會明顯的增加該晶片及該基板的厚度。因此相較於傳統的覆晶載板結構沒有配置額外的散熱結構,本案具有更佳的散熱效率與防刮能力,並且達到輕量化的目的。 The advantage of the present invention is that an organic or inorganic polymer material is coated on the wafer and the substrate to form a polymer coating. The polymer coating has a function of dissipating heat and scratching, so that heat is not accumulated in the wafer and the inside of the substrate, and the electronic components inside the wafer and the substrate are damaged. The scratch-resistant property of the polymer coating can effectively absorb the sharp external force, and does not cause the force to form scratches on the wafer and the substrate. Furthermore, the polymer coating provides the entire flip chip The toughness of the carrier mechanism is such that it does not easily break when subjected to an external force. In this case, the polymer coating is a relatively thin layer and does not significantly increase the thickness of the wafer and the substrate. Therefore, compared with the conventional flip-chip carrier structure, no additional heat dissipation structure is disposed, and the present invention has better heat dissipation efficiency and scratch resistance, and achieves the purpose of weight reduction.

綜上所述,本案人性化之體貼設計,相當符合實際需求。其具體改進現有缺失,相較於習知技術明顯具有突破性之進步優點,確實具有功效之增進,且非易於達成。本案未曾公開或揭露於國內與國外之文獻與市場上,已符合專利法規定。 In summary, the humanized design of this case is quite in line with actual needs. The specific improvement of the existing defects is obviously a breakthrough improvement advantage compared with the prior art, and it has an improvement in efficacy and is not easy to achieve. The case has not been disclosed or disclosed in domestic and foreign literature and market, and has complied with the provisions of the Patent Law.

上列詳細說明係針對本創作之一可行實施例之具體說明,惟該實施例並非用以限制本創作之專利範圍,凡未脫離本創作技藝精神所為之等效實施或變更,均應包含於本案之專利範圍中。 The detailed description above is a detailed description of one of the possible embodiments of the present invention, and the embodiment is not intended to limit the scope of the patents, and the equivalent implementations or modifications that are not included in the spirit of the present invention should be included in The patent scope of this case.

10‧‧‧基板 10‧‧‧Substrate

30‧‧‧晶片 30‧‧‧ wafer

50‧‧‧高分子塗層 50‧‧‧ polymer coating

Claims (5)

一種具有防刮及高散熱的覆晶載板機構,包含:一基板用於承載位在其上方的半導體結構;該基板的表面具有多個穿透的孔位;該基板係用於乘載位於其上方的半導體結構;而且在該基板上也形成晶片的各種接腳及焊接結構,以使得該晶片可以跟電路板的其他元件相連結;一晶片附著在該基板上;該晶片的下方拉伸出多個接腳,該多個接腳穿過該基板的孔位,而在該基板的底部顯示多個接點;使得該晶片的電訊號可透過該多個接腳傳輸到外部的設備;一高分子塗層,係塗布在該晶片及該基板的上方所形成的一層,以形成對該晶片及該基板的高度保護;該高分子塗層緊緊地貼附在該晶片及該基板的上方,形成一體的結構;基本上該高分子塗層為相當薄的一層,並不會明顯的增加該晶片及該基板的厚度;該高分子塗層具有散熱及防刮的作用;該高分子塗層可將內部由該晶片及該基板內部所產生的熱迅速的移走;該高分子塗層的防刮特性可以有效的吸收外界尖銳的施力,不會使得該施力在該晶片及該基板上形成刮痕;再者該高分子塗層提供整個覆晶載板機構高度的韌性,使得受到外力碰撞時不會輕易產生碎裂。 A flip chip carrier mechanism having scratch resistance and high heat dissipation, comprising: a substrate for carrying a semiconductor structure positioned thereon; a surface of the substrate having a plurality of penetrating holes; the substrate is for carrying a semiconductor structure thereon; and various pins and solder structures of the wafer are also formed on the substrate such that the wafer can be bonded to other components of the circuit board; a wafer is attached to the substrate; and the wafer is stretched below a plurality of pins, wherein the plurality of pins pass through the hole of the substrate, and a plurality of contacts are displayed at the bottom of the substrate; so that the electrical signals of the chip can be transmitted to the external device through the plurality of pins; a polymer coating layer coated on the wafer and the substrate to form a high degree of protection for the wafer and the substrate; the polymer coating is tightly attached to the wafer and the substrate Above, forming an integrated structure; basically the polymer coating is a relatively thin layer, and does not significantly increase the thickness of the wafer and the substrate; the polymer coating has heat dissipation and scratch resistance; the polymer The layer can quickly remove the heat generated inside the wafer and the inside of the substrate; the scratch resistance of the polymer coating can effectively absorb the sharp external force, and the force is not applied to the wafer and the substrate. The scratch is formed on the upper surface; further, the polymer coating provides the high toughness of the entire flip-chip carrier mechanism, so that the chip does not easily break when subjected to an external force. 如申請專利範圍第1項之具有防刮及高散熱的覆晶載 板機構,其中該高分子塗層為有機高分子塗層。 Such as the application of patent scope 1 of the scratch-resistant and high heat-dissipation The plate mechanism, wherein the polymer coating is an organic polymer coating. 如申請專利範圍第1項之具有防刮及高散熱的覆晶載板機構,其中該高分子塗層為無機高分子塗層。 For example, in the patent application scope, the flip-chip carrier mechanism having scratch resistance and high heat dissipation, wherein the polymer coating is an inorganic polymer coating. 如申請專利範圍第1項之具有防刮及高散熱的覆晶載板機構,其中該高分子塗層中係加入氮化硼粉末、碳化矽粉末、三氧化二鋁粉末、鑽石粉末及石墨烯粉末中至少一種,以提升散熱效果。 For example, in the patent application scope, the flip chip and the high heat dissipation flip chip carrier mechanism, wherein the polymer coating is added with boron nitride powder, tantalum carbide powder, aluminum oxide powder, diamond powder and graphene. At least one of the powders to enhance heat dissipation. 如申請專利範圍第1項之具有防刮及高散熱的覆晶載板機構,其中該高分子塗層也包覆該基板的周圍側面,達到更佳的保護效果。 For example, in the patent application scope, the flip-chip carrier mechanism having scratch resistance and high heat dissipation, wherein the polymer coating also covers the peripheral side of the substrate, thereby achieving better protection effect.
TW105202053U 2016-02-05 2016-02-05 Flip chip tray structure with scrape-resistance and high heat dissipation TWM523965U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111653534A (en) * 2019-09-24 2020-09-11 浙江集迈科微电子有限公司 Manufacturing method of three-dimensional heterogeneous module based on graphene as heat dissipation coating

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111653534A (en) * 2019-09-24 2020-09-11 浙江集迈科微电子有限公司 Manufacturing method of three-dimensional heterogeneous module based on graphene as heat dissipation coating
CN111653534B (en) * 2019-09-24 2021-11-26 浙江集迈科微电子有限公司 Manufacturing method of three-dimensional heterogeneous module based on graphene as heat dissipation coating

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