TWM512720U - A display with learnable driving circuit - Google Patents

Abstract

A display with learnable driving circuit is provided. It includes a plurality of learnable driving circuits, a learning controller, and a plurality of lighting devices. The learnable driving circuits include a switching circuit, a output circuit, and a sampling circuit. The learnable driving circuits are coupled to a learning controller. The switching circuit is coupled to a scanning signal and a data signal, where the scanning signal controls the switching circuit to transmit the data signal. The output circuit is coupled to the switching circuit, where the data signal controls the output circuit to generate a driving signal. The sampling circuit is coupled between the output circuit and the lighting device to sample the driving signal for generating a sample signal. The learning controller is coupled to the sampling circuit, and controls the data signal in accordance with a variation of the sample signal. The data signal is used to keep the electrical character of the output circuit.

Description

Display with learning drive circuit

The present invention relates to a display having a drive circuit, and more particularly to a display having a learning drive circuit.

According to the circuit design of the active matrix organic light-emitting diode display, the thin film transistor and the capacitor are utilized, but when the thin film transistor is used as the component for designing the organic light emitting diode display, the electrical characteristics of the thin film transistor will follow the operation. The time changes, and the longer the operation time, the greater the attenuation of the electrical characteristics of the thin film transistor. Thus, the characteristic degradation of the thin film transistor causes the brightness of the organic light emitting diode display to be lowered, and the display quality of the entire display screen is uneven.

In order to improve the influence of changes in the electrical characteristics of thin-film transistors, many researchers have proposed compensation circuits to improve, but the compensation circuit will affect the aperture ratio for the organic light-emitting diode display designed with the bottom emission type. The pixel illumination area and the display brightness. Furthermore, in order to solve the shortcomings of the bottom-emitting type, some researchers have changed the display to an upper-emitting organic light-emitting diode display, but the upper-emitting type display still requires a compensation circuit, and the compensation circuit also needs to be fixed. The layout area leads to an increase in the cost of the organic light emitting diode display.

In view of the above problems, the present invention proposes a display having a learning drive circuit. It is not necessary to design a compensation circuit in the pixels of the display.

One of the purposes of this creation is to provide a learning drive circuit that restores the electrical characteristics of the learning drive circuit to maintain the quality of the display.

To achieve the above objectives, the present invention is a display having a learning drive circuit including a plurality of learning drive circuits, a learning controller and a plurality of light-emitting elements. The learning drive circuit comprises a switching circuit, an output circuit and a sampling circuit. The complex learning drive circuit is coupled to a learning controller. The switching circuit is coupled to a scan signal and a data signal, and the scan signal control switching circuit transmits the data signal; the output circuit is coupled to the switching circuit to receive the data signal, and the data signal control output circuit generates a driving signal; the sampling circuit is coupled to the output circuit and The driving signal is sampled between the light-emitting elements to generate a sampling signal; the learning controller is coupled to the sampling circuit to receive the sampling signal, and controls the data signal according to the change of the sampling signal; the data signal stabilizes an electrical characteristic of the output circuit.

10‧‧‧ display

20‧‧‧Lighting elements

30‧‧‧Learning drive circuit

40‧‧‧Switching circuit

50‧‧‧Output circuit

60‧‧‧Sampling circuit

70‧‧‧ learning controller

72‧‧‧ study form

A‧‧‧ node

CST‧‧‧ capacitor

DATA‧‧‧ data signal

Ids‧‧‧ drive signal

Ids1‧‧ ‧ shunt signal

Ids2‧‧‧Sampling signal

M1‧‧‧O crystal

M2‧‧‧O crystal

M3‧‧‧O crystal

M4‧‧‧O crystal

VC‧‧‧ control signal

VDD‧‧‧first signal

VS‧‧‧ scan signal

VSS‧‧‧second signal

VTH‧‧‧ threshold

△VTH‧‧‧ threshold difference

The first picture: it is a schematic diagram of the learning drive circuit operation of the creation; the second picture: it is a schematic diagram of the light generated by the learning drive circuit of the creation of the learning drive circuit; the third picture: The timing diagram of the learning drive circuit created; the fourth picture: it is the working time shift diagram of the driving signal, sampling signal and data signal of the creation; and the fifth picture: it is the operation of the learning controller of the creation schematic diagram.

In order for your review board to further the characteristics of the creation and the effectiveness achieved Understanding and understanding, with the embodiment and the detailed description, the following description: The display of the present invention comprises a plurality of learning drive circuits, a learning controller and a plurality of light-emitting elements, and the learning drive circuits drive the light-emitting elements The light is generated for displaying a picture; and the learning driving circuit is coupled to the learning controller to enable the learning controller to control the data signal to stabilize the electrical characteristics of the learning driving circuit. However, in the description of the embodiment, only one learning drive circuit, one learning controller and one light-emitting element are used for illustration, and so on.

Please refer to the first figure, which is a schematic diagram of the learning drive circuit of the present invention. As shown, a display 10 having a learning drive circuit 30 includes a learning drive circuit 30, a learning controller 70 and a light emitting element 20. The learning drive circuit 30 includes a switching circuit 40, an output circuit 50, and a sampling circuit 60. The switching circuit 40 is coupled to a scan signal VS and a data signal DATA, and the scan signal VS controls the switching circuit 40 to transmit the data signal DATA; the output circuit 50 is coupled to the switching circuit 40 to receive the data signal DATA, and the data signal DATA control output circuit 50 generates a The driving signal Ids is coupled between the output circuit 50 and the light emitting element 20 to sample the driving signal Ids and generate a sampling signal Ids2; the learning controller 70 is coupled to the sampling circuit 60 and repeatedly receives the sampling signal Ids2, and according to The change of the sampling signal Ids2 controls the data signal DATA; the electrical signal of the data signal DATA stabilizes the output circuit 50, in other words, the data signal DATA stabilizes an electrical characteristic of the learning drive circuit 30.

The switching circuit 40 includes a plurality of transistors M1 and M2. The transistor M1 has an input terminal, a control terminal and an output terminal. The input terminal is coupled to the data signal DATA, the control terminal is coupled to the scan signal VS, and the output terminal is coupled to the transistor M2. The scan signal VS is the scan signal VS outputted by a gate drive circuit of the display 10, and the scan signal VS scans the plurality of pixels of the display 10 via the scan line.

The transistor M2 has an input end, a control end and an output end. The input end is coupled to the output end of the transistor M1. The control end is also coupled to the scan signal VS. The output end is coupled to the output circuit 50 and a capacitor CST. One end. The scan signal VS controls the transmission of the data signal DATA via the control terminal of the transistor M1 and the control terminal of the transistor M2. In other words, the scan signal VS controls the switching circuit 40 to transmit the data signal DATA to the output circuit 50.

Referring to the first figure, the output circuit 50 can be a transistor M3. The transistor M3 has an input terminal, a control terminal and an output terminal. The input terminal is coupled to a first signal VDD, and the control terminal is coupled to the switching circuit 40. An output end of the transistor M2 is coupled to a second end of the capacitor CST and a first end of the light emitting element 20. The transistor M3 generates the driving signal Ids to the light emitting element 20 according to the data signal DATA and the first signal VDD. In other words, the output circuit 50 receives the data signal DATA and the first signal VDD, and the data signal DATA control output circuit 50 generates the driving signal Ids to the light emitting element 20 according to the first signal VDD.

In the above, the first end of the light-emitting element 20 is coupled to the driving signal Ids, and the second end of the light-emitting element 20 is coupled to a second signal VSS. In other words, the light-emitting element 20 is coupled between the driving signal Ids and the second signal VSS. The illuminating component 20 generates light according to the driving signal Ids for displaying a picture, wherein the second signal VSS can be a reference power source.

The sampling circuit 60 can be a transistor M4. The transistor M4 has an input end, a control end and an output end. The input end is coupled to the output end of the output circuit 50 and the first end of the light emitting element 20, in other words, The input end of the transistor M4 is coupled between the output end of the output circuit 50 and the first end of the light emitting element 20. Furthermore, the control terminal of the transistor M4 is coupled to a control signal VC, and the output of the transistor M4 is coupled to the learning controller 70. The control signal VC controls the transistor M4 to be turned on (turned on) and samples the sampling signal Ids2, wherein the control The signal VC can be designed by other circuits of the display, and the creation does not limit the source of the control signal VC.

When the driving signal Ids is a current signal, and the output circuit 50 generates the driving signal Ids, the current is shunted to the light emitting device 20 and the transistor M4, and a shunt signal Ids1 and a sampling signal Ids2 are respectively generated after the shunting, and the shunt signal Ids1 is used. For driving the light-emitting element 20, the sampling signal Ids2 is a signal to be sampled by the sampling circuit 60. Furthermore, there is a first proportional relationship between the shunt signal Ids1 and the sample signal Ids2, and the ratio can be changed by the design of the transistor M4, which is not limited by the present disclosure. Therefore, the sampling signal Ids2 sampled by the sampling circuit 60 is related to the driving signal Ids and the shunt signal Ids1.

Similarly, there is a second proportional relationship between the sampling signal Ids2 and the driving signal Ids. Therefore, after the learning controller 70 is coupled to the output end of the sampling circuit 60 and repeatedly receives the sampling signal Ids2, the change of the driving signal Ids can be known according to the change of the sampling signal Ids2, and the change of the driving signal Ids is equivalent to the transistor M3. Changes in electrical characteristics. Therefore, the present design design sampling circuit 60 and learning controller 70 obtain a change in the electrical characteristics of learning drive circuit 30.

Referring to the first figure, in the time when the display 10 displays the screen (the time of the display screen is referred to as a display time in this embodiment), the output circuit 50 must generate the driving signal Ids, and when the output circuit 50 wants to generate the driving signal Ids The input terminal of the output circuit 50 receives a first signal VDD, and the control terminal of the output circuit 50 receives the data signal DATA. The first signal VDD and the data signal DATA are a positive voltage (ON), and are driven via a capacitor CST. The level of the signal Ids is lower than the level of the data signal DATA. In addition, when the light-emitting element 20 is to generate light, the light-emitting element 20 is coupled to the driving signal Ids and a second signal VSS, and the level of the driving signal Ids needs to be higher than the second signal VSS. Level.

On the contrary, referring to the second figure, it is a schematic diagram of the learning driving circuit of the present invention that does not drive the light-emitting elements to generate light. As shown in the figure, when the display 10 does not display the screen time (the time when the screen is not displayed is referred to as a non-display time in this embodiment), the output signal 50 does not need to output the driving signal Ids, and the first signal VDD can be 0. Volt, that is, the shunt signal Ids1 is 0 amps, and the second signal VSS is also 0 volts, so that the light-emitting element 20 does not generate light. Alternatively, if the shunt signal Ids1 and the second signal VSS are set to the level of the shunt signal Ids1 being lower than the level of the second signal VSS, the light-emitting element 20 also does not generate light, and so on, the level of the first signal VDD. Below the level of the second signal VSS, the light-emitting element 20 does not generate light.

In addition, when the display 10 displays the picture for a long time, the transistor M3 (as shown in the second figure) is in the working state of the output driving signal Ids for a long time, so that the electrical characteristics of the transistor M3 are continuously attenuated. Since the electrical characteristics of the transistor M3 are attenuated with the operating time, the level of the driving signal Ids will be lower as the operating time of the transistor M3 is longer. Furthermore, since both the shunt signal Ids1 and the sample signal Ids2 are in a proportional relationship with the driving signal Ids, when the level of the driving signal Ids is lowered, the levels of the shunt signal Ids1 and the sampling signal Ids2 are also lowered. In other words, the electrical characteristics of the transistor M3 may cause the levels of the shunt signal Ids1 and the sample signal Ids2 to change. Conversely, when the levels of the shunt signal Ids1 and the sample signal Ids2 decrease, the electrical characteristics of the transistor M3 are attenuated.

In view of the above, when the electrical characteristics of the transistor M3 are attenuated during the display time, the non-display time of the display 10 is restored to the electrical characteristics of the transistor M3. In the embodiment of the present invention, the time during which the transistor M3 restores the electrical characteristics is called Reply time for one. In other words, the output circuit 50 has a recovery time, and the electrical characteristics of the output circuit 50 are at the time of recovery. The in-between adjustment, and the reply time is located at the non-display time of the display 10.

The creation output circuit 50 has an operation time. The working time includes a display time and a recovery time, and the level of the data signal DATA is controlled during the recovery time to restore the electrical characteristics of the output circuit 50. As shown in the third figure, it is a timing diagram of the learning drive circuit of the present creation. The creation display 10 controls the level of the scan signal VS to a high level and the level of the data signal DATA as a low level. Bit (negative voltage, -Vdn), so that the control terminal (node A) of the transistor M3 receives the data signal DATA of the negative level, and at this time is the non-display time, the first signal VDD is 0 volt. Furthermore, how long the response time needs to be and how low the negative signal level of the data signal DATA needs is determined according to the change of the sampling signal Ids2. In other words, after the sample learning signal Ids2 is repeatedly received, the creative learning controller 70 determines the response time required by the output circuit 50 and the level of the data signal DATA in the control response time according to the change of the sampling signal Ids2.

In addition, the reply time is located at the non-display time of the display 10, and the data signal DATA is a negative voltage during the reply time, and the time required for the data signal DATA to be a negative voltage can be designed by itself, and the creation is not limited. Referring to the second and third figures, when the data signal DATA is a negative voltage, the level of the driving signal Ids (0 volts) is higher than the level of the data signal DATA and lower (or the same as) the second signal VSS. The level of the position.

It can be seen from the above that when the data signal DATA is positive at the display time, the electrical characteristics of the transistor M3 are attenuated, and the level of the sampling signal Ids2 is gradually lowered. During the recovery time of the transistor M3, the negative voltage of the data signal DATA can gradually restore the electrical characteristics of the transistor M3, and the level of the sampling signal Ids2 will gradually increase. In other words, the data signal DATA can gradually lower the level of the sample signal Ids2, and can gradually increase the level of the sample signal Ids2. That is, when the data signal DATA is a negative voltage To stabilize the electrical characteristics of the output circuit 50.

Please refer to the fourth picture, which is the working time shift diagram of the driving signal, sampling signal and data signal of the creation. Referring to the first and fourth figures together, when the time is displayed, the learning controller 70 obtains the first sampling signal Ids2 by the sampling circuit 60 at the initial time point (t=0), and at the subsequent time point (t) =10, 20 or 30, etc.) repeatedly receives the sample signal Ids2, so that the learning controller 70 can obtain the sampled signal ratio. Moreover, during the display time, the threshold value VTH (electrical characteristic) of the transistor M3 gradually increases with time, and the rise of the threshold value VTH causes the level of the sampling signal Ids2 to decrease. Therefore, the recovery time is used to restore the electrical characteristics of the transistor M3. At this time, the learning controller 70 calculates the sampled signal signal Ids2 to calculate the sampling signal ratio, and determines the length of the response time and the data signal DATA in the reply time according to the sampling signal ratio. The level of the standard, for example: -25 volts or -30 volts. Further, ΔVTH shown in the fourth figure is used to indicate the threshold difference, that is, the difference between the threshold values VTH.

Please refer to the fifth figure, which is a schematic diagram of the operation of the learning controller of this creation. As shown in the figure, the learning controller 70 of the present invention further has a learning table 72. The learning table 72 records the change of the sampling signal Ids2 during the display time, the amount of each reply time, and the change of the sample signal Ids2 after each reply time. Thus, the learning controller 70 controls the response time of the output circuit 50 and the level of the data signal DATA in the reply time according to the record in the learning table 72.

Furthermore, the learning table 72 further includes a comparison sample signal ratio, a reference reply voltage and a reference reply time, as shown in the following table:

Therefore, the learning controller 70 calculates the sampling signal Ids2 recorded in the learning table 72 to obtain a sampling signal ratio (for example, 0.98), and compares the sampling signal ratio with the comparison sampling signal ratio, so that the learning controller 70 can obtain the corresponding The reference signal voltage (-25 volts) of the sampled signal ratio and the reference response time (1000 seconds). The reference recovery time is the recovery time of the electrical characteristics of the transistor M3, and the reference recovery voltage is the level of the data signal DATA in the recovery time. In other words, the response time corresponds to the reference response time, and the data signal DATA corresponds to the reference recovery voltage. Thus, the creation display 10 obtains the sampling signal Ids2 via the sampling circuit 60 and the learning controller 70 calculates the sampling signal ratio, and can determine the recovery time and the level of the data signal DATA in the response time.

Referring to the fifth figure, during the display time of the N-1th working period, the learning table 72 of the learning controller 70 records the data signal DATA, the length of the display time, and the change of the sample signal Ids2, and then the N-1th time. During the reply time during the work, the learning controller 70 can calculate the level of the reply voltage (data signal DATA) using the previous record, and cause the learning drive circuit 30 to restore the electrical characteristics.

Furthermore, at the end of the reply time during the N-1th working period, the learning controller 70 also records the sampling signal Ids2, and calculates the sampling signal ratio, thus the reply time. At the end, it is known whether the learning drive circuit 30 has restored electrical characteristics or whether the electrical characteristics are within an allowable range. If the electrical characteristics of the learning drive circuit 30 are not within the allowable range, the learning table 72 also records the result of the N-1th operation, so that the learning controller 70 can follow the learning time during the recovery time during the Nth operation. The data recorded in Table 72 increases or decreases the response time and the level of the data signal DATA during the response time so that the electrical characteristics do not diverge, so the display quality of the display 10 is relatively stable.

In summary, the present invention is a display having a learning drive circuit including a plurality of learning drive circuits, a learning controller and a plurality of light-emitting elements. The learning drive circuit comprises a switching circuit, an output circuit and a sampling circuit. The complex learning drive circuit is coupled to a learning controller. The switching circuit is coupled to a scan signal and a data signal, and the scan signal control switching circuit transmits the data signal; the output circuit is coupled to the switching circuit to receive the data signal, and the data signal control output circuit generates a driving signal; the sampling circuit is coupled to the output circuit and The driving signal is sampled between the light-emitting elements and generates a sampling signal; the learning controller is coupled to the sampling circuit to receive the sampling signal, and controls the data signal according to the change of the sampling signal; the data signal stabilizes an electrical characteristic of the output circuit.

10‧‧‧ display

20‧‧‧Lighting elements

30‧‧‧Learning drive circuit

40‧‧‧Switching circuit

50‧‧‧Output circuit

60‧‧‧Sampling circuit

70‧‧‧ learning controller

CST‧‧‧ capacitor

DATA‧‧‧ data signal

Ids‧‧‧ drive signal

Ids2‧‧‧Sampling signal

M1‧‧‧O crystal

M2‧‧‧O crystal

M3‧‧‧O crystal

M4‧‧‧O crystal

VC‧‧‧ control signal

VDD‧‧‧first signal

VS‧‧‧ scan signal

VSS‧‧‧second signal

Claims (7)

A display with a learning drive circuit, comprising: a plurality of learning drive circuits, comprising: a switching circuit coupled to a scan signal and a data signal, the scan signal controlling the switching circuit to transmit the data signal; and an output circuit And coupling the switching circuit to receive the data signal, the data signal controlling the output circuit to generate a driving signal; a sampling circuit coupled between the output circuit and the light emitting component, sampling the driving signal to generate a sampling signal a learning controller coupled to the sampling circuit for receiving the sampling signal, the learning controller controlling the data signal according to the change of the sampling signal; and a plurality of light-emitting components, the learning driving circuit driving the light-emitting components to generate light And for displaying a picture; wherein the data signal stabilizes an electrical characteristic of the output circuit. The display device with a learning drive circuit according to claim 1, wherein the output circuit has a recovery time, the electrical characteristic of the output circuit is adjusted within the recovery time, and the change of the sampling signal determines the output circuit The reply time and the level of the data signal in the reply time. A display having a learning drive circuit according to claim 2, wherein the recovery time is at a non-display time of the display, and the data signal is a negative voltage at the recovery time. A display having a learning drive circuit as described in claim 3 of the patent application, The output circuit receives a first signal and the data signal, and the light emitting element is coupled to the driving signal and a second signal. When the display time is a display time, the first signal and the data signal are a positive voltage. The driving signal is lower than the level of the data signal and higher than the level of the second signal. At the time of the display, the driving signal is higher than the level of the data signal. The level of the signal is lower than or equal to the level of the second signal. The display device with the learning drive circuit of claim 1, further comprising a learning table, wherein the learning controller records the change of the sample signal, a reply time and the reading time in the learning table The change of the sampling signal after the reply time is used to control the reply time of the output circuit and the level of the data signal in the reply time according to the learning table. The display device with the learning drive circuit of claim 5, wherein the data signal gradually lowers the level of the sampled signal during the display time, and the data signal gradually increases the sample signal during the reply time. The level of the position. The display device with a learning drive circuit according to claim 5, wherein the learning table includes a comparison sample signal ratio, a reference reply voltage and a reference reply time, and the learning controller calculates a reference signal according to the sample signal. Sampling the signal ratio, and comparing the sampling signal ratio with the comparison sampling signal to obtain the reference reply voltage and the reference reply time, the data signal corresponding to the reply voltage, the reply time corresponding to the reply time to determine The information signal at the time of the reply.