TWM509448U - USB Type-C connector module - Google Patents

USB Type-C connector module Download PDF

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Publication number
TWM509448U
TWM509448U TW104207316U TW104207316U TWM509448U TW M509448 U TWM509448 U TW M509448U TW 104207316 U TW104207316 U TW 104207316U TW 104207316 U TW104207316 U TW 104207316U TW M509448 U TWM509448 U TW M509448U
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chip
terminals
usb type
connector
channel
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TW104207316U
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Chinese (zh)
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Nai-Chien Chang
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Icothing Technology Ltd
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Description

USB Type-C連接器模組(一)USB Type-C connector module (1)

本創作涉及連接器,尤其涉及連接器模組。This creation relates to connectors, and more particularly to connector modules.

隨著半導體產業的發展,各式電子裝置推陳出新,尤其是個人電腦、平板電腦、智慧型手機等電子裝置,更因其便利性以及強大的功能性,快速地普及於一般大眾的生活週遭。With the development of the semiconductor industry, various electronic devices have been introduced, especially electronic devices such as personal computers, tablet computers, and smart phones. Moreover, due to their convenience and powerful functionality, they have rapidly spread to the general public.

近年來,隨著通用序列匯流排(Universal Serial Bus,USB)連接器的普及化,幾乎各式電子裝置上皆配置有USB連接埠,藉此,使用者可通過USB介面來輕鬆進行資料的傳輸。目前時下最泛用的USB介面,為支援480Mbps的高速傳輸速率(Hi-Speed)的USB 2.0規格、支援5Gbps的超高速傳輸速率(Super-Speed)的USB3.0規格,以及主要供可攜式電子裝置(例如智慧型手機)使用的Micro USB規格等。In recent years, with the popularization of the universal serial bus (USB) connector, almost all types of electronic devices are equipped with a USB port, whereby the user can easily transfer data through the USB interface. . At present, the most widely used USB interface is USB 2.0 specification supporting 480Mbps high-speed transmission rate (Hi-Speed), USB 3.0 specification supporting 5Gbps ultra-high speed (Super-Speed), and mainly for portability. Micro USB specifications used in electronic devices (such as smart phones).

然而,隨著電子裝置的迅速發展,前述USB2.0、USB3.0及Micro USB的傳輸速率已無法滿足部分使用者的需求。是以,近來市場上開發出新一代的USB3.1規格,並且,其中更以能夠支援10Gbps的傳輸速率的USB3.1 Type-C規格最受到使用者的矚目。However, with the rapid development of electronic devices, the aforementioned USB2.0, USB3.0 and Micro USB transmission rates have been unable to meet the needs of some users. Therefore, a new generation of USB 3.1 specifications has been developed in the market recently, and among them, the USB 3.1 Type-C specification capable of supporting a transmission rate of 10 Gbps is most attracting attention of users.

由於USB Type-C的功能複雜,且具有多達24根的 端子,因此若要在電子裝置上設置USB Type-C的連接器,則需要在主板上額外設置一或多顆的晶片,例如通過USB Type-C連接器的配置通道端子(Configuration Channel,CC)判斷輸出訊號為何的晶片、切換USB Type-C上、下層訊號的晶片、以及對輸出/入訊號進行放大的晶片等。Due to the complexity of the USB Type-C and up to 24 Terminal, so if you want to set the USB Type-C connector on the electronic device, you need to set one or more additional chips on the motherboard, for example, through the configuration channel terminal (Configuration Channel, CC) of the USB Type-C connector. A chip for judging the output signal, a wafer for switching the USB Type-C upper and lower signals, and a wafer for amplifying the output/input signal.

惟,上述晶片實會佔據該主板上寶貴的配置空間,造成該主板上的空間不敷使用的問題。是以,在電子裝置紛紛以微小化為主流的現代,如何能夠在支援USB Type-C介面的同時,又不會因為該些晶片的設置而浪費該主板上的空間,並且造成該主板上的佈線困難,即為本技術領域研究人員所潛心研究的方向。However, the above-mentioned chip will occupy a valuable configuration space on the motherboard, causing the problem that the space on the motherboard is insufficient. Therefore, in the modern era where electronic devices are miniaturized, how can the USB Type-C interface be supported while the space on the motherboard is not wasted due to the setting of the chips, and the motherboard is Difficulties in wiring are the directions that researchers in this field are concentrating on.

本創作的主要目的,在於提供一種USB Type-C連接器模組,將USB Type-C連接器及具有配置通道功能的晶片設置於同一個連接器模組中,以利於外部主板的設置以及電路簡化。The main purpose of this creation is to provide a USB Type-C connector module, which is provided with a USB Type-C connector and a chip having a configuration channel function in the same connector module, so as to facilitate the setting and circuit of the external motherboard. simplify.

為了達成上述之目的,本創作的USB Type-C連接器至少包括一電路板,以及電性連接於該電路板上的一USB Type-C連接器、一配置通道晶片及複數導接端子。該USB Type-C連接器的二配置通道端子電性連接該配置通道晶片,以接受配置通道控制。該USB Type-C連接器的複數電源端子通過該複數導接端子連接一外部主板的一電力控制 晶片,以接收輸出電力。該USB Type-C連接器的複數資料端子通過該複數導接端子連接該外部主板的一晶片組,以進行資料的傳遞。In order to achieve the above object, the USB Type-C connector of the present invention comprises at least a circuit board, and a USB Type-C connector electrically connected to the circuit board, a configuration channel chip and a plurality of lead terminals. The two configuration channel terminals of the USB Type-C connector are electrically connected to the configuration channel chip to receive configuration channel control. A plurality of power terminals of the USB Type-C connector are connected to a power control of an external motherboard through the plurality of conductive terminals A chip to receive output power. The plurality of data terminals of the USB Type-C connector are connected to a chip set of the external main board through the plurality of lead terminals for data transfer.

本創作相對於現有技術所能達到的技術功效在於,將與USB Type-C介面的功能相關的晶片,例如配置通道晶片,與USB Type-C連接器共同設置於單一個連接器模組中。 如此一來,當廠商需要在該外部主板上增設USB Type-C介面時,可直接配置本創作的該連接器模組,藉此快速地在該外部主板上同時設置該USB Type-C連接器以及相關的晶片。The technical effect that the present invention can achieve with respect to the prior art is that a wafer related to the function of the USB Type-C interface, such as a configuration channel wafer, is disposed in a single connector module together with a USB Type-C connector. In this way, when the manufacturer needs to add a USB Type-C interface to the external motherboard, the connector module of the creation can be directly configured, thereby quickly setting the USB Type-C connector on the external motherboard. And related wafers.

再者,本創作將與USB Type-C介面的功能相關的晶片設置於該連接器模組中,使得該外部主板上不需要另外設置對應的晶片。如此一來,該外部主板上的線路可被有效地簡化,進而有助於降低該外部主板的線路設計難度,並且該外部主板的製造成本也可被大幅降低。Moreover, the present invention sets a chip related to the function of the USB Type-C interface in the connector module, so that no corresponding wafer is required to be disposed on the external motherboard. In this way, the circuit on the external motherboard can be effectively simplified, thereby helping to reduce the circuit design difficulty of the external motherboard, and the manufacturing cost of the external motherboard can be greatly reduced.

1‧‧‧USB Type-C連接器模組1‧‧‧USB Type-C Connector Module

10‧‧‧電路板10‧‧‧ boards

11‧‧‧USB Type-C連接器11‧‧‧USB Type-C connector

12‧‧‧配置通道晶片12‧‧‧Configure channel chip

13‧‧‧導接端子13‧‧‧Connecting terminal

14‧‧‧外殼體14‧‧‧Outer casing

2、2’‧‧‧晶片組2, 2'‧‧‧ chipset

22‧‧‧電力控制晶片22‧‧‧Power Control Wafer

23‧‧‧系統電源23‧‧‧System Power

24‧‧‧USB控制晶片24‧‧‧USB Control Wafer

3、3’、3”‧‧‧USB Type-C連接器模組3, 3', 3"‧‧‧ USB Type-C connector module

30‧‧‧電路板30‧‧‧ boards

31‧‧‧USB Type-C連接器31‧‧‧USB Type-C Connector

32‧‧‧第一晶片32‧‧‧First chip

321‧‧‧配置通道晶片321‧‧‧Configure channel chip

33‧‧‧第二晶片33‧‧‧second chip

331‧‧‧訊號調節晶片331‧‧‧ Signal conditioning chip

332‧‧‧訊號切換晶片332‧‧‧Signal switching chip

333‧‧‧訊號調節/切換晶片333‧‧‧Signal adjustment/switching chip

34‧‧‧導接端子34‧‧‧Connecting terminal

35‧‧‧外殼體35‧‧‧Outer casing

圖1為本創作的第一具體實施例的連接器模組立體分解圖。1 is an exploded perspective view of a connector module of a first embodiment of the present invention.

圖2為本創作的第一具體實施例的連接器模組立體組合圖。2 is a perspective assembled view of the connector module of the first embodiment of the present invention.

圖3為本創作的第一具體實施例的連接電路圖。Figure 3 is a connection circuit diagram of the first embodiment of the present invention.

圖4為本創作的第二具體實施例的連接器模組立體組合圖。4 is a perspective assembled view of a connector module of a second embodiment of the present invention.

圖5為本創作的第二具體實施例的連接電路圖。Figure 5 is a connection circuit diagram of a second embodiment of the present invention.

圖6為本創作的第三具體實施例的連接電路圖。Figure 6 is a connection circuit diagram of a third embodiment of the present invention.

圖7為本創作的第四具體實施例的連接電路圖。Figure 7 is a connection circuit diagram of a fourth embodiment of the present invention.

為能夠更加詳盡的了解本創作之特點與技術內容,請參閱以下所述之說明及附圖,然而所附圖示僅供參考說明之用,而非用來加以限制者。For a more detailed understanding of the features and technical aspects of the present invention, reference should be made to the description and the accompanying drawings.

首請參閱圖1及圖2,分別為本創作的第一具體實施例的連接器模組立體分解圖及連接器模組立體組合圖。本創作揭露了一種USB Type-C連接器模組1,包括一USB Type-C連接器11,以及至少一個與USB Type-C介面的功能相關的晶片,詳細說明如下。Please refer to FIG. 1 and FIG. 2 , which are respectively a perspective exploded view of a connector module and a three-dimensional combination diagram of a connector module according to a first embodiment of the present invention. The present application discloses a USB Type-C connector module 1, including a USB Type-C connector 11, and at least one chip associated with the functionality of the USB Type-C interface, as described in detail below.

如圖1及圖2所示,於本創作的第一具體實施例中,該USB Type-C連接器模組1主要包括一電路板10、該USB Type-C連接器11、一配置通道晶片12、複數導接端子13及一外殼體14。該USB Type-C連接器11、該配置通道晶片12及該複數導接端子13皆電性連接於該電路板10。該外殼體14用以包覆該電路板10、該USB Type-C連接器11、該配置通道晶片12及該複數導接端子13。As shown in FIG. 1 and FIG. 2, in the first embodiment of the present invention, the USB Type-C connector module 1 mainly includes a circuit board 10, the USB Type-C connector 11, and a configuration channel chip. 12. A plurality of conductive terminals 13 and an outer casing 14. The USB Type-C connector 11 , the configuration channel wafer 12 , and the plurality of conductive terminals 13 are electrically connected to the circuit board 10 . The outer casing 14 is used to cover the circuit board 10, the USB Type-C connector 11, the arrangement channel wafer 12, and the plurality of conductive terminals 13.

該USB Type-C連接器11電性連接於該電路板10的一側,並且裸露於該外殼體14之外。本實施例中,該USB Type-C連接器11主要為一USB Type-C連接器母頭,該USB Type-C連接器模組1可通過該USB Type-C連接器11連接外部的一USB Type-C連接器公頭(圖未標示)。於其他實施例中,該USB Type-C連接器11亦可為一USB Type-C連接器公頭,並且該USB Type-C連接器模組1可通過該UBS Type-C連接器11連接外部的一USB Type-C連接器母頭(圖未標示),藉以通過USB Type-C介面來進行資料與電力的傳輸,但不加以限定。The USB Type-C connector 11 is electrically connected to one side of the circuit board 10 and is exposed outside the outer casing 14. In this embodiment, the USB Type-C connector 11 is mainly a USB Type-C connector female, and the USB The Type-C connector module 1 can be connected to an external USB Type-C connector male (not shown) through the USB Type-C connector 11. In other embodiments, the USB Type-C connector 11 can also be a USB Type-C connector male, and the USB Type-C connector module 1 can be connected to the outside through the UBS Type-C connector 11. A USB Type-C connector female (not shown), through which the data and power are transmitted through the USB Type-C interface, but is not limited.

該配置通道晶片12通過該電路板10電性連接該USB Type-C連接器11(具體而言,係電性連接該USB Type-C連接器11的至少一端子(例如圖3所示的CC1與CC2兩根端子)),藉此,為該USB Type-C連接器模組1提供USB Type-C介面的配置通道(Configuration Channel,CC)的操作(容後詳述)。The configuration channel wafer 12 is electrically connected to the USB Type-C connector 11 through the circuit board 10 (specifically, at least one terminal electrically connected to the USB Type-C connector 11 (for example, CC1 shown in FIG. 3) And the CC2 two terminals)), thereby providing the USB Type-C connector module 1 with the operation of the Configuration Channel (CC) of the USB Type-C interface (described later).

該複數導接端子13電性連接於該電路板10上遠離該USB Type-C連接器11的另一側,並且通過該電路板10電性連接該USB Type-C連接器11及該配置通道晶片12。更具體而言,該複數導接端子13的一端電性連接於該電路板10上,另一端分別朝下延伸並凸伸出該外殼體14之外。本實施例中,該USB Type-C連接器模組1通過該複數導接端子13的另一端電性連接於一電子裝置的主板(圖未標示),藉以,該電子裝置可通過該USB Type-C連接器模組1而使用USB Type-C介面進行資料與電力的傳輸。The plurality of conductive terminals are electrically connected to the other side of the circuit board 10 away from the USB Type-C connector 11 , and the USB Type-C connector 11 and the configuration channel are electrically connected through the circuit board 10 . Wafer 12. More specifically, one end of the plurality of conductive terminals 13 is electrically connected to the circuit board 10, and the other ends respectively extend downward and protrude outside the outer casing 14. In this embodiment, the USB Type-C connector module 1 is electrically connected to the main board of an electronic device (not shown) through the other end of the plurality of conductive terminals 13 , so that the electronic device can pass the USB Type. -C connector module 1 uses USB Type-C interface for data and power transmission.

請同時參閱圖3,為本創作的第一具體實施例的連接電路圖。如圖3所示,本創作的第一具體實施例中,該USB Type-C連接器模組1主要通過該複數導接端子13插接於該主板上,並且與該主板上的一晶片組(Platform Controller Hub,PCH)2、一電力控制晶片22及一系統電源23電性連接。Please refer to FIG. 3 at the same time, which is a connection circuit diagram of the first embodiment of the present invention. As shown in FIG. 3, in the first embodiment of the present invention, the USB Type-C connector module 1 is mainly connected to the motherboard through the plurality of conductive terminals 13 and a chipset on the motherboard. (Platform Controller Hub, PCH) 2, a power control chip 22, and a system power supply 23 are electrically connected.

該USB Type-C連接器11主要具有複數端子(以24根為例),其中至少包含二配置通道(Configuration Channel,CC)端子。如圖3所示,本實施例中,該USB Type-C連接器的該二配置通道端子(CC1、CC2)通過該電路板10電性連接該配置通道晶片12,藉此,該配置通道晶片12可通過該二配置通道端子判斷該USB Type-C連接器要輸出USB Type-C訊號,或是輸出USB2.0訊號。The USB Type-C connector 11 mainly has a plurality of terminals (for example, 24 ports), and at least two configuration channel (CC) terminals are included. As shown in FIG. 3, in the embodiment, the two configuration channel terminals (CC1, CC2) of the USB Type-C connector are electrically connected to the configuration channel wafer 12 through the circuit board 10, thereby configuring the channel wafer. 12 The second configuration channel terminal can determine whether the USB Type-C connector outputs a USB Type-C signal or outputs a USB 2.0 signal.

具體而言,該配置通道晶片12的一部分通過該電路板10電性連接該二配置通道端子,另一部分通過該複數導接端子13電性連接該主板上的該晶片組2。Specifically, a portion of the configuration channel wafer 12 is electrically connected to the two configuration channel terminals through the circuit board 10, and another portion is electrically connected to the chip group 2 on the main board through the plurality of connection terminals 13.

承上所述,當該USB Type-C連接器11被一外部連接器(圖未標示)觸發時,該配置通道晶片12將該二配置通道端子的一回饋訊號傳送至該晶片組2,藉此該晶片組2可通過該回饋訊號判斷該外部連接器是否支援USB Type-C介面。並且,該晶片組2可於判斷該外部連接器支援USB Type-C介面時,發出控制指令給該配置通道晶片12,藉此 該配置通道晶片12可依據該控制指令控制該USB Type-C連接器11輸出USB Type-C訊號。As described above, when the USB Type-C connector 11 is triggered by an external connector (not shown), the configuration channel chip 12 transmits a feedback signal of the two configuration channel terminals to the chip group 2, The chipset 2 can determine whether the external connector supports the USB Type-C interface by using the feedback signal. Moreover, the chip set 2 can issue a control command to the configuration channel wafer 12 when determining that the external connector supports the USB Type-C interface. The configuration channel chip 12 can control the USB Type-C connector 11 to output a USB Type-C signal according to the control command.

反之,該晶片組2可於判斷該外部連接器不支援USB Type-C介面時(例如該外部連接器配置於一傳輸線,並且該傳輸線的另一端配置的是僅支援USB2.0介面的一USB2.0連接器),發出另一控制指令給該配置通道晶片12,藉此該配置通道晶片12依據該另一控制指令控制該USB Type-C連接器11輸出USB2.0訊號。惟,以上所述僅為本創作的其中一具體實例,但不以此為限。On the contrary, the chipset 2 can determine that the external connector does not support the USB Type-C interface (for example, the external connector is disposed on a transmission line, and the other end of the transmission line is configured with a USB2 that only supports the USB2.0 interface. The .0 connector) issues another control command to the configuration channel wafer 12, whereby the configuration channel wafer 12 controls the USB Type-C connector 11 to output a USB 2.0 signal in accordance with the other control command. However, the above description is only one specific example of the present creation, but is not limited thereto.

值得一提的是,若該外部連接器可支援USB Type-C介面,且該二配置通道端子的其中之一確定被該外部連接器所觸發時,該配置通道晶片12可依據該晶片組2的控制,輸出一連接電壓(Vconn)至該USB Type-C連接器11的另一該配置通道端子。It is worth mentioning that if the external connector can support the USB Type-C interface, and one of the two configuration channel terminals is determined to be triggered by the external connector, the configuration channel wafer 12 can be based on the chip set 2 The control outputs a connection voltage (Vconn) to another of the configuration channel terminals of the USB Type-C connector 11.

具體而言,該配置通道晶片12通過該複數導接端子13中的一第一導接端子及一第二導接端子分別電性連接該主板上的該電力控制晶片22與該晶片組2。本實施例中,該配置通道晶片12為一主動式IC,該電力控制晶片22通過該第一導接端子提供該配置通道晶片12運用所需之電力(Vcc)。並且,該配置通道晶片12通過該第二導接端子連接該晶片組2,並接受該晶片組2的控制,以於該USB Type-C連接器11需要時,通過該第一導接端子接收該電力控制晶 片22提供的該連接電壓,並輸出至該USB Type-C連接器11。該連接電壓的功效屬於USB Type-C介面的公知常識,於此不再贅述。Specifically, the configuration channel wafer 12 is electrically connected to the power control chip 22 and the chip group 2 on the main board through a first guiding terminal and a second guiding terminal of the plurality of guiding terminals 13 respectively. In this embodiment, the configuration channel wafer 12 is an active IC, and the power control chip 22 provides the power (Vcc) required for the configuration of the channel wafer 12 through the first conductive terminal. And the configuration channel wafer 12 is connected to the chip group 2 through the second conductive terminal, and receives the control of the chip group 2, and is received by the first conductive terminal when the USB Type-C connector 11 is needed. Power control crystal The connection voltage supplied from the slice 22 is output to the USB Type-C connector 11. The function of the connection voltage belongs to the common knowledge of the USB Type-C interface, and will not be described here.

該USB Type-C連接器11的該複數端子中還包括複數電源端子。本實施例中,該複數電源端子通過該電路板10電性連接該複數導接端子13,並且通過該複數導接端子13電性連接該主板上的該電力控制晶片22。本創作中,該電力控制晶片22還與該主板上的該系統電源23電性連接,並接收該系統電源23的電力輸出。藉此,該USB Type-C連接器11可由該電力控制晶片22接收所需的工作電壓(VBUS),藉以對外輸出。The plurality of power terminals of the USB Type-C connector 11 further include a plurality of power terminals. In this embodiment, the plurality of power terminals are electrically connected to the plurality of lead terminals 13 through the circuit board 10, and the power control chip 22 on the main board is electrically connected through the plurality of lead terminals 13. In the present creation, the power control chip 22 is also electrically connected to the system power supply 23 on the main board and receives the power output of the system power supply 23. Thereby, the USB Type-C connector 11 can receive the required operating voltage (VBUS) from the power control chip 22 for external output.

更具體而言,該主板的該系統電源23一般是輸出12V的電源。該電力控制晶片22係接收該系統電源23輸出的電源,並依據該USB Type-C連接器11的需求進行壓降後,再對外輸出。例如,於本實施例中,該連接電壓(Vconn)為5V,且該工作電壓(VBUS)為5V。More specifically, the system power supply 23 of the motherboard is typically a 12V power supply. The power control chip 22 receives the power output from the system power supply 23, and performs voltage drop according to the demand of the USB Type-C connector 11, and then outputs it to the outside. For example, in the present embodiment, the connection voltage (Vconn) is 5V, and the operating voltage (VBUS) is 5V.

該USB Type-C連接器11的該複數端子中還包括複數資料端子。本實施例中,該複數資料端子通過該電路板10電性連接該複數導接端子13,並且通過該複數導接端子13直接電性連接該主板上的該晶片組2。藉此,該主板可藉由該USB Type-C連接器11與外部進行資料傳輸。The plurality of terminals of the USB Type-C connector 11 further include a plurality of data terminals. In this embodiment, the plurality of data terminals are electrically connected to the plurality of conductive terminals 13 through the circuit board 10, and the plurality of conductive terminals 13 are directly electrically connected to the chip set 2 on the main board. Thereby, the motherboard can perform data transmission with the external by the USB Type-C connector 11.

如圖3所示,本實施例中,該USB Type-C連接器 11主要是通過該複數資料端子與該晶片組2傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。As shown in FIG. 3, in this embodiment, the USB Type-C connector 11 mainly transmits the positive data signal (D+) and the negative data signal (D-) corresponding to the USB2.0 interface through the plurality of data terminals and the chip group 2.

該USB Type-C連接器11還可通過該複數資料端子與該晶片組2傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-)。值得一提的是,本實施例中的該晶片組2以可直接支援至少6組的USB3.1訊號埠的晶片組為例,因此該主板上不必另外設置用來進行訊號切換的晶片(一般為PCI-E訊號轉單一組USB3.1訊號的轉換晶片),即可直接提供兩組USB3.1介面的訊號至該USB Type-C連接器模組1,以同時支援該USB Type-C連接器11上、下層所需的兩組USB3.1訊號(如圖3中所示的Tx1、Rx1(即第一組USB3.1訊號)與Tx2、Rx2(即第二組USB3.1訊號))。The USB Type-C connector 11 can also transmit two sets of high-speed transmission positive signals (SSTx+), high-speed transmission negative signals (SSTx-), and high-speed receiving positive signals corresponding to the USB 3.1 interface through the plurality of data terminals and the chip group 2. Signal (SSRx+) and high speed receiving negative signal (SSRx-). It is to be noted that the chip set 2 in this embodiment is exemplified by a chip set capable of directly supporting at least 6 sets of USB 3.1 signals, so that no chip for signal switching needs to be additionally disposed on the main board (generally For the PCI-E signal to a single USB3.1 signal conversion chip), two sets of USB3.1 interface signals can be directly provided to the USB Type-C connector module 1 to support the USB Type-C connection at the same time. Two sets of USB3.1 signals required by the upper and lower layers of the device 11 (such as Tx1, Rx1 (ie, the first set of USB3.1 signals) and Tx2, Rx2 (the second set of USB3.1 signals) shown in FIG. 3) .

另外,該USB Type-C連接器11還可通過該複數資料端子與該晶片組2傳輸對應至顯示埠(DisplayPort)介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX)。如此一來,該USB Type-C連接器11可對該晶片組2提供的USB2.0訊號、USB3.1訊號以及DisplayPort訊號進行整合以構成USB Type-C的訊號,進而該USB Type-C連接器模組1可通過USB Type-C介面來與外部進行資料傳輸。In addition, the USB Type-C connector 11 can also transmit a differential signal (Lane0) corresponding to the channel 0 of the display port (DisplayPort) interface, a differential signal of the channel 1 (Lane1), and the chip group 2 through the plurality of data terminals. Channel 2's differential signal (Lane2), channel 3's differential signal (Lane3), and the auxiliary channel's differential signal (AUX). In this way, the USB Type-C connector 11 can integrate the USB2.0 signal, the USB 3.1 signal and the DisplayPort signal provided by the chipset 2 to form a USB Type-C signal, and then the USB Type-C connection. The module 1 can transmit data to and from the outside through the USB Type-C interface.

本實施例主要是將該USB Type-C連接器11與該配置通道晶片12共同設置於該USB Type-C連接器模組1中,藉此節省該主板上寶貴的配置空間,並且令該主板的線路配置可大幅簡化,進而大幅降低製造成本。In this embodiment, the USB Type-C connector 11 and the configuration channel chip 12 are commonly disposed in the USB Type-C connector module 1 to save valuable configuration space on the motherboard, and the motherboard is The line configuration can be greatly simplified, which in turn significantly reduces manufacturing costs.

續請參閱圖4,為本創作的第二具體實施例的連接器模組立體組合圖。本創作的第二具體實施例揭露了另一USB Type-C連接器模組3,包括一電路板30、一USB Type-C連接器31、一第一晶片32、一第二晶片33、複數導接端子34及一外殼體35。Please refer to FIG. 4 , which is a perspective assembled view of the connector module of the second embodiment of the present invention. The second embodiment of the present invention discloses another USB Type-C connector module 3, including a circuit board 30, a USB Type-C connector 31, a first chip 32, a second chip 33, and a plurality of The terminal 34 is connected to the outer casing 35.

本實施例的該電路板30、該USB Type-C連接器31、該第一晶片32、該複數導接端子34及該外殼體35係與第一具體實施例中的該電路板10、該USB Type-C連接器11、該配置通道晶片12、該複數導接端子13及該外殼體14相同,於此不再贅述。The circuit board 30, the USB Type-C connector 31, the first chip 32, the plurality of conductive terminals 34, and the outer casing 35 of the embodiment are the same as the circuit board 10 in the first embodiment. The USB Type-C connector 11, the configuration channel wafer 12, the plurality of conductive terminals 13 and the outer casing 14 are the same and will not be described again.

本實施例的該USB Type-C連接器模組3與前述的該USB Type-C連接器模組1的差別在於,更包括電性連接於該電路板30上的該第二晶片33。該第二晶片33通過該電路板30電性連接該USB Type-C連接器31,並且該複數導接端子34係通過該電路板30同時電性連接該USB Type-C連接器31、該第一晶片32及該第二晶片33。The USB Type-C connector module 3 of the present embodiment differs from the USB Type-C connector module 1 described above in that it further includes the second wafer 33 electrically connected to the circuit board 30. The second chip 33 is electrically connected to the USB Type-C connector 31 through the circuit board 30, and the plurality of conductive terminals 34 are electrically connected to the USB Type-C connector 31 through the circuit board 30. A wafer 32 and the second wafer 33.

參閱圖5,為本創作的第二具體實施例的連接電路圖。本實施例中,該第一晶片32係為一配置通道晶片321, 並且與該USB Type-C連接器31的二配置通道端子(CC1、CC2)電性連接。本實施例中,該配置通道晶片321、該USB Type-C連接器31的二配置通道端子及複數電源端子的配置與第一具體實施例中所述者相同,於此不再贅述。Referring to FIG. 5, a connection circuit diagram of a second embodiment of the present invention is shown. In this embodiment, the first wafer 32 is a configuration channel wafer 321 . And electrically connected to the two configuration channel terminals (CC1, CC2) of the USB Type-C connector 31. In this embodiment, the configuration of the configuration channel chip 321 and the two configuration channel terminals and the plurality of power terminals of the USB Type-C connector 31 are the same as those described in the first embodiment, and details are not described herein.

本實施例中,該USB Type-C連接器31中的該複數資料端子包括複數第一資料端子,該複數第一資料端子通過該電路板30電性連接該第二晶片33,並且第二晶片33通過該複數導接端子34連接外部電子裝置的該主板上的該晶片組2。其中,該複數第一資料端子包含複數上層端子與複數下層端子,因此如圖5所示,該USB Type-C連接器31中的該複數第一資料端子主要是通過兩條資料傳輸路徑分別連接該第二晶片33,以分別接收該晶片組2輸出的上層USB Type-C訊號與下層的USB Type-C訊號。In this embodiment, the plurality of data terminals in the USB Type-C connector 31 includes a plurality of first data terminals, and the plurality of first data terminals are electrically connected to the second wafer 33 through the circuit board 30, and the second chip 33 is connected to the chip set 2 on the main board of the external electronic device through the plurality of lead terminals 34. The plurality of first data terminals include a plurality of upper layer terminals and a plurality of lower layer terminals. Therefore, as shown in FIG. 5, the plurality of first data terminals in the USB Type-C connector 31 are mainly connected through two data transmission paths. The second chip 33 receives the upper USB Type-C signal output from the chip set 2 and the lower USB Type-C signal.

另外,該USB Type-C連接器31的該複數資料端子還包括複數第二資料端子。該複數第二資料端子通過該電路板30電性連接該複數導接端子34,並通過該複數導接端子34直接連接該晶片組2,藉此與該晶片組2傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。In addition, the plurality of data terminals of the USB Type-C connector 31 further includes a plurality of second data terminals. The plurality of second data terminals are electrically connected to the plurality of lead terminals 34 through the circuit board 30, and are directly connected to the chip group 2 through the plurality of lead terminals 34, thereby transmitting corresponding to the USB2.0 interface with the chip group 2 Positive data signal (D+) and negative data signal (D-).

具體而言,本實施例中該第二晶片33為一訊號調節晶片331。該USB Type-C連接器31的該複數第一資料端子分別通過該兩條資料傳輸路徑電性連接該訊號調節晶片331,並且該訊號調節晶片331通過該複數導接端子34電性 連接該晶片組2,並與該晶片組2傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-),以及對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX)。Specifically, in the embodiment, the second wafer 33 is a signal conditioning wafer 331. The plurality of first data terminals of the USB Type-C connector 31 are electrically connected to the signal conditioning chip 331 through the two data transmission paths, and the signal conditioning chip 331 is electrically connected through the plurality of conductive terminals 34. Connecting the chip set 2, and transmitting two sets of high-speed transmission positive signals (SSTx+), high-speed transmission negative signals (SSTx-), high-speed receiving positive signals (SSRx+), and high-speed receiving negatives corresponding to the USB 3.1 interface with the chip set 2 Signal (SSRx-), and the differential signal (Lane0) of channel 0 corresponding to the DisplayPort interface, the differential signal of lane 1 (Lane1), the differential signal of channel 2 (Lane2), the differential signal of channel 3 (Lane3), and the auxiliary channel Differential signal (AUX).

承上所述,藉此,該USB Type-C連接器模組3可通過該訊號調節晶片331對該晶片組2輸出的DisplayPort訊號與USB3.1訊號進行放大,以解決因距離太遠而導致訊號衰減的問題。同樣地,該USB Type-C連接器模組3可將所接收的訊號經由該訊號調節晶片331進行放大後,再輸出至該晶片組2。本實施例中,由於該晶片組2輸出的USB2.0訊號較無訊號衰減的問題,因此不需經由該訊號調節晶片331來進行處理。According to the above, the USB Type-C connector module 3 can amplify the DisplayPort signal and the USB 3.1 signal outputted by the signal conditioning chip 331 to the chip group 2 to solve the problem that the distance is too long. Signal attenuation problem. Similarly, the USB Type-C connector module 3 can amplify the received signal via the signal conditioning chip 331 and output it to the chip set 2. In this embodiment, since the USB 2.0 signal outputted by the chip set 2 has no problem of signal attenuation, the signal conditioning chip 331 is not required to be processed.

值得一提的是,該訊號調節晶片331還通過該電路板30電性連接該配置通道晶片321。藉此,接受該配置通道晶片321的控制(該配置通道晶片321則受該晶片組2的控制),並於需要時,由該配置通道晶片321控制該訊號調節晶片331的運作,以對該晶片組2/該USB Type-C連接器31輸出的訊號進行放大。It should be noted that the signal conditioning chip 331 is also electrically connected to the configuration channel wafer 321 through the circuit board 30. Thereby, the control of the arrangement channel wafer 321 is accepted (the arrangement channel wafer 321 is controlled by the wafer group 2), and when necessary, the operation of the signal adjustment wafer 331 is controlled by the arrangement channel wafer 321 to The signal output from the chip set 2/the USB Type-C connector 31 is amplified.

本實施例主要是將該USB Type-C連接器31、該配置通道晶片321及該訊號調節晶片331共同設置於該USB Type-C連接器模組3中,藉此節省該主板上寶貴的配置空間,並且令該主板的線路配置可大幅簡化。In this embodiment, the USB Type-C connector 31, the configuration channel chip 321 and the signal conditioning chip 331 are collectively disposed on the USB. In the Type-C connector module 3, the valuable configuration space on the motherboard is saved, and the circuit configuration of the motherboard can be greatly simplified.

參閱圖6,為本創作的第三具體實施例的連接電路圖。本創作的第三具體實施例揭露了又一USB Type-C連接器模組3’,具有與第二具體實施例的該USB Type-C連接器模組3相同的該電路板30、該USB Type-C連接器31、該第一晶片32、該第二晶片33、該複數導接端子34及該外殼體35,於此不再贅述。該USB Type-C連接器模組3’與圖5揭露的該USB Type-C連接器模組3的主要差異在於,該USB Type-C連接器模組3’中的該第二晶片33為一訊號切換晶片332。Referring to Figure 6, a connection circuit diagram of a third embodiment of the present invention is shown. A third embodiment of the present invention discloses a USB Type-C connector module 3' having the same circuit board 30 as the USB Type-C connector module 3 of the second embodiment, and the USB The Type-C connector 31, the first wafer 32, the second wafer 33, the plurality of conductive terminals 34, and the outer casing 35 are not described herein. The main difference between the USB Type-C connector module 3' and the USB Type-C connector module 3 disclosed in FIG. 5 is that the second chip 33 in the USB Type-C connector module 3' is A signal switches wafer 332.

更具體而言,該USB Type-C連接器模組3’主要用以連接另一電子裝置的主板(圖未標示),並與該主板上的一晶片組2’、該電力控制晶片22、該系統電源23及一USB控制晶片24電性連接。本實施例中,該晶片組2’僅能通過PCI-E介面支援單一組的USB3.1訊號埠,因此需配合該USB控制晶片24將單埠的PCI-E訊號轉換並模擬為多埠的USB3.1訊號,並且再通過該訊號切換晶片332進行切換,以支援該USB Type-C連接器31上、下層所需的兩組USB3.1訊號。More specifically, the USB Type-C connector module 3' is mainly used to connect a motherboard (not shown) of another electronic device, and a chip set 2' on the motherboard, the power control chip 22, The system power supply 23 and a USB control chip 24 are electrically connected. In this embodiment, the chipset 2' can only support a single set of USB 3.1 signals through the PCI-E interface, so the USB control chip 24 needs to be converted and simulated as a multi-turn. The USB 3.1 signal is further switched by the signal switching chip 332 to support the two sets of USB 3.1 signals required by the upper and lower layers of the USB Type-C connector 31.

如圖6所示,本實施例中,該USB Type-C連接器31的該複數第二資料端子係與圖5所示的實施例相同,通 過該電路板30電性連接該複數導接端子34,並通過該複數導接端子34直接連接該晶片組2’,藉此與該晶片組2’傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。As shown in FIG. 6, in the embodiment, the plurality of second data terminals of the USB Type-C connector 31 are the same as the embodiment shown in FIG. The circuit board 30 is electrically connected to the plurality of lead terminals 34, and is directly connected to the chip group 2' through the plurality of lead terminals 34, thereby transmitting a positive data signal corresponding to the USB2.0 interface with the chip group 2'. (D+) and negative data signal (D-).

該USB Type-C連接器31的該複數第一資料端子則分別通過上述該兩條資料傳輸路徑電性連接該訊號切換晶片332,並且該訊號切換晶片332的部分腳位通過該複數導接端子34電性連接該主板上的該USB控制晶片24,藉此,通過該訊號切換晶片332及該USB控制晶片24來與該晶片組2’傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-),即,圖6所示的Tx1、Rx1(第一組USB3.1訊號)與Tx2、Rx2(第二組USB3.1訊號)。The plurality of first data terminals of the USB Type-C connector 31 are electrically connected to the signal switching chip 332 through the two data transmission paths, respectively, and a part of the signal of the signal switching chip 332 passes through the plurality of guiding terminals. 34 electrically connecting the USB control chip 24 on the main board, thereby transmitting two sets of high-speed transmission positive signals corresponding to the USB 3.1 interface with the chip set 2' through the signal switching chip 332 and the USB control chip 24. (SSTx+), high-speed transmission negative signal (SSTx-), high-speed reception positive signal (SSRx+) and high-speed reception negative signal (SSRx-), that is, Tx1, Rx1 (the first group of USB3.1 signals) shown in Figure 6 and Tx2, Rx2 (second group USB3.1 signal).

另外,該訊號切換晶片332的其他腳位通過該複數導接端子34直接電性連接該晶片組2’,並與該晶片組2’傳輸對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX)。In addition, the other pins of the signal switching chip 332 are directly electrically connected to the chip group 2 ′ through the plurality of guiding terminals 34 , and the differential signal (Lane 0 ) corresponding to the channel 0 of the DisplayPort interface is transmitted with the chip group 2 ′, Channel 1 differential signal (Lane1), channel 2 differential signal (Lane2), channel 3 differential signal (Lane3) and auxiliary channel differential signal (AUX).

值得一提的是,該訊號切換晶片332的其中一腳位還通過該電路板30電性連接該配置通道晶片321。藉此,接受該配置通道晶片321的控制(該配置通道晶片321則受 該晶片組2’的控制),並於需要時,由該配置通道晶片321控制該訊號切換晶片332的運作,以對該USB控制晶片24輸出的第一組USB3.1訊號(Tx1、Rx1)以及第二組USB3.1訊號(Tx2、Rx2)進行切換(分別對應至該USB Type-C連接器31的上層訊號與下層訊號)。It is worth mentioning that one of the pins of the signal switching chip 332 is also electrically connected to the configuration channel wafer 321 through the circuit board 30. Thereby, the control of the configuration channel wafer 321 is accepted (the configuration channel wafer 321 is subject to The control of the chip set 2', and if necessary, the operation of the signal switching chip 332 by the configuration channel wafer 321 to output the first set of USB 3.1 signals (Tx1, Rx1) to the USB control chip 24. And the second group of USB3.1 signals (Tx2, Rx2) are switched (corresponding to the upper layer signal and the lower layer signal of the USB Type-C connector 31 respectively).

更具體地,該晶片組2’由該配置通道晶片321接收該二配置通道端子(CC1、CC2)的回饋訊號,並藉此判斷該USB Type-C連接器31被觸發的是上層的十二根端子還是下層的十二根端子。並且,該晶片組2’依據判斷結果發出一控制訊號至該配置通道晶片321以控制該訊號切換晶片332的運作,令該訊號切換晶片332切換該二組USB3.1訊號的其中之一(經由該兩條資料傳輸路徑的其中之一)並輸出至該USB Type-C連接器31。More specifically, the chip set 2' receives the feedback signals of the two configuration channel terminals (CC1, CC2) from the configuration channel wafer 321, and thereby determines that the USB Type-C connector 31 is triggered by the upper layer twelve. The root terminal is also the twelve terminals of the lower layer. And the chip set 2 ′ sends a control signal to the configuration channel wafer 321 to control the operation of the signal switching chip 332 according to the determination result, so that the signal switching chip 332 switches one of the two sets of USB 3.1 signals (via One of the two data transmission paths is output to the USB Type-C connector 31.

本實施例主要是將該USB Type-C連接器31、該配置通道晶片321及該訊號切換晶片332共同設置於該USB Type-C連接器模組3’中,藉此節省該主板上寶貴的配置空間,並且令該主板的線路配置可大幅簡化。In this embodiment, the USB Type-C connector 31, the configuration channel chip 321 and the signal switching chip 332 are collectively disposed in the USB Type-C connector module 3', thereby saving valuable on the motherboard. The configuration space and the circuit configuration of the motherboard can be greatly simplified.

續請參閱圖7,為本創作的第四具體實施例的連接電路圖。圖7揭露了再一USB Type-C連接器模組3”,與前述的該USB Type-C連接器模組3及3’的差別在於,該USB Type-C連接器模組3”中的該第二晶片33為同時具備訊號調節功能以及訊號切換功能的一訊號調節/切換晶片 333。Continuing to refer to FIG. 7, a connection circuit diagram of a fourth embodiment of the present invention is shown. FIG. 7 discloses another USB Type-C connector module 3", which differs from the USB Type-C connector module 3 and 3' described above in the USB Type-C connector module 3" The second chip 33 is a signal adjustment/switching chip having a signal adjustment function and a signal switching function. 333.

本實施例中,該USB Type-C連接器31的該複數第二資料端子係與圖5、圖6所示的實施例相同,通過該電路板30電性連接該複數導接端子34,並通過該複數導接端子34直接連接該晶片組2’,藉此與該晶片組2’傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。In this embodiment, the plurality of second data terminals of the USB Type-C connector 31 are the same as the embodiment shown in FIG. 5 and FIG. 6, and the plurality of conductive terminals 34 are electrically connected through the circuit board 30, and The chip group 2' is directly connected through the plurality of lead terminals 34, thereby transmitting a positive data signal (D+) and a negative data signal (D-) corresponding to the USB2.0 interface with the chip group 2'.

該USB Type-C連接器31的該複數第一資料端子則分別通過該電路板30電性連接該訊號調節/切換晶片333。更具體而言,該複數第一資料端子包括複數上層端子與複數下層端子,並且分別通過上述該兩條資料傳輸路徑連接該訊號調節/切換晶片333。The plurality of first data terminals of the USB Type-C connector 31 are electrically connected to the signal conditioning/switching chip 333 through the circuit board 30, respectively. More specifically, the plurality of first data terminals includes a plurality of upper layer terminals and a plurality of lower layer terminals, and the signal conditioning/switching wafer 333 is connected through the two data transmission paths respectively.

該訊號調節/切換晶片333的部分腳位通過該複數導接端子34直接連接該主板上的該晶片組2’,並與該晶片組2’傳輸對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX)。A portion of the signal of the signal conditioning/switching chip 333 is directly connected to the chip group 2' on the main board through the plurality of guiding terminals 34, and transmits a differential signal corresponding to the channel 0 of the DisplayPort interface with the chip group 2' (Lane0) ), channel 1 differential signal (Lane1), channel 2 differential signal (Lane2), channel 3 differential signal (Lane3) and auxiliary channel differential signal (AUX).

另外,該訊號調節/切換晶片333的其他腳位還通過該複數導接端子34連接該主板上的該USB控制晶片24,藉此,通過該訊號調節/切換晶片333及該USB控制晶片24來與該晶片組2’傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號 (SSRx+)及高速接收負訊號(SSRx-),即,圖7中所示的Tx1、Rx1(第一組USB3.1訊號)與Tx2、Rx2(第二組USB3.1訊號)。In addition, the other pins of the signal conditioning/switching chip 333 are also connected to the USB control chip 24 on the main board through the plurality of guiding terminals 34, thereby adjusting/switching the chip 333 and the USB control chip 24 through the signal. And the chipset 2' transmits two sets of high-speed transmission positive signals (SSTx+), high-speed transmission negative signals (SSTx-), high-speed receiving positive signals corresponding to the USB 3.1 interface. (SSRx+) and high-speed reception negative signal (SSRx-), that is, Tx1, Rx1 (first group USB 3.1 signal) and Tx2, Rx2 (second group USB 3.1 signal) shown in FIG.

值得一提的是,該訊號調節/切換晶片333的其中一腳位還通過該電路板30電性連接該配置通道晶片321。藉此,接受該配置通道晶片321的控制(該配置通道晶片321則受該晶片組2’的控制),並於需要時,由該配置通道晶片321控制該訊號調節/切換晶片333的運作,以對該USB控制晶片24輸出的第一組USB3.1訊號(Tx1、Rx1)以及第二組USB3.1訊號(Tx2、Rx2)進行切換,以及對該晶片組2’/該USB Type-C連接器31輸出的訊號進行放大。換句話說,本實施例中的該訊號調節/切換晶片333為前述實施例中的該訊號調節晶片331與該訊號切換晶片332的整合,並且運用於僅能通過PCI-E介面支援單一組的USB3.1訊號埠的該晶片組2’。It is worth mentioning that one of the pins of the signal conditioning/switching chip 333 is also electrically connected to the configuration channel wafer 321 through the circuit board 30. Thereby, the control of the arrangement channel wafer 321 is accepted (the configuration channel wafer 321 is controlled by the wafer group 2'), and the signal adjustment/switching wafer 333 is controlled by the configuration channel wafer 321 when needed. Switching between the first set of USB 3.1 signals (Tx1, Rx1) outputted by the USB control chip 24 and the second set of USB 3.1 signals (Tx2, Rx2), and the chipset 2'/the USB Type-C The signal output from the connector 31 is amplified. In other words, the signal conditioning/switching chip 333 in this embodiment is integrated with the signal conditioning chip 331 and the signal switching chip 332 in the foregoing embodiment, and is used to support a single group only through the PCI-E interface. The chipset 2' of the USB 3.1 signal.

本實施例主要是將該USB Type-C連接器31、該配置通道晶片321以及同時具備訊號調節功能和訊號切換功能的該訊號調節/切換晶片333共同設置於該USB Type-C連接器模組3”中,藉此節省該主板上寶貴的配置空間,並且令該主板的線路配置可大幅簡化。In this embodiment, the USB Type-C connector 31, the configuration channel chip 321 and the signal conditioning/switching chip 333 having the signal adjustment function and the signal switching function are collectively disposed on the USB Type-C connector module. In the 3", the valuable configuration space on the motherboard is saved, and the circuit configuration of the motherboard can be greatly simplified.

以上所述者,僅為本創作之一較佳實施例之具體說明,非用以侷限本創作之專利範圍,其他任何等效變換均應俱屬後述之申請專利範圍內。The above is only a specific description of a preferred embodiment of the present invention, and is not intended to limit the scope of the patents of the present invention, and any other equivalent transformations are within the scope of the patent application described below.

1‧‧‧USB Type-C連接器模組1‧‧‧USB Type-C Connector Module

10‧‧‧電路板10‧‧‧ boards

11‧‧‧USB Type-C連接器11‧‧‧USB Type-C connector

12‧‧‧配置通道晶片12‧‧‧Configure channel chip

13‧‧‧導接端子13‧‧‧Connecting terminal

14‧‧‧外殼體14‧‧‧Outer casing

Claims (11)

【第1項】[Item 1] 一種USB Type-C連接器模組,設置於一外部主板,包括:
一電路板;
一USB Type-C連接器,電性連接於該電路板的一側,並且至少具有二配置通道端子、複數電源端子及複數資料端子;
一配置通道晶片,電性連接於該電路板;及
複數導接端子,電性連接於該電路板上遠離該USB Type-C連接器的另一側,並且通過該電路板電性連接該USB Type-C連接器及該配置通道晶片;
其中,該USB Type-C連接器的該二配置通道端子通過該電路板電性連接該配置通道晶片,該複數電源端子通過該複數導接端子電性連接該外部主板的一電力控制晶片,該複數資料端子分別通過該複數導接端子電性連接該外部主板的一晶片組,該配置通道晶片通過該複數導接端子電性連接該晶片組,並傳輸該二配置通道端子的回饋訊號至該晶片組以進行USB Type-C介面的判斷。
A USB Type-C connector module is disposed on an external motherboard, including:
a circuit board;
a USB Type-C connector electrically connected to one side of the circuit board and having at least two configuration channel terminals, a plurality of power supply terminals, and a plurality of data terminals;
a channel chip is electrically connected to the circuit board; and a plurality of conductive terminals are electrically connected to the other side of the circuit board away from the USB Type-C connector, and the USB is electrically connected through the circuit board a Type-C connector and the configuration channel wafer;
The two configuration channel terminals of the USB Type-C connector are electrically connected to the configuration channel chip through the circuit board, and the plurality of power terminals are electrically connected to a power control chip of the external motherboard through the plurality of connection terminals. The plurality of data terminals are electrically connected to a chip set of the external main board through the plurality of lead terminals, and the configuration channel chip is electrically connected to the chip set through the plurality of lead terminals, and the feedback signals of the two configuration channel terminals are transmitted to the The chipset is used to make a judgment on the USB Type-C interface.
【第2項】[Item 2] 如請求項1所述的USB Type-C連接器模組,其中該配置通道晶片還通過該複數導接端子連接該電力控制晶片,由該電力控制晶片接收一連接電壓(Vconn)並輸出至該二配置通道端子的其中之一。The USB Type-C connector module of claim 1, wherein the configuration channel chip is further connected to the power control chip through the plurality of conductive terminals, and the power control chip receives a connection voltage (Vconn) and outputs the same Two of the configuration channel terminals. 【第3項】[Item 3] 如請求項2所述的USB Type-C連接器模組,其中該USB Type-C連接器通過該複數資料端子與該晶片組傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。The USB Type-C connector module according to claim 2, wherein the USB Type-C connector transmits the positive data signal (D+) and the negative data corresponding to the USB2.0 interface through the plurality of data terminals and the chipset. Signal (D-). 【第4項】[Item 4] 如請求項3所述的USB Type-C連接器模組,其中該USB Type-C連接器通過該複數資料端子與該晶片組傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-)。The USB Type-C connector module of claim 3, wherein the USB Type-C connector transmits two sets of high-speed transmission positive signals (SSTx+) corresponding to the USB 3.1 interface through the plurality of data terminals and the chipset. High-speed transmission of negative signals (SSTx-), high-speed reception of positive signals (SSRx+) and high-speed reception of negative signals (SSRx-). 【第5項】[Item 5] 如請求項4所述的USB Type-C連接器模組,其中該USB Type-C連接器通過該複數資料端子與該晶片組傳輸對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX)。The USB Type-C connector module according to claim 4, wherein the USB Type-C connector transmits a differential signal (Lane0) corresponding to the channel 0 of the DisplayPort interface and the channel 1 through the plurality of data terminals and the chipset. Differential signal (Lane1), channel 2 differential signal (Lane2), channel 3 differential signal (Lane3) and auxiliary channel differential signal (AUX). 【第6項】[Item 6] 一種USB Type-C連接器模組,設置於一外部主板,包括:
一電路板;
一USB Type-C連接器,電性連接於該電路板的一側,並且至少具有二配置通道端子、複數電源端子、複數第一資料端子與複數第二資料端子;
一第一晶片,電性連接於該電路板,並通過該電路板電性連接該USB Type-C連接器,其中該第一晶片為一配置通道晶片;
一第二晶片,電性連接於該電路板,並通過該電路板電性連接該USB Type-C連接器;及
複數導接端子,電性連接於該電路板上遠離該USB Type-C連接器的另一側,並且通過該電路板電性連接該USB Type-C連接器、該第一晶片及該第二晶片;
其中,該USB Type-C連接器的該二配置通道端子電性連接該第一晶片,該複數電源端子通過該複數導接端子電性連接該外部主板的一電力控制晶片,該複數第一資料端子分別通過兩條資料傳輸路徑電性連接該第二晶片,該複數第二資料端子分別通過該複數導接端子電性連接該外部主板的一晶片組,並且該第二晶片通過該複數導接端子電性連接該晶片組;
其中,該第一晶片通過該複數導接端子電性連接該晶片組,並傳輸該二配置通道端子的回饋訊號至該晶片組以進行USB Type-C介面的判斷。
A USB Type-C connector module is disposed on an external motherboard, including:
a circuit board;
a USB Type-C connector electrically connected to one side of the circuit board and having at least two configuration channel terminals, a plurality of power supply terminals, a plurality of first data terminals, and a plurality of second data terminals;
a first chip electrically connected to the circuit board, and electrically connected to the USB Type-C connector through the circuit board, wherein the first chip is a configuration channel wafer;
a second chip electrically connected to the circuit board and electrically connected to the USB Type-C connector through the circuit board; and a plurality of conductive terminals electrically connected to the circuit board away from the USB Type-C connection The other side of the device, and electrically connecting the USB Type-C connector, the first wafer and the second wafer through the circuit board;
The two configuration channel terminals of the USB Type-C connector are electrically connected to the first chip, and the plurality of power terminals are electrically connected to a power control chip of the external motherboard through the plurality of connection terminals, the plurality of first data The terminals are electrically connected to the second chip through two data transmission paths, and the plurality of second data terminals are electrically connected to a chip set of the external main board through the plurality of reference terminals, and the second wafer passes the plurality of leads The terminal is electrically connected to the chip set;
The first chip is electrically connected to the chip set through the plurality of conductive terminals, and the feedback signals of the two configuration channel terminals are transmitted to the chip set for determining the USB Type-C interface.
【第7項】[Item 7] 如請求項6所述的USB Type-C連接器模組,其中該第一晶片還通過該複數導接端子連接該電力控制晶片,由該電力控制晶片接收一連接電壓(Vconn)並輸出至該二配置通道端子的其中之一。The USB Type-C connector module of claim 6, wherein the first chip is further connected to the power control chip through the plurality of conductive terminals, and the power control chip receives a connection voltage (Vconn) and outputs the same Two of the configuration channel terminals. 【第8項】[Item 8] 如請求項7所述的USB Type-C連接器模組,其中該第一晶片通過該電路板電性連接該第二晶片,以依據該晶片組的判斷控制該第二晶片運作。The USB Type-C connector module of claim 7, wherein the first chip is electrically connected to the second chip through the circuit board to control the operation of the second chip according to the judgment of the chip group. 【第9項】[Item 9] 如請求項8所述的USB Type-C連接器模組,其中該第二晶片為通過該複數導接端子連接該晶片組的一訊號調節晶片,該複數第一資料端子通過該訊號調節晶片與該晶片組傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-),以及對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX),該複數第二資料端子通過該複數導接端子與該晶片組直接傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。The USB Type-C connector module of claim 8, wherein the second chip is a signal conditioning chip connected to the chip set through the plurality of conductive terminals, and the plurality of first data terminals adjust the wafer by the signal The chipset transmits two sets of high-speed transmission positive signals (SSTx+), high-speed transmission negative signals (SSTx-), high-speed reception positive signals (SSRx+), and high-speed reception negative signals (SSRx-) corresponding to the USB 3.1 interface, and corresponding to The channel 0 differential signal (Lane0) of the DisplayPort interface, the channel 1 differential signal (Lane1), the channel 2 differential signal (Lane2), the channel 3 differential signal (Lane3), and the auxiliary channel differential signal (AUX), the complex number The second data terminal directly transmits the positive data signal (D+) and the negative data signal (D-) corresponding to the USB2.0 interface through the plurality of conductive terminals and the chip set. 【第10項】[Item 10] 如請求項8所述的USB Type-C連接器模組,其中該第二晶片為部分腳位通過該複數導接端子連接該主板的一USB控制晶片的一訊號切換晶片,其中該複數第一資料端子通過該訊號切換晶片及該USB控制晶片,與該晶片組傳輸兩組對應至USB3.1介面的高速傳輸正訊號(SSTx+)、高速傳輸負訊號(SSTx-)、高速接收正訊號(SSRx+)及高速接收負訊號(SSRx-),並且該第二晶片的其他腳位通過該複數導接端子連接該晶片組,並與該晶片組直接傳輸對應至DisplayPort介面的通道0的差分訊號(Lane0)、通道1的差分訊號(Lane1)、通道2的差分訊號(Lane2)、通道3的差分訊號(Lane3)及附屬通道的差分訊號(AUX) ,該複數第二資料端子通過該複數導接端子與該晶片組直接傳輸對應至USB2.0介面的正資料訊號(D+)及負資料訊號(D-)。The USB Type-C connector module of claim 8, wherein the second chip is a signal switching chip of a USB control chip connected to the motherboard through a plurality of guiding terminals, wherein the plurality of first chips The data terminal switches the chip and the USB control chip through the signal, and transmits two sets of high-speed transmission positive signals (SSTx+), high-speed transmission negative signals (SSTx-), and high-speed reception positive signals (SSRx+) corresponding to the USB 3.1 interface. And receiving a negative signal (SSRx-) at a high speed, and the other pins of the second chip are connected to the chip set through the plurality of lead terminals, and directly transmitting a differential signal corresponding to the channel 0 of the DisplayPort interface with the chip set (Lane0) ), channel 1 differential signal (Lane1), channel 2 differential signal (Lane2), channel 3 differential signal (Lane3) and auxiliary channel differential signal (AUX), the plurality of second data terminals pass through the plurality of reference terminals A positive data signal (D+) and a negative data signal (D-) corresponding to the USB 2.0 interface are directly transmitted with the chipset. 【第11項】[Item 11] 如請求項10所述的USB Type-C連接器模組,其中該第二晶片為同時具備訊號調節能力以及訊號切換能力的一訊號調節/切換晶片。The USB Type-C connector module of claim 10, wherein the second chip is a signal conditioning/switching chip having both signal conditioning capability and signal switching capability.
TW104207316U 2015-05-13 2015-05-13 USB Type-C connector module TWM509448U (en)

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