TWM494309U - Conversion card for probe test card - Google Patents
Conversion card for probe test card Download PDFInfo
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- TWM494309U TWM494309U TW103208117U TW103208117U TWM494309U TW M494309 U TWM494309 U TW M494309U TW 103208117 U TW103208117 U TW 103208117U TW 103208117 U TW103208117 U TW 103208117U TW M494309 U TWM494309 U TW M494309U
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Description
本新型係有關於一種轉換卡,特別是指其為一種用於測試探針卡之轉換卡。The present invention relates to a conversion card, and more particularly to a conversion card for testing a probe card.
長久以來,半導體業界在晶圓可靠度測試(wafer acceptance test)時,都會先驗證直流探針卡(Probe Card)是否可用,因直流探針卡擔負著最後段測試時,IC在被切割前(WS:Wafer Sort),功能測試是否正常的重要角色,當IC測試能正常工作後,IC即會被切割包裝(FT:Final Test;IC has been packaged)並再作後續之分類(BIN)測試,由此可知,當直流探針卡的錯誤率高時,會直接影響後面出貨的速度與品質,但直流探針卡隨著IC功能越來越強,腳數越來越多,甚至高達幾萬根的腳數,其價格動輒千萬,若直流探針卡被判為錯誤率高,則須再作清針,甚至換卡的動作,這些動作非常耗費成本及時間,晶圓廠及測試廠時常為了趕貨給客戶,經常以直接換卡的方式測到正確為止,而這些換下來的直流探針卡的費用則是由晶圓廠及測試廠直接吸收掉,因此直流探針卡的庫存率,常會達到台幣幾千萬至數億的等級,造成成本大幅提高。For a long time, in the wafer industry's wafer acceptance test, it is first verified whether the probe card is available. Because the DC probe card is responsible for the last test, the IC is before being cut ( WS: Wafer Sort), the important role of the functional test is normal, when the IC test can work normally, the IC will be packaged (FT: Final Test; IC has been packaged) and then the subsequent classification (BIN) test, It can be seen that when the error rate of the DC probe card is high, it will directly affect the speed and quality of the subsequent shipment, but the DC probe card becomes more and more powerful with the IC function, and the number of pins is more and more, even up to several. The number of feet of Wangen is tens of millions. If the DC probe card is judged to have a high error rate, it must be cleaned or even changed. These actions are very costly and time-consuming, fab and testing. In order to catch up with the goods, the factory often checks the correct way by directly changing the card. The cost of these replaced DC probe cards is directly absorbed by the fab and the test factory. Therefore, the DC probe card is used. Inventory rate, often reached Tens of millions to hundreds of millions of currency rating, resulting in a substantial increase in costs.
由於半導體業界長期藉由此直流測試方式來測試直流探針卡,其改善方式已達瓶頸,爰是,本創作人今基於產品不斷改良創新之理 念,乃本著多年從事半導體及與電子相關之測試產業產品設計開發的實務經驗,以及積極潛心研發思考,而「利用交流方式對直流電探針卡的錯誤分析及改善」,經由無數次之實際測試、實驗,致有本新型之產生。Since the semiconductor industry has long used this DC test method to test the DC probe card, the improvement method has reached the bottleneck. Therefore, the creator is constantly improving and innovating based on the product. Nian is based on years of experience in the design and development of semiconductor and electronic related test industry products, as well as actively researching and developing, and "using the communication method to analyze and improve the error of the DC probe card", through countless times of actual Tests, experiments, and the emergence of this new type.
本新型之目的,係在提供一種藉第一傳輸單元傳輸交流信號,並將交流信號經由直流/交流轉換電路、第二傳輸單元接至直流探針卡,運用交流電路及傳輸線原理,以配合交流信號儀器利用交流方式對直流電探針卡進行錯誤分析測試及改善之用於測試探針卡之轉換卡。The purpose of the present invention is to provide an AC signal transmitted by the first transmission unit, and connect the AC signal to the DC probe card through the DC/AC conversion circuit and the second transmission unit, and use the AC circuit and the transmission line principle to cooperate with the AC. The signal instrument uses the AC method to perform error analysis test on the DC probe card and improve the conversion card used to test the probe card.
為達上述之目的,本新型構造包含有一板體、至少一第一傳輸單元、至少一第二傳輸單元、一直流/交流轉換電路,其中該第一傳輸單元設於該板體,該第一傳輸單元用以電性連接於測試儀器以傳輸交流信號;該第二傳輸單元設於該板體,該第二傳輸單元用以電性連接於探針卡介面;該直流/交流轉換電路設於該板體,該直流/交流轉換電路電性連接於該第一傳輸單元、該第二傳輸單元。For the above purposes, the present invention includes a board body, at least one first transmission unit, at least one second transmission unit, and a DC/AC conversion circuit, wherein the first transmission unit is disposed on the board, the first The transmission unit is electrically connected to the test instrument to transmit an AC signal; the second transmission unit is disposed on the board body, and the second transmission unit is electrically connected to the probe card interface; the DC/AC conversion circuit is disposed on the In the board body, the DC/AC conversion circuit is electrically connected to the first transmission unit and the second transmission unit.
以藉第一傳輸單元傳輸交流信號,並將交流信號經由直流/交流轉換電路、第二傳輸單元、探針卡介面接至直流探針卡,運用交流電路及傳輸線原理,以配合邏輯分析儀、示波器、時域反射儀、頻域網路分析儀、誤碼產生器、眼圖分析儀等交流信號測試儀器,利用交流方式可對直流電探針卡進行錯誤分析測試及改善,避免誤判探針卡的錯誤率,達到降低換卡率及清針率,降低直流探針卡的庫存率。The AC signal is transmitted by the first transmission unit, and the AC signal is connected to the DC probe card through the DC/AC conversion circuit, the second transmission unit, and the probe card interface, and the AC circuit and the transmission line principle are used to cooperate with the logic analyzer. AC signal test instruments such as oscilloscope, time domain reflectometer, frequency domain network analyzer, error generator, eye diagram analyzer, etc., can use the AC method to perform error analysis test and improvement on DC probe card to avoid misjudging the probe card. The error rate is reduced to reduce the card exchange rate and the cleaning rate, and the inventory rate of the DC probe card is reduced.
以下僅藉由具體實施例,且佐以圖式作詳細之說明,俾使貴審查委員能對於本新型之各項功能、特點,有更進一步之了解與認識。The following is only a detailed description of the specific embodiments, and the detailed description of the drawings will enable the reviewing committee to have a better understanding and understanding of the functions and features of the present invention.
10‧‧‧用於測試探針卡之轉換卡10‧‧‧Transformation card for testing probe cards
11‧‧‧板體11‧‧‧ board
12‧‧‧第一傳輸單元12‧‧‧First transmission unit
121‧‧‧連接線121‧‧‧Connecting line
13‧‧‧第二傳輸單元13‧‧‧Second transmission unit
14‧‧‧直流/交流轉換電路14‧‧‧DC/AC conversion circuit
15‧‧‧穿孔15‧‧‧Perforation
20‧‧‧探針卡介面20‧‧‧ probe card interface
30‧‧‧直流探針卡30‧‧‧DC probe card
31‧‧‧測試設備31‧‧‧Test equipment
40‧‧‧邏輯分析儀40‧‧‧Logic Analyzer
41‧‧‧數位信號產生器41‧‧‧Digital signal generator
50‧‧‧示波器50‧‧‧ oscilloscope
60‧‧‧時域反射儀60‧‧‧Time Domain Reflectometer
70‧‧‧頻域網路分析儀70‧‧‧ Frequency Domain Network Analyzer
80‧‧‧誤碼產生器80‧‧‧Error Generator
90‧‧‧眼圖分析儀90‧‧‧Eye Analyzer
91‧‧‧誤碼產生器與眼圖分析儀整合機型91‧‧‧Integrated model of error generator and eye diagram analyzer
第1圖係本新型之上視圖。Figure 1 is a top view of the present invention.
第2圖係本新型之上視局部放大圖。Figure 2 is a partial enlarged view of the top view of the present invention.
第3圖係本新型測試實施例之立體分解圖。Figure 3 is a perspective exploded view of the novel test embodiment.
第4圖係本新型測試實施例之剖面圖。Figure 4 is a cross-sectional view of the novel test embodiment.
第5圖係本新型之構造方塊示意圖。Figure 5 is a schematic block diagram of the novel.
第6圖係本新型配合邏輯分析儀、數位信號產生器之測試實施例圖。Fig. 6 is a diagram showing a test embodiment of the novel logic analyzer and digital signal generator.
第7圖係第6圖之測試結果圖。Figure 7 is a test result diagram of Figure 6.
第8圖係本新型配合邏輯分析儀、示波器、數位信號產生器之測試實施例圖。Figure 8 is a diagram showing a test embodiment of the novel logic analyzer, oscilloscope, and digital signal generator.
第9圖係第8圖之測試結果圖。Figure 9 is a test result diagram of Figure 8.
第10圖係本新型配合時域反射儀之測試實施例圖。Figure 10 is a diagram showing a test embodiment of the novel time domain reflectometer.
第11圖係第10圖之測試結果圖。Figure 11 is a test result diagram of Figure 10.
第12圖係本新型配合頻域網路分析儀之測試實施例圖。Figure 12 is a diagram showing a test embodiment of the novel hybrid frequency domain network analyzer.
第13圖係第12圖之測試結果圖。Figure 13 is a test result diagram of Figure 12.
第14圖係本新型配合眼圖分析儀、誤碼產生器之測試實施例圖。Figure 14 is a diagram showing a test embodiment of the novel eye diagram analyzer and error generator.
第15圖係第14圖之測試結果圖。Figure 15 is a test result diagram of Figure 14.
第16圖係本新型配合眼圖分析儀與誤碼產生器整合機型之測試實施例圖。Fig. 16 is a diagram showing a test embodiment of the integrated model of the eye diagram analyzer and the error generator.
第17圖係本新型之測試程序流程圖。Figure 17 is a flow chart of the test procedure of the present invention.
請參閱第1圖至第16圖所示,本新型用於測試探針卡(Probe Card)之轉換卡10構造包含有一板體11、數第一傳輸單元12、數第二傳輸單 元13及一直流/交流轉換電路14,其中:Referring to FIG. 1 to FIG. 16 , the conversion card 10 structure of the present invention for testing a probe card includes a plate body 11 , a plurality of first transmission units 12 , and a second transmission list. Element 13 and a DC/AC conversion circuit 14, wherein:
該板體11於一實施例係具有一穿孔15,用以減輕重量、節省材料,進而降低製造成本。In one embodiment, the plate body 11 has a perforation 15 for reducing weight, saving material, and thereby reducing manufacturing costs.
該第一傳輸單元12設於板體11,第一傳輸單元12用以電性連接於預定之測試儀器以傳輸交流信號,於本實施例第一傳輸單元12係可與測試儀器之連接線121電性連接,而第一傳輸單元12係以八個狀平均設於板體11,使數個連接線121也可同時電性連接於數個第一傳輸單元12,據此,測試儀器能藉由一條連接線121連接於不同位置之第一傳輸單元12而分區測試直流探針卡30,或者測試儀器能藉由數條連接線121連接於不同位置之第一傳輸單元12而同時分區測試直流探針卡30。The first transmission unit 12 is disposed on the board body 11. The first transmission unit 12 is electrically connected to a predetermined test instrument to transmit an AC signal. In this embodiment, the first transmission unit 12 is connected to the test instrument 121. The first transmission unit 12 is electrically connected to the plurality of first transmission units 12 at the same time, so that the test instrument can borrow The DC probe card 30 is partitioned and tested by a connection line 121 connected to the first transmission unit 12 at different positions, or the test instrument can be connected to the first transmission unit 12 at different positions by a plurality of connection lines 121 while simultaneously testing the DC. Probe card 30.
該第一傳輸單元12於一實施例係為數個排列成一區域之電性連接孔。In one embodiment, the first transmission unit 12 is an electrical connection hole arranged in a region.
該第二傳輸單元13設於板體11,第二傳輸單元13用以電性連接於探針卡介面(POGO tower)20。The second transmission unit 13 is disposed on the board body 11 , and the second transmission unit 13 is electrically connected to the POGO tower 20 .
該第一傳輸單元12於一實施例係為電性連接孔,於本實施例探針卡介面20上側之數探針係穿設於第二傳輸單元13中。In one embodiment, the first transmission unit 12 is an electrical connection hole. The number of probes on the upper side of the probe card interface 20 of the present embodiment is passed through the second transmission unit 13.
該直流/交流轉換電路14設於板體11,直流/交流轉換電路14電性連接於該第一傳輸單元12、第二傳輸單元13。The DC/AC conversion circuit 14 is disposed on the board body 11, and the DC/AC conversion circuit 14 is electrically connected to the first transmission unit 12 and the second transmission unit 13.
於一構造實施例,該板體11、第一傳輸單元12、第二傳輸單元13及直流/交流轉換電路14係一體製成為一印刷電路板(PCB,Printed circuit board);或者是該板體11、第一傳輸單元12、第二傳輸單元13及直流/交流轉換電路14壓合成一體。In one embodiment, the board body 11, the first transmission unit 12, the second transmission unit 13, and the DC/AC conversion circuit 14 are integrally formed as a printed circuit board (PCB); or the board body 11. The first transmission unit 12, the second transmission unit 13, and the DC/AC conversion circuit 14 are integrated.
以藉第一傳輸單元12傳輸交流信號,並將交流信號經由直流/交流轉換電路14、第二傳輸單元13、探針卡介面20接至直流探針卡(Probe Card)30,運用交流電路及傳輸線原理,以配合邏輯分析儀40、示波器50、時域反射儀60、頻域網路分析儀70、誤碼產生器80、眼圖分析儀90等交流信號測試儀器,利用交流方式可對直流探針卡30進行錯誤分析測試及改善,避免誤判探針卡的錯誤率,達到降低換卡率及清針率,降低直流探針卡的庫存率。The AC signal is transmitted by the first transmission unit 12, and the AC signal is connected to the DC card 30 via the DC/AC conversion circuit 14, the second transmission unit 13, and the probe card interface 20, and the AC circuit is used. The principle of the transmission line is to cooperate with the AC signal test instrument such as the logic analyzer 40, the oscilloscope 50, the time domain reflectometer 60, the frequency domain network analyzer 70, the error generator 80, the eye diagram analyzer 90, etc. The probe card 30 performs error analysis test and improvement to avoid misjudging the error rate of the probe card, reducing the card replacement rate and the cleaning rate, and reducing the inventory rate of the DC probe card.
請參閱第3圖、第4圖所示,本新型測試時的樣態通常為設於探針卡介面20上,而探針卡介面20設於直流探針卡30上,直流探針卡30設於測試設備31上。Referring to FIG. 3 and FIG. 4 , the mode of the present invention is generally disposed on the probe card interface 20 , and the probe card interface 20 is disposed on the DC probe card 30 , and the DC probe card 30 is provided. It is provided on the test device 31.
請參閱第6圖至第17圖所示,本新型之測試實施例,係板體11之第一傳輸單元12可藉由連接線121電性連接於邏輯分析儀40、示波器50、時域反射儀60、頻域網路分析儀70、誤碼產生器80、眼圖分析儀90、誤碼產生器與眼圖分析儀整合機型91等交流信號測試儀器,另外,數位信號產生器41配合邏輯分析儀40或同時配合邏輯分析儀40、示波器50而電性連接於直流探針卡30,以藉上述交流信號測試儀器依照預定測試程序對直流探針卡30進行錯誤分析測試及改善,而測試及改善結果可由上述該些交流信號測試儀器顯示。Referring to FIG. 6 to FIG. 17 , in the test embodiment of the present invention, the first transmission unit 12 of the board body 11 can be electrically connected to the logic analyzer 40, the oscilloscope 50, and the time domain reflection by the connecting line 121. The AC signal test instrument such as the instrument 60, the frequency domain network analyzer 70, the error generator 80, the eye diagram analyzer 90, the error generator and the eye diagram analyzer integrated model 91, and the digital signal generator 41 cooperate The logic analyzer 40 is electrically connected to the DC probe card 30 in conjunction with the logic analyzer 40 and the oscilloscope 50 to perform error analysis testing and improvement on the DC probe card 30 according to the predetermined test procedure. The test and improvement results can be displayed by the above-described AC signal test instruments.
另外,當然也可以依照實際須要選擇上述部份的交流信號測試儀器來對直流探針卡30進行錯誤分析測試及改善。In addition, it is of course also possible to perform error analysis testing and improvement on the DC probe card 30 according to the actual need to select the above-mentioned part of the AC signal testing instrument.
由於原直流方式僅能測試一定準位的電壓電流值,並且是給電壓量電流,或是給電流量電壓,此會造成當一些有問題的訊號不在此位
準時,根本量不到而被忽略,故而也會造成對直流探針卡30的誤判,若以交流的方式,由於準位會隨具有週期性,若配合邏輯分析儀40的不同位準調整方式,就能抓出隱藏在直流標準位準下的關鍵錯誤信號,進而判別錯誤是由哪一個腳位產生,進而針對該腳位做改善,又邏輯分析儀40一次能同時判別2000根以上的腳位,故當直流探針卡30的腳位超過萬根時,經由分區測試,就能在最快時間內測完所有腳位,現有之探針卡分析儀每個腳位平均2秒,若1萬根就要2萬秒,下表即可表示其差別:
由探針卡的探針一直到載板間共有4~5層的不同載體以構成整個測試系統,然而,每個載體都有其不同的電路特性與阻抗匹配之問題,因此,在每根腳位都有其不同的阻抗特性(即使在同樣製程下也是如此),若以時域反射儀60來對有問題的腳位做分析,因其輸出的是非常高頻的步階波,上升時間在7~12ps(pico second)之內,若反推回距離即為nm(naro meter)的解析度,由於現有之IC設計與應用都在GHz等級(如DDR3,HDMI,PCI-e.…等等),再加上產品必須輕薄短小,又要功能強大,IC越來越小,功能越來越多,相對的IC內部線路更複雜,其傳輸線效應也越明顯,亦即各個不同的頻率會因為一些小的製程缺陷,就會產生不同的感應或寄生電 容電感電阻(統稱感應電路),造成原本應有的特性都被感應電路影響,這在直流的世界是完全無法量測到的,本新型利用時域反射儀60的步階波,不但可分析出這些感應電路發生的地方,並能換算該地方感應電路的特性,進而再針對該部分進行改善,由於解析度是到nm等級,因而能了解到底是哪一層載體造成錯誤,而非全歸錯於探針卡。There are 4~5 layers of different carriers from the probe of the probe card to the carrier to form the whole test system. However, each carrier has different circuit characteristics and impedance matching problems. Therefore, at each foot Bits have different impedance characteristics (even in the same process). If the time domain reflectometer 60 is used to analyze the problematic pin, the output is a very high frequency step wave, rise time. Within 7~12ps (pico second), if the reverse push distance is the resolution of nm (naro meter), the existing IC design and application are in GHz grade (such as DDR3, HDMI, PCI-e....etc. Etc.), plus the product must be light and short, but also powerful, IC is getting smaller and smaller, more and more functions, the relative IC internal circuit is more complicated, and its transmission line effect is more obvious, that is, different frequencies will Because of some small process defects, different inductive or parasitic electricity Capacitive inductors (collectively referred to as induction circuits) cause the original characteristics to be affected by the sensing circuit, which is completely unmeasurable in the DC world. The novel uses the step wave of the time domain reflectometer 60 to analyze not only Where these sensing circuits occur, and can convert the characteristics of the local sensing circuit, and then improve the part, because the resolution is to the nm level, it can understand which layer of the carrier caused the error, not the full error On the probe card.
當數位信號在IC內部流動時,如何正確的在適當時間輸出或輸入應有的數位信號,關係著此顆IC在真正產品上是否能達到所需的功能(Function),如前所述,現有應用都在GHz等級,故時脈的準確度及信號輸出入的精準控制非常重要,因為GHz等級時,時脈常會被抖動(Jitter)及系統及各高頻頻率造成的雜訊(noise)干擾,故須利用誤碼產生器(Bit Error Rate Tester)80及眼圖分析儀(eye-diagram analyzer)90來了解信號傳輸品質的好壞,並分析造成抖動(如TJ(total jitter),PJ(periodic jitter),DCD(Duty-cycle jitter)…等等)或雜訊(如RN(random noise),DN(deterministic noise),DDN(data dependent noise)…等等)的原因。When the digital signal flows inside the IC, how to properly output or input the desired digital signal at the appropriate time depends on whether the IC can achieve the desired function on the real product. As mentioned above, the existing function Applications are in the GHz class, so the accuracy of the clock and the precise control of the signal input and output are very important. Because of the GHz level, the clock is often disturbed by the jitter and the noise caused by the system and the high frequency. Therefore, it is necessary to use the Bit Error Rate Tester 80 and the eye-diagram analyzer 90 to understand the quality of the signal transmission, and analyze the jitter (such as TJ (total jitter), PJ ( Periodic jitter), DCD (Duty-cycle jitter), etc.) or noise (such as RN (random noise), DN (deterministic noise), DDN (data dependent noise), etc.).
如前所述,現有應用都在GHz等級,亦即所謂的射頻(RF)等級,故而我們必須要用射頻網路分析儀來分析該載體系統在射頻底下的頻域行為,如輸入損耗(Insertion loss),反射損耗(Return Loss)及傳輸損耗(Transitions Loss)等,如此配合前述之狀況,就能了解各層載體在時域(Time domain)及頻域(Frequency domain)的行為,達到以不同手段及方法來做改善。As mentioned above, the existing applications are in the GHz class, also known as the radio frequency (RF) level. Therefore, we must use the RF network analyzer to analyze the frequency domain behavior of the carrier system under the RF, such as input loss (Insertion). Loss), return loss (Transition Loss) and transmission loss (Transitions Loss), etc., so that the behavior of each layer carrier in the time domain and the frequency domain can be understood by different means. And methods to improve.
由上述可知,本新型藉由板體、第一傳輸單元、第二傳輸單元及直流/交流轉換電路之設置,將整個測試直流探針卡的構造介面整合在 一起,運用交流電路及傳輸線原理,能一次測出所有非常的關鍵參數及造成錯誤原因的因素,不但可降低探針卡的高庫存率,也能為後續的功能測試(functional test)排除更多的錯誤,加快產品上市的速度,克服直流測試探針卡的瓶頸,且不光是針對直流探針卡,對整個原有每個測試層,如載卡(load board),載卡與探針卡介面(POGO tower),探針頭(probe head)及探針(needle)等,都能測出其特性及錯誤,如此便能針對真正的問題層作解決,而非一再清針與換卡。It can be seen from the above that the novel interface of the entire test DC probe card is integrated by the arrangement of the board, the first transmission unit, the second transmission unit and the DC/AC conversion circuit. Together, using the principle of AC circuit and transmission line, all the key parameters and the causes of the error can be measured at one time, which not only reduces the high inventory rate of the probe card, but also eliminates more functional tests for subsequent functional tests. The error, speed up the time to market, overcome the bottleneck of the DC test probe card, and not only for the DC probe card, but also for each test layer, such as the load board, the carrier card and the probe card. The POGO tower, the probe head and the needle can be used to measure the characteristics and errors, so that the real problem layer can be solved instead of clearing the needle and changing the card.
以上為本案所舉之實施例,僅為便於說明而設,當不能以此限制本案之意義,即大凡依所列申請專利範圍所為之各種變換設計,均應包含在本案之專利範圍中。The above embodiments of the present invention are provided for convenience of explanation only. When the meaning of the case cannot be limited, the various transformation designs according to the scope of the listed patent application should be included in the patent scope of the present application.
10‧‧‧用於測試探針卡之轉換卡10‧‧‧Transformation card for testing probe cards
11‧‧‧板體11‧‧‧ board
12‧‧‧第一傳輸單元12‧‧‧First transmission unit
13‧‧‧第二傳輸單元13‧‧‧Second transmission unit
14‧‧‧直流/交流轉換電路14‧‧‧DC/AC conversion circuit
15‧‧‧穿孔15‧‧‧Perforation
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