TWM475020U - Chip terminal structure improvement and terminal material belt for making the same - Google Patents
Chip terminal structure improvement and terminal material belt for making the same Download PDFInfo
- Publication number
- TWM475020U TWM475020U TW102218506U TW102218506U TWM475020U TW M475020 U TWM475020 U TW M475020U TW 102218506 U TW102218506 U TW 102218506U TW 102218506 U TW102218506 U TW 102218506U TW M475020 U TWM475020 U TW M475020U
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- terminal
- wafer
- improved structure
- horizontal position
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- 239000000463 material Substances 0.000 title description 4
- 230000006872 improvement Effects 0.000 title description 3
- 239000004020 conductor Substances 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 5
- 210000000078 claw Anatomy 0.000 claims description 4
- 238000005476 soldering Methods 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 9
- 238000003466 welding Methods 0.000 description 8
- 238000009434 installation Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 238000002788 crimping Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 235000015096 spirit Nutrition 0.000 description 1
- 238000011191 terminal modification Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- Coupling Device And Connection With Printed Circuit (AREA)
Description
本創作係有關於一種端子結構,尤其有關於可用於連接電子裝置中之組件,以傳送資料、訊號、或偵測結果之端子結構。The present invention relates to a terminal structure, and more particularly to a terminal structure that can be used to connect components in an electronic device to transmit data, signals, or detection results.
近年來由於科技快速發展,各種電子裝置被大量且廣泛使用,其包括例如:電視機、冷氣機、冰箱、錄放影機、調變器、路由器、A/D轉換器、以及各種通訊裝置等。此等電子裝置由各種性能之組件所構成,其通常藉由端子(terminal)以接線(wiring)彼此電性連接,用於傳送資料、信號、或偵測結果,以達成各組件所設定功能。此所使用之端子可依據其應用,設計成不同結構與形狀。In recent years, due to the rapid development of technology, various electronic devices have been widely used and widely used, including, for example, televisions, air conditioners, refrigerators, video recorders, modulators, routers, A/D converters, and various communication devices. These electronic devices are composed of components of various performances, which are usually electrically connected to each other by terminals, for transmitting data, signals, or detection results, to achieve the functions set by the components. The terminals used here can be designed into different structures and shapes depending on the application.
有鑑於此,本國專利M394476中揭露一種「導電端子及使用該導電端子之電連接器」。此導電端子用於電性連接晶片模組之錫球至印刷電路板,以傳送資料、信號、以及測試結果。該電連接器包括絕緣本體及收容於絕緣本體內之導電端子,以使得晶片模組之錫球在下壓導電端子之過程中,達成良好之電性連接。In view of this, a "conductive terminal and an electrical connector using the same" is disclosed in the national patent M394476. The conductive terminal is used to electrically connect the solder ball of the chip module to the printed circuit board to transmit data, signals, and test results. The electrical connector includes an insulative housing and a conductive terminal received in the insulating body, so that the solder ball of the chip module achieves a good electrical connection during the pressing of the conductive terminal.
此外,參考第8圖,習知技術之「晶片端子」4包括一主體41,其被設計成電路圖案形狀,具有複數個導電段43,以增加端子與晶片模組(圖未示)之接觸面積,增強其導電能力。此外,此晶片端子前端具有三個焊接 孔42,用於焊接住接線,以傳導資料與訊號。In addition, referring to FIG. 8, the "wafer terminal" 4 of the prior art includes a body 41 which is designed in the shape of a circuit pattern and has a plurality of conductive segments 43 for increasing contact between the terminals and the wafer module (not shown). The area enhances its electrical conductivity. In addition, the front end of the wafer terminal has three soldering A hole 42 for soldering the wire to conduct data and signals.
又,參考第9與10圖,其顯示在安裝接線時,將三個接線44分別焊接至三個焊接孔42以形成三個焊接點45。惟,此種焊接有以下缺點:Further, referring to Figures 9 and 10, it is shown that three wires 44 are respectively welded to the three welding holes 42 to form three welding points 45 when the wiring is mounted. However, such welding has the following disadvantages:
1.此焊接本身並不牢固極易脫落或斷裂,以使得接線44脫落而斷路,致使端子失去其連接與導電功能。1. The solder itself is not strong enough to fall off or break, so that the wiring 44 is disconnected and broken, causing the terminal to lose its connection and conductive function.
2.若焊接技術欠佳或由於疏忽,此等焊接點45容易彼此接觸,造成接線44間之短路。故,目前所使用此種晶片端子結構,實有進一步改良之必要。2. If the soldering technique is poor or negligent, the solder joints 45 are easily in contact with each other, causing a short circuit between the wires 44. Therefore, the use of such a wafer terminal structure is currently necessary for further improvement.
本創作之目的為提供一種晶片端子之改良結構,其可避免習知技術晶片端子以下缺失與缺點:其接線安裝必須實施焊接過程,其費時耗料,且於焊接孔上焊接容易斷裂使接線脫落導致斷路以致使端子失效。The purpose of the present invention is to provide an improved structure of a wafer terminal, which can avoid the following disadvantages and disadvantages of the prior art wafer terminal: the wiring installation must implement a soldering process, which takes time and consumes materials, and the soldering hole is easily broken and the wiring is dropped. Causes an open circuit to disable the terminal.
為達成此目的,本創作提供一種晶片端子之改良結構,其包括:複數個導電段;三個接腳,其各由一前段與後段所形成,該後段之高度高於前段之高度,且該前段兩側各設有兩個突起,該前段最前端兩側各設有一突爪,其與該前段用於容設與固定一接線,並可防止接線脫落,以達成端子良好導電功能。To achieve this object, the present invention provides an improved structure of a wafer terminal, comprising: a plurality of conductive segments; three pins each formed by a front segment and a rear segment, the height of the rear segment being higher than the height of the front segment, and the Two protrusions are arranged on both sides of the front section, and a protruding claw is arranged on both sides of the front end of the front section, and the front section is used for accommodating and fixing a wire, and the wire can be prevented from falling off to achieve a good conductive function of the terminal.
在以上說明中,該晶片端子之改良結構是以金屬片冲壓形成。In the above description, the improved structure of the wafer terminal is formed by stamping a metal piece.
當將接線安裝至晶片端子改良結構時,將接線置於該接腳前段兩側上各兩個突起之間且使用夾具將該等突起夾緊,使該接線被該接腳最前端兩側突爪固定定位,以致於該接線被夾住且固定於該前段表面上不 會移動,並使得該前段上接線具有與該後段相同高度。故,藉由使用本創作,接線在安裝後不會移動、脫落,或斷路,以避免習知技術焊接易斷裂使接線脫落導致斷路以致端子失效之缺失與缺點。為便於壓著機台上連續操作,可在金屬片上沖壓多個晶片端子改良結構,而成為端子料帶。When the wiring is mounted to the wafer terminal improved structure, the wiring is placed between the two protrusions on both sides of the front side of the pin and the protrusions are clamped using a jig so that the wire is protruded from the front end of the pin The claw is fixedly positioned such that the wire is clamped and fixed to the front surface Will move and make the wiring on the front section have the same height as the rear section. Therefore, by using this creation, the wiring does not move, fall off, or break after installation, so as to avoid the lack of shortcomings and shortcomings of the terminal failure caused by the soldering of the prior art and the disconnection of the wiring. In order to facilitate continuous operation on the press table, a plurality of wafer terminal improved structures can be punched on the metal sheet to become a terminal strip.
本創作之優點為,其接線安裝可以省略焊接步驟,以節省焊接材料與焊接工序成本,且獲得牢固之接線連接。The advantage of this creation is that the wiring installation can omit the welding step to save the welding material and the welding process cost, and obtain a firm wiring connection.
1‧‧‧端子料帶1‧‧‧Terminal tape
10‧‧‧框架10‧‧‧Frame
11‧‧‧連接帶11‧‧‧Connecting belt
12‧‧‧截斷部12‧‧‧Truncate
20‧‧‧晶片端子改良結構20‧‧‧Chip terminal improved structure
21‧‧‧接腳21‧‧‧ feet
211‧‧‧前段211‧‧‧
212‧‧‧後段212‧‧‧After
213‧‧‧接線導體固持部213‧‧‧Wiring conductor retention
214‧‧‧接線導體固持部214‧‧‧Wiring conductor retaining section
215‧‧‧接線定位結構215‧‧‧Wiring positioning structure
22‧‧‧導電段22‧‧‧Conducting section
23‧‧‧截斷片23‧‧‧Cut slices
3‧‧‧接線3‧‧‧ wiring
4‧‧‧晶片端子4‧‧‧ wafer terminal
41‧‧‧主體41‧‧‧ Subject
42‧‧‧焊接孔42‧‧‧welding holes
43‧‧‧導電段43‧‧‧Electrical section
44‧‧‧接線44‧‧‧ wiring
45‧‧‧焊接點45‧‧‧ solder joints
第1圖為本創作晶片端子之改良結構之整體示意圖。Figure 1 is a schematic overall view of the improved structure of the wafer terminal.
第2圖為本創作晶片端子之改良結構之示意圖。Fig. 2 is a schematic view showing an improved structure of the wafer terminal of the present invention.
第3圖為本創作晶片端子之改良結構之接腳上接線緊前之示意圖。Fig. 3 is a schematic view showing the wiring on the pin of the improved structure of the wafer terminal.
第4圖為本創作晶片端子之改良結構之接腳上接線後之示意圖。Fig. 4 is a schematic view showing the wiring on the pin of the improved structure of the wafer terminal.
第5圖為本創作晶片端子之改良結構之接腳上安裝接線之剖面圖。Fig. 5 is a cross-sectional view showing the mounting wiring on the pin of the improved structure of the wafer terminal.
第6圖為本創作晶片端子之改良結構壓著後示意圖。Fig. 6 is a schematic view showing the improved structure of the wafer terminal after pressing.
第7圖為本創作晶片端子之改良結構之端子料帶示意圖。Figure 7 is a schematic view of the terminal strip of the improved structure of the wafer terminal.
第8圖為習知技術之晶片端子結構之示意圖。Figure 8 is a schematic diagram of a conventional wafer terminal structure.
第9圖為習知技術之晶片端子結構其焊接孔上焊接接線之示意圖。Fig. 9 is a schematic view showing a solder terminal on a soldering hole of a wafer terminal structure of the prior art.
第10圖為習知技術之晶片端子結構其焊接孔上焊接接線之剖面圖。Figure 10 is a cross-sectional view showing a solder terminal on a soldering hole of a wafer terminal structure of the prior art.
為使貴審查委員方便了解本創作之內容,及所能達成之功效,茲配合圖式列舉具體實施例,詳細說明如下:首先,參考第1圖及第2圖,晶片端子改良結構20包括三個接 腳21,彼此平行排列,且各具有一前段211及一後段212,其中前段211的水平位置低於後段212之水平位置而呈凹陷狀,且前段211之兩側邊垂直立起而形成兩組接線導體固持部213及214;以及三個導電段22,分別連接於三個接腳21的後段212之後且彼此相互連接,兩導電段22間分別以至少一截斷片23連接。視所連接電路(圖未示)之結構及功能之需求,三個導電段22分別具有不同之電路形狀。每一接腳21的前段211之前端更包括接線定位結構215,其為自該前段211之最前端兩側向上延伸而出的一突爪。兩外側之晶片端子改良結構20分別以一截斷部12連接於連接帶11上,以便於鉚線機台(圖中未示)上操作。In order to make the reviewer's content easy to understand the content of the creation and the effect that can be achieved, the specific embodiments are listed with reference to the drawings, which are described in detail as follows: First, referring to FIG. 1 and FIG. 2, the wafer terminal improvement structure 20 includes three Pick up The legs 21 are arranged parallel to each other, and each has a front section 211 and a rear section 212. The horizontal position of the front section 211 is lower than the horizontal position of the rear section 212, and the two sides of the front section 211 are vertically erected to form two groups. The wiring conductor retaining portions 213 and 214; and the three conductive segments 22 are respectively connected to the rear segments 212 of the three pins 21 and connected to each other, and the two conductive segments 22 are respectively connected by at least one cut piece 23. The three conductive segments 22 each have a different circuit shape depending on the structure and function of the connected circuit (not shown). The front end of the front section 211 of each of the pins 21 further includes a wire positioning structure 215 which is a protrusion extending upward from both front ends of the front section 211. The outer wafer terminal modification structures 20 are respectively connected to the connection belt 11 by a cut-off portion 12 for operation on a rivet machine (not shown).
請參閱第3圖及第4圖,接腳21的前段211的主要功能是用來安裝接線3。安裝時,將接腳21置放於前段211之上,並使用模具(圖未示)進行壓著,而使接線導體固持部213、214夾緊接線3。接線定位結構215則使得接線3被確實地固定於前段211上,而不會左右上下地移動,且不會脫落導致斷路,以確保端子良好導電功能。Referring to Figures 3 and 4, the main function of the front section 211 of the pin 21 is to mount the wiring 3. At the time of installation, the pin 21 is placed on the front section 211, and is pressed using a mold (not shown), so that the wire conductor holding portions 213, 214 clamp the wire 3. The wire positioning structure 215 allows the wire 3 to be securely fixed to the front section 211 without moving left and right up and down, and does not fall off to cause an open circuit to ensure a good conductive function of the terminal.
請參閱第5圖,前段211與後段212之水平位置的高度差異,係為使接線3與後段212位於同一水平位置。請參閱第5圖,三個導電段22之水平位置也是低於後段212的水平位置。而三個接腳21可在鉚線機(圖未示)上在一次壓著模具的操作中同時完成接線3的壓著連接,之後再於兩個截斷點12上進行截斷操作,使晶片端子改良結構20與連接帶11分離。Referring to FIG. 5, the difference in height between the horizontal positions of the front section 211 and the rear section 212 is such that the wiring 3 and the rear section 212 are at the same horizontal position. Referring to FIG. 5, the horizontal position of the three conductive segments 22 is also lower than the horizontal position of the rear segment 212. The three pins 21 can simultaneously complete the crimping connection of the wire 3 in the operation of the first pressing die on the riveting machine (not shown), and then perform the cutting operation on the two cutting points 12 to make the chip terminal. The improved structure 20 is separated from the connecting strip 11.
為利於接線壓著的連續操作,可以將數個晶片端子之改良結構2與連接帶11用整片的金屬片冲壓形成一端子料帶。請參閱第7圖,端子料帶10包括數個晶片端子之改良結構20,其中多個晶片端子之改良結構2以 彼此平行的方式排成一列;以及連接帶11,連接所有的晶片端子之改良結構2。In order to facilitate the continuous operation of the wiring crimping, the modified structure 2 of the plurality of wafer terminals and the connecting strip 11 may be stamped with a single piece of metal sheet to form a terminal strip. Referring to FIG. 7, the terminal strip 10 includes a modified structure 20 of a plurality of wafer terminals, wherein the modified structure 2 of the plurality of wafer terminals is The rows are arranged in parallel with each other; and the connecting strip 11 is connected to the improved structure 2 of all the wafer terminals.
連接帶11形成數個框架10,每一框架10中容置一個晶片端子之改良結構20。框架10以兩個截斷部12與其內的晶片端子之改良結構20相連,而兩個截斷部12分佈於晶片端子之改良結構20的兩側。The connecting strip 11 forms a plurality of frames 10, each of which houses a modified structure 20 of a wafer terminal. The frame 10 is connected by two cut-off portions 12 to the improved structure 20 of the wafer terminals therein, and the two cut-off portions 12 are distributed on both sides of the improved structure 20 of the wafer terminals.
綜上所述,藉由使用本創作之晶片端子之改良結構,可以避免習知技術焊接斷裂以致接線脫落或焊接間短路之缺點,並藉由接腳上所設置突起與突爪,可以將接線牢固地固定於端子接腳,以確實達成端子連接與導電功能。又,藉由使用本創作實施接線,可以省略習知技術焊接步驟,以節省焊接材料與焊接人工之成本。故,本創作具習知技術所無法預期功效,符合專利要件且具專利價值。In summary, by using the improved structure of the wafer terminal of the present invention, it is possible to avoid the disadvantages of the prior art solder fracture such that the wiring is disconnected or the short circuit between the solders, and the wiring can be connected by the protrusions and the claws provided on the pins. Securely fastened to the terminal pins to ensure terminal connection and conduction. Moreover, by using the present invention to implement wiring, the prior art soldering steps can be omitted to save the cost of soldering materials and welding labor. Therefore, this creation has the unpredictable effect of the conventional technology, conforms to the patent requirements and has patent value.
以上說明內容僅為本創作一較佳實施例,其並非用來限定本創作實施之範圍,故舉凡依本創作申請專利範圍所述之形狀、構造、特徵及精神所為之等同變化與修飾,均應包括於本創作之申請專利範圍內。The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, the equivalent changes and modifications of the shapes, structures, features and spirits described in the scope of the patent application are all equivalent. It should be included in the scope of the patent application for this creation.
10‧‧‧框架10‧‧‧Frame
11‧‧‧連接帶11‧‧‧Connecting belt
12‧‧‧截斷部12‧‧‧Truncate
20‧‧‧晶片端子改良結構20‧‧‧Chip terminal improved structure
21‧‧‧接腳21‧‧‧ feet
211‧‧‧前段211‧‧‧
212‧‧‧後段212‧‧‧After
213‧‧‧接線導體固持部213‧‧‧Wiring conductor retention
214‧‧‧接線導體固持部214‧‧‧Wiring conductor retaining section
215‧‧‧接線定位結構215‧‧‧Wiring positioning structure
22‧‧‧導電段22‧‧‧Conducting section
23‧‧‧截斷片23‧‧‧Cut slices
Claims (11)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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TW102218506U TWM475020U (en) | 2013-10-03 | 2013-10-03 | Chip terminal structure improvement and terminal material belt for making the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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TW102218506U TWM475020U (en) | 2013-10-03 | 2013-10-03 | Chip terminal structure improvement and terminal material belt for making the same |
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Publication Number | Publication Date |
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TWM475020U true TWM475020U (en) | 2014-03-21 |
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TW102218506U TWM475020U (en) | 2013-10-03 | 2013-10-03 | Chip terminal structure improvement and terminal material belt for making the same |
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2013
- 2013-10-03 TW TW102218506U patent/TWM475020U/en not_active IP Right Cessation
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