TWM441920U - Carrier structure having three-dimensional capacitor - Google Patents

Carrier structure having three-dimensional capacitor Download PDF

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Publication number
TWM441920U
TWM441920U TW101213238U TW101213238U TWM441920U TW M441920 U TWM441920 U TW M441920U TW 101213238 U TW101213238 U TW 101213238U TW 101213238 U TW101213238 U TW 101213238U TW M441920 U TWM441920 U TW M441920U
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Taiwan
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capacitor
carrier structure
channel
section
dimensional
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TW101213238U
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Chinese (zh)
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Chih-Ming Kuo
Lung-Hua Ho
You-Ming Hsu
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Chipbond Technology Corp
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Priority to TW101213238U priority Critical patent/TWM441920U/en
Publication of TWM441920U publication Critical patent/TWM441920U/en

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M441920 五、新型說明: 【新型所屬之技術領域】 [0001] 本創作係有關於一種承載器結構,特別係有關於一 種具立體電容之承載器結構。 【先前技術】 [0002] 習知電容係先獨立製作成一單體封裝元件,再利用 SMT(表面黏着技術)焊在PCB基板上,或者以Flip-chip 倒裝技術(例如COF)在軟板上内部線路與晶片連結,然隨 著積體電路製程技術的進步,各類電子元件均朝向高集 積度、高速率運作及微小化發展,因此習知電容之製作 及設置方式所需之製程及空間已不符需求。 【新型内容】 [0003] 本創作之主要目的係在於提供一種具立體電容之承 載器結構,其包含一基板以及至少一立體電容,該基板 係具有一表面及至少一線路層,該線路層係形成於該表 面,且該線路層係具有至少一第一接點及至少一第二接 點,該立體電容係與該基板之該線路層一體成型且該立 體電容及該線路層係為相同材質,該立體電容係具有一 第一電容部及一與該第一電容部極性相反之第二電容部 ,該第一電容部係具有一第一端、一第二端、至少一第 一區段、至少一連接該第一區段之第二區段及至少一位 於該第一區段及該第二區段之間的第一通道,該第二電 容部係形成於該第一通道,且該第二電容部係具有一第 三端、一第四端、至少一第三區段、至少一連接該第三 區段之第四區段及至少一位於該第三區段及該第四區段 1012042573-0 第3頁/共17頁 M441920 之_第二通道’該第二通道錢通該第—通道,該第 -電谷部係位於該第二通道且該第__端係對應於該第三 端’該第-端係連接該第-接點,該第三端係連接該第 二接點。由於該立體電容係與該線路層一體成型,因此 該具立體電容d載器結構係具有更輕更薄之特徵,且 不需額外將電容銲接於承載器,具有簡化製程之功效。 【實施方式】 [0004] 請參閱第1圖,其係本創作之第一實施例,一種具立 體電容之承載器結構100係包含一基板11〇以及至少一立 體電容120,該基板110係具有一表面lu及至少一線路 層112,該線路層112係形成於該表面m,且該線路層 112係具有至少一第一接點! j 2 a及至少一第二接點11 2 b ,在本實施例中,該線路層112之材質係為銅,該立體電 容120係與該基板110之該線路層112一體成型且該立體 電容120及該線路層112係為相同材質,該立體電容12〇 係具有一第一電容部121及一與該第一電容部121極性相 反之第二電容部122,且該立體電容12〇係為螺旋狀在 本實施例中,該線路層112係具有一第一厚度n,該第一 電容部121係具有一第二厚度T2,該第二電容部122係具 有一第三厚度Τ3,該第二厚度Τ2及該第三厚度Τ3係不小 於該第一厚度Τ1,當製程為一道光阻製程時,該第二厚 度Τ2及該第三厚度Τ3係等於該第一厚度τι,當製程為二 道光阻製程時,該第二厚度Τ2及該第三厚度丁3係大於該 第一厚度Τ1,在本實施例中,該第二厚度Τ2及該第三厚 度Τ3係大於該第一厚度τι ,較佳地,該第二厚度Τ2及該 第三厚度Τ3係為相同,請再參閱第}圖,該第— 10121323^^^^ Α0101 第 4 頁 / 共 17 頁 1012042573-0 M441920 121係具有一第一端i2ia、一第二端1211)、至少一第一 區段121c、至少一連接該第一區段^丨。之第二區段i21d 及至少一位於該第一區段12ic及該第二區段i2ld之間的 第一通道P1,在本實施例中,該第一端121a係位於該第 一區段121c,該第二端121b係位於該第二區段121d,該 第二電容部122係形成於該第一通道pi,且該第二電容部 122係具有一第三端i22a、一第四端122b、至少一第三 區段122c、至少一連接該第三區段122(:之第四區段I22d 及至少一位於該第三區段122C及該第四區段I22d之間的 第二通道P2,該第二通道P2係連通該第一通道pi,該第 三端122a係位於該第三區段122c,該第四端122b係位於 該第四區段122d ’該第一電容部121係位於該第二通道 P2且該第一端121 a係對應於該第三端122a,該第二端 12lb係對應於該第四端122b,該第一端121a係連接該第 一接點112a ’該第三端122a係連接該第二接點112b,該 第一區段121c及該第三區段122c之間係具有一第一間距 D1 ’該第三區段122c及該第二區段I21d之間係具有一第 二間距D2 ’該第一間距D1係等於該第二間距D2,該第四 區段1 22d及該第二區段1 2Id之間係具有一第三間距D3且 該第三間距D3係等於該第一間距di,亦即該第一間距di 、該第二間距D2及該第三間距D3係為相等》由於該立體 電谷120係由二極性相反的金屬之間夾有空氣而成,因此 該立體電容12 0係可稱為空氣電容,除了濾波功能之外, 也具有儲存電能之功效,且該立體電容12〇係與該線路層 112 —體成型,因此該具立體電容之承載器結構1〇〇係具 有更輕更薄之特徵,且不需額外將電容銲接於承載器, 1〇121323#單編號删1 第5頁/共17頁 1012042573-0 M441920 具有簡化製程之功效。 請參閱第2圖,其為本創作之苐二實施例,一種具立 體電谷之承載器結構100係包^--基板110、至少一立體 電容120以及一絕緣層130,該基板11〇係具有一表面lu 及至少一線路層112,且該線路層112係具有至少一第一 接點112a及至少一第二接點n2b,該立體電容12〇係與 該基板110之該線路層112—體成型且該立體電容12〇及 該線路層112係為相同材質,該立體電容12〇係具有一第 一電容部121及一與該第一電容部121極性相反之第二電 容部122,且該立體電容120係為螺旋狀,該第一電容部 121係具有一第一端i21a' —第二端121b'至少一第一 區>kl21c、至少一第二區段i21d及至少一第一通道pi, 該第一電谷部122係形成於該第一通道P1,且該第二電容 部122係具有一第三端122a、一第四端122b、至少一第 三區段122c、至少一第四區段i22d及至少一第二通道P2 ,該第二通道P2係連通該第一通道pi,在本實施例中, 第二實施例與第一實施例不同處在於該具立體電容之承 載器結構10 0係另包含有該絕緣層13 〇,該絕緣層1 3 〇係 形成於該第一通道P1及該第二通道P2以取代空氣,且該 絕緣層130係為螺旋形,該絕緣層no之材質係可選自於 聚亞酿胺(Polyimide,PI)、苯並環丁稀(M441920 V. New Description: [New Technology Field] [0001] This author is about a carrier structure, especially for a carrier structure with a three-dimensional capacitor. [Prior Art] [0002] Conventional capacitors are independently fabricated into a single package component, soldered to a PCB substrate using SMT (Surface Adhesion Technology), or Flip-chip flip-chip technology (eg, COF) on a flexible board. The internal circuit is connected to the chip. However, with the advancement of the integrated circuit process technology, various electronic components are moving toward high integration, high speed operation and miniaturization. Therefore, the process and space required for the fabrication and setting of the capacitor are known. Has not met the demand. [New content] [0003] The main purpose of the present invention is to provide a carrier structure with a stereo capacitor, comprising a substrate and at least one stereo capacitor, the substrate having a surface and at least one circuit layer, the circuit layer Formed on the surface, and the circuit layer has at least one first contact and at least one second contact, the three-dimensional capacitor is integrally formed with the circuit layer of the substrate, and the three-dimensional capacitor and the circuit layer are the same material The three-dimensional capacitor has a first capacitor portion and a second capacitor portion having a polarity opposite to the first capacitor portion. The first capacitor portion has a first end, a second end, and at least a first portion. Having at least one second segment connecting the first segment and at least one first channel between the first segment and the second segment, the second capacitive portion is formed in the first channel, and The second capacitor portion has a third end, a fourth end, at least a third segment, at least one fourth segment connecting the third segment, and at least one of the third segment and the fourth portion Section 1012042573-0 Page 3 of 17 M 441920 _ second channel 'the second channel money passes the first channel, the first electric valley portion is located in the second channel and the __ end system corresponds to the third end 'the first end end connection The first contact is connected to the second contact. Since the three-dimensional capacitor is integrally formed with the circuit layer, the three-dimensional capacitor d-carrier structure has the characteristics of lighter and thinner, and does not need to additionally solder the capacitor to the carrier, thereby simplifying the process. [0004] Referring to FIG. 1 , a first embodiment of the present invention, a carrier structure 100 having a three-dimensional capacitor includes a substrate 11 〇 and at least one solid capacitor 120 , the substrate 110 having A surface lu and at least one circuit layer 112, the circuit layer 112 is formed on the surface m, and the circuit layer 112 has at least one first contact! In the present embodiment, the material of the circuit layer 112 is copper, and the three-dimensional capacitor 120 is integrally formed with the circuit layer 112 of the substrate 110 and the three-dimensional capacitor 120 and the circuit layer 112 are made of the same material, and the three-dimensional capacitor 12 has a first capacitor portion 121 and a second capacitor portion 122 opposite in polarity to the first capacitor portion 121, and the stereo capacitor 12 is In the present embodiment, the circuit layer 112 has a first thickness n, the first capacitor portion 121 has a second thickness T2, and the second capacitor portion 122 has a third thickness Τ3. The second thickness Τ2 and the third thickness Τ3 are not less than the first thickness Τ1. When the process is a photoresist process, the second thickness Τ2 and the third thickness Τ3 are equal to the first thickness τι, when the process is two In the photoresist process, the second thickness Τ2 and the third thickness 33 are greater than the first thickness Τ1. In this embodiment, the second thickness Τ2 and the third thickness Τ3 are greater than the first thickness τι. Preferably, the second thickness Τ2 and the third thickness Τ3 are the same, please Referring to the figure, the first 10121323^^^^ Α0101, 4th, and 17th, 1012042573-0, M441920 121 has a first end i2ia, a second end 1211), at least a first section 121c, at least A first segment is connected to the first segment. a second section i21d and at least one first channel P1 between the first section 12ic and the second section i2ld. In this embodiment, the first end 121a is located in the first section 121c The second end portion 121b is located in the second portion 121d. The second capacitor portion 122 is formed in the first channel pi, and the second capacitor portion 122 has a third end i22a and a fourth end 122b. At least one third section 122c, at least one connected to the third section 122 (the fourth section I22d and at least one second channel P2 between the third section 122C and the fourth section I22d) The second channel P2 is connected to the first channel pi. The third terminal 122a is located in the third segment 122c. The fourth terminal 122b is located in the fourth segment 122d. The second end P12 corresponds to the third end 122a, and the second end 12b corresponds to the fourth end 122b. The first end 121a is connected to the first contact 112a' The third end 122a is connected to the second contact 112b, and the first section 121c and the third section 122c have a first spacing D1 'the third section 122c and the second section I21d have a second spacing D2', the first spacing D1 is equal to the second spacing D2, and the fourth section 1 22d and the second section 1 2Id have a third pitch D3 and the third pitch D3 are equal to the first pitch di, that is, the first pitch di, the second pitch D2, and the third pitch D3 are equal" The opposite polarity of the metal is sandwiched between air. Therefore, the stereo capacitor 120 can be called an air capacitor. In addition to the filtering function, it also has the function of storing electric energy, and the stereo capacitor 12 is connected to the circuit layer. 112 - Body molding, so the carrier structure 1 with a three-dimensional capacitor has a lighter and thinner feature, and does not need to additionally solder the capacitor to the carrier, 1〇121323#单编号除1 Page 5 / Total Page 17 1012042573-0 M441920 has the effect of simplifying the process. Please refer to Fig. 2, which is a second embodiment of the present invention. A carrier structure 100 with a three-dimensional electric valley is provided with a substrate 110 and at least one solid capacitor. 120 and an insulating layer 130, the substrate 11 has a surface and At least one circuit layer 112, and the circuit layer 112 has at least one first contact 112a and at least one second contact n2b. The stereo capacitor 12 is integrally formed with the circuit layer 112 of the substrate 110 and the solid The capacitor 12 〇 and the circuit layer 112 are made of the same material, and the stereo capacitor 12 has a first capacitor portion 121 and a second capacitor portion 122 opposite in polarity to the first capacitor portion 121 , and the stereo capacitor 120 is The first capacitor portion 121 has a first end i21a ′—the second end 121 b ′ at least a first region gt k1 21 c , at least a second segment i 21 d and at least one first channel pi. An electric valley portion 122 is formed on the first channel P1, and the second capacitor portion 122 has a third end 122a, a fourth end 122b, at least a third segment 122c, and at least a fourth segment i22d. And at least one second channel P2, the second channel P2 is connected to the first channel pi. In this embodiment, the second embodiment is different from the first embodiment in the carrier structure of the three-dimensional capacitor. The insulating layer 13 〇 is further included, and the insulating layer 13 is formed on the first channel P1 The second passage P2 to replace the air, and the insulating layer 130 are helical, based material of the insulating layer is selected from the no brewing polyalkylene amine (Polyimide, PI), benzocyclobutene (

Benzocyclobutene,BCB)、ink、封膠體(m〇iding compound)或底部填充膠(underfill)。由於該立體 電容120與該線路層U2係藉由半導體製程中重分佈線路 層之技術一體成型,不同材質的絕緣層之介電常數亦不 相同’因此可依據所需之電容值選擇該絕緣層13〇之材質 1012042573-0 10121323^單編號A〇1〇l 第6頁/共17頁 M441920 ο 請參閱第3圖’其為本創作之第三實施例,一種具立 體電容之承載益結構200係包令—基板210以及至少一立 體電容220,該基板210係具有一表面211及至少一線‘ 層212 ’該線路層212係形成於該表面211,在本實施例 中,該線路層212之材質係為銅,且該線路層212係具有 至少一第一接點212a及至少一第二接點2i2b,該立體電 谷220係與違基板210之遠線路層212·~~體成型且該立體 電容220及該線路層212係為相同材質,該立體電容220 係具有一第一電容部221及一與該第一電容部22丨極性相 ' 反之第二電谷部222,在本實施例中,該線路層212係具 有一第一厚度T1,該第一電容部221係具有一第二厚度T2 ,§玄第二電容部222係具有一第三厚度T3,該第二厚度T2 及該第三厚度T3係不小於該第一厚度T1 ,且該第二厚度 T2及該第二厚度T3係為相同,該第一電容部221係具有一 第一端221a、一第一端22lb、至少一第一區段22lc、至 • 少一連接該第一區段221c之第二區段221d及至少一位於 該第一區段221c及該第二區段221(1之間的第一通道ρι, 在本實施例中,該第一端22la係位於該第一區段221c, 該第二電容部222係形成於該第一通道ρι,且該第二電容 部222係具有一第三端222a、一第四端222b、至少一第 三區段222c、至少一連接該第三區段22以之第四區段 222d及至少一位於該第三區段222c及該第四區段222(1之 間的第二通道P2 ’該第二通道P2係連通該第-通道p卜 該第三端222a係位於該第三區段mc ,該第一電容部 221係位於該第二通道P2且該第一端221a係對應於該第 1〇121323产單編號A01〇l 第7頁/共17 1012042573-0 M441920Benzocyclobutene, BCB), ink, m〇iding compound or underfill. Since the three-dimensional capacitor 120 and the circuit layer U2 are integrally formed by the technology of the redistribution circuit layer in the semiconductor process, the dielectric constants of the insulating layers of different materials are also different. Therefore, the insulating layer can be selected according to the required capacitance value. 13〇材料1012042573-0 10121323^单单A〇1〇l Page 6 of 17 M441920 ο Please refer to Figure 3, which is the third embodiment of the creation, a load-bearing structure with a stereo capacitor 200 The substrate 210 and the at least one solid capacitor 220 have a surface 211 and at least one line 'layer 212'. The circuit layer 212 is formed on the surface 211. In this embodiment, the circuit layer 212 The material is made of copper, and the circuit layer 212 has at least one first contact 212a and at least one second contact 2i2b. The three-dimensional electric valley 220 is formed integrally with the remote circuit layer 212·~~ The three-dimensional capacitor 220 and the circuit layer 212 are made of the same material. The three-dimensional capacitor 220 has a first capacitor portion 221 and a polarity opposite to the first capacitor portion 22, and the second valley portion 222. The circuit layer 212 has one a thickness T1, the first capacitor portion 221 has a second thickness T2, and the second capacitor portion 222 has a third thickness T3, and the second thickness T2 and the third thickness T3 are not less than the first The thickness T1, and the second thickness T2 and the second thickness T3 are the same. The first capacitor portion 221 has a first end 221a, a first end 22lb, at least a first segment 22lc, and at least a second segment 221d connecting the first segment 221c and at least one first channel ρι between the first segment 221c and the second segment 221 (1 in the embodiment, the first The second end portion 221 is formed in the first channel 221c, and the second capacitor portion 222 has a third end 222a, a fourth end 222b, and at least one a third section 222c, at least one connected to the third section 22 and a fourth section 222d, and at least one second channel P2' between the third section 222c and the fourth section 222 (1) The second channel P2 is connected to the first channel p. The third terminal 222a is located in the third segment mc, and the first capacitor portion 221 is located in the second channel P2 and the One end 221a of the second group corresponding to a single production 1〇121323 A01〇l Page number 7 / total 17 1012042573-0 M441920

二端222a ’該第二端221b係對應於該第四端222b,該第 一端221a係連接該第一接點212a,該第三端222a係連接 該第二接點212b,該第一區段221c及該第三區段222c之 間係具有一第一間距D1,該第三區段222c及該第二區段 221d之間係具有一第二間距!>2,該第一間距公丨係等於該 第二間距D2,該第四區段222d及該第二區段221d之間係 具有一第三間距D3 ’該第一區段221c及該第四區段222d 之間係具有一第四間距D4,該第三間距D3係等於該第四 間距D4 ’且該第三間距D3係等於該第一間距,亦即該 第一間距D1、該第二間距])2、該第三間距D3及該第四間 距D4係為相等。在本實施例中,第三實施例與第一實施 例不同處在於該立體電容220係為梳狀。The second end 222a is connected to the fourth end 222b, the first end 221a is connected to the first contact 212a, and the third end 222a is connected to the second contact 212b. A first spacing D1 is formed between the segment 221c and the third segment 222c, and a second spacing!>2 is formed between the third segment 222c and the second segment 221d. The second section 222d and the second section 221d have a third spacing D3 between the first section 221c and the fourth section 222d. a fourth pitch D4, the third pitch D3 being equal to the fourth pitch D4′ and the third pitch D3 being equal to the first pitch, that is, the first pitch D1, the second spacing], and the third The pitch D3 and the fourth pitch D4 are equal. In the present embodiment, the third embodiment is different from the first embodiment in that the three-dimensional capacitor 220 is in the shape of a comb.

請參閱第4圖,其為本創作之第四實施例,一種具立 體電容之承載器結構2〇〇係包含一基板21〇、至少一立體 電容220以及一絕緣層230,該基板210係具有一表面211 及至少一線路層212,該線路層212係具有至少一第一接 ί占212a及至少一第二接點212b,該立體電容220係與該 基板210之該線路層212 —體成型且該立體電容220及該 線路層212係為相同材質,該立體電容220係具有一第一 電容部221及一與該第一電容部221極性相反之第二電容 部222,在本實施例中,該立體電容22〇係為梳狀,該第 一電容部221係具有一第一端221a、一第二端221b、至 少一第一區段22 lc、至少一第二區段221 d及至少一第一 通道P1,在本實施例中,該第二電容部222係形成於該第 一通道P1,且該第二電容部222係具有一第三端222a、 一第四端222b、至少~~第三區段222c、至少一第四區段 A0101 第8頁/共17頁 1012042573-0 M441920Referring to FIG. 4 , which is a fourth embodiment of the present invention, a carrier structure 2 having a three-dimensional capacitor includes a substrate 21 , at least one solid capacitor 220 , and an insulating layer 230 . a surface 211 and at least one circuit layer 212, the circuit layer 212 having at least a first interface 212a and at least a second contact 212b. The solid capacitor 220 is formed integrally with the circuit layer 212 of the substrate 210. The three-dimensional capacitor 220 and the circuit layer 212 are made of the same material. The three-dimensional capacitor 220 has a first capacitor portion 221 and a second capacitor portion 222 having a polarity opposite to the first capacitor portion 221. In this embodiment, The first capacitor portion 221 has a first end 221a, a second end 221b, at least one first segment 22 lc, at least a second segment 221 d and at least In the first channel P1, the second capacitor portion 222 is formed on the first channel P1, and the second capacitor portion 222 has a third end 222a, a fourth end 222b, at least ~ Third section 222c, at least one fourth section A0101 Page 8 / Total 17 pages 1012 042573-0 M441920

222d及至少一第二通道P2,該第二通道P2係連通該第一 通道P1,該第一電容部221係位於該第二通道P2且該第一 端221a係對應於該第三端222a,該第二端221b係對應於 該第四端222b,該第一端221 a係連接該第一接點212a, 該第三瑞222a係連接該第二接點212b,第四實施例與第 三實施例不同處在於該具立體電容之承載器結構200係另 包含有該絕緣層230,該絕緣層230係形成於該第一通道 P1及該第二通道P2,且該絕緣層230係為S形,該絕緣層 230之材質係可選自於聚亞醯胺(Polyimide,PI)、 苯並環丁稀(Benzocyclobutene,BCB)、ink、封膠 體(molding compound)或底部填充膠(underfill )°222d and at least one second channel P2, the second channel P2 is connected to the first channel P1, the first capacitor portion 221 is located in the second channel P2 and the first end 221a corresponds to the third end 222a. The second end 221b corresponds to the fourth end 222b, the first end 221a is connected to the first contact 212a, and the third 222a is connected to the second contact 212b, the fourth embodiment and the third The embodiment is different in that the carrier structure 200 having a three-dimensional capacitance further includes the insulating layer 230. The insulating layer 230 is formed on the first channel P1 and the second channel P2, and the insulating layer 230 is S. The material of the insulating layer 230 may be selected from polyimide (PI), Benzocyclobutene (BCB), ink, molding compound or underfill.

請再參閱第1、2、3及4圖,由於該具立體電容之承 載器結構100、200中該立體電容120、220係與該線路層 112、212藉由重分佈線路層之技術一體成型,且該立體 電容120、220係由二極性相反的金屬之間夾有空氣而成 ,因此減少SMT被動元件生產線與封裝之成本,且不需擔 心寄生電容大幅增加及點缺陷而造成漏電之問題,可大 幅提高良率及減少量測成本。 本創作之保護範圍當視後附之申請專利範圍所界定 者為準,任何熟知此項技藝者,在不脫離本創作之精神 和範圍内所作之任何變化與修改,均屬於本創作之保護 範圍。 【圖式簡單說明】 [0005] 第1圖:依據本創作之第一實施例,一種具立體電容之承 載器結構之立體圖。 1()121323f單編號A0101 第9頁/共Π頁 1012042573-0 M441920 第2圖‘依據本創作之第二實施例,另_種具立體電容之 承載器結構之立體圖》 第3圖:依據本創作之第三實施例,另—種具立體電容之 承載器結構之立链圖。 第4圖:依據本創作之第四實施例,另一種具立體電容之 承載器結構之立遒圖。 【主要元件符號說明】 [0006] 100具立體電容之承載器結構 110基板 111表面 112線路層 112a第一接點 112b第二接點 120立體電容 121第一電容部 121 a第一端 121b第二端 121 c第一區段 121d第二區段 122第二電容部 122a第三端 122b第四端 122c第三區段 122d第四區段 130絕緣層 200具立體電容之承載器結構 210基板 211表面 212線路層 212a第一接點 212b第二接點 220立體電容 221第一電容部 2 21 a第一端 221b第二端 221c第一區段 221d第二區段 222第二電容邹 222a第三端 222b第四端 第10頁 222d第四區 /共17頁Please refer to the figures 1, 2, 3 and 4 again, because the three-dimensional capacitors 120 and 220 in the three-capacitor carrier structure 100 and 200 and the circuit layers 112 and 212 are integrally formed by the technology of the redistribution circuit layer. And the three-dimensional capacitors 120 and 220 are formed by air between the opposite polarity metals, thereby reducing the cost of the SMT passive component production line and the package, and there is no need to worry about the parasitic capacitance increasing and the point defects causing leakage. Can greatly increase yield and reduce measurement costs. The scope of protection of this creation is subject to the definition of the scope of the patent application, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of this creation are within the scope of protection of this creation. . BRIEF DESCRIPTION OF THE DRAWINGS [0005] Fig. 1 is a perspective view showing a structure of a carrier having a three-dimensional capacitance according to a first embodiment of the present invention. 1()121323f单单A0101 Page 9/Total page 1012042573-0 M441920 Fig. 2 'A perspective view of a carrier structure with a three-dimensional capacitor according to the second embodiment of the present invention>> Fig. 3: According to the present The third embodiment of the creation, another vertical chain diagram of the carrier structure with a stereo capacitor. Fig. 4 is a perspective view showing another structure of a carrier having a three-dimensional capacitance in accordance with a fourth embodiment of the present invention. [Main component symbol description] [0006] 100 stereo capacitor carrier structure 110 substrate 111 surface 112 circuit layer 112a first contact 112b second contact 120 stereo capacitor 121 first capacitor portion 121 a first end 121b second End 121 c first section 121d second section 122 second capacitor portion 122a third end 122b fourth end 122c third section 122d fourth section 130 insulation layer 200 with a three-dimensional capacitance carrier structure 210 substrate 211 surface 212 circuit layer 212a first contact 212b second contact 220 stereo capacitor 221 first capacitor portion 2 21 a first end 221b second end 221c first segment 221d second segment 222 second capacitor 222a third end 222b fourth end page 10 222d fourth district / a total of 17 pages

222c第三區段 10121323^單编號· A0101 1012042573-0 M441920 230 絕緣層 D1 D2 第二間距 D3 D4 第四間距 P1 P2 第二通道 T1 T2 第二厚度 T3 第一間距 第三間距 第一通道 第一厚度 第三厚度222c third section 10121323^single number·A0101 1012042573-0 M441920 230 insulation layer D1 D2 second pitch D3 D4 fourth pitch P1 P2 second channel T1 T2 second thickness T3 first pitch third pitch first channel a thickness of the third thickness

1〇12132#單編號 A0101 第11頁/共17頁 1012042573-01〇12132#单号 A0101 Page 11 of 17 1012042573-0

Claims (1)

M441920 六、申請專利範圍: 1 . 一種具立體電容之承載器結構,其至少包含: 一基板,其係具有一表面及至少一線路層,該線路層係 形成於該表面,且該線路層係具有至少一第一接點及至少 一第二接點;以及 至少一立體電容,其係與該基板之該線路層一體成型且 該立體電容及該線路層係為相同材質,該立體電容係具有 一第一電容部及一與該第一電容部極性相反之第二電容部 ,該第一電容部係具有一第一端、一第二端、至少一第一 區段、至少一連接該第一區段之第二區段及至少一位於該 第一區段及該第二區段之間的第一通道,該第二電容部係 形成於該第一通道,且該第二電容部係具有一第三端、一 第四端、至少一第三區段、至少一連接該第三區段之第四 區段及至少一位於該第三區段及該第四區段之間的第二通 道,該第二通道係連通該第一通道,該第一電容部係位於 該第二通道且該第一端係對應於該第三端,該第一端係連 接該第一接點,該第三端係連接該第二接點。 2. 如申請專利範圍第1項所述之具立體電容之承載器結構, 其中該第一區段及該第三區段之間係具有一第一間距,該 第三區段及該第二區段之間係具有一第二間距,該第四區 段及該第二區段之間係具有一第三間距。 3. 如申請專利範圍第2項所述之具立體電容之承載器結構, 其中該第一間距係等於該第二間距。 4. 如申請專利範圍第1項所述之具立體電容之承載器結構, 其另包含有一絕緣層,該絕緣層係形成於該第一通道及該 第二通道,且該絕缘層係為嫘旋形。 1()121323f單編號A0101 第12頁/共17頁 1012042573-0 如申請專利範圍第1項所述之具立體電容之承載器結構, 其另包含有一絕緣層,該絕緣層係形成於該第一通道及該 第二通道,且該絕緣層係為s形。 β •如申請專利範圍第1項所述之具立體電容之承载器結構, 其中該線路層係具有一第一厚度,該第一電容部係具有— 第二厚度,該第二電容部係具有一第三厚度,該第二厚度 及該第三厚度係不小於該第一厚度。 γ •如申請專利範圍第1項所述之具立體電容之承載器結構, 其中該立體電容係為梳狀。 〇 .如申請專利範圍第1項所述之具立體電容之承載器結構, 其中該立體電容係為螺旋狀。 9 .如申請專利範圍第6項所述之具立體電容之承載器結構, 其中該第二厚度及該第三厚度係為相同。 10 .如申請專利範圍第2項所述之具立體電容之承載器結構, 其中該第一區段及該第四區段之間.係具有一第四間距,且 該第三間距係等於該第四間距。 11 .如申請專利範圍第2項所述之具立體電容之承載器結構, 其中該第三間距係等於該第一間距。 12 .如申請專利範圍第1項所述之具立體電容之承載器結構, 其中該線路層之材質係為銅。 13 .如申請專利範圍第4或5項所述之具立體電容之承载器結構 ,其中該絕緣層之材質係可選自於聚亞醯胺( Polyimide,ΡΙ)、苯並環丁烯(Benzocyclobutene, BCB)、ink、封夥體(molding compound)或底部填 充膠(underf i 11 )。 10121323#單編號 A0101 第13頁/共17頁 1012042573-0M441920 VI. Patent application scope: 1. A carrier structure having a three-dimensional capacitor, comprising at least: a substrate having a surface and at least one circuit layer, the circuit layer is formed on the surface, and the circuit layer is Having at least one first contact and at least one second contact; and at least one three-dimensional capacitor integrally formed with the circuit layer of the substrate, and the three-dimensional capacitor and the circuit layer are the same material, and the three-dimensional capacitor has a first capacitor portion and a second capacitor portion having a polarity opposite to the first capacitor portion, the first capacitor portion having a first end, a second end, at least one first segment, and at least one connection a second section of a section and at least one first channel between the first section and the second section, the second capacitor portion is formed in the first channel, and the second capacitor portion is The first end of the third section and the fourth section Two channels, the second channel is connected to the first Channel, the first capacitor portion located at the second line and the first end of the channel system corresponding to the third terminal, the first terminal connected to the first contact line, the third terminal connected to the second contact line. 2. The carrier structure having a three-dimensional capacitor according to claim 1, wherein the first section and the third section have a first spacing, the third section and the second There is a second spacing between the segments, and a third spacing between the fourth segments and the second segments. 3. The carrier structure with a three-dimensional capacitor as described in claim 2, wherein the first pitch is equal to the second pitch. 4. The carrier structure with a three-dimensional capacitor according to claim 1, further comprising an insulating layer formed on the first channel and the second channel, and the insulating layer is 嫘Spin shape. 1()121323f单单号A0101, page 12/17 of 1012042573-0, the carrier structure of the three-dimensional capacitor of claim 1, further comprising an insulating layer formed on the first a channel and the second channel, and the insulating layer is s-shaped. The carrier structure having a three-dimensional capacitor as described in claim 1, wherein the circuit layer has a first thickness, the first capacitor portion has a second thickness, and the second capacitor portion has a third thickness, the second thickness and the third thickness are not less than the first thickness. γ • A carrier structure having a three-dimensional capacitor as described in claim 1 wherein the three-dimensional capacitor is a comb. The carrier structure having a three-dimensional capacitor as described in claim 1, wherein the three-dimensional capacitor is spiral. 9. The carrier structure having a three-dimensional capacitor according to claim 6, wherein the second thickness and the third thickness are the same. 10. The carrier structure having a three-dimensional capacitor according to claim 2, wherein the first segment and the fourth segment have a fourth pitch, and the third pitch is equal to the Fourth spacing. 11. The carrier structure having a three-dimensional capacitor according to claim 2, wherein the third pitch is equal to the first pitch. 12. The carrier structure having a three-dimensional capacitor according to claim 1, wherein the circuit layer is made of copper. 13. The carrier structure having a three-dimensional capacitor according to claim 4 or 5, wherein the material of the insulating layer is selected from the group consisting of polyimide (polyimide) and benzocyclobutene (Benzocyclobutene). , BCB), ink, molding compound or underfill (underf i 11 ). 10121323#单号 A0101 Page 13 of 17 1012042573-0
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