M326698 八、新型說明： 【新型所屬之技術領域】 本創作係有關一種半導體封裝體堆豐結構，特別是一種可減 少堆疊高度之半導體封裝體堆疊結構。 【先前技術】 按，半導體科技隨著電腦與網路通訊等產品功能急速提昇， 必需具備多元化、可攜性與輕薄微小化之需求，使晶片封裝業必 須朝高功率、高密度、輕、薄與微小化等高精密度製程發展，除 此之外，電子封裝（Electronics Packaging)仍需具備高可靠度、散 熱性佳等特性，以作為傳遞訊號、電能，以及提供良好的散熱途 徑及結構保護與支持等作用。 # 立體式封裝目前大致有兩種方式，分別是封裝上封裝(package 〇n Package ’ P〇P)以及封裝内封裝(Package in Package，pip)。p〇p 是一種很典 型的3D封裝，將兩個獨立封裝完成的封裝體以製程技術加以堆疊。而妳 則是將-個單獨且未上錫球的封裝體藉由—個間隔件至晶片 上，再一起進行封膠的封裝。其中，p〇p藉由獨立的兩個封裝體經封裝與 測試後再以表面輯方式疊合，可減少製程風險，進而提高產品良率。 。月參考第1A圖及第1B圖，第1A圖及第1B圖係為習知一種p0p 封裝體結構之讀示；|圖及其剖視圖，餘兩雌體1G、2G載板之電性 連接處設置印刷電路板間隔件(幽ed circuit b〇ard印繼，pCB 並利用表祕紐術(SUIfaee mGunt tedinGlGgy，SMT)將兩封裝體i 溶接-起。由於，PCB間隔件30上之導電端子32係須與封裝體1〇、2〇 載板上之端子12、22呈-對-設置，故，除了有準销位外，材質間連 接不良也是-問題。另外，在加熱過程中，因不同材料間之熱膨脹係數不 5斤引（的4曲(warpage)現象，連接不良更可能導致爆板(ρ〇ρ〇〇『η)現象。 5 M326698 、種f知堆疊結構係利用插接件4〇、42插設於封裝體 # 〇上並利用各插接件40、42相互電性連接以形成堆疊結構， =第1C圖所示。當將封裝體1〇、2〇設置於一母板6〇上時，必 而透過另一連接器5〇再電連接於母板6〇上。如 20與母板60間會形成一間隙^ f破肢 【新型内容】 田為了解決上述問題，本創作目的之—係提供—種半導體 接以錢倒餘鍊雜冑上麟雜他雖體電性連 ，了達到上述目的’本創作一實施例之半導體封裝體堆最牡 導電二：:：ί裝體，係具有一載板、一封裝膠體與複:: 子’其中導電端子係設置於載板之上表面且封 =部份載板並暴露出導電端子；兩座件，每—座件係具有—帝遠二 構”-容置槽’其中電連結構係與導電端子電性連接且容置:連、、 的頂面;一第二封裝體，係具有一載板，其中複數個導:: ，叹置於載板之上表面與下表面；以及兩第一插接件， 電、 第=封裝體之餘上並與第二封裝體上之導電端子電性連接持於 :每一第一插接件具有一凸部且凸部係相對插設於每一户其 容置槽以電性連接第一封裝體與第二封裝體。 主牛之 以下藉由具體實施例配合所附的圖式詳加說明，當 解本創作之目的、技術内容、特點及其所達成之功效。4易瞭 【實施方式】 其詳細說明如下，所述較佳實施例僅做一說明， 本創作。 F用从限^ M326698 首先’請先參考第2A圖至第2H-1圖，第2A圖至第2H-1 圖分別為本創作之一實施例之半導體封裝體結構之組裝結構側 視圖。請先參考第2A圖，一第一封裝體100，其係具有一載板 102 ’其中複數個導電端子110設置於載板102之上表面103且 一封裝膠體120係覆蓋部份載板102並暴露出導電端子110。於 一實施例中’封裴體1〇〇中更包括一晶片（圖中未示），設置於載板102上 =及複數個導電連接件(圖中未示），係電性連接載板102與晶片；其中封 裝膠體120’覆蓋晶片、導電連接件及部份載板102並暴露出導電端子110。 接下來’參考第2B圖’兩座件13 0，可沿如圖式中所示之 虛線方向與第一封裝體1〇〇結合，每一座件130係具有一電連結構(圖 中未示)與一容置槽132,其中電連結構係可與第一封裝體10〇上的導 電端子no電性連接，且容置槽132係形成於每一座件13〇的頂面m。 於一實施例中，容置槽132可以是貫穿座件130頂面131的通孔； 也可以疋由頂面131向下凹陷的凹槽，其並不限於圖中所繪示。 於又一實施例中，座件130可為連接器。當兩座件13〇與第一封 I體100結合後如第2C圖所示，兩座件130可利用適當方式與 第封I體結合，並利用座件130内的電連結構，例如端子， 與第一封裝體1〇〇上的導電端子110電氣導通。 接著，請參考第2D圖，一第二封裝體2〇〇，其係具有一載 板202,其中複數個導電端子210設置於載板2〇2之上表面2〇3 與下表面204，於此實施例中，導電端子21〇係分布於載板2〇2 相對的兩側，但可以理解的是，其導電端子21〇之分布端賴載板 2〇2設計，其並不限於圖中所繪示。於一實施例中，封裝體2〇〇中包 括晶片（圖中未示）’設置於載板202上；複數個導電連接件(圖中未示）， 係電性連接載板202與晶片；以及一封裝膠體220，覆蓋晶片、導電連接 件及部份載板202並暴露出導電端子210。 接下來，如第2E圖所示，兩第一插接件230分別夾持於載 板202上並電性連接導電端子210，其中第一插接件23〇上具有 7 M326698 一凸部234。於一實施例中，第一插接件23〇可以是連接器。當 第一插接件230與第二封裝體200結合後之圖式如第2F圖所示， 各第一插接件230分別夾持於第二封裝體2〇〇上，並與其電性連 接。最後，第2G圖及第2H-1圖說明第一封裝體1〇〇與第二封裝 體200的結合示意圖。如圖所示，第二封裝體2〇〇利用第一插接 件230上的凸部234相對應插設於座件13〇的容置槽132内以堆 疊第一封裝體100與第二封裝體200。於一實施例中，座件13〇 上更包括至少一固定凸塊134凸出座件130底面以固持座件13〇 於一母板150上。M326698 VIII. New Description: [New Technology Field] This creation is about a semiconductor package stacking structure, especially a semiconductor package stack structure that can reduce the stack height. [Prior Art] According to the rapid improvement of the functions of computer and network communication products, semiconductor technology must be diversified, portable and light and small, so that the chip packaging industry must be high-power, high-density, light, In addition to the development of high-precision processes such as thinness and miniaturization, Electronics Packaging still needs to have high reliability and good heat dissipation characteristics to transmit signals, power, and provide good heat dissipation paths and structures. Protection and support. # Stereoscopic packages are currently available in two ways, namely package 〇n Package ’ P〇P and Package in Package (pip). P〇p is a very typical 3D package that combines two individually packaged packages in a process technology. The 妳 is to package a single package that is not soldered onto the wafer by a spacer to the package. Among them, p〇p is packaged and tested by two independent packages, and then stacked in a surface pattern, which can reduce the process risk and improve the product yield. . Referring to FIG. 1A and FIG. 1B, FIG. 1A and FIG. 1B are readings of a conventional p0p package structure; FIG. and its cross-sectional view, electrical connection of the remaining two female 1G, 2G carrier plates Set the printed circuit board spacers (pCB and use the SUIfaee mGunt tedinGlGgy, SMT) to fuse the two packages i. Because the conductive terminals 32 on the PCB spacers 30 It must be set-to-pair with the terminals 12 and 22 on the carrier 1〇, 2〇 carrier board. Therefore, in addition to the alignment pin position, the poor connection between the materials is also a problem. In addition, during the heating process, it is different. The thermal expansion coefficient between the materials is not 5 pounds (the warpage phenomenon), the connection failure is more likely to cause the explosion plate (ρ〇ρ〇〇『η) phenomenon. 5 M326698, the species knows the stack structure uses the connector 4 〇, 42 is inserted in the package #〇 and electrically connected to each other by using the connectors 40, 42 to form a stacked structure, as shown in Fig. 1C. When the package 1〇, 2〇 is set on a motherboard When 6 is up, it must be electrically connected to the motherboard 6 through another connector 5, such as a gap between 20 and the motherboard 60. Muscle-breaking [new content] In order to solve the above problems, the purpose of this creation is to provide a kind of semiconductor, which is connected with the money, and the other is a physical connection. The semiconductor package body has the most conductive::: ί package, which has a carrier plate, a package of colloids and a complex:: sub', wherein the conductive terminals are disposed on the upper surface of the carrier and the sealing = part carrier Exposing the conductive terminal; the two-piece member, each of the seat members has a "Diyuan two-structure"-accommodating groove, wherein the electrical connection structure is electrically connected to the conductive terminal and accommodates: the top surface of the connection; The second package has a carrier board, wherein the plurality of leads:: sighs on the upper surface and the lower surface of the carrier; and the two first connectors, the second and the second package, and the second The conductive terminals on the package are electrically connected to each other: each of the first connectors has a convex portion and the convex portions are oppositely inserted into the receiving slots of each of the households to electrically connect the first package and the second package The following is explained in detail by the specific embodiment with the accompanying drawings. Purpose, technical content, characteristics and the effect achieved. 4Easy [Embodiment] The detailed description is as follows, the preferred embodiment only makes a description, the creation. F uses the limit ^ M326698 first 'please refer first 2A to 2H-1, and 2A to 2H-1 are respectively side views of the assembled structure of the semiconductor package structure of one embodiment of the present invention. Please refer to FIG. 2A first, a first package 100, which has a carrier 102' in which a plurality of conductive terminals 110 are disposed on the upper surface 103 of the carrier 102 and an encapsulant 120 covers a portion of the carrier 102 and exposes the conductive terminals 110. In one embodiment, the package body 1 更 further includes a wafer (not shown) disposed on the carrier board 102 and a plurality of conductive connectors (not shown) for electrically connecting the carrier board 102 and a wafer; wherein the encapsulant 120' covers the wafer, the conductive connection and a portion of the carrier 102 and exposes the conductive terminal 110. Next, referring to FIG. 2B, the two-piece member 130 can be combined with the first package body 1 in the direction of the dotted line as shown in the figure, and each of the members 130 has an electrical connection structure (not shown). And an accommodating groove 132, wherein the electrical connection structure is electrically connected to the conductive terminal no on the first package body 10, and the accommodating groove 132 is formed on the top surface m of each of the seat members 13A. In one embodiment, the receiving groove 132 may be a through hole penetrating through the top surface 131 of the seat member 130; or a groove recessed downward from the top surface 131 may be used, which is not limited to the drawing. In yet another embodiment, the seat member 130 can be a connector. When the two pieces 13〇 are combined with the first sealing body 100, as shown in FIG. 2C, the two pieces 130 can be combined with the first sealing body by a suitable means, and the electrical connection structure in the seat 130, such as a terminal, is utilized. And electrically conducting with the conductive terminal 110 on the first package body 1 . Next, please refer to FIG. 2D, a second package body 2B, which has a carrier 202, wherein a plurality of conductive terminals 210 are disposed on the upper surface 2〇3 and the lower surface 204 of the carrier 2〇2, In this embodiment, the conductive terminals 21 are distributed on opposite sides of the carrier 2〇2, but it can be understood that the distribution of the conductive terminals 21〇 is designed by the carrier 2〇2, which is not limited to the figure. Drawn. In one embodiment, the package 2 includes a wafer (not shown) disposed on the carrier 202; a plurality of conductive connectors (not shown) electrically connecting the carrier 202 and the wafer; And an encapsulant 220 covering the wafer, the conductive connection and the partial carrier 202 and exposing the conductive terminal 210. Next, as shown in FIG. 2E, the two first connectors 230 are respectively clamped on the carrier 202 and electrically connected to the conductive terminals 210. The first connectors 23 have a protrusion 234 of 7 M326698. In an embodiment, the first connector 23A can be a connector. When the first connector 230 is combined with the second package 200, as shown in FIG. 2F, each of the first connectors 230 is respectively clamped on the second package 2 and electrically connected thereto. . Finally, the 2G and 2H-1 diagrams illustrate the combination of the first package 1A and the second package 200. As shown in the figure, the second package body 2 is inserted into the receiving groove 132 of the seat member 13〇 by the protrusion 234 of the first connector 230 to stack the first package 100 and the second package. Body 200. In one embodiment, the seat member 13b further includes at least one fixing protrusion 134 protruding from the bottom surface of the seat member 130 to hold the seat member 13 on a motherboard 150.
接續上述，於又一實施例中，如第2Η-2圖所示，為可更有 效縮減封裝體堆疊後的高度，座件13〇上可形成一如階梯狀的承 ，部136用以設置第一封裝體1〇〇的載板1〇2，承載部的用 意係可讓載板102的下表面1〇4差不多與座件13〇的底面133齊 平，可更有效使用空間縮減堆疊高度。此外，座件13〇上更可包 括至少一烊片14〇以便將堆疊結構焊接並固定於母板15〇上。 請參考第3Α圖及第3Β圖，第3Α圖及第3Β圖為本創作不 同實施例之結構側視圖。如第3Α圖所示，其與上述實施例不同 之處在於，於此實施例中座件13〇的頂面131係朝向第一封裝體 =〇的上表面103 ;亦即，第一封裝體1〇〇係倒置炎與各座件13〇 電性連接，此結構亦可減少第一封裝體1〇〇與母板150之間的距 離。，於又一實施例中，如第3Β圖所示，座件13〇上可形成一如 仏匕梯狀的承載部136用以設置第—封裝體⑽的載板iG2以縮減 堆疊高度。 雕产再來’於又-實施例中，請參考第4目，為< 重複堆疊封裝 版第插接件230上更包括一凹部232與其凸部234呈相對位 置設置，此時，封裝結構係可利用其上之凹部232及凸部234再 =他具㈣結構之㈣體或具有搭配結構之封裝體進行卡合 4、幵成堆$結構。如圖所示，第三封装體3〇〇係可搭配第二 8 M326698 插接件330以堆疊並電性連接於第二封裝體2〇〇上，其中第二插 接件330上之凸部334係相對插設於第一插接件23〇之凹部2幻上以電 性連接第二封褒體200與第三封裝體3〇〇。於一實施例中，各封裝體(如封 裝體100、2〇〇、3〇0)可為相同結構之封裝體，此外，各插接維插接件 230、330)亦可為相同結構之插接件，但可以理解的是，其並不限於此， 即使結構不_，只要插接件上具有可搭配之凹部及凸部，亦可形成堆疊 綜合上述，本創作係提供一種半導體封裝體堆疊結 =倒置於餅連妓上後顯其他封龍雜連接叫鱗低堆^ 度。此外，利用連接器做為電性連接結構，可有效解決表面 題。更者，可堆疊連接餘代制料 僅 ，易封裝體载她曲之問題亦可同時改善以提高產品 矛、了提间產吕賴度之外，因其製程簡易，亦可降低生產成本。又 、所述之實施例僅係為說明本創作之技術思想及特點1 :當在m項=:人以_解本創作-容並據以實 ;精神所作之均等變化或修飾，仍應涵蓋在本創作 【圖式簡單說明】 第 圖 1A圖及弟1B圖係為習知之p〇p 封裝體結構之立體讀圖及其剖視 第ic圖係為習知之封裝體結構之側視圖。 f 2A圖、第2B圖、第％圖、第扣圖 弟2G圖與第2H」圖分 圖苐2F圖、 結構之側視圖。為本創作之—實施例之半導體封裝體 M326698 第2H-2圖為本創作之又一實施例之半導體封裝體結構之側視 圖。 第3A圖及第3B圖為本創作之不同實施例之半導體封裝體結構 之側視圖。 第4圖為本創作之再一實施例之半導體封裝體結構之側視圖。In the following, in another embodiment, as shown in FIG. 2-2, in order to more effectively reduce the height of the package after stacking, a seat such as a step can be formed on the seat member 13 and the portion 136 is configured to be disposed. The carrier board 1〇2 of the first package body 1 is intended to allow the lower surface 1〇4 of the carrier board 102 to be almost flush with the bottom surface 133 of the seat member 13〇, which can more effectively use the space to reduce the stack height. . In addition, the seat member 13 may further include at least one cymbal 14 〇 for welding and fixing the stacked structure to the mother board 15 。. Please refer to Figures 3 and 3, and Figures 3 and 3 are side views of the structure of the different embodiments of the present invention. As shown in FIG. 3 , the difference from the above embodiment is that the top surface 131 of the seat member 13 朝向 faces the upper surface 103 of the first package body 〇 in this embodiment; that is, the first package body. The 〇〇 倒 inverted inflammation is electrically connected to each of the pieces 13 , , and the structure can also reduce the distance between the first package 1 〇〇 and the motherboard 150 . In still another embodiment, as shown in FIG. 3, the seat member 13A can be formed with a ladder-like carrying portion 136 for arranging the carrier plate iG2 of the first package (10) to reduce the stack height. In the embodiment, please refer to the fourth item, for the <repeated stacked package version of the connector 230 further including a concave portion 232 and its convex portion 234 in a relative position setting, at this time, the package structure The recessed portion 232 and the convex portion 234 and the (four) body or the package having the matching structure can be used for the engagement 4 and the stacking structure. As shown in the figure, the third package 3 can be connected to the second 8 M326698 connector 330 to be stacked and electrically connected to the second package 2, wherein the protrusion on the second connector 330 The 334 is oppositely inserted into the recess 2 of the first connector 23〇 to electrically connect the second sealing body 200 and the third package 3〇〇. In one embodiment, each package (such as the package 100, 2〇〇, 3〇0) may be a package of the same structure, and the plug connectors 230, 330) may also have the same structure. The connector, but it can be understood that it is not limited to this, even if the structure is not, as long as the connector has a recess and a convex portion that can be matched, the stack can be formed. The present invention provides a semiconductor package. Stacking knot = after being placed on the cake, the other seals are connected to the scale and the pile is low. In addition, the use of the connector as an electrical connection structure can effectively solve the surface problem. In addition, the stacking can be connected to the rest of the material. Only the problem of the package can be improved at the same time to improve the product. In addition to the production of spears and the production of Lu Lai, the production process is simple and the production cost can be reduced. Moreover, the embodiments described are merely illustrative of the technical ideas and features of the present invention: 1 when the m item =: the person _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ In this creation [Simplified illustration of the drawings] FIG. 1A and FIG. 1B are perspective views of a conventional p〇p package structure and a cross-sectional view thereof, which is a side view of a conventional package structure. f 2A diagram, 2B diagram, % diagram, and button diagram 2G diagram and 2H diagram diagram Fig. 2F diagram, side view of the structure. The present invention is a semiconductor package M326698. FIG. 2H-2 is a side view of the semiconductor package structure of still another embodiment of the present invention. 3A and 3B are side views of the semiconductor package structure of the different embodiments of the present invention. Fig. 4 is a side view showing the structure of a semiconductor package of still another embodiment of the present invention.
【主要元件符號說明】 10,20, 100,200 封裝體 12, 22, 32 端子 30 印刷電路板間隔件 102,202 載板 103 上表面 104 下表面 110,210 導電端子 120, 220 封裝膠體 130 座件 131 頂面 132 容置槽 133 底面 134 固定凸塊 136 承載部 230, 330 插接件 M326698 232, 332 234,334 140 150 凹部 凸部 焊片 母板[Main component symbol description] 10,20, 100,200 Package 12, 22, 32 Terminal 30 Printed circuit board spacer 102, 202 Carrier 103 Upper surface 104 Lower surface 110, 210 Conductive terminal 120, 220 Package colloid 130 Seat 131 Top surface 132 Groove 133 bottom surface 134 fixing lug 136 bearing portion 230, 330 connector M326698 232, 332 234, 334 140 150 concave convex soldering mother board
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