TWI837848B - Polishing pad and polishing equipment for polishing silicon wafers - Google Patents

Abstract

The embodiment of the present invention discloses a polishing pad and a polishing device for polishing a silicon wafer. The upper surface of the polishing pad includes: a first annular region adjacent to the circumferential edge of the polishing pad; a second annular region close to the center of the polishing pad; a third annular region located between the first annular region and the second annular region in the radial direction of the polishing pad, and the first annular region, the second annular region and the third annular region are cocircular with the polishing pad. wherein the third annular region is formed with a plurality of straight grooves extending in a radial direction and a plurality of annular grooves intersecting with the plurality of straight grooves and having a cocentricity with the polishing pad, and the first annular region and the second annular region are formed with a plurality of arcuate grooves extending in a radial direction, so that during the polishing process, the polishing liquid flows on the first annular region and the second annular region at a speed greater than that on the third annular region.

Description

A polishing pad and a polishing device for polishing a silicon wafer

The present invention belongs to the field of semiconductor manufacturing technology, and in particular relates to a polishing pad and polishing equipment for polishing silicon wafers.

Polishing is an important process in the silicon wafer manufacturing process. During the polishing operation on the silicon wafer surface, the polishing liquid is sprayed on the silicon wafer surface while the silicon wafer is rotated relative to the polishing pad, and a certain pressure is applied to the silicon wafer to make it against the polishing pad. In this process, the polishing is completed through the dual effects of chemical corrosion and mechanical polishing to remove the damaged layer on the silicon wafer surface and obtain a silicon wafer with high surface quality.

Double-sided polishing is one of the commonly used polishing technologies in related technologies. In the process of double-sided polishing, the polishing pad mainly plays the role of storing and transporting polishing liquid, removing processing residual materials, transmitting mechanical loads and maintaining the polishing environment. Therefore, the choice of polishing pad is an important factor affecting the quality of polishing. In order to continuously supply polishing liquid to the polishing surface and quickly remove the debris generated by polishing, grooves of various shapes need to be designed on the surface of the polishing pad. However, for the current double-sided polishing technology, due to the influence of factors such as centrifugal force and silicon wafer polishing trajectory, the polishing removal amount of different areas on the same silicon wafer surface is often inconsistent, which leads to the deterioration of the flatness of the silicon wafer surface.

In view of this, the embodiment of the present invention is intended to provide a polishing pad and a polishing device for polishing a silicon wafer, which can provide different polishing removal amounts for different areas of the silicon wafer, thereby improving the quality of the planarization of the silicon wafer.

The technical solution of the present invention is implemented as follows:

In a first aspect, an embodiment of the present invention provides a polishing pad for polishing a silicon wafer, wherein the upper surface of the polishing pad comprises: a first annular region adjacent to the circumferential edge of the polishing pad; a second annular region close to the center of the polishing pad; a third annular region located between the first annular region and the second annular region in the radial direction of the polishing pad, wherein the first annular region, the second annular region and the third annular region are cocircular with the polishing pad. The third annular region is formed with a plurality of straight grooves extending along the radial direction and a plurality of annular grooves intersecting with the plurality of straight grooves and co-centered with the polishing pad, and the first annular region and the second annular region are formed with a plurality of arc grooves extending along the radial direction, so that during the polishing process, the polishing liquid flows on the first annular region and the second annular region at a speed greater than that on the third annular region.

In a second aspect, an embodiment of the present invention provides a polishing device, which includes: a silicon wafer carrier having a first outer tooth, the silicon wafer carrier is used to carry a silicon wafer; an inner gear ring having a second outer tooth, wherein the first outer tooth of the silicon wafer carrier is engaged with the second outer tooth of the inner gear ring; an outer gear ring having an inner tooth, wherein the first outer tooth of the silicon wafer carrier is also engaged with the inner tooth of the outer gear ring; an upper plate located above the upper polishing pad and a lower plate located above the lower polishing pad; A lower plate below the light pad, the upper plate and the lower plate are used to provide pressure toward each other to press the upper polishing pad to the upper surface of the silicon wafer and the lower polishing pad to the lower surface of the silicon wafer, wherein the lower polishing pad is the polishing pad according to the first aspect; a polishing liquid injection channel provided in the upper plate for injecting polishing liquid into the upper polishing pad, wherein the polishing liquid passes through the silicon wafer carrier after being injected into the upper polishing pad to reach the lower polishing pad.

The embodiment of the present invention provides a polishing pad and a polishing device for polishing a silicon wafer; the surface of the polishing pad can be divided into three annular areas with the same center as the polishing pad, and different groove patterns are arranged on the three annular areas, wherein a plurality of arc grooves extending in the radial direction arranged on the first annular area adjacent to the circumferential edge of the polishing pad and the second annular area close to the center of the polishing pad can accelerate the speed of the polishing liquid being transmitted outward in the radial direction under the action of the centrifugal force, and a plurality of arc grooves extending in the radial direction on the third annular area located between the first annular area and the second annular area in the radial direction can accelerate the speed of the polishing liquid being transmitted outward in the radial direction under the action of the centrifugal force. A plurality of linear grooves and a plurality of annular grooves intersecting each other are provided, which can effectively slow down the flow speed of the polishing liquid on the third annular area, that is, increase the residence time of the polishing liquid on the third annular area. Therefore, in the polishing operation, by making the flow speed of the polishing liquid on different areas of the same polishing pad surface different, different polishing removal amounts can be provided for different areas of the same silicon wafer surface, thereby compensating for the inconsistent polishing removal amount originally caused by factors such as centrifugal force and silicon wafer polishing trajectory, improving the uniformity of the polishing liquid flow rate, and thus ensuring a stable polishing rate.

21: First ring area

22: Second ring area

23: The third ring area

1A: Double-sided polishing silicon wafer equipment

2A: Polishing pad

3A: Polishing equipment

10B: Silicon wafer carrier

20A: Inner gear ring

30A: Outer gear ring

40A: Upper plate

50A: Set the plate

60A: Pressure-sensitive adhesive tape layer

70A: Polishing liquid injection pipe

P1: Upper polishing pad

P2: Lower polishing pad

R: Great circle radius

r: small circle radius

W: Silicon wafer

D: Diameter

S1: First predetermined spacing

S2: Second predetermined spacing

G1: Straight groove

G2: Annular groove

G3: Arc groove

FIG1 is a schematic diagram of a device for double-sided polishing of silicon wafers; FIG2 is a top view of a portion of the device for double-sided polishing of silicon wafers; FIG3 is another top view of a portion of the device for double-sided polishing of silicon wafers, which shows the movement trajectory of the silicon wafer carrier and the silicon wafer during the polishing process; FIG4 is a schematic diagram of a polishing pad for polishing a silicon wafer provided in an embodiment of the present invention; FIG5 is a schematic diagram of a polishing device provided in an embodiment of the present invention.

In order to help the review committee understand the technical features, content and advantages of the present invention and the effects it can achieve, the present invention is described in detail as follows with accompanying drawings and appendices in the form of embodiments. The drawings used therein are only for illustration and auxiliary description purposes, and may not be the true proportions and precise configurations after the implementation of the present invention. Therefore, the proportions and configurations of the attached drawings should not be interpreted to limit the scope of application of the present invention in actual implementation.

In the description of the embodiments of the present invention, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the attached drawings, and are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

In the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installation", "connection", "connection", "fixation" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be a connection between two components or an interaction relationship between two components. For those with ordinary knowledge in this field, the specific meanings of the above terms in the embodiments of the present invention can be understood according to the specific circumstances.

The following will combine the attached figures in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention.

Referring to FIG. 1 , a double-sided polishing silicon wafer apparatus 1A is shown. The double-sided polishing silicon wafer apparatus 1A may generally include: a silicon wafer carrier 10B having a first outer tooth (not shown in detail in the attached figure), the silicon wafer carrier 10B being used to carry a silicon wafer W; an inner gear ring 20A having a second outer tooth (not shown in detail in the attached figure), wherein the first outer tooth of the silicon wafer carrier 10B is engaged with the second outer tooth of the inner gear ring 20A; an outer gear ring 30A having an inner tooth (not shown in detail in the attached figure), wherein the first outer tooth of the silicon wafer carrier 10B is also engaged with the inner tooth of the outer gear ring 30A; an upper plate 40 located above an upper polishing pad P1; A and a lower platen 50A located below the lower polishing pad P2, the upper platen 40A and the lower platen 50A are used to provide pressure toward each other to press the upper polishing pad P1 to the upper surface of the silicon wafer W and to press the lower polishing pad P2 to the lower surface of the silicon wafer W, wherein the upper polishing pad P1 and the lower polishing pad P2 are pressed by The adhesive tape layer 60A is respectively glued to the upper platen 40A and the lower platen 50A; the polishing liquid injection pipe 70A is provided in the upper platen 40A for injecting the polishing liquid into the upper polishing pad P1, wherein the polishing liquid passes through the silicon wafer carrier 10B to reach the lower polishing pad P2 after being injected into the upper polishing pad P1.

During the polishing process of the silicon wafer W, the inner gear ring 20A and the outer gear ring 30A rotate at a set speed and direction, so that the silicon wafer carrier 10B and the carried silicon wafer W move together through the engagement between the teeth. At the same time, the upper platen 40A and the lower platen 50A also rotate at a set speed and direction, thereby generating relative movement between the silicon wafer W and the upper polishing pad P1 and the lower polishing pad P2, and the silicon wafer W is polished on both sides through the chemical reaction generated by the polishing liquid and the physical reaction generated by the pressure of the upper and lower platens.

The double-sided polished silicon wafer device 1A may include a plurality of silicon wafer carriers 10B, and each silicon wafer carrier 10B may carry a plurality of silicon wafers W. For example, referring to FIG. 2 , the double-sided polished silicon wafer device 1A may include five silicon wafer carriers 10B, and each silicon wafer carrier 10B may carry three silicon wafers W.

During the process of polishing the silicon wafer W, the movement trajectory of the silicon wafer W and the silicon wafer carrier 10B is shown by the dotted line in Fig. 3. For a single silicon wafer W, it can be seen from its movement trajectory that the movement distance of the edge of the silicon wafer W is greater than the movement distance of the center of the silicon wafer W, which means that under the same processing conditions, the polishing removal amount of the edge of the silicon wafer W is greater than the polishing removal amount of the center of the silicon wafer W. If the lower polishing pad P2 is divided into three concentric annular areas, specifically, as shown in FIG3 , the lower polishing pad P2 is divided into a first annular area 21 adjacent to the edge of the polishing pad, a second annular area 22 close to the center of the polishing pad, and a third annular area 23 located between the first annular area 21 and the second annular area 22 in the radial direction of the lower polishing pad P2, then only the movement trajectory of the edge portion of the silicon wafer W will pass through the first annular area 21, the second annular area 22, and the third annular area 23, while the movement trajectory of the central portion of the silicon wafer W will only pass through the third annular area 23.

In addition, in the actual operation process, the centrifugal force generated by the circular motion of the polishing table 11 will cause the polishing liquid to move outward from the center of the polishing pad. For conventional polishing pads with grooves, the groove pattern on the surface of the polishing pad is often simple, which results in the failure to discharge the polishing waste liquid and waste chips in time. The polishing waste liquid and waste chips that are not discharged in time may be deposited and block the grooves on the surface of the polishing pad, and finally scratch the surface of the silicon wafer. In addition, the grooves on the surface of the polishing pad may also cause uneven distribution and flow of the polishing liquid, resulting in uneven radial distribution of the polishing rate of the polishing pad. In addition, in addition to the influence of the silicon wafer movement trajectory factors described above, the higher polishing liquid flow rate makes it easy for the polishing liquid to gather at the edge of the silicon wafer, which will also cause the edge of the silicon wafer to be over-polished, and the thickness of the edge of the silicon wafer is thinner than the thickness of the center of the silicon wafer.

To solve the above problems, in the first aspect, referring to FIG. 4 , an embodiment of the present invention provides a polishing pad 2A for polishing a silicon wafer, wherein the upper surface of the polishing pad 2A includes: a first annular region 21 adjacent to the circumferential edge of the polishing pad 2A; a second annular region 22 close to the center of the polishing pad 2A; and a third annular region 23 located between the first annular region 21 and the second annular region 22 in the radial direction of the polishing pad 2A. The first annular region 21, the second annular region 22 and the third annular region 23 are 23 is cocentric with the polishing pad 2A; wherein the third annular region 23 is formed with a plurality of straight grooves G1 extending along the radial direction and a plurality of annular grooves G2 intersecting with the plurality of straight grooves G1 and cocentric with the polishing pad, and the first annular region 21 and the second annular region 22 are formed with a plurality of arc grooves G3 extending along the radial direction, so that during the polishing process, the polishing liquid flows on the first annular region 21 and the second annular region 22 at a greater speed than the third annular region 23.

The embodiment of the present invention provides a polishing pad for polishing a silicon wafer; the surface of the polishing pad can be divided into three annular areas with the same center as the polishing pad, and different groove patterns are arranged on the three annular areas, wherein a plurality of arc grooves G3 extending in the radial direction arranged on the first annular area 21 adjacent to the circumferential edge of the polishing pad and the second annular area 22 close to the center of the polishing pad can accelerate the speed of the polishing liquid being transmitted outward in the radial direction under the action of the centrifugal force, and a third annular area 23 located between the first annular area 21 and the second annular area 22 in the radial direction is provided with intersecting grooves G3. The plurality of straight grooves G1 and the plurality of annular grooves G2 can effectively slow down the flow speed of the polishing liquid on the third annular area 23, that is, increase the residence time of the polishing liquid on the third annular area 23. Thus, in the polishing operation, by making the flow speed of the polishing liquid on different areas of the same polishing pad surface different, different polishing removal amounts can be provided to different areas of the same silicon wafer surface, thereby solving the problem that the polishing removal amounts of various areas on the silicon wafer surface are inconsistent due to factors such as centrifugal force and silicon wafer polishing trajectory in the polishing process of related technologies, and ultimately causing the deterioration of the flatness of the silicon wafer surface.

For the area division of the polishing pad, optionally, referring to FIG. 4 , the difference between the large circle radius R and the small circle radius r of the third annular area 23 is smaller than the diameter D of the silicon wafer carrier used to support the silicon wafer.

Through the above analysis of the movement trajectory of the silicon wafer carrier and the silicon wafer during the polishing process, when multiple silicon wafer carriers respectively carry multiple silicon wafers and perform polishing operations on the same polishing pad at the same time, by designing the polishing pad so that the difference between the large circle radius R and the small circle radius r of the third annular area 23, that is, R-r, is smaller than the diameter D of the silicon wafer carrier, during the polishing process, it is only necessary to place the silicon wafer W to be polished on the polishing pad so that the edge of the silicon wafer W is At least a portion of the edge area moves through the first annular area 21 and the second annular area 22 of the polishing pad, and the central area of the silicon wafer W is located in the third annular area 23, thereby providing a larger polishing removal amount for the central part of the silicon wafer through the third annular area 23 to compensate for the polishing of the central area of the silicon wafer, so that the polishing removal amount is more uniform throughout the entire polished surface of the silicon wafer, thereby improving the surface flatness of the silicon wafer.

In order to achieve different polishing removal amounts in different areas of the same polishing pad, optionally, referring to FIG. 4 , within a unit area, the area of the groove surface in the first annular area 21 and the area of the groove surface in the second annular area 22 are respectively smaller than the area of the groove surface in the third annular area 23.

Referring to FIG. 4 , it can be seen by comparison that the density of the grooves in the third annular region 23 is higher than the density of the grooves in the first annular region 21 and the density of the grooves in the second annular region 22. Therefore, within a unit area, the area ratio of the groove surface in the third annular region 23 is greater than the area ratio of the groove surface in the first annular region 21, and also greater than the area ratio of the groove surface in the second annular region 22. During the polishing process, since the polishing liquid carried on the groove surface is in direct contact with the silicon wafer to play a polishing role, the area size of the groove surface within a unit area determines the amount of polishing liquid that can effectively perform the polishing operation. Based on this, under the same other conditions, the polishing removal amount of the silicon wafer by the third annular area 23 will be greater than the polishing removal amount of the silicon wafer by the first annular area 21 and the second annular area 22.

As for the specific arrangement of the grooves, optionally, the multiple arc-shaped grooves G3 in the first annular region 21 and the multiple arc-shaped grooves G3 in the second annular region 22 are evenly spaced along the circumferential direction of the polishing pad, the multiple annular grooves G2 are evenly spaced along the radial direction, and the multiple annular grooves are spaced along the circumferential direction at a predetermined angular spacing.

During the polishing process, the centrifugal force generates a high polishing liquid movement speed, which makes the polishing liquid easily gather at the edge of the polishing pad. Often, only the movement trajectory of the edge of the silicon wafer will pass through the edge of the polishing pad, resulting in the edge of the silicon wafer being over-polished and thinner. To solve this problem, optionally, referring to FIG. 4 , the plurality of arc-shaped grooves G3 in the first annular region 21 are separated by a first predetermined spacing S1, and the plurality of arc-shaped grooves G3 in the second annular region 22 are separated by a second predetermined spacing S2, wherein the first predetermined spacing S1 is greater than the second predetermined spacing S2, so that during the polishing process, the polishing liquid flows on the first annular region 21 at a speed greater than that on the second annular region 22, thereby the polishing liquid will be less concentrated on the first annular region 21.

In order to facilitate the flow of the polishing liquid in the grooves of the polishing pad, optionally, referring to FIG. 4 , the multiple arc-shaped grooves G3 in the first annular area 21 and the multiple arc-shaped grooves G3 in the second annular area 22 can be connected through the multiple linear grooves G1.

For the arrangement of the arc grooves G3, optionally, the multiple arc grooves G3 in the first annular region 21 and the multiple arc grooves G3 in the second annular region 22 have the same depth. More optionally, the depth of the multiple arc grooves G3 in the first annular region 21 and the depth of the multiple arc grooves G3 in the second annular region 22 are both about 1 mm.

In the second aspect, referring to FIG. 5 , the embodiment of the present invention further provides a polishing device 3A, which includes: a wafer carrier 10B having a first outer tooth (not shown in detail in the attached figure), the wafer carrier 10B is used to carry a wafer W; an inner gear ring 20A having a second outer tooth (not shown in detail in the attached figure), wherein the first outer tooth of the wafer carrier 10B is engaged with the second outer tooth of the inner gear ring 20A; an outer gear ring 30A having an inner tooth (not shown in detail in the attached figure), wherein the first outer tooth of the wafer carrier 10B is also engaged with the inner tooth of the outer gear ring 30A; a polishing pad P1 located on the upper polishing pad P1; An upper platen 40A above and a lower platen 50A below the lower polishing pad P2, the upper platen 40A and the lower platen 50A are used to provide pressure toward each other to press the upper polishing pad P1 to the upper surface of the silicon wafer W and to press the lower polishing pad P2 to the lower surface of the silicon wafer W, wherein the lower polishing pad P2 is the polishing pad 2A according to the first aspect; a polishing liquid injection channel 70A provided in the upper platen 40A for injecting polishing liquid into the upper polishing pad P1, wherein the polishing liquid passes through the silicon wafer carrier 10B after being injected into the upper polishing pad P1 to reach the lower polishing pad P2.

Regarding the connection method between the polishing pad and the platen, optionally, the upper polishing pad and the lower polishing pad are glued to the upper platen and the lower platen respectively.

According to an optional embodiment of the present invention, when the polishing device is used to polish a silicon wafer, the silicon wafer carrier is placed on the polishing pad so that the central area of the silicon wafer carrier is located in the third annular area 23 of the polishing pad, and the edge area of the silicon wafer carrier is located in the first annular area 21 and the second annular area 22 of the polishing pad.

It should be noted that the technical solutions described in the embodiments of the present invention can be combined arbitrarily without conflict.

The above is only a preferred embodiment of the present invention and is not intended to limit the scope of implementation of the present invention. If the present invention is modified or replaced by something equivalent without departing from the spirit and scope of the present invention, it shall be covered by the protection scope of the patent application of the present invention.

21: First ring area

22: Second ring area

23: The third ring area

1A: Double-sided polishing silicon wafer equipment

10B: Silicon wafer carrier

P1: Upper polishing pad

P2: Lower polishing pad

W: Silicon wafer

D: Diameter

R: Great circle radius

r: small circle radius

S1: First predetermined spacing

S2: Second predetermined spacing

G1: Straight groove

G2: Annular groove

G3: Arc groove

Claims (9)

A polishing pad for polishing a silicon wafer, the upper surface of the polishing pad comprising: a first annular region adjacent to the circumferential edge of the polishing pad; a second annular region close to the center of the polishing pad; a third annular region located between the first annular region and the second annular region in the radial direction of the polishing pad, the first annular region, the second annular region and the third annular region being cocentric with the polishing pad; wherein the third annular region is formed with a plurality of straight lines extending in the radial direction. The first annular region and the second annular region are formed with a plurality of arc grooves extending along the radial direction, so that during the polishing process, the polishing liquid flows on the first annular region and the second annular region at a speed greater than that on the third annular region; wherein the difference between the large circle radius and the small circle radius of the third annular region is less than the diameter of the silicon wafer carrier for supporting the silicon wafer. A polishing pad for polishing a silicon wafer as described in claim 1, wherein within a unit area, the area of the groove surface in the first annular region and the area of the groove surface in the second annular region are respectively smaller than the area of the groove surface in the third annular region. A polishing pad for polishing a silicon wafer as described in claim 1 or 2, wherein the plurality of arcuate grooves in the first annular region and the plurality of arcuate grooves in the second annular region are uniformly spaced along the circumferential direction of the polishing pad, the plurality of annular grooves are uniformly spaced along the radial direction, and the plurality of annular grooves are spaced along the circumferential direction at a predetermined angular spacing. A polishing pad for polishing a silicon wafer as described in claim 3, wherein the plurality of arcuate grooves in the first annular region are spaced apart by a first predetermined spacing, and the plurality of arcuate grooves in the second annular region are spaced apart by a second predetermined spacing, wherein the first predetermined spacing is greater than the second predetermined spacing, so that during the polishing process, the polishing liquid flows at a greater speed on the first annular region than on the second annular region. A polishing pad for polishing a silicon wafer as described in claim 1 or 2, wherein the plurality of arc-shaped grooves in the first annular region are connected to the plurality of arc-shaped grooves in the second annular region through the plurality of straight grooves. A polishing pad for polishing a silicon wafer as described in claim 1 or 2, wherein the plurality of arc-shaped grooves in the first annular region and the plurality of arc-shaped grooves in the second annular region have the same depth. A polishing device, the polishing device comprising: a silicon wafer carrier having a first outer tooth, the silicon wafer carrier being used to carry a silicon wafer; an inner gear ring having a second outer tooth, wherein the first outer tooth of the silicon wafer carrier is engaged with the second outer tooth of the inner gear ring; an outer gear ring having an inner tooth, wherein the first outer tooth of the silicon wafer carrier is also engaged with the inner tooth of the outer gear ring; an upper platen located above an upper polishing pad and a lower platen located below a lower polishing pad, the upper platen being and the lower plate for providing pressure toward each other to press the upper polishing pad to the upper surface of the silicon wafer and to press the lower polishing pad to the lower surface of the silicon wafer, wherein the lower polishing pad is a polishing pad according to any one of claims 1 to 6; a polishing liquid injection channel provided in the upper plate for injecting polishing liquid into the upper polishing pad, wherein the polishing liquid passes through the silicon wafer carrier after being injected into the upper polishing pad to reach the lower polishing pad. The polishing apparatus as described in claim 7, wherein the upper polishing pad and the lower polishing pad are glued to the upper platen and the lower platen respectively. A polishing device as described in claim 7, wherein, when the polishing device is used to polish a silicon wafer, the silicon wafer carrier is placed on the polishing pad so that the central area of the silicon wafer carrier is located in the third annular area of the polishing pad, and the edge area of the silicon wafer carrier is located in the first annular area and the second annular area of the polishing pad.