TWI836568B - Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof - Google Patents

Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof Download PDF

Info

Publication number
TWI836568B
TWI836568B TW111131767A TW111131767A TWI836568B TW I836568 B TWI836568 B TW I836568B TW 111131767 A TW111131767 A TW 111131767A TW 111131767 A TW111131767 A TW 111131767A TW I836568 B TWI836568 B TW I836568B
Authority
TW
Taiwan
Prior art keywords
layer
copper
hole
photoresist
photoresist layer
Prior art date
Application number
TW111131767A
Other languages
Chinese (zh)
Other versions
TW202410754A (en
Inventor
許議文
李偉杰
簡煥霖
葉辰影
Original Assignee
嘉聯益科技股份有限公司
Filing date
Publication date
Application filed by 嘉聯益科技股份有限公司 filed Critical 嘉聯益科技股份有限公司
Publication of TW202410754A publication Critical patent/TW202410754A/en
Application granted granted Critical
Publication of TWI836568B publication Critical patent/TWI836568B/en

Links

Images

Abstract

A manufacturing method of circuit board circuit structure with through hole includes providing a substrate. Covering the two first photoresist layers on the surfaces of the two copper layers of the substrate, and performing exposure and development. An etching process is performed to remove the surfaces of the copper layers not covered by the first photoresist layers. Two first photoresist layers are removed. Covering two second photoresist layers on the surface of each copper layer, and exposing. Drilling holes are respectively performed from the surface of each second photoresist layer to form a first hole and a second hole. A metallization layer is chemically formed to cover the first hole, the second hole and each of the second photoresist layers. A copper clad layer is formed by electroplating to cover the first hole, the second hole and each of the second photoresist layers. Part of the copper clad layer is removed by chemical etching. Two second photoresist layers are removed.

Description

具導通孔之電路板線路結構的製作方法及所製成的具導通孔之電路板線路結構Method for manufacturing circuit board wiring structure with via hole and manufactured circuit board wiring structure with via hole

一種具導通孔之電路板製造方法,特別是電路板線路結構的製作方法及所製成的具導通孔之電路板線路結構。 A method for manufacturing a circuit board with via holes, in particular a method for manufacturing a circuit board circuit structure and the manufactured circuit board circuit structure with via holes.

習知的電路板線路結構製作方法,一般是先將電鍍孔結構完成,再進行兩面線路的製作,一般為全面鍍流程或是選鍍流程,一般的流程裡,如導電層有斷開絕緣的現象,則將影響到電鍍的品質。而在特殊的金屬化系統裡,由於金屬化的特性,基板的線路必須分別製作,例如石墨烯金屬化系統,在電鍍時,如導電層雙面有斷開的狀況,將會影響到電鍍的性能,因此僅能以保持一側完整之導體以先形成一側面的線路,再接著形成另一側面的線路。以利於控制基材及導體的厚度。然而,此種製作方法,將影響電路板結構的製作效率,也產生額外的步驟及成本消耗。 The conventional method of making circuit board circuit structure is to complete the electroplating hole structure first, and then make the circuits on both sides. It is generally a full plating process or a selective plating process. In the general process, if the conductive layer is disconnected, it will affect the quality of electroplating. In the special metallization system, due to the characteristics of metallization, the circuits of the substrate must be made separately. For example, in the graphene metallization system, during electroplating, if the conductive layer is disconnected on both sides, it will affect the performance of electroplating. Therefore, only one side of the conductor can be kept intact to form the circuit on one side first, and then the circuit on the other side. This is to help control the thickness of the substrate and the conductor. However, this manufacturing method will affect the manufacturing efficiency of the circuit board structure and also generate additional steps and cost consumption.

有鑑於此,本案於一實施例提供一種具導通孔之電路板線路結構的製作方法包括提供基板,基板包括基材層及二銅層,基材層具有相 對之第一表面及第二表面,二銅層分別形成於基材層之第一表面及第二表面。覆蓋二第一光阻層於二銅層之表面,並透過曝光及顯影,使第一表面之一側的第一光阻層形成第一圖案結構,使第二表面之一側的第一光阻層形成第二圖案結構。進行蝕刻製程以去除未被各第一光阻層所覆蓋之各銅層之表面。去除二第一光阻層。覆蓋二第二光阻層於各銅層之表面,並透過曝光,使第一表面之一側的第二光阻層形成第三圖案結構,使第二表面之一側的第二光阻層形成第四圖案結構。自位於第一表面之一側的第二光阻層之表面進行鑽孔,形成至少一第一孔洞,至少一第一孔洞導通至基材層之第二表面,自位於第二表面之一側的第二光阻層之表面進行鑽孔,形成至少一第二孔洞,至少一第二孔洞導通至基材層之第一表面。透過化學方式直接金屬化形成金屬化層,金屬化層覆蓋於至少一第一孔洞之表面、位於第一表面之一側的第二光阻層之表面、至少一第二孔洞之表面及位於第二表面之一側的第二光阻層之表面。透過電鍍形成覆銅層,覆銅層分別覆蓋於至少一第一孔洞及至少一第二孔洞之表面並分別沿著至少一第一孔洞及至少一第二孔洞延伸且覆蓋於第一表面及第二表面之一側的第二光阻層。透過化學咬蝕去除部分覆銅層。去除二第二光阻層。 In view of this, in one embodiment of the present invention, a method for manufacturing a circuit board circuit structure with via holes is provided, which includes providing a substrate. The substrate includes a base material layer and a copper layer, and the base material layer has a phase For the first surface and the second surface, two copper layers are respectively formed on the first surface and the second surface of the base material layer. Cover two first photoresist layers on the surface of the two copper layers, and through exposure and development, the first photoresist layer on one side of the first surface forms a first pattern structure, so that the first photoresist layer on one side of the second surface The resist layer forms a second pattern structure. An etching process is performed to remove the surface of each copper layer not covered by each first photoresist layer. Remove the first photoresist layer. Cover two second photoresist layers on the surface of each copper layer, and through exposure, the second photoresist layer on one side of the first surface forms a third pattern structure, so that the second photoresist layer on one side of the second surface A fourth pattern structure is formed. Drilling is performed on the surface of the second photoresist layer located on one side of the first surface to form at least one first hole. The at least one first hole is conductive to the second surface of the base material layer, and is formed on one side of the second surface. The surface of the second photoresist layer is drilled to form at least one second hole, and the at least one second hole is connected to the first surface of the base material layer. A metallized layer is formed by direct metallization through chemical means. The metallized layer covers the surface of at least one first hole, the surface of the second photoresist layer located on one side of the first surface, the surface of at least one second hole and is located on the first surface. The surface of the second photoresist layer on one side of the two surfaces. A copper-clad layer is formed through electroplating. The copper-clad layer covers the surfaces of at least one first hole and at least one second hole respectively and extends along at least one first hole and at least one second hole respectively and covers the first surface and the second hole. A second photoresist layer on one side of the two surfaces. Remove part of the copper layer through chemical etching. Remove the second photoresist layer.

在一些實施例中,於去除二第二光阻層後,提供二外層板,各外層板包括材料層及銅材層,材料層具有相對之第三表面及第四表面,各外層板的材料層的第三表面分別設於基板之第一表面側及第二表面側的銅層,銅材層形成於材料層之第四表面。覆蓋第三光阻層於銅材層之表面,並透過曝光及顯影,使第三光阻層形成第五圖案結構。進行蝕刻製程以去除未被第三光阻層所覆蓋之銅材層之表面。去除第三光阻層。覆蓋第 四光阻層於銅材層之表面,並透過曝光,使第四光阻層形成第六圖案結構。自第四光阻層之表面進行鑽孔,形成至少一第三孔洞,各外層板的至少一第三孔洞分別導通至基板於第一表面之一側及第二表面之一側的覆銅層。透過化學方式直接金屬化形成金屬化層,金屬化層覆蓋於至少一第三孔洞之表面及第四光阻層之表面。透過電鍍形成鍍銅層,鍍銅層覆蓋於至少一第三孔洞並沿著至少一第三孔洞延伸且覆蓋於第四光阻層。透過化學咬蝕去除部分鍍銅層。去除第四光阻層。 In some embodiments, after removing the two second photoresist layers, two outer layer plates are provided, each outer layer plate includes a material layer and a copper layer, the material layer has a third surface and a fourth surface opposite to each other, the third surface of the material layer of each outer layer plate is respectively arranged on the copper layer on the first surface side and the second surface side of the substrate, and the copper layer is formed on the fourth surface of the material layer. A third photoresist layer is covered on the surface of the copper layer, and the third photoresist layer is formed into a fifth pattern structure through exposure and development. An etching process is performed to remove the surface of the copper layer not covered by the third photoresist layer. The third photoresist layer is removed. A fourth photoresist layer is covered on the surface of the copper layer, and the fourth photoresist layer is formed into a sixth pattern structure through exposure. Drilling is performed from the surface of the fourth photoresist layer to form at least one third hole, and at least one third hole of each outer layer is respectively connected to the copper-clad layer of the substrate on one side of the first surface and one side of the second surface. A metallization layer is formed by direct metallization by chemical means, and the metallization layer covers the surface of at least one third hole and the surface of the fourth photoresist layer. A copper-plated layer is formed by electroplating, and the copper-plated layer covers at least one third hole and extends along at least one third hole and covers the fourth photoresist layer. Part of the copper-plated layer is removed by chemical etching. The fourth photoresist layer is removed.

在一些實施例中,於去除二第二光阻層後,提供外層板,外層板包括材料層及銅材層,材料層具有相對之第三表面及第四表面,材料層的第三表面設於基板之第一表面側的銅層,銅材層形成於材料層之第四表面。覆蓋第三光阻層於銅材層之表面及第二表面之一側的銅層之表面,並透過曝光及顯影,使第三光阻層形成第五圖案結構。進行蝕刻製程以去除未被第三光阻層所覆蓋之銅材層之表面。去除第三光阻層。覆蓋第四光阻層於銅材層之表面及第二表面之一側的銅層之表面,並透過曝光,使第四光阻層形成第六圖案結構。自第一表面之一側的第四光阻層之表面進行鑽孔,形成至少一第三孔洞,至少一第三孔洞導通至基板於第一表面之一側的覆銅層。透過化學方式直接金屬化形成金屬化層,金屬化層覆蓋於至少一第三孔洞之表面及第四光阻層之表面。透過電鍍形成鍍銅層,鍍銅層覆蓋於至少一第三孔洞並沿著至少一第三孔洞延伸且覆蓋於第四光阻層。透過化學咬蝕去除部分的鍍銅層。去除第四光阻層。 In some embodiments, after removing the two second photoresist layers, an outer layer board is provided. The outer layer board includes a material layer and a copper material layer. The material layer has a third surface and a fourth surface opposite to each other. The third surface of the material layer is provided On the copper layer on the first surface side of the substrate, the copper material layer is formed on the fourth surface of the material layer. Cover the third photoresist layer on the surface of the copper material layer and the surface of the copper layer on one side of the second surface, and through exposure and development, the third photoresist layer forms a fifth pattern structure. An etching process is performed to remove the surface of the copper layer not covered by the third photoresist layer. Remove the third photoresist layer. Cover the fourth photoresist layer on the surface of the copper material layer and the surface of the copper layer on one side of the second surface, and expose the fourth photoresist layer to form a sixth pattern structure. Drilling is performed from the surface of the fourth photoresist layer on one side of the first surface to form at least a third hole, and the at least one third hole is conductive to the copper-clad layer on one side of the first surface of the substrate. A metallization layer is formed by direct metallization through chemical means, and the metallization layer covers the surface of at least one third hole and the surface of the fourth photoresist layer. A copper plating layer is formed through electroplating, and the copper plating layer covers at least one third hole, extends along at least one third hole, and covers the fourth photoresist layer. Remove part of the copper plating through chemical etching. Remove the fourth photoresist layer.

在一些實施例中,於化學咬蝕後,覆銅層之高度齊平於第二光阻層。 In some embodiments, after chemical etching, the height of the copper-clad layer is flush with the second photoresist layer.

在一些實施例中,於化學咬蝕後,覆銅層之高度齊平於銅層。 In some embodiments, after chemical etching, the height of the copper clad layer is flush with the copper layer.

在一些實施例中,於外層板化學咬蝕後,鍍銅層之高度齊平於第四光阻層。 In some embodiments, after the outer layer is chemically etched, the height of the copper layer is aligned with the fourth photoresist layer.

在一些實施例中,於外層板化學咬蝕後,鍍銅層之高度齊平於銅材層。 In some embodiments, after the outer layer is chemically etched, the height of the copper layer is aligned with the copper material layer.

在一些實施例中,外層板的材料層包覆部分基板於第一表面之一側的覆銅層。 In some embodiments, the material layer of the outer layer board covers part of the copper clad layer on one side of the first surface of the substrate.

在一些實施例中,第一光阻層及第二光阻層為乾膜光阻。 In some embodiments, the first photoresist layer and the second photoresist layer are dry film photoresists.

在一些實施例中,至少一第一孔洞及至少一第二孔洞係利用雷射鑽孔方式形成。 In some embodiments, at least one first hole and at least one second hole are formed by laser drilling.

又,本案於一實施例提供一種具導通孔之電路板線路結構,係由如上述各實施例之製造方法所製成。 In addition, in one embodiment, the present invention provides a circuit board circuit structure with via holes, which is manufactured by the manufacturing method of the above embodiments.

綜上所述,覆蓋二第一光阻層於二銅層之表面,進行曝光、顯影及蝕刻,以先將二側面的線路圖案成形,後續再進行其他結構的製作。如此,簡化了製作過程,也減少了人力及成本的消耗。此外,在後續的結構製作中,透過第二光阻層將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層延伸至第二光阻層之表面,接著一併去除超過第二光阻層之高度範圍的覆銅層以及去除第二光阻層,以控制覆銅層的凸出量,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部的問題。此外,可以藉由控制電鍍層的凸出量,以利於後續多層板的疊層作業,如欲疊置外層板,可以使覆銅層與第二光阻層的高度大致一致,以增加基板與外層板的連通效率。如已完成了電路板線路結構的製作,亦可以使覆銅層與銅層 的高度大致一致,以讓電路板線路結構的外側外面呈平坦狀。 In summary, two first photoresist layers are covered on the surface of two copper layers, and exposure, development and etching are performed to form the circuit patterns on the two sides first, and then other structures are manufactured. In this way, the manufacturing process is simplified and the consumption of manpower and cost is reduced. In addition, in the subsequent structure manufacturing, the metallization and electroplating range is increased through the second photoresist layer. During the electroplating process, the copper-clad layer extends to the surface of the second photoresist layer, and then the copper-clad layer exceeding the height range of the second photoresist layer and the second photoresist layer are removed at the same time to control the protrusion of the copper-clad layer, avoiding the problem of the electroplated layer overflowing the hole during electroplating and forming a protrusion around the hole. In addition, the protrusion of the electroplating layer can be controlled to facilitate the subsequent stacking of multiple layers. For example, if you want to stack an outer layer, you can make the height of the copper-clad layer and the second photoresist layer roughly the same to increase the connection efficiency between the substrate and the outer layer. If the circuit board circuit structure has been completed, the height of the copper-clad layer and the copper layer can also be roughly the same to make the outer side of the circuit board circuit structure flat.

100:電路板線路結構 100: Circuit board circuit structure

10:基板 10: Substrate

11:基材層 11:Substrate layer

111:第一表面 111: First surface

112:第二表面 112: Second surface

12A、12B:銅層 12A, 12B: Copper layer

13A、13B:第一光阻層 13A, 13B: first photoresist layer

131A:第一圖案結構 131A: First pattern structure

131B:第二圖案結構 131B: Second pattern structure

14A、14B:第二光阻層 14A, 14B: second photoresist layer

141A:第三圖案結構 141A: The third pattern structure

141B:第四圖案結構 141B: Fourth pattern structure

15A:第一孔洞 15A:First hole

15B:第二孔洞 15B:Second hole

151A、151B:孔壁 151A, 151B: Hole wall

152A、152B:孔底 152A, 152B: Bottom of hole

16A、16B:金屬化層 16A, 16B: Metallized layer

17A、17B:覆銅層 17A, 17B: Copper clad layer

20:外層板 20: Outer layer

21:材料層 21: Material layer

211:第三表面 211: Third surface

212:第四表面 212: The fourth surface

22:銅材層 22: Copper layer

23:第三光阻層 23: The third photoresist layer

231:第五圖案結構 231: The fifth pattern structure

24:第四光阻層 24: Fourth photoresist layer

241:第六圖案結構 241: The sixth pattern structure

25:第三孔洞 25:The third hole

251:孔壁 251: Hole wall

252:孔底 252: Bottom of hole

26:金屬化層 26:Metalization layer

27:鍍銅層 27: Copper plating layer

30:外層板 30: Outer layer

31:材料層 31: Material layer

311:第三表面 311:Third surface

312:第四表面 312:Fourth surface

32:銅材層 32: Copper layer

33:第三光阻層 33: The third photoresist layer

331:第五圖案結構 331: Fifth pattern structure

34:第四光阻層 34: The fourth photoresist layer

341:第六圖案結構 341: The sixth pattern structure

35:第三孔洞 35:The third hole

351:孔壁 351:hole wall

352:孔底 352: Bottom of hole

36:金屬化層 36:Metalization layer

37:鍍銅層 37: Copper plating layer

S10-S29:步驟 S10-S29: Steps

S20’-S29’:步驟 S20’-S29’: steps

[圖1]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。 [Figure 1] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment (I).

[圖2]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。 [Fig. 2] is a structural schematic diagram (2) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖3]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(三)。 [Figure 3] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment (III).

[圖4]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(四)。 [Fig. 4] is a structural schematic diagram (4) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖5]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(五)。 [Figure 5] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment (V).

[圖6]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(六)。 [Fig. 6] is a structural schematic diagram (6) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖7]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(七)。 [Figure 7] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment (VII).

[圖8]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(八)。 [Fig. 8] is a schematic structural diagram (8) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖9]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(九)。 [Fig. 9] is a structural schematic diagram (9) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖10]為一第一實施例的具導通孔之電路板線路結構製作方法之結 構示意圖(十)。 [Figure 10] is a structural schematic diagram (ten) of a method for manufacturing a circuit board line structure with a via hole according to a first embodiment.

[圖11]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十一)。 [Fig. 11] is a structural schematic diagram (11) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖12]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十二)。 [Fig. 12] is a structural schematic diagram (12) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖13]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十三)。 [Figure 13] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment (XIII).

[圖14]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十四)。 [Fig. 14] is a schematic structural diagram (14) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖15]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十五)。 [Fig. 15] is a schematic structural diagram (fifteen) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖16]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十六)。 [Figure 16] is a structural schematic diagram of a method for manufacturing a circuit board line structure with a via hole according to a first embodiment (XVI).

[圖17]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十七)。 [Fig. 17] is a structural schematic diagram (17) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖18]為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十八)。 [Fig. 18] is a structural schematic diagram (18) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖19]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。 [Fig. 19] is a structural schematic diagram (1) of a method for manufacturing a circuit board circuit structure with via holes according to the second embodiment.

[圖20]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。 [Figure 20] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment (II).

[圖21]為一第二實施例的具導通孔之電路板線路結構製作方法之結 構示意圖(三)。 [Figure 21] shows the result of a method for manufacturing a circuit board circuit structure with via holes according to the second embodiment. Structure diagram (3).

[圖22]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(四)。 [Figure 22] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment (IV).

[圖23]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(五)。 [Fig. 23] is a structural schematic diagram (5) of a method for manufacturing a circuit board circuit structure with via holes according to the second embodiment.

[圖24]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(六)。 [Fig. 24] is a structural schematic diagram (6) of a method for manufacturing a circuit board circuit structure with via holes according to the second embodiment.

[圖25]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(七)。 [Figure 25] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment (VII).

[圖26]為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(八)。 [Figure 26] is a structural schematic diagram of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment (VIII).

[圖27]為一第一實施例的具導通孔之電路板線路結構製作方法之流程圖(一)。 [Fig. 27] is a flow chart (1) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment.

[圖28]為一第一實施例的具導通孔之電路板線路結構製作方法之流程圖(二)。 [Figure 28] is a flow chart (II) of a method for manufacturing a circuit board circuit structure with a via hole according to a first embodiment.

[圖29]為一第二實施例的具導通孔之電路板線路結構製作方法之流程圖。 [Figure 29] is a flow chart of a method for manufacturing a circuit board circuit structure with a via hole according to a second embodiment.

請參閱圖1至圖10,並同時參閱圖27。圖1至圖10為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)至(十)。圖27為一第一實施例的具導通孔之電路板線路結構製作方法之流程圖(一)。如圖1及圖27所示,本實施例之具導通孔之電路板線路結構 100的製作方法包括提供基板(步驟S10)。基板10包括基材層11及二銅層12A、12B,基材層11具有相對之第一表面111及第二表面112,二銅層12A、12B分別形成於基材層11之第一表面111及第二表面112。在本實施例中,利用基材層11的第一表面111及第二表面112同時製作不同規格的電路板線路結構100,但不限於此,亦可以製作相同規格的電路板線路結構100。 Please refer to Figures 1 to 10, and also see Figure 27. 1 to 10 are structural schematic diagrams (1) to (10) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment. Figure 27 is a flow chart (1) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment. As shown in Figure 1 and Figure 27, the circuit board circuit structure with via holes in this embodiment The manufacturing method of 100 includes providing a substrate (step S10). The substrate 10 includes a base material layer 11 and two copper layers 12A and 12B. The base material layer 11 has an opposite first surface 111 and a second surface 112. The two copper layers 12A and 12B are respectively formed on the first surface 111 of the base material layer 11. and second surface 112. In this embodiment, the first surface 111 and the second surface 112 of the base material layer 11 are used to manufacture circuit board circuit structures 100 of different specifications at the same time. However, it is not limited to this, and circuit board circuit structures 100 of the same specifications can also be produced.

如圖2及圖27所示,覆蓋二第一光阻層13A、13B於二銅層12A、12B之表面,並透過曝光及顯影,使第一表面111之一側的第一光阻層13A形成第一圖案結構131A,使第二表面112之一側的第一光阻層13B形成第二圖案結構131B(步驟S11)。在本實施例中,透過貼合乾膜光阻形成光阻層。 As shown in Figure 2 and Figure 27, the two first photoresist layers 13A and 13B are covered on the surfaces of the two copper layers 12A and 12B, and through exposure and development, the first photoresist layer 13A on one side of the first surface 111 is The first pattern structure 131A is formed, so that the first photoresist layer 13B on one side of the second surface 112 forms the second pattern structure 131B (step S11). In this embodiment, the photoresist layer is formed by laminating dry film photoresist.

如圖3及圖27所示,進行蝕刻製程以去除未被各第一光阻層13A、13B所覆蓋之各銅層12A、12B之表面(步驟S12)。接著,如圖4及圖27所示,去除二第一光阻層13A、13B(步驟S13)便完成了線路結構的部分。 As shown in FIG3 and FIG27, an etching process is performed to remove the surfaces of the copper layers 12A and 12B that are not covered by the first photoresist layers 13A and 13B (step S12). Then, as shown in FIG4 and FIG27, the two first photoresist layers 13A and 13B are removed (step S13) to complete part of the circuit structure.

如圖5及圖27所示,覆蓋二第二光阻層14A、14B於各銅層12A、12B之表面,並透過曝光,使第一表面111之一側的第二光阻層14A形成第三圖案結構141A,使第二表面112之一側的第二光阻層14B形成第四圖案結構141B(步驟S14)。在此實施例中,以乾膜光阻為示例,採用全面曝光之方式將光阻形成具抗化性的狀態。 As shown in FIG. 5 and FIG. 27 , two second photoresist layers 14A and 14B are covered on the surfaces of the copper layers 12A and 12B, and through exposure, the second photoresist layer 14A on one side of the first surface 111 forms a third pattern structure 141A, and the second photoresist layer 14B on one side of the second surface 112 forms a fourth pattern structure 141B (step S14). In this embodiment, dry film photoresist is used as an example, and the photoresist is formed into a chemical-resistant state by full exposure.

如圖6及圖27所示,自位於第一表面111之一側的第二光阻層14A之表面進行鑽孔(步驟S15),形成至少一第一孔洞15A,至少一第一孔洞15A導通至基材層11之第二表面112,自位於第二表面112之一側的第 二光阻層14B之表面進行鑽孔,形成至少一第二孔洞15B,至少一第二孔洞15B導通至基材層11之第一表面111。在此實施例中,藉由雷射鑽孔的方式形成第一孔洞15A及第二孔洞15B。在此,第一孔洞15A及第二孔洞15B以一個為示例,但不以此為限。第一孔洞15A從第一表面111之一側的第二光阻層14A至第二表面112之一側的銅層12B,依序經過第二光阻層14A、銅層12A及基材層11並形成導孔。第一孔洞15A包括孔壁151A及孔底152A,孔壁151A包括鑽孔而外露之第二光阻層14A、銅層12A及基材層11的側表面。孔底152A包括與第二表面112接合之銅層12B的表面。第二孔洞15B從第二表面112之一側的第二光阻層14B至第一表面111之一側的銅層12A,依序經過第二光阻層14B、銅層12B及基材層11並形成導孔。第二孔洞15B包括孔壁151B及孔底152B,孔壁151B包括鑽孔而外露之第二光阻層14B、銅層12B及基材層11的側表面。孔底152B包括與第二表面112接合之銅層12A的表面。 As shown in FIGS. 6 and 27 , drilling is performed from the surface of the second photoresist layer 14A located on one side of the first surface 111 (step S15 ) to form at least one first hole 15A, and at least one first hole 15A is conductive. to the second surface 112 of the base material layer 11 , from the third surface located on one side of the second surface 112 The surfaces of the two photoresist layers 14B are drilled to form at least one second hole 15B, and the at least one second hole 15B is connected to the first surface 111 of the base material layer 11 . In this embodiment, the first hole 15A and the second hole 15B are formed by laser drilling. Here, one first hole 15A and one second hole 15B is used as an example, but it is not limited to this. The first hole 15A sequentially passes through the second photoresist layer 14A, the copper layer 12A and the base material layer 11 from the second photoresist layer 14A on one side of the first surface 111 to the copper layer 12B on one side of the second surface 112 and form guide holes. The first hole 15A includes a hole wall 151A and a hole bottom 152A. The hole wall 151A includes drilled and exposed side surfaces of the second photoresist layer 14A, the copper layer 12A and the base material layer 11 . Hole bottom 152A includes the surface of copper layer 12B bonded to second surface 112 . The second hole 15B goes from the second photoresist layer 14B on one side of the second surface 112 to the copper layer 12A on one side of the first surface 111, passing through the second photoresist layer 14B, the copper layer 12B and the base material layer 11 in sequence. and form guide holes. The second hole 15B includes a hole wall 151B and a hole bottom 152B. The hole wall 151B includes the side surfaces of the second photoresist layer 14B, the copper layer 12B and the base material layer 11 that are drilled and exposed. Hole bottom 152B includes the surface of copper layer 12A bonded to second surface 112 .

如圖7及圖27所示,透過化學方式形成金屬化層16A、16B(步驟S16),金屬化層16A、16B覆蓋於第一孔洞15A之表面、位於第一表面111之一側的第二光阻層14A之表面、第二孔洞15B之表面及位於第二表面112之一側的第二光阻層14B之表面。為方便後續說明,將成位於第一表面111側的金屬化層以金屬化層16A示意,位於第二表面112側的金屬化層以金屬化層16B示意。在此實施例中,金屬化層16A、16B係透過化學方式直接金屬化處理的方式形成,由於使用化學方式直接金屬化處理,即使基板10兩側的銅層12A、12B為非全銅狀態,亦可以進行金屬化。 As shown in FIGS. 7 and 27 , metallized layers 16A and 16B are chemically formed (step S16 ). The metallized layers 16A and 16B cover the surface of the first hole 15A and the second second hole located on one side of the first surface 111 . The surface of the photoresist layer 14A, the surface of the second hole 15B and the surface of the second photoresist layer 14B located on one side of the second surface 112 . For convenience of subsequent description, the metallization layer located on the first surface 111 side is represented by metallization layer 16A, and the metallization layer located on the second surface 112 side is represented by metallization layer 16B. In this embodiment, the metallization layers 16A and 16B are formed by chemical direct metallization treatment. Since the chemical direct metallization treatment is used, even if the copper layers 12A and 12B on both sides of the substrate 10 are not in a full copper state, Metalization is also possible.

如圖8及圖27所示,透過電鍍形成覆銅層17A、17B(步驟 S17),覆銅層17A、17B分別覆蓋於第一孔洞15A及第二孔洞15B之表面並分別沿著第一孔洞15A及第二孔洞15B延伸且覆蓋於第一表面111及第二表面112之一側的第二光阻層14A、14B。為方便後續說明,將位於第一表面111側的覆銅層以覆銅層17A示意,位於第二表面112側的覆銅層以覆銅層17B示意。 As shown in FIG8 and FIG27, copper-clad layers 17A and 17B are formed by electroplating (step S17). The copper-clad layers 17A and 17B cover the surfaces of the first hole 15A and the second hole 15B respectively and extend along the first hole 15A and the second hole 15B respectively and cover the second photoresist layers 14A and 14B on one side of the first surface 111 and the second surface 112. For the convenience of subsequent explanation, the copper-clad layer located on the first surface 111 side is indicated by the copper-clad layer 17A, and the copper-clad layer located on the second surface 112 side is indicated by the copper-clad layer 17B.

如圖9及圖27所示,透過化學咬蝕去除部分覆銅層17A、17B(步驟S18)。在本實施例中,透過使覆銅層17A、17B之高度齊平於第二光阻層14A、14B以利於後續雙面板或多層板的疊層作業(容後詳述),但不限於此,例如未要繼續進行疊層作業時,覆銅層17A、17B之高度亦可以分別齊平於二銅層12A、12B。接著,如圖10及圖27所示,去除二第二光阻層14A、14B(步驟S19),便完成電路板線路結構100。 As shown in FIG9 and FIG27, a portion of the copper-coated layers 17A and 17B are removed by chemical etching (step S18). In this embodiment, the height of the copper-coated layers 17A and 17B is made equal to the height of the second photoresist layers 14A and 14B to facilitate the subsequent lamination of double-sided boards or multi-layer boards (described later), but not limited to this. For example, when the lamination operation is not to be continued, the height of the copper-coated layers 17A and 17B can also be equal to the second copper layers 12A and 12B respectively. Then, as shown in FIG10 and FIG27, the second photoresist layers 14A and 14B are removed (step S19), and the circuit board circuit structure 100 is completed.

具體來說,透過先將基板10二側面的線路圖案成形,後續再進行其他結構的製作。如此,簡化了製作過程,也減少了成本的消耗。此外,在後續的結構製作中,透過第二光阻層14A、14B將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層17A、17B分別延伸至第二光阻層14A、14B之表面,接著一併去除超過第二光阻層14A、14B之高度範圍的覆銅層17A、17B以及去除第二光阻層14A、14B,以控制覆銅層17A、17B的凸出量,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部的問題。此外,藉由控制覆銅層17A、17B的凸出量,以利於後續多層板的製作。如欲疊置另一板材,可以使覆銅層17A、17B與第二光阻層14A、14B的高度大致一致,以增加基板10與另一板材的連通效率。如已完成了電路板線路結構的製作,亦可以使覆銅層17A、17B與銅層12A、12B的高 度大致一致,以讓電路板線路結構的外側外面呈平坦狀。 Specifically, the circuit patterns on the two sides of the substrate 10 are formed first, and then other structures are manufactured. In this way, the manufacturing process is simplified and the cost consumption is reduced. In addition, in the subsequent structure manufacturing, the metallization and electroplating range is enlarged through the second photoresist layer 14A, 14B. During the electroplating process, the copper-clad layers 17A, 17B extend to the surface of the second photoresist layer 14A, 14B respectively, and then the copper-clad layers 17A, 17B exceeding the height range of the second photoresist layer 14A, 14B and the second photoresist layer 14A, 14B are removed together to control the protrusion of the copper-clad layers 17A, 17B, thereby avoiding the problem of the electroplated layer overflowing the hole and forming a protrusion around the hole during electroplating. In addition, by controlling the protrusion of the copper-clad layers 17A, 17B, the subsequent multi-layer board manufacturing is facilitated. If another plate is to be stacked, the height of the copper-clad layers 17A, 17B and the second photoresist layers 14A, 14B can be roughly the same to increase the connection efficiency between the substrate 10 and the other plate. If the circuit board circuit structure has been completed, the height of the copper-clad layers 17A, 17B and the copper layers 12A, 12B can also be roughly the same to make the outer side of the circuit board circuit structure flat.

請參閱圖11至圖18並同時參閱圖28。圖11至圖18為一第一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(十一)至(十八)。圖28為一第一實施例的具導通孔之電路板線路結構製作方法之流程圖(二)。在本實施例中,電路板線路結構100適用例如於雙面板或多層板初始之內板。在此以雙層板為示例,以電路板線路結構100的雙面側面進行雙層板的疊層作業,但不限於此,亦可以以電路板線路結構100的單一側面進行多層板的疊層作業。 Please refer to Figures 11 to 18 and also see Figure 28. 11 to 18 are structural schematic diagrams (11) to (18) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment. Figure 28 is a flow chart (2) of a method for manufacturing a circuit board circuit structure with via holes according to the first embodiment. In this embodiment, the circuit board circuit structure 100 is suitable for, for example, a double-sided board or an inner board of a multi-layer board. Here, a double-layer board is taken as an example. Double-layer boards are stacked on both sides of the circuit board circuit structure 100 . However, it is not limited to this. Multi-layer boards can also be stacked on a single side of the circuit board circuit structure 100 . Homework.

如圖11及圖28所示,於去除二第二光阻層後(步驟S19),提供二外層板20(步驟S20),各外層板20包括材料層21及銅材層22,材料層21具有相對之第三表面211及第四表面212,材料層21的第三表面211設於基板10之第一表面111側的銅層12A及第二表面112側的銅層12B,銅材層22形成於材料層21之第四表面212。在本實施例中,由於步驟S18,使得覆銅層17A、17B之高度齊平於第二光阻層14A、14B,在去除了第二光阻層14A、14B後,將會使得覆銅層17A、17B凸出,而疊置外層板20於基板10的第一表面111之一側時,外層板20的材料層21將分別包覆基板10於第一表面111之一側及第二表面112之一側的部分覆銅層17A、17B。 As shown in FIG. 11 and FIG. 28 , after removing the two second photoresist layers (step S19 ), two outer layer boards 20 are provided (step S20 ). Each outer layer board 20 includes a material layer 21 and a copper material layer 22 . The material layer 21 It has an opposite third surface 211 and a fourth surface 212. The third surface 211 of the material layer 21 is provided on the copper layer 12A on the first surface 111 side of the substrate 10 and the copper layer 12B on the second surface 112 side. The copper material layer 22 Formed on the fourth surface 212 of the material layer 21 . In this embodiment, due to step S18, the height of the copper-clad layers 17A and 17B is flush with the second photoresist layers 14A and 14B. After the second photoresist layers 14A and 14B are removed, the copper-clad layers will be 17A and 17B protrude, and when the outer layer plate 20 is stacked on one side of the first surface 111 of the substrate 10, the material layer 21 of the outer layer plate 20 will cover the substrate 10 on one side of the first surface 111 and the second surface respectively. Part of the copper-clad layers 17A and 17B on one side of 112.

如圖12及圖28所示,覆蓋第三光阻層23於銅材層22之表面,並透過曝光及顯影,使第三光阻層23形成第五圖案結構231(步驟S21)。接著,進行蝕刻製程以去除未被第三光阻層23所覆蓋之銅材層22之表面(步驟S22),並去除第三光阻層23(步驟S23)。 As shown in FIG. 12 and FIG. 28 , the third photoresist layer 23 is covered on the surface of the copper material layer 22, and through exposure and development, the third photoresist layer 23 forms a fifth pattern structure 231 (step S21). Then, an etching process is performed to remove the surface of the copper material layer 22 not covered by the third photoresist layer 23 (step S22), and the third photoresist layer 23 is removed (step S23).

如圖13及圖28所示,覆蓋第四光阻層24於銅材層22之表 面,並透過曝光,使第四光阻層24形成第六圖案結構241(步驟S24)。在此實施例中,以乾膜光阻為示例,採用全面曝光之方式將光阻形成具抗化性的狀態。 As shown in FIG. 13 and FIG. 28 , the fourth photoresist layer 24 is covered on the surface of the copper layer 22 surface, and through exposure, the fourth photoresist layer 24 forms a sixth pattern structure 241 (step S24). In this embodiment, dry film photoresist is used as an example, and the photoresist is formed into a chemical-resistant state by full exposure.

如圖14及圖28所示,自第四光阻層24之表面進行鑽孔(步驟S25),形成至少一第三孔洞25,各外層板20的第三孔洞25分別導通至基板10於第一表面111之一側及第二表面112之一側的覆銅層17A、17B。在此實施例中,藉由雷射鑽孔的方式形成第三孔洞25。在此,以第一表面111之一側為示例,第三孔洞25之數量對應第一孔洞15A為一個。第三孔洞25從第四光阻層24至基板10的覆銅層17A,依序經過第四光阻層24、銅材層22及材料層21並形成導孔。第三孔洞25包括孔壁251及孔底252,孔壁251包括鑽孔而外露之第四光阻層24、銅材層22及材料層21的側表面。在本實施例中,由於外層板20的材料層21包覆基板10於第一表面111之一側的部分覆銅層17A,可以減少鑽孔所需之深度,亦可以藉由後續所形成的鍍銅層27與覆銅層17A相連接後,方便地將基板10及外層板20連通。 As shown in FIGS. 14 and 28 , drilling is performed from the surface of the fourth photoresist layer 24 (step S25 ) to form at least one third hole 25 . The third holes 25 of each outer layer plate 20 are respectively connected to the substrate 10 at the third hole 25 . Copper clad layers 17A and 17B on one side of the first surface 111 and on one side of the second surface 112 . In this embodiment, the third hole 25 is formed by laser drilling. Here, taking one side of the first surface 111 as an example, the number of the third holes 25 corresponds to one first hole 15A. The third hole 25 extends from the fourth photoresist layer 24 to the copper-clad layer 17A of the substrate 10 , passes through the fourth photoresist layer 24 , the copper material layer 22 and the material layer 21 in sequence and forms a via hole. The third hole 25 includes a hole wall 251 and a hole bottom 252. The hole wall 251 includes the side surfaces of the fourth photoresist layer 24, the copper material layer 22 and the material layer 21 exposed through drilling. In this embodiment, since the material layer 21 of the outer layer board 20 covers part of the copper-clad layer 17A of the substrate 10 on one side of the first surface 111, the depth required for drilling can be reduced, and the subsequent formation of the After the copper-plated layer 27 is connected to the copper-clad layer 17A, the substrate 10 and the outer layer board 20 are conveniently connected.

如圖15及圖28所示,透過化學方式形成金屬化層26(步驟S26),金屬化層26覆蓋於第三孔洞25之表面及第四光阻層24之表面。在此實施例中,金屬化層26係透過化學方式直接金屬化處理的方式形成。 As shown in FIGS. 15 and 28 , a metallization layer 26 is chemically formed (step S26 ), and the metallization layer 26 covers the surface of the third hole 25 and the surface of the fourth photoresist layer 24 . In this embodiment, the metallization layer 26 is formed by chemical direct metallization treatment.

如圖16及圖28所示,透過電鍍形成鍍銅層27(步驟S27),鍍銅層27覆蓋於第三孔洞25並沿著第三孔洞25延伸且覆蓋於第四光阻層24。 As shown in FIG. 16 and FIG. 28 , a copper-plated layer 27 is formed by electroplating (step S27 ), and the copper-plated layer 27 covers the third hole 25 and extends along the third hole 25 and covers the fourth photoresist layer 24 .

如圖17及圖28所示,透過化學咬蝕去除部分鍍銅層27(步驟S28)。在本實施例中,由於未要繼續進行疊層作業,故使鍍銅層27之高度 齊平於銅材層22,但不限於此,如欲再繼續進行疊層作業,亦可以使鍍銅層27之高度齊平於第四光阻層24。如此,可降低後續疊層作業孔洞成型後的A/R值,並提升電鍍時的良率。接著,如圖18及圖28所示,去除第四光阻層24(步驟S29),便完成多層板的製作。 As shown in FIGS. 17 and 28 , part of the copper plating layer 27 is removed through chemical etching (step S28 ). In this embodiment, since there is no need to continue the lamination operation, the height of the copper plating layer 27 is It is flush with the copper material layer 22 , but is not limited to this. If you want to continue the lamination operation, you can also make the height of the copper plating layer 27 flush with the fourth photoresist layer 24 . In this way, the A/R value after hole forming in subsequent lamination operations can be reduced and the yield during electroplating can be improved. Next, as shown in FIGS. 18 and 28 , the fourth photoresist layer 24 is removed (step S29 ), thereby completing the production of the multilayer board.

此外,請參閱圖19至圖26並同時參閱圖29。圖19至圖26為一第二實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)至(八)。圖29為一第二實施例的具導通孔之電路板線路結構製作方法之流程圖。在第一實施例中,示例了以電路板線路結構100的雙面側面進行雙層板的疊層作業,但不限於此,亦可以以電路板線路結構100的單一側面進行多層板的疊層作業,在此即以第二實施例說明此種態樣。第二實施例與第一實施例相似之部分不再贅述,在第二實施例中,如圖19及圖29所示,於去除二第二光阻層14A、14B後,提供外層板30(步驟S20’),外層板30包括材料層31及銅材層32,材料層31具有相對之第三表面311及第四表面312,材料層31的第三表面311設於基板10之第一表面111側的銅層12A,銅材層32形成於材料層31之第四表面312。在第二實施例中,由於僅對單一側面,即第一表面111之一側進行疊層作業,因此在步驟S18中,使覆銅層17A之高度齊平於第二光阻層14A,以增加基板10與外層板30的連通效率。此外於不再進行疊層作業的第二表面112之一側,使覆銅層17B與銅層12B的高度大致一致,以讓電路板線路結構的外側面呈平坦狀。 In addition, please refer to Figures 19 to 26 and Figure 29 at the same time. Figures 19 to 26 are structural schematic diagrams (i) to (viii) of a method for manufacturing a circuit board wiring structure with a via hole in a second embodiment. Figure 29 is a flow chart of a method for manufacturing a circuit board wiring structure with a via hole in a second embodiment. In the first embodiment, a double-layer board stacking operation is illustrated using both sides of the circuit board wiring structure 100, but it is not limited to this. A multi-layer board stacking operation can also be performed using a single side of the circuit board wiring structure 100. This aspect is illustrated here using the second embodiment. The similar parts of the second embodiment to the first embodiment are not described in detail. In the second embodiment, as shown in Figures 19 and 29, after removing the two second photoresist layers 14A and 14B, an outer layer plate 30 is provided (step S20'). The outer layer plate 30 includes a material layer 31 and a copper material layer 32. The material layer 31 has a third surface 311 and a fourth surface 312 opposite to each other. The third surface 311 of the material layer 31 is disposed on the copper layer 12A on the side of the first surface 111 of the substrate 10, and the copper material layer 32 is formed on the fourth surface 312 of the material layer 31. In the second embodiment, since the lamination operation is performed on only one side, that is, one side of the first surface 111, in step S18, the height of the copper-clad layer 17A is made flush with the second photoresist layer 14A to increase the connection efficiency between the substrate 10 and the outer layer 30. In addition, on one side of the second surface 112 where the lamination operation is no longer performed, the height of the copper-clad layer 17B is made roughly consistent with the height of the copper layer 12B, so that the outer side of the circuit board circuit structure is flat.

如圖20及圖29所示,覆蓋第三光阻層33於銅材層32之表面及第二表面112之一側的銅層12B之表面,並透過曝光及顯影,使第三光阻層33形成第五圖案結構331(步驟S21’)。接著,進行蝕刻製程以去除未 被第三光阻層33所覆蓋之銅材層32之表面(步驟S22’),並去除第三光阻層33(步驟S23’)。在第二實施例中,即使第二表面112之一側未進行疊層作業,仍需要透過塗佈光阻層以進行保護。 As shown in FIGS. 20 and 29 , the third photoresist layer 33 is covered on the surface of the copper material layer 32 and the surface of the copper layer 12B on one side of the second surface 112 , and through exposure and development, the third photoresist layer 33 is 33 forms a fifth pattern structure 331 (step S21'). Next, an etching process is performed to remove unused The surface of the copper material layer 32 covered by the third photoresist layer 33 (step S22'), and the third photoresist layer 33 is removed (step S23'). In the second embodiment, even if no lamination operation is performed on one side of the second surface 112, it still needs to be protected by coating a photoresist layer.

如圖21及圖29所示,覆蓋第四光阻層34於銅材層32之表面及第二表面112之一側的銅層12B之表面,並透過曝光,使第四光阻層34形成第六圖案結構341(步驟S24’)。 As shown in FIG. 21 and FIG. 29 , the fourth photoresist layer 34 is covered on the surface of the copper material layer 32 and the surface of the copper layer 12B on one side of the second surface 112, and the fourth photoresist layer 34 is exposed to form a sixth pattern structure 341 (step S24’).

如圖22及圖29所示,自第一表面111之一側的第四光阻層34之表面進行鑽孔(S25’),形成至少一第三孔洞35,至少一第三孔洞35導通至基板10於第一表面111之一側的覆銅層17A。第三孔洞35從第四光阻層34至基板10的覆銅層17A,依序經過第四光阻層34、銅材層32及材料層31並形成導孔。第三孔洞35包括孔壁351及孔底352,孔壁351包括鑽孔而外露之第四光阻層34、銅材層32及材料層31的側表面。 As shown in Figures 22 and 29, drilling is performed from the surface of the fourth photoresist layer 34 on one side of the first surface 111 (S25') to form at least one third hole 35, and the at least one third hole 35 is connected to The copper clad layer 17A on one side of the first surface 111 of the substrate 10 . The third hole 35 extends from the fourth photoresist layer 34 to the copper-clad layer 17A of the substrate 10 and sequentially passes through the fourth photoresist layer 34 , the copper material layer 32 and the material layer 31 to form a via hole. The third hole 35 includes a hole wall 351 and a hole bottom 352. The hole wall 351 includes the side surfaces of the fourth photoresist layer 34, the copper material layer 32 and the material layer 31 exposed through drilling.

如圖23及圖29所示,透過化學方式直接金屬化形成金屬化層36(步驟26’),金屬化層36覆蓋於第三孔洞35之表面及第四光阻層34之表面。 As shown in Figures 23 and 29, a metallization layer 36 is formed by chemical direct metallization (step 26'). The metallization layer 36 covers the surface of the third hole 35 and the surface of the fourth photoresist layer 34.

如圖24及圖29所示,透過電鍍形成鍍銅層37(步驟S27’),鍍銅層37覆蓋於第三孔洞35並沿著第三孔洞35延伸且覆蓋於第四光阻層34。 As shown in FIGS. 24 and 29 , a copper plating layer 37 is formed through electroplating (step S27′). The copper plating layer 37 covers the third hole 35 and extends along the third hole 35 and covers the fourth photoresist layer 34 .

如圖25及圖29所示,透過化學咬蝕去除部分的鍍銅層37(步驟S28’)。在第二實施例中,由於未要繼續進行疊層作業,故使鍍銅層37之高度齊平於銅材層32,但不限於此,如欲再繼續進行疊層作業,亦可以使鍍銅層37之高度齊平於第四光阻層34。接著,如圖26及圖29所示,去 除第四光阻層34(步驟S29’),便完成多層板的製作。 As shown in Figures 25 and 29, a portion of the copper plating layer 37 is removed through chemical etching (step S28'). In the second embodiment, since the lamination operation is not to be continued, the height of the copper plating layer 37 is made to be flush with the copper material layer 32. However, it is not limited to this. If you want to continue the lamination operation, you can also make the plating layer 37 flush with the copper material layer 32. The height of the copper layer 37 is flush with the fourth photoresist layer 34 . Next, as shown in Figure 26 and Figure 29, go to After removing the fourth photoresist layer 34 (step S29'), the production of the multilayer board is completed.

綜上所述,透過先將基板二側面的線路圖案成形,後續再進行其他結構的製作。如此,簡化了製作過程,也減少了成本的消耗。此外,在後續的結構製作中,透過第二光阻層將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層分別延伸至第二光阻層之表面,接著一併去除超過第二光阻層之高度範圍的覆銅層以及去除第二光阻層,以控制覆銅層的凸出量,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部的問題。此外,藉由控制覆銅層的凸出量,以利於後續多層板的製作。如欲疊置外層板,可以使覆銅層與第二光阻層的高度大致一致,以增加基板與外層板的連通效率。如已完成了電路板線路結構的製作,亦可以使覆銅層與銅層的高度大致一致,以讓電路板線路結構的外側外面呈平坦狀。 In summary, by first forming the circuit patterns on both sides of the substrate, other structures can then be produced. In this way, the production process is simplified and the cost consumption is reduced. In addition, in the subsequent structural fabrication, the metallization and electroplating ranges are increased through the second photoresist layer. During the electroplating process, the copper-clad layer extends to the surface of the second photoresist layer, and then is removed together with more than The height range of the copper clad layer of the second photoresist layer and the removal of the second photoresist layer to control the protrusion of the copper clad layer to avoid the problem of the plating layer overflowing the hole and forming a protrusion around the hole when plating the hole. . In addition, by controlling the protrusion amount of the copper clad layer, the subsequent production of multi-layer boards is facilitated. If the outer layer boards are to be stacked, the heights of the copper-clad layer and the second photoresist layer can be made approximately the same to increase the connection efficiency between the substrate and the outer layer board. If the production of the circuit board circuit structure has been completed, the height of the copper clad layer and the copper layer can also be roughly the same, so that the outer surface of the circuit board circuit structure is flat.

100:電路板線路結構 11:基材層 111:第一表面 112:第二表面 12A、12B:銅層 17A、17B:覆銅層 100: Circuit board circuit structure 11:Substrate layer 111: First surface 112: Second surface 12A, 12B: Copper layer 17A, 17B: Copper clad layer

Claims (12)

一種具導通孔之電路板線路結構的製作方法,包括: 提供一基板,該基板包括一基材層及二銅層,該基材層具有相對之一第一表面及一第二表面,該二銅層分別形成於該基材層之該第一表面及該第二表面; 覆蓋二第一光阻層於該二銅層之表面,並透過曝光及顯影,使該第一表面之一側的該第一光阻層形成一第一圖案結構,使該第二表面之一側的該第一光阻層形成一第二圖案結構; 進行蝕刻製程以去除未被各該第一光阻層所覆蓋之各該銅層之表面; 去除該二第一光阻層; 覆蓋二第二光阻層於各該銅層之表面,並透過曝光,使該第一表面之一側的該第二光阻層形成一第三圖案結構,使該第二表面之一側的該第二光阻層形成一第四圖案結構; 自位於該第一表面之一側的該第二光阻層之表面進行鑽孔,形成至少一第一孔洞,該至少一第一孔洞導通至該基材層之該第二表面,自位於該第二表面之一側的該第二光阻層之表面進行鑽孔,形成至少一第二孔洞,該至少一第二孔洞導通至該基材層之該第一表面; 透過化學方式直接金屬化形成一金屬化層,該金屬化層覆蓋於該至少一第一孔洞之表面、位於該第一表面之一側的該第二光阻層之表面、該至少一第二孔洞之表面及位於該第二表面之一側的該第二光阻層之表面; 透過電鍍形成一覆銅層,該覆銅層分別覆蓋於該至少一第一孔洞及該至少一第二孔洞之表面並分別沿著該至少一第一孔洞及該至少一第二孔洞延伸且覆蓋於該第一表面及該第二表面之一側的該第二光阻層; 透過化學咬蝕去除部分的該覆銅層;以及 去除該二第二光阻層。 A method for manufacturing a circuit board circuit structure with a via, comprising: Providing a substrate, the substrate comprising a base material layer and two copper layers, the base material layer having a first surface and a second surface opposite to each other, the two copper layers being formed on the first surface and the second surface of the base material layer respectively; Covering the surfaces of the two copper layers with two first photoresist layers, and through exposure and development, forming a first pattern structure on the first photoresist layer on one side of the first surface, and forming a second pattern structure on the first photoresist layer on one side of the second surface; Performing an etching process to remove the surfaces of the copper layers not covered by the first photoresist layers; Removing the two first photoresist layers; Covering the surfaces of the copper layers with two second photoresist layers, and through exposure, forming a third pattern structure in the second photoresist layer on one side of the first surface, and forming a fourth pattern structure in the second photoresist layer on one side of the second surface; Drilling from the surface of the second photoresist layer on one side of the first surface to form at least one first hole, the at least one first hole is connected to the second surface of the substrate layer, drilling from the surface of the second photoresist layer on one side of the second surface to form at least one second hole, the at least one second hole is connected to the first surface of the substrate layer; Directly metallizing by chemical means forms a metallization layer, the metallization layer covers the surface of the at least one first hole, the surface of the second photoresist layer located on one side of the first surface, the surface of the at least one second hole, and the surface of the second photoresist layer located on one side of the second surface; Forming a copper-coated layer by electroplating, the copper-coated layer covers the surfaces of the at least one first hole and the at least one second hole, respectively, and extends along the at least one first hole and the at least one second hole, respectively, and covers the second photoresist layer on one side of the first surface and the second surface; Removing part of the copper-coated layer by chemical etching; and Removing the two second photoresist layers. 如請求項1所述之具導通孔之電路板線路結構的製作方法,於去除該二第二光阻層後,更包括: 提供二外層板,各該外層板包括一材料層及一銅材層,該材料層具有相對之一第三表面及一第四表面,各該外層板的該材料層的該第三表面分別設於該基板之該第一表面側及該第二表面側的該銅層,該銅材層形成於該材料層之該第四表面; 覆蓋一第三光阻層於該銅材層之表面,並透過曝光及顯影,使該第三光阻層形成一第五圖案結構; 進行蝕刻製程以去除未被該第三光阻層所覆蓋之該銅材層之表面; 去除該第三光阻層; 覆蓋一第四光阻層於該銅材層之表面,並透過曝光,使該第四光阻層形成一第六圖案結構; 自該第四光阻層之表面進行鑽孔,形成至少一第三孔洞,各該外層板的該至少一第三孔洞分別導通至該基板於該第一表面之一側及該第二表面之一側的該覆銅層; 透過化學方式直接金屬化形成一金屬化層,該金屬化層覆蓋於該至少一第三孔洞之表面及該第四光阻層之表面; 透過電鍍形成一鍍銅層,該鍍銅層覆蓋於該至少一第三孔洞並沿著該至少一第三孔洞延伸且覆蓋於該第四光阻層; 透過化學咬蝕去除部分的該鍍銅層;以及 去除該第四光阻層。 The method for manufacturing a circuit board circuit structure with a via as described in claim 1, after removing the two second photoresist layers, further includes: Providing two outer layer boards, each of the outer layer boards includes a material layer and a copper material layer, the material layer has a third surface and a fourth surface opposite to each other, the third surface of the material layer of each outer layer board is respectively arranged on the copper layer on the first surface side and the second surface side of the substrate, and the copper material layer is formed on the fourth surface of the material layer; Covering a third photoresist layer on the surface of the copper material layer, and forming a fifth pattern structure on the third photoresist layer through exposure and development; Performing an etching process to remove the surface of the copper material layer not covered by the third photoresist layer; Removing the third photoresist layer; Covering a fourth photoresist layer on the surface of the copper material layer, and forming a sixth pattern structure on the fourth photoresist layer through exposure; Drilling from the surface of the fourth photoresist layer to form at least one third hole, the at least one third hole of each outer plate is respectively connected to the copper-clad layer of the substrate on one side of the first surface and one side of the second surface; Forming a metallization layer by direct metallization by chemical means, the metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer; Forming a copper-plated layer by electroplating, the copper-plated layer covers the at least one third hole and extends along the at least one third hole and covers the fourth photoresist layer; Removing a portion of the copper-plated layer by chemical etching; and Removing the fourth photoresist layer. 如請求項1所述之具導通孔之電路板線路結構的製作方法,於去除該二第二光阻層後,更包括: 提供一外層板,該外層板包括一材料層及一銅材層,該材料層具有相對之一第三表面及一第四表面,該材料層的該第三表面設於該基板之該第一表面側的該銅層,該銅材層形成於該材料層之該第四表面; 覆蓋一第三光阻層於該銅材層之表面及第二表面之一側的該銅層之表面,並透過曝光及顯影,使該第三光阻層形成一第五圖案結構; 進行蝕刻製程以去除未被該第三光阻層所覆蓋之該銅材層之表面; 去除該第三光阻層; 覆蓋一第四光阻層於該銅材層之表面及第二表面之一側的該銅層之表面,並透過曝光,使該第四光阻層形成一第六圖案結構; 自該第一表面之一側的第四光阻層之表面進行鑽孔,形成至少一第三孔洞,該至少一第三孔洞導通至該基板於該第一表面之一側的該覆銅層; 透過化學方式直接金屬化形成一金屬化層,該金屬化層覆蓋於該至少一第三孔洞之表面及該第四光阻層之表面; 透過電鍍形成一鍍銅層,該鍍銅層覆蓋於該至少一第三孔洞並沿著該至少一第三孔洞延伸且覆蓋於該第四光阻層; 透過化學咬蝕去除部分的該鍍銅層;以及 去除該第四光阻層。 The manufacturing method of a circuit board circuit structure with via holes as described in claim 1, after removing the two second photoresist layers, further includes: An outer layer board is provided. The outer layer board includes a material layer and a copper material layer. The material layer has an opposite third surface and a fourth surface. The third surface of the material layer is located on the first surface of the substrate. The copper layer on the surface side, the copper material layer is formed on the fourth surface of the material layer; Cover a third photoresist layer on the surface of the copper material layer and the surface of the copper layer on one side of the second surface, and through exposure and development, the third photoresist layer forms a fifth pattern structure; Perform an etching process to remove the surface of the copper layer not covered by the third photoresist layer; Remove the third photoresist layer; Covering a fourth photoresist layer on the surface of the copper material layer and the surface of the copper layer on one side of the second surface, and exposing the fourth photoresist layer to form a sixth pattern structure; Drilling is performed from the surface of the fourth photoresist layer on one side of the first surface to form at least one third hole. The at least one third hole is conductive to the copper clad layer on one side of the first surface of the substrate. ; A metallization layer is formed by direct metallization through chemical means, and the metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer; Forming a copper plating layer through electroplating, the copper plating layer covers the at least one third hole and extends along the at least one third hole and covers the fourth photoresist layer; removing part of the copper plating layer through chemical etching; and Remove the fourth photoresist layer. 如請求項1至3任一項所述之具導通孔之電路板線路結構的製作方法,其中於化學咬蝕後,該覆銅層之高度齊平於該第二光阻層。The method for manufacturing a circuit board circuit structure with via holes as described in any one of claims 1 to 3, wherein after chemical etching, the height of the copper-clad layer is flush with the second photoresist layer. 如請求項1至3任一項所述之具導通孔之電路板線路結構的製作方法,其中於化學咬蝕後,該覆銅層之高度齊平於該銅層。The method for manufacturing a circuit board circuit structure with via holes as described in any one of claims 1 to 3, wherein after chemical etching, the height of the copper-clad layer is flush with the copper layer. 如請求項2所述之具導通孔之電路板線路結構的製作方法,其中於該外層板化學咬蝕後,該鍍銅層之高度齊平於該第四光阻層。As claimed in claim 2, the method for manufacturing a circuit board circuit structure with via holes, wherein after the outer layer board is chemically etched, the height of the copper plating layer is flush with the fourth photoresist layer. 如請求項2所述之具導通孔之電路板線路結構的製作方法,其中於該外層板化學咬蝕後,該鍍銅層之高度齊平於該銅材層。The method for manufacturing a circuit board circuit structure with via holes as described in claim 2, wherein after the outer layer board is chemically etched, the height of the copper plating layer is flush with the copper material layer. 如請求項2所述之具導通孔之電路板線路結構的製作方法,其中該二外層板的該材料層分別包覆部分該基板於該第一表面之一側及該第二表面之一側的該覆銅層。A method for manufacturing a circuit board wiring structure with a through hole as described in claim 2, wherein the material layers of the two outer layers respectively cover a portion of the copper-clad layer of the substrate on one side of the first surface and one side of the second surface. 如請求項3所述之具導通孔之電路板線路結構的製作方法,其中該外層板的該材料層包覆部分該基板於該第一表面之一側的該覆銅層。The method for manufacturing a circuit board circuit structure with via holes as described in claim 3, wherein the material layer of the outer layer board covers part of the copper clad layer of the substrate on one side of the first surface. 如請求項1所述之具導通孔之電路板線路結構的製作方法,其中該第一光阻層及該第二光阻層為乾膜光阻。As claimed in claim 1, the method for manufacturing a circuit board circuit structure with via holes, wherein the first photoresist layer and the second photoresist layer are dry film photoresist. 如請求項1所述之具導通孔之電路板線路結構的製作方法,其中該至少一第一孔洞及該至少一第二孔洞係利用一雷射鑽孔方式形成。As claimed in claim 1, the method for manufacturing a circuit board circuit structure with via holes, wherein the at least one first hole and the at least one second hole are formed using a laser drilling method. 一種如請求項1至11任一項所述之具導通孔之電路板線路結構的製作方法所製成的具導通孔之電路板線路結構。A circuit board wiring structure with via holes manufactured by the manufacturing method of a circuit board wiring structure with via holes as described in any one of claims 1 to 11.
TW111131767A 2022-08-23 Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof TWI836568B (en)

Publications (2)

Publication Number Publication Date
TW202410754A TW202410754A (en) 2024-03-01
TWI836568B true TWI836568B (en) 2024-03-21

Family

ID=

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200329552A1 (en) 2019-04-10 2020-10-15 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component Carrier With High Passive Intermodulation Performance

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200329552A1 (en) 2019-04-10 2020-10-15 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Component Carrier With High Passive Intermodulation Performance

Similar Documents

Publication Publication Date Title
JP3786554B2 (en) Circuit board manufacturing method for forming fine structure layer on both sides of flexible film
JP6293998B2 (en) Multilayer circuit board manufacturing method and multilayer circuit board manufactured by the manufacturing method
KR101164598B1 (en) Manufacturing method of multi-layer circuit board
US10292279B2 (en) Disconnect cavity by plating resist process and structure
US20120080401A1 (en) Method of fabricating multilayer printed circuit board
US4769309A (en) Printed circuit boards and method for manufacturing printed circuit boards
JP4128649B2 (en) Method for manufacturing thin film multilayer circuit board
TWI836568B (en) Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof
JPH05291744A (en) Manufacture of multilayer interconnection board and insulating board with multilayer metal layer
TWI414223B (en) Method of forming multi-trace via
JPH1167961A (en) Multilayered printed wiring board and manufacture of multilayered printed wiring board
KR100744994B1 (en) Multi-layer PCB and manufacturing method thereof
US6555016B2 (en) Method of making multilayer substrate
TW202410754A (en) Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof
TWM612421U (en) Circuit board wiring structure with via hole
KR20130079118A (en) Method for manufacturing multi-layer circuit board and multi-layer circuit board manufactured by the same method
KR101987378B1 (en) Method of manufacturing printed circuit board
JPH09232760A (en) Multilayered printed-wiring board and manufacture thereof
CN117677059A (en) Manufacturing method of circuit board line structure with through holes and manufactured circuit board line structure with through holes
JP2005108941A (en) Multilayer wiring board and its manufacturing method
JPH04286389A (en) Manufacture of circuit board
KR20040036781A (en) Method of manufacturing build-up printed circuit board using metal bump
TWI767585B (en) Manufacturing method of circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof
TWI805042B (en) Circuit board and manufacturing method thereof
KR100736146B1 (en) Method for fabricating the flexible circuit board