TWI836239B - Method and system for binary search - Google Patents

Abstract

The present invention provides a method and system for binary search. The method comprises providing a memory device with M entries, each entry storing a value; providing an index register including N register blocks, wherein the N register blocks partition the memory device into N-1, N or N+1 search areas; wherein M and N are integers and N<M; wherein when a target value is being searched in the memory device, the target value is determined to be fall between two adjacent register blocks, and only the addresses of the memory device in between the two register blocks are left for search.

Description

Method and system for binary search

The present invention relates to a method and system for binary search, and more particularly, to a method and system for a scalable hardware binary search design with constant maximum response time.

Binary search, also known as half-interval search, logarithmic search or binary truncation algorithm. It is a search algorithm that finds the location of a target value in a sorted array. Binary search compares the target value with the middle element of the array. If the middle element is exactly the element to be searched, the search ends. If the search target value is greater than or less than the middle element, search in the half of the array that is greater than or less than the middle element. Continue searching the remaining half of the interval, compare the middle element with the target value again, and repeat this operation until the target value is found. If the search range ends, the target is not in the array.

Please refer to Figure 1A and Figure 1B together, which illustrate the traditional binary search.

As can be seen in Figure A, the binary search table is stored in the memory and is about to be searched. The memory includes several addresses, from #0, #1 to #15. Each address stores an s value. For example, #0 stores the value 3, #4 stores the value 20, and #13 stores the value 87. Now request a search query. The search query requests to search whether the value 75 exists in the memory.

Referring to FIG1A , the traditional binary search method first executes step 1, which includes the following sub-steps: (1) reading the value stored in the memory address #7; (2) finding the value 47 in #7 and determining that 47<75; (3) then determining that the target value is not in the range of #0~#6 and that no search is required because the values are stored in order, as shown in FIG1A .

The traditional binary search proceeds to step 2, which also includes the following sub-steps: (1) Read the value stored in storage address #11; (2) Find the value 72 in #11, and determine that 72<75; (3) Then make sure there is no need to search for #8~#10 because the values are stored in order.

See Figure 1B, step 3 of the traditional binary search method. Step 3 also performs the following sub-steps: (1) read the value stored in the memory address #13; (2) find the value 87 in #13 and determine that 87>75; (3) then determine that there is no need to search #14~#15 because the values are stored in order.

The traditional binary search finally proceeds to step 4, which also includes the following sub-steps: (1) Read the value stored in memory address #12; (2) Find that the value 80 is stored in memory address #12; (3) It can be concluded that 75 does not exist in the memory.

Therefore, the traditional hardware binary search design has certain flaws. For example, sorting and inserting table items through hardware requires complex logic circuit design and more execution time. Furthermore, for a table with M entries, the maximum response time for a binary search is log ₂ M. Also, larger table sizes result in larger maximum response times.

Furthermore, for another traditional BCAM, it provides a shorter search time but requires a larger circuit area, which leads to higher cost.

The present invention relates to a binary search method, comprising: providing a storage device having M entries, each entry storing an array value; providing an index register comprising N registers, wherein the N registers divide the storage device into N-1, N or N+1 search areas; wherein M and N are integers and N<M; wherein, when searching for a target value in the storage device, it is determined that the target value falls between two adjacent registers, and only the address of the storage device between the two registers is left to search.

Preferably, the temporary register is extracted from M entries of the storage device.

Preferably, the values stored in the storage device are arranged in order from small to large.

Preferably, the values stored in the storage device are arranged in order from large to small.

Preferably, the sorting is performed by software.

The present invention relates to a binary search system, comprising: a storage device, the storage device comprising M entries, each entry storing a value; and an index register, the index register comprising N registers, the N registers dividing the storage device into N-1, N or N+1 search areas; wherein M and N are integers and N<M; wherein, when searching for a target value in a memory, it is determined that the target value falls between two adjacent registers, leaving only the memory address between the two registers for searching.

Preferably, the temporary register is extracted from M entries of the storage device

Preferably, the values stored in the storage device are arranged in order from small to large.

Preferably, the values stored in the storage device are arranged in order from large to small.

Preferably, the sorting is performed by software.

201, 301: Memory

202, 302: Index register

Figures 1A-1B illustrate a traditional binary search; Figures 2A-2C illustrate the improved binary search method of the present invention; and Figure 3 provides a general illustration of the improved binary search method of the present invention.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by a person skilled in the art to which this disclosure belongs. It will be further understood that terms; such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted here in an idealized or overly formal meaning unless expressly so defined.

References throughout this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in at least one embodiment. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing throughout this specification do not necessarily all refer to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

Please refer to Figures 2A-2C. Figures 2A-2C are schematic diagrams of the improved binary search method of the present invention. In addition, the present invention can also be understood as an improved binary search with additional binary search tables in the memory and register.

As shown in FIG. 2A , multiple values are stored in memory 201. Memory 201 includes 16 addresses numbered from #0 to #15. However, the number of addresses in the memory is not limited. A person of ordinary skill in the art can apply the disclosure of the present invention to other memories having more addresses.

Returning to FIG. 2A , each address of memory 201 stores a value. For example, address #0 stores the value 3, address #6 stores the value 43, and address #14 stores the value 94. The values described and shown in the figure are for exemplary purposes only and should not limit the scope of the present invention.

Each value is stored in order from small to large. When these values enter the memory 201, they can be sorted by software. However, the sorting method is well known to ordinary technicians in this field and will not be described here.

The sorting can be modified accordingly. That is to say, each value can be arranged in order from large to small, and the present invention can still be applied.

As further shown in FIG. 2A, an index register 202 is also provided. The index register 202 includes four addresses, namely #0, #5, #10 and #15. For each address, the value 3, the value 31, the value 67, and the value 98 are stored in addresses #0, #5, #10, and #15 respectively. Next, the request comes in. The request asks whether value 75 exists in memory 201 . Index register 202 can be in any form. That is to say, the index register 202 can be implemented as software or hardware.

Next, referring to Figure 2B, step 1 after the request comes in is further explained. For step 1, according to the information recorded in the index register 202, it can be found that 75 is greater than 67 and less than 98. That is 67<75<98. Therefore, addresses #0 to #9 and addresses #10 and #15 can be eliminated from the search because the target value 75 falls between 67 (stored in #10) and 98 (stored in #15), making the search Execute from address #11 to address #14. It can be seen from the figure that this index register 202 helps to exclude more than half of the addresses without reading from the memory.

Next, refer to Figure 2C, which shows steps 2 and 3. In step 2, the value stored in address #12 is read. The value 80 is found to be stored in address #80. Since the value 80 is greater than the target value 75, and each stored value is arranged in order, it will soon be found that there is no need to search from address #13 to #14, because the value stored in both addresses must be greater than the value 75.

The present invention further proceeds to step 3, and then reads the value stored in the memory address #11. Then it is found that the value stored in the address #11 is 72. Such a value 72 is the last value that is not currently excluded. However, since 72 is not equal to 75, it can be concluded that the value 75 does not exist in the memory 201.

Returning to step 2 of Figure 2C, a person skilled in the art can adjust the reading of the values stored in other addresses accordingly (for example, instead of reading the value in #12, the value stored in 13 can be read)

Reference is next made to Figure 3, which provides a general illustration of the improved binary search method of the present invention.

Assume that the memory 301 includes M entries, numbered from entry 1, entry 2, ... to entry M. Each entry stores a value, and all values are arranged in ascending order. Sorting can be done with the assistance of software. Since the relevant technology of sorting is a conventional technology in this field, it will not be repeated for convenience.

The sorting can be modified accordingly. That is, each value can be arranged in order from largest to smallest, and the present invention can still be applied.

Referring again to FIG. 3 , an index register 302 is provided. The index register 302 includes N regions, numbered Reg 1, Reg 2… to Reg N. The N regions divide the binary search table into N+1 binary search areas, labeled Binary Search Area 1, Binary Search Area 2… to Binary Search Area N+1.

Applying the above steps, the improved binary search of the present invention can further reduce computing resources.

Therefore, the table entries are sorted by software. When setting up the contents of a hardware binary search table with M entries in memory, software also sets up an additional N index registers (N<M), each containing the same ([M/(N+1)]*K)'th table entries, where K ranges from 1 to N.

It should be noted that the N regions are extracted from the addresses of the memory. For example, in FIG. As shown in FIG. 2A , the index register 202 has four regions, which are extracted from address #0, address #5, address #10, and address #15, respectively.

It should also be noted that if the first and last addresses of the memory are extracted, the divided search areas will be reduced to N-1. If one of the first and last addresses of the memory is extracted, the partition search area is N. If the first and last addresses of the memory are not extracted, the partition search area is N+1.

By applying the above steps, the improved binary search of the present invention can further reduce computing resources.

Therefore, the table entries are sorted by software. When setting up the contents of a hardware binary search table with M entries in memory, software also sets up an additional N index registers (N<M), each containing the same ([M/(N+1)]*K)'th table entries, where K ranges from 1 to N.

It should be noted that the N regions are extracted from the addresses of the memory. For example, in FIG. As shown in FIG. 2A , the index register 202 has four regions, which are extracted from address #0, address #5, address #10, and address #15, respectively.

It should also be noted that if the first and last addresses of the memory are extracted, the divided search areas will be reduced to N-1. If one of the first and last addresses of the memory is extracted, the partition search area is N. If the first and last addresses of the memory are not extracted, the partition search area is N+1.

By storing information in the index scratchpad, the target binary search area in memory is significantly reduced, and the size of the search area is fixed regardless of the size of the table. The maximum binary search time is upper bounded by log ₂ ((MN)/(N+1)).

In summary, for the present invention, it can be further understood that with the assistance of software, no matter how big the size of the hardware table is, the upper limit of the maximum search time of the binary search in the memory of the present invention can be fixed.

In summary, one of the purposes of the present invention is to control the maximum search time limit of binary search to meet performance requirements.

In addition, the present invention can be applied to various environments, such as all hardware binary search table designs. No matter how big the table size is, the maximum search response time can be limited through software assistance.

In summary, according to the present invention, the sorting of form entries and the insertion of additional index registers are handled by software. This design reduces hardware complexity.

Furthermore, by adding an appropriate number of index registers, the maximum binary search response time can be controlled to meet performance requirements. High-cost BCAM is not necessarily required as a solution.

In summary, the present invention has certain potential applications and markets. For example, all hardware binary search table designs require a finite maximum response time, regardless of table size.

In summary, the present invention provides a scalable hardware binary search design with a fixed maximum response time, in which table entry sorting and insertion are handled by software. In addition, an appropriate amount of index registers are added to record the contents of the memory. Using the index register, the target binary search area is only a small part of the table, and the search area size remains unchanged, but the size of the entire search table can be increased.

It can be seen that this disclosure has indeed achieved the desired improvement effect by breaking through the previous technology, and it is not easily imagined by those familiar with the technology. Its progress and practicality clearly meet the requirements for patent application. Yuan filed a patent application in accordance with the law.

The above description is for illustrative purposes only and is not intended to be limiting. Any other equivalent modifications or changes that do not depart from the spirit and scope of this disclosure should be included in the scope of the attached patent application.

201:Memory

202: Index register

Claims (10)

A binary search method, including: providing a storage device with M entries, each entry storing an array value; providing an index register including N temporary registers, wherein the N temporary registers store the device Divided into N-1, N or N+1 search areas; where M and N are integers and N<M; wherein, when searching for a target value in the storage device, it is determined that the target value falls in an adjacent Between the two registers, only the memory addresses marked by the remaining two registers are searched. The binary search method as described in claim 1 is characterized in that the register is extracted from M entries of the storage device. The binary search method as described in claim 1 is characterized in that the array values stored in the storage device are arranged in order from small to large. The binary search method according to claim 1, characterized in that the array values stored in the storage device are arranged in order from large to small. The binary search method as described in claim 2 is characterized in that the sorting is performed by software. A binary search system includes: a storage device, the storage device includes M entries, each of the entries stores an array value; and an index temporary register, the index temporary register includes N temporary registers, the N temporary registers divide the storage device into N-1, N or N+1 search areas; where M and N are integers and N<M; When searching for the target value in the storage device, it is determined that the target value falls between two adjacent temporary registers, and only the memory addresses marked by the remaining two temporary registers are searched. A binary search system as described in claim 6, characterized in that the register is extracted from M entries of the storage device. The binary search system according to claim 6, characterized in that the array values stored in the storage device are arranged in order from small to large. The binary search method as described in claim 6 is characterized in that the array values stored in the storage device are arranged in order from large to small. The binary search system of claim 7, wherein the sorting is performed by software.