TWI832522B - Solid-state battery and method of forming the same - Google Patents
Solid-state battery and method of forming the same Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 359
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 359
- 239000010703 silicon Substances 0.000 claims abstract description 359
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 210
- 239000000956 alloy Substances 0.000 claims abstract description 210
- 239000000835 fiber Substances 0.000 claims abstract description 146
- 239000007784 solid electrolyte Substances 0.000 claims description 73
- 229910000077 silane Inorganic materials 0.000 claims description 16
- -1 silane compound Chemical class 0.000 claims description 15
- 229910021332 silicide Inorganic materials 0.000 claims description 12
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 12
- LKTZODAHLMBGLG-UHFFFAOYSA-N alumanylidynesilicon;$l^{2}-alumanylidenesilylidenealuminum Chemical compound [Si]#[Al].[Si]#[Al].[Al]=[Si]=[Al] LKTZODAHLMBGLG-UHFFFAOYSA-N 0.000 claims description 7
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052744 lithium Inorganic materials 0.000 claims description 5
- WEAMLHXSIBDPGN-UHFFFAOYSA-N (4-hydroxy-3-methylphenyl) thiocyanate Chemical compound CC1=CC(SC#N)=CC=C1O WEAMLHXSIBDPGN-UHFFFAOYSA-N 0.000 claims description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims description 4
- 238000001816 cooling Methods 0.000 claims description 4
- 229910052746 lanthanum Inorganic materials 0.000 claims description 4
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 4
- 229910021341 titanium silicide Inorganic materials 0.000 claims description 4
- 229910052725 zinc Inorganic materials 0.000 claims description 4
- 239000011701 zinc Substances 0.000 claims description 4
- 229910021355 zirconium silicide Inorganic materials 0.000 claims description 4
- JUZTWRXHHZRLED-UHFFFAOYSA-N [Si].[Cu].[Cu].[Cu].[Cu].[Cu] Chemical compound [Si].[Cu].[Cu].[Cu].[Cu].[Cu] JUZTWRXHHZRLED-UHFFFAOYSA-N 0.000 claims description 3
- 229910021360 copper silicide Inorganic materials 0.000 claims description 3
- 229910021334 nickel silicide Inorganic materials 0.000 claims description 3
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 claims description 3
- 239000003792 electrolyte Substances 0.000 abstract description 6
- 239000011149 active material Substances 0.000 description 7
- 230000007547 defect Effects 0.000 description 7
- 239000011148 porous material Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 3
- 239000004372 Polyvinyl alcohol Substances 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 229910001416 lithium ion Inorganic materials 0.000 description 3
- 229920002451 polyvinyl alcohol Polymers 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- WMFOQBRAJBCJND-UHFFFAOYSA-M Lithium hydroxide Chemical compound [Li+].[OH-] WMFOQBRAJBCJND-UHFFFAOYSA-M 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- UCKMPCXJQFINFW-UHFFFAOYSA-N Sulphide Chemical compound [S-2] UCKMPCXJQFINFW-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000002388 carbon-based active material Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000000635 electron micrograph Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910000664 lithium aluminum titanium phosphates (LATP) Inorganic materials 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000007773 negative electrode material Substances 0.000 description 2
- 229920002239 polyacrylonitrile Polymers 0.000 description 2
- 239000007774 positive electrode material Substances 0.000 description 2
- 238000002791 soaking Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 229910009178 Li1.3Al0.3Ti1.7(PO4)3 Inorganic materials 0.000 description 1
- 229910009511 Li1.5Al0.5Ge1.5(PO4)3 Inorganic materials 0.000 description 1
- 229910005317 Li14Zn(GeO4)4 Inorganic materials 0.000 description 1
- FVXHSJCDRRWIRE-UHFFFAOYSA-H P(=O)([O-])([O-])[O-].[Ge+2].[Al+3].[Li+].P(=O)([O-])([O-])[O-] Chemical compound P(=O)([O-])([O-])[O-].[Ge+2].[Al+3].[Li+].P(=O)([O-])([O-])[O-] FVXHSJCDRRWIRE-UHFFFAOYSA-H 0.000 description 1
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- NTWPHJIMOASYCB-UHFFFAOYSA-L [Cl-].[P+]=S.[Li+].[Cl-] Chemical compound [Cl-].[P+]=S.[Li+].[Cl-] NTWPHJIMOASYCB-UHFFFAOYSA-L 0.000 description 1
- BEIGBGLXBWDILI-UHFFFAOYSA-N [Ge]=O.[Zn].[Li] Chemical compound [Ge]=O.[Zn].[Li] BEIGBGLXBWDILI-UHFFFAOYSA-N 0.000 description 1
- NRJJZXGPUXHHTC-UHFFFAOYSA-N [Li+].[O--].[O--].[O--].[O--].[Zr+4].[La+3] Chemical compound [Li+].[O--].[O--].[O--].[O--].[Zr+4].[La+3] NRJJZXGPUXHHTC-UHFFFAOYSA-N 0.000 description 1
- HALDOABDCFSGQQ-UHFFFAOYSA-N [P]=S.[Ge].[Li] Chemical compound [P]=S.[Ge].[Li] HALDOABDCFSGQQ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- CVJYOKLQNGVTIS-UHFFFAOYSA-K aluminum;lithium;titanium(4+);phosphate Chemical compound [Li+].[Al+3].[Ti+4].[O-]P([O-])([O-])=O CVJYOKLQNGVTIS-UHFFFAOYSA-K 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- WCCJDBZJUYKDBF-UHFFFAOYSA-N copper silicon Chemical compound [Si].[Cu] WCCJDBZJUYKDBF-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003487 electrochemical reaction Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011244 liquid electrolyte Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000003303 reheating Methods 0.000 description 1
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Abstract
Description
本揭示內容是關於一種固態電池及其形成方法。The present disclosure relates to a solid-state battery and methods of forming the same.
固態電解質取代液態電解液應用於固態電池中。然而固態電解質與正極及負極的介面若接觸不良將導致電池效能下降。以往解決介面接觸不良的方式是將部分液態或膠態電解質摻入正極及負極材料之間，並透過加壓的方式使摻雜了液態或膠態電解質的正極及負極材料接觸並固定於固態電解質上。此種方式使介面之間仍具孔隙或缺陷，無法有效降低電阻。因此亟需開發一種新的固態電池及其形成方法，使介面之間具有良好的接觸。Solid electrolytes replace liquid electrolytes in solid-state batteries. However, poor contact between the solid electrolyte and the positive and negative electrodes will lead to a decrease in battery performance. In the past, the way to solve the problem of poor interface contact was to mix part of the liquid or colloidal electrolyte between the positive and negative electrode materials, and pressurize the positive and negative electrode materials doped with the liquid or colloidal electrolyte to contact and fix it to the solid electrolyte. superior. This method still leaves pores or defects between the interfaces and cannot effectively reduce the resistance. Therefore, there is an urgent need to develop a new solid-state battery and its formation method to ensure good contact between interfaces.
本揭示內容關於一種固態電池。固態電池包括正極、負極、固態電解質層、第一介面層及第二介面層。固態電解質層位於正極及負極之間。第一介面層位於固態電解質層及正極之間，其中第一介面層包括第一含矽合金層、第二含矽合金層及第一矽纖維層。第一含矽合金層直接接觸固態電解質層。第一矽纖維層位於第一含矽合金層及第二含矽合金層之間。第二介面層位於固態電解質層及負極之間，其中第二介面層包括第三含矽合金層、第四含矽合金層及第二矽纖維層。第三含矽合金層直接接觸固態電解質層。第二矽纖維層位於第三含矽合金層及第四含矽合金層之間。This disclosure relates to a solid-state battery. The solid-state battery includes a positive electrode, a negative electrode, a solid electrolyte layer, a first interface layer and a second interface layer. The solid electrolyte layer is located between the positive electrode and the negative electrode. The first interface layer is located between the solid electrolyte layer and the positive electrode, wherein the first interface layer includes a first silicon-containing alloy layer, a second silicon-containing alloy layer and a first silicon fiber layer. The first silicon-containing alloy layer directly contacts the solid electrolyte layer. The first silicon fiber layer is located between the first silicon-containing alloy layer and the second silicon-containing alloy layer. The second interface layer is located between the solid electrolyte layer and the negative electrode, where the second interface layer includes a third silicon-containing alloy layer, a fourth silicon-containing alloy layer and a second silicon fiber layer. The third silicon-containing alloy layer directly contacts the solid electrolyte layer. The second silicon fiber layer is located between the third silicon-containing alloy layer and the fourth silicon-containing alloy layer.
在一些實施方式中，第一矽纖維層及第二矽纖維層各自獨立包括球狀矽纖維、線狀矽纖維或其組合。In some embodiments, the first silicon fiber layer and the second silicon fiber layer independently include spherical silicon fibers, linear silicon fibers, or a combination thereof.
在一些實施方式中，第一含矽合金層及第三含矽合金層各自獨立包括矽化鋰、矽化鑭、矽化鋯、矽化鍺、矽化鋅、矽化鋁、矽化鈦或其組合。In some embodiments, the first silicon-containing alloy layer and the third silicon-containing alloy layer each independently include lithium silicide, lanthanum silicide, zirconium silicide, germanium silicide, zinc silicide, aluminum silicide, titanium silicide, or a combination thereof.
在一些實施方式中，第二含矽合金層包括矽化鋁、矽化鎳或其組合，以及第四含矽合金層包括矽化銅。In some embodiments, the second silicon-containing alloy layer includes aluminum silicide, nickel silicide, or a combination thereof, and the fourth silicon-containing alloy layer includes copper silicide.
在一些實施方式中，第一含矽合金層的第一厚度、第二含矽合金層的第二厚度、第三含矽合金層的第三厚度及第四含矽合金層的第四厚度各自獨立為1 µm至20 µm。In some embodiments, the first thickness of the first silicon-containing alloy layer, the second thickness of the second silicon-containing alloy layer, the third thickness of the third silicon-containing alloy layer, and the fourth thickness of the fourth silicon-containing alloy layer each Independently 1 µm to 20 µm.
本揭示內容亦關於一種形成固態電池的方法。方法包括以下操作。形成第一含矽合金層覆蓋固態電解質層的上表面及第二含矽合金層覆蓋固態電解質層的下表面。形成第一矽纖維層於第一含矽合金層上及第二矽纖維層於第二含矽合金層下。設置正極於第一矽纖維層上。形成第三含矽合金層於正極及第一矽纖維層之間。設置負極於第二矽纖維層下。形成第四含矽合金層於負極及第二矽纖維層之間。The present disclosure also relates to a method of forming a solid-state battery. Methods include the following operations. A first silicon-containing alloy layer is formed to cover the upper surface of the solid electrolyte layer and a second silicon-containing alloy layer is formed to cover the lower surface of the solid electrolyte layer. A first silicon fiber layer is formed on the first silicon-containing alloy layer and a second silicon fiber layer is formed under the second silicon-containing alloy layer. Place the positive electrode on the first silicon fiber layer. A third silicon-containing alloy layer is formed between the positive electrode and the first silicon fiber layer. Place the negative electrode under the second silicon fiber layer. A fourth silicon-containing alloy layer is formed between the negative electrode and the second silicon fiber layer.
在一些實施方式中，形成第一含矽合金層及第二含矽合金層以及形成第一矽纖維層及第二矽纖維層包括以矽烷化合物處理固態電解質層的上表面及下表面。In some embodiments, forming the first silicon-containing alloy layer and the second silicon-containing alloy layer and forming the first silicon fiber layer and the second silicon fiber layer include treating the upper surface and the lower surface of the solid electrolyte layer with a silane compound.
在一些實施方式中，以矽烷化合物處理固態電解質層包括在400°C至800°C的溫度下以矽烷化合物處理固態電解質層。In some embodiments, treating the solid electrolyte layer with a silane compound includes treating the solid electrolyte layer with a silane compound at a temperature of 400°C to 800°C.
在一些實施方式中，方法更包括在形成第一矽纖維層及第二矽纖維層之後冷卻固態電解質層、第一含矽合金層、第二含矽合金層、第一矽纖維層及第二矽纖維層至20°C至30°C的溫度範圍。In some embodiments, the method further includes cooling the solid electrolyte layer, the first silicon-containing alloy layer, the second silicon-containing alloy layer, the first silicon fiber layer and the second silicon fiber layer after forming the first silicon fiber layer and the second silicon fiber layer. silicon fiber layer to a temperature range of 20°C to 30°C.
在一些實施方式中，形成第三含矽合金層及形成第四含矽合金層包括在400°C至800°C的溫度下以矽烷化合物處理正極及負極。In some embodiments, forming the third silicon-containing alloy layer and forming the fourth silicon-containing alloy layer includes treating the positive electrode and the negative electrode with a silane compound at a temperature of 400°C to 800°C.
為了使本揭示內容的敘述更加詳細及完整，下文針對實施方式的態樣及具體實施方式做出說明性的描述。這並非限制本揭示內容的實施方式為唯一形式。本揭示內容的實施方式在有益的情形下可相互結合或取代，在未進一步記載或說明的情況下亦可附加其他實施方式。In order to make the description of the present disclosure more detailed and complete, an illustrative description of aspects and specific implementation modes of the embodiments is provided below. This is not intended to limit the implementation of the present disclosure to the only form. The embodiments of the present disclosure may be combined with or substituted for each other under beneficial circumstances, and other embodiments may be added without further description or explanation.
此外空間相對用語，例如下方和上方等，可在本揭示內容中描述一個元件或特徵與圖中另一個元件或特徵的關係。除了圖中描述的方向，空間相對用語旨在涵蓋裝置使用或操作時的不同方向。例如裝置可能以其他方式定向（例如：旋轉90度或其他方向），本揭示內容的空間相對用語可相對應地解釋。在本揭示內容中，除非另有說明，否則不同圖中相同的元件編號是指相同或相似的材料藉由相同或相似的方法形成的相同或相似的元件。Additionally, spatially relative terms, such as below and above, may be used in this disclosure to describe one element or feature's relationship to another element or feature in the figures. In addition to the orientation depicted in the figures, spatially relative terms are intended to cover different orientations of use or operation of the device. For example, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative terms of this disclosure interpreted accordingly. In this disclosure, unless otherwise stated, the same element numbers in different figures refer to the same or similar elements formed of the same or similar materials by the same or similar methods.
本揭示內容關於一種固態電池。固態電池包括正極、負極、固態電解質層、第一介面層及第二介面層。固態電解質層位於正極及負極之間。第一介面層位於固態電解質層及正極之間，其中第一介面層包括第一含矽合金層、第二含矽合金層及第一矽纖維層。第一含矽合金層直接接觸固態電解質層。第一矽纖維層位於第一含矽合金層及第二含矽合金層之間。第二介面層位於固態電解質層及負極之間，其中第二介面層包括第三含矽合金層、第四含矽合金層及第二矽纖維層。第三含矽合金層直接接觸固態電解質層。第二矽纖維層位於第三含矽合金層及第四含矽合金層之間。本揭示內容的固態電池中，第一介面層及第二介面層分別使正極及負極固定於固態電解質層上，且提供良好及連續的介面，使介面之間的電阻低。此外，第一介面層及第二介面層亦可作為正極及負極的活性材料，提升固態電池的電流密度。接下來詳細說明本揭示內容的固態電池。This disclosure relates to a solid-state battery. The solid-state battery includes a positive electrode, a negative electrode, a solid electrolyte layer, a first interface layer and a second interface layer. The solid electrolyte layer is located between the positive electrode and the negative electrode. The first interface layer is located between the solid electrolyte layer and the positive electrode, wherein the first interface layer includes a first silicon-containing alloy layer, a second silicon-containing alloy layer and a first silicon fiber layer. The first silicon-containing alloy layer directly contacts the solid electrolyte layer. The first silicon fiber layer is located between the first silicon-containing alloy layer and the second silicon-containing alloy layer. The second interface layer is located between the solid electrolyte layer and the negative electrode, where the second interface layer includes a third silicon-containing alloy layer, a fourth silicon-containing alloy layer and a second silicon fiber layer. The third silicon-containing alloy layer directly contacts the solid electrolyte layer. The second silicon fiber layer is located between the third silicon-containing alloy layer and the fourth silicon-containing alloy layer. In the solid-state battery of the present disclosure, the first interface layer and the second interface layer fix the positive electrode and the negative electrode on the solid electrolyte layer respectively, and provide a good and continuous interface, so that the resistance between the interfaces is low. In addition, the first interface layer and the second interface layer can also be used as active materials for the positive and negative electrodes to increase the current density of the solid-state battery. Next, the solid-state battery of the present disclosure will be described in detail.
第1圖是根據本揭示內容一些實施方式的固態電池100的示意圖。固態電池100包括正極101、第一介面層103、固態電解質層105、第二介面層107及負極109。固態電解質層105位於正極101及負極109之間。第一介面層103位於固態電解質層105及正極101之間。第二介面層107位於固態電解質層105及負極109之間。本揭示內容並未限制固態電池的形狀。例如在一些實施方式中，固態電池如第1圖所示為平板狀。然而在另一些實施方式中，固態電池為捲繞狀（未圖示）。接下來參照第1圖詳細說明固態電池100的正極101、第一介面層103、固態電解質層105、第二介面層107及負極109。Figure 1 is a schematic diagram of a solid-state battery 100 in accordance with some embodiments of the present disclosure. The solid-state battery 100 includes a positive electrode 101, a first interface layer 103, a solid electrolyte layer 105, a second interface layer 107 and a negative electrode 109. The solid electrolyte layer 105 is located between the positive electrode 101 and the negative electrode 109 . The first interface layer 103 is located between the solid electrolyte layer 105 and the positive electrode 101 . The second interface layer 107 is located between the solid electrolyte layer 105 and the negative electrode 109 . This disclosure does not limit the shape of the solid-state battery. For example, in some embodiments, the solid-state battery is flat as shown in Figure 1 . However, in other embodiments, the solid-state battery is in a coiled form (not shown). Next, the positive electrode 101, the first interface layer 103, the solid electrolyte layer 105, the second interface layer 107 and the negative electrode 109 of the solid-state battery 100 will be described in detail with reference to FIG. 1 .
正極101及負極109透過電化學反應使兩者之間具電位差，因此載子（例如電子或電洞）可在正極101及負極109之間流動。在一些實施方式中，正極101包括鋁、鎳或其組合。在一些實施方式中，負極109包括銅。在一些實施方式中，正極101經過預鋰化（詳細參照下文形成固態電池的方法）處理之後更包括鋰離子。鋰離子使更多載子在正極101及負極109之間流動，並提高正極101及負極109的電位差。The positive electrode 101 and the negative electrode 109 create a potential difference between them through electrochemical reactions, so carriers (such as electrons or holes) can flow between the positive electrode 101 and the negative electrode 109 . In some embodiments, positive electrode 101 includes aluminum, nickel, or combinations thereof. In some embodiments, negative electrode 109 includes copper. In some embodiments, the positive electrode 101 further includes lithium ions after being prelithiated (refer to the method of forming a solid-state battery below for details). Lithium ions cause more carriers to flow between the positive electrode 101 and the negative electrode 109 and increase the potential difference between the positive electrode 101 and the negative electrode 109 .
固態電解質層105具離子導電性，可維持固態電池100的電中性，避免電荷累積在正極101及負極109，造成電位差下降。在一些實施方式中，固態電解質層105包括硫化物、氧化物或其組合。在一些實施方式中，硫化物包括鋰磷硫氯化物（Lithium Phosphorus Sulfide Chloride，LPSCl，例如Li 6PS 5Cl）、鋰矽磷硫化物（Lithium Silicon Phosphorus Sulfide，LiSiPS，例如Li 7SiPS 8）、鋰鍺磷硫化物（Lithium Germanium Phosphorus Sulfide，LGPS，例如Li 10GeP 2S 12）或其組合，但不以此為限。在一些實施方式中，氧化物包括鋰鑭鋯氧化物（Lithium Lanthanum Zirconium Oxide，LLZO，例如Li 7La 3Zr 2O 12）、鋰鋅鍺氧化物（例如Li 14Zn(GeO 4) 4）、鋰鋁鈦磷氧化物（Lithium Aluminum Titanium Phosphate，LATP，例如Li 1.3Al 0.3Ti 1.7(PO 4) 3）、鋰鋁鍺磷氧化物LAGP（Lithium Aluminium Germanium Phosphate，LAGP，例如Li 1.5Al 0.5Ge 1.5(PO 4) 3）或其組合，但不以此為限。在一些實施方式中，固態電解質層105更包括有機聚合物，提升固態電池100的可撓性，例如基於聚丙烯腈（Polyacrylonitrile，PAN）、基於聚乙烯醇（Polyvinyl Alcohol，PVA）或上述組合的聚合物，但不以此為限。 The solid electrolyte layer 105 has ionic conductivity, which can maintain the electrical neutrality of the solid-state battery 100 and prevent charges from accumulating on the positive electrode 101 and the negative electrode 109, resulting in a decrease in potential difference. In some embodiments, solid electrolyte layer 105 includes sulfide, oxide, or combinations thereof. In some embodiments, the sulfide includes Lithium Phosphorus Sulfide Chloride (LPSCl, such as Li 6 PS 5 Cl), Lithium Silicon Phosphorus Sulfide (LiSiPS, such as Li 7 SiPS 8 ), Lithium Germanium Phosphorus Sulfide (LGPS, such as Li 10 GeP 2 S 12 ) or a combination thereof, but is not limited thereto. In some embodiments, the oxide includes Lithium Lanthanum Zirconium Oxide (LLZO, such as Li 7 La 3 Zr 2 O 12 ), lithium zinc germanium oxide (such as Li 14 Zn(GeO 4 ) 4 ), Lithium Aluminum Titanium Phosphate (LATP, such as Li 1.3 Al 0.3 Ti 1.7 (PO 4 ) 3 ), Lithium Aluminum Germanium Phosphate (LAGP), such as Li 1.5 Al 0.5 Ge 1.5 (PO 4 ) 3 ) or combinations thereof, but not limited to this. In some embodiments, the solid electrolyte layer 105 further includes an organic polymer to improve the flexibility of the solid-state battery 100, such as based on polyacrylonitrile (PAN), polyvinyl alcohol (Polyvinyl Alcohol, PVA) or a combination thereof. Polymer, but not limited to this.
第一介面層103包括第一含矽合金層103a、第一矽纖維層103b及第二含矽合金層103c。第一含矽合金層103a直接接觸固態電解質層105，而第二含矽合金層103c直接接觸正極101。第一矽纖維層103b則位於第一含矽合金層103a及第二含矽合金層103c之間。第一含矽合金層103a、第一矽纖維層103b及第二含矽合金層103c皆包括含矽材料，且根據下文形成固態電池的方法可知第一含矽合金層103a、第一矽纖維層103b及第二含矽合金層103c依序形成在固態電解質層105及正極101之間，使得第一介面層103連續分佈於固態電解質層105及正極101之間時亦具有共通的材料特性，因此減少介面不均質造成的孔隙及缺陷。這些孔隙及缺陷可進一步導致電阻升高，並使固態電池效能下降。接下來詳細說明第一含矽合金層103a、第一矽纖維層103b及第二含矽合金層103c。The first interface layer 103 includes a first silicon-containing alloy layer 103a, a first silicon fiber layer 103b and a second silicon-containing alloy layer 103c. The first silicon-containing alloy layer 103a directly contacts the solid electrolyte layer 105, and the second silicon-containing alloy layer 103c directly contacts the positive electrode 101. The first silicon fiber layer 103b is located between the first silicon-containing alloy layer 103a and the second silicon-containing alloy layer 103c. The first silicon-containing alloy layer 103a, the first silicon fiber layer 103b and the second silicon-containing alloy layer 103c all include silicon-containing materials, and according to the method of forming a solid-state battery below, it can be seen that the first silicon-containing alloy layer 103a, the first silicon fiber layer 103b and the second silicon-containing alloy layer 103c are sequentially formed between the solid electrolyte layer 105 and the positive electrode 101, so that the first interface layer 103 has common material properties even when it is continuously distributed between the solid electrolyte layer 105 and the positive electrode 101. Therefore, Reduce pores and defects caused by interface inhomogeneity. These pores and defects can further increase resistance and reduce the performance of solid-state batteries. Next, the first silicon-containing alloy layer 103a, the first silicon fiber layer 103b, and the second silicon-containing alloy layer 103c will be described in detail.
第一矽纖維層103b包括球狀矽纖維111、線狀矽纖維113或其組合。第一矽纖維層103b可作為正極101的活性材料，具有高電容的特性。且第一矽纖維層103b使電流密度提升，例如相較於基於碳的活性材料，電流密度提升10倍。在一些實施方式中，球狀矽纖維111的直徑介於1 um至100 um之間。在一些實施方式中，線狀矽纖維113的長度介於1 um至400 um之間。此外，第一矽纖維層103b的厚度根據所需固態電池100的容量調整，厚度隨容量增加而增加。關於第一矽纖維層103b的厚度調整請參照下文形成固態電池的方法。在一些實施方式中，第一矽纖維層103b更包括摻雜的磷，以提高導電性。The first silicon fiber layer 103b includes spherical silicon fibers 111, linear silicon fibers 113, or a combination thereof. The first silicon fiber layer 103b can be used as an active material of the positive electrode 101 and has high capacitance characteristics. And the first silicon fiber layer 103b increases the current density, for example, compared to carbon-based active materials, the current density is increased by 10 times. In some embodiments, the diameter of the spherical silicon fiber 111 is between 1 um and 100 um. In some embodiments, the length of the linear silicon fiber 113 is between 1 um and 400 um. In addition, the thickness of the first silicon fiber layer 103b is adjusted according to the required capacity of the solid-state battery 100, and the thickness increases as the capacity increases. Regarding the thickness adjustment of the first silicon fiber layer 103b, please refer to the method of forming a solid-state battery below. In some embodiments, the first silicon fiber layer 103b further includes doped phosphorus to improve electrical conductivity.
第一含矽合金層103a包括含矽合金。含矽合金包括第一矽纖維層103b的球狀矽纖維111、線狀矽纖維113或其組合與固態電解質層105形成的合金。因此在一些實施方式中，含矽合金為矽化鋰、矽化鑭、矽化鋯、矽化鍺、矽化鋅、矽化鋁、矽化鈦或其組合。第一含矽合金層103a使固態電解質層105穩固的透過第一矽纖維層103b及第二含矽合金層103c固定在正極101上。在一些實施方式中，第一含矽合金層103a的第一厚度T1為1 µm至20 µm。The first silicon-containing alloy layer 103a includes a silicon-containing alloy. The silicon-containing alloy includes an alloy formed by the spherical silicon fibers 111, the linear silicon fibers 113, or a combination thereof and the solid electrolyte layer 105 of the first silicon fiber layer 103b. Thus in some embodiments, the silicon-containing alloy is lithium silicide, lanthanum silicide, zirconium silicide, germanium silicide, zinc silicide, aluminum silicide, titanium silicide, or combinations thereof. The first silicon-containing alloy layer 103a firmly fixes the solid electrolyte layer 105 on the positive electrode 101 through the first silicon fiber layer 103b and the second silicon-containing alloy layer 103c. In some embodiments, the first thickness T1 of the first silicon-containing alloy layer 103a is 1 µm to 20 µm.
第二含矽合金層103c包括含矽合金。含矽合金包括第一矽纖維層103b的球狀矽纖維111、線狀矽纖維113或其組合與正極101形成的合金。因此在一些實施方式中，含矽合金為矽化鋁、矽化鎳或其組合。第二含矽合金層103c使正極101穩固的透過第一矽纖維層103b及第一含矽合金層103a固定在固態電解質層105上。在一些實施方式中，第二含矽合金層103c的第二厚度T2為1 µm至20 µm。The second silicon-containing alloy layer 103c includes a silicon-containing alloy. The silicon-containing alloy includes an alloy formed by the spherical silicon fibers 111, the linear silicon fibers 113 or a combination thereof and the positive electrode 101 of the first silicon fiber layer 103b. Thus in some embodiments, the silicon-containing alloy is aluminum silicide, nickel silicide, or combinations thereof. The second silicon-containing alloy layer 103c enables the positive electrode 101 to be firmly fixed on the solid electrolyte layer 105 through the first silicon fiber layer 103b and the first silicon-containing alloy layer 103a. In some embodiments, the second thickness T2 of the second silicon-containing alloy layer 103c is 1 µm to 20 µm.
第二介面層107包括第三含矽合金層107a、第二矽纖維層107b及第四含矽合金層107c。第三含矽合金層107a直接接觸固態電解質層105，而第四含矽合金層107c直接接觸負極109。第二矽纖維層107b則位於第三含矽合金層107a及第四含矽合金層107c之間。第三含矽合金層107a、第二矽纖維層107b及第四含矽合金層107c皆包括含矽材料，且根據下文形成固態電池的方法可知第三含矽合金層107a、第二矽纖維層107b及第四含矽合金層107c依序形成在固態電解質層105及負極109之間，使得第二介面層107連續分佈於固態電解質層105及負極109之間時亦具有共通的材料特性，因此減少介面不均質造成的孔隙及缺陷。這些孔隙及缺陷可進一步導致電阻升高，並使固態電池效能下降。接下來詳細說明第三含矽合金層107a、第二矽纖維層107b及第四含矽合金層107c。The second interface layer 107 includes a third silicon-containing alloy layer 107a, a second silicon fiber layer 107b and a fourth silicon-containing alloy layer 107c. The third silicon-containing alloy layer 107a directly contacts the solid electrolyte layer 105, and the fourth silicon-containing alloy layer 107c directly contacts the negative electrode 109. The second silicon fiber layer 107b is located between the third silicon-containing alloy layer 107a and the fourth silicon-containing alloy layer 107c. The third silicon-containing alloy layer 107a, the second silicon fiber layer 107b and the fourth silicon-containing alloy layer 107c all include silicon-containing materials, and according to the method of forming a solid-state battery below, it can be seen that the third silicon-containing alloy layer 107a, the second silicon fiber layer 107b and the fourth silicon-containing alloy layer 107c are sequentially formed between the solid electrolyte layer 105 and the negative electrode 109, so that the second interface layer 107 also has common material properties when it is continuously distributed between the solid electrolyte layer 105 and the negative electrode 109. Therefore, Reduce pores and defects caused by interface inhomogeneity. These pores and defects can further increase resistance and reduce the performance of solid-state batteries. Next, the third silicon-containing alloy layer 107a, the second silicon fiber layer 107b, and the fourth silicon-containing alloy layer 107c will be described in detail.
第二矽纖維層107b包括球狀矽纖維111、線狀矽纖維113或其組合。第二矽纖維層107b可作為負極109的活性材料，具有高電容的特性。且第二矽纖維層107b使電流密度提升，例如相較於基於碳的活性材料，電流密度提升10倍。在一些實施方式中，球狀矽纖維111的直徑介於1 um至100 um之間。在一些實施方式中，線狀矽纖維113的長度介於1 um至400 um之間。此外，第二矽纖維層107b的厚度根據所需固態電池100的容量調整，厚度隨容量增加而增加。關於第二矽纖維層107b的厚度調整請參照下文形成固態電池的方法。在一些實施方式中，第二矽纖維層107b更包括摻雜的磷，以提高導電性。The second silicon fiber layer 107b includes spherical silicon fibers 111, linear silicon fibers 113, or a combination thereof. The second silicon fiber layer 107b can be used as an active material of the negative electrode 109 and has high capacitance characteristics. And the second silicon fiber layer 107b increases the current density, for example, compared to carbon-based active materials, the current density is increased by 10 times. In some embodiments, the diameter of the spherical silicon fiber 111 is between 1 um and 100 um. In some embodiments, the length of the linear silicon fiber 113 is between 1 um and 400 um. In addition, the thickness of the second silicon fiber layer 107b is adjusted according to the required capacity of the solid-state battery 100, and the thickness increases as the capacity increases. Regarding the thickness adjustment of the second silicon fiber layer 107b, please refer to the method of forming a solid-state battery below. In some embodiments, the second silicon fiber layer 107b further includes doped phosphorus to improve electrical conductivity.
第三含矽合金層107a包括含矽合金。含矽合金包括第二矽纖維層107b的球狀矽纖維111、線狀矽纖維113或其組合與固態電解質層105形成的合金。因此在一些實施方式中，含矽合金為矽化鋰、矽化鑭、矽化鋯、矽化鍺、矽化鋅、矽化鋁、矽化鈦或其組合。第三含矽合金層107a使固態電解質層105穩固的透過第二矽纖維層107b及第四含矽合金層107c固定在負極109上。在一些實施方式中，第三含矽合金層107a的第三厚度T3為1 µm至20 µm。The third silicon-containing alloy layer 107a includes a silicon-containing alloy. The silicon-containing alloy includes an alloy formed by the spherical silicon fibers 111, the linear silicon fibers 113, or a combination thereof and the solid electrolyte layer 105 of the second silicon fiber layer 107b. Thus in some embodiments, the silicon-containing alloy is lithium silicide, lanthanum silicide, zirconium silicide, germanium silicide, zinc silicide, aluminum silicide, titanium silicide, or combinations thereof. The third silicon-containing alloy layer 107a firmly fixes the solid electrolyte layer 105 on the negative electrode 109 through the second silicon fiber layer 107b and the fourth silicon-containing alloy layer 107c. In some embodiments, the third thickness T3 of the third silicon-containing alloy layer 107a is 1 µm to 20 µm.
第四含矽合金層107c包括含矽合金。含矽合金包括第二矽纖維層107b的球狀矽纖維111、線狀矽纖維113或其組合與負極109形成的合金。因此在一些實施方式中，含矽合金為矽化銅。第四含矽合金層107c使負極109穩固的透過第二矽纖維層107b及第三含矽合金層107a固定在固態電解質層105上。在一些實施方式中，第四含矽合金層107c的第四厚度T4為1 µm至20 µm。第2圖是根據本揭示內容一些實施方式的固態電池100，其部分結構的電子顯微鏡圖。在第2圖中，第四含矽合金層107c的矽化銅合金位於負極109的銅及第二矽纖維層107b（包括球狀矽纖維111、線狀矽纖維113或其組合）之間。The fourth silicon-containing alloy layer 107c includes a silicon-containing alloy. The silicon-containing alloy includes an alloy formed by the spherical silicon fibers 111, the linear silicon fibers 113, or a combination thereof and the negative electrode 109 of the second silicon fiber layer 107b. Thus in some embodiments, the silicon-containing alloy is copper silicide. The fourth silicon-containing alloy layer 107c enables the negative electrode 109 to be firmly fixed on the solid electrolyte layer 105 through the second silicon fiber layer 107b and the third silicon-containing alloy layer 107a. In some embodiments, the fourth thickness T4 of the fourth silicon-containing alloy layer 107c is 1 µm to 20 µm. Figure 2 is an electron micrograph of a partial structure of a solid-state battery 100 according to some embodiments of the present disclosure. In Figure 2, the copper silicon alloy of the fourth silicon-containing alloy layer 107c is located between the copper of the negative electrode 109 and the second silicon fiber layer 107b (including spherical silicon fiber 111, linear silicon fiber 113 or a combination thereof).
本揭示內容的固態電池100具有第一介面層103及第二介面層107，使正極101及負極109穩固的固定在固態電解質層105上。且第一介面層103及第二介面層107作為良好及連續的介面，避免缺陷及孔隙在介面生成造成電阻升高。除了作為介面接合，第一介面層103及第二介面層107本身也可作為正極101及負極109的活性材料，避免使用其他活性材料造成成本增加。此外，第一介面層103及第二介面層107更具有高電容且高電流密度的特性，可提升固態電池100效能。The solid-state battery 100 of the present disclosure has a first interface layer 103 and a second interface layer 107, so that the positive electrode 101 and the negative electrode 109 are firmly fixed on the solid electrolyte layer 105. Moreover, the first interface layer 103 and the second interface layer 107 serve as a good and continuous interface to prevent defects and pores from being generated at the interface and causing an increase in resistance. In addition to serving as interface bonding, the first interface layer 103 and the second interface layer 107 themselves can also be used as active materials for the positive electrode 101 and the negative electrode 109 to avoid increased costs caused by the use of other active materials. In addition, the first interface layer 103 and the second interface layer 107 further have high capacitance and high current density characteristics, which can improve the performance of the solid-state battery 100 .
本揭示內容亦關於一種形成上述固態電池的方法。需注意的是，為了使方法的討論更清晰，上述第一含矽合金層、第二含矽合金層、第三含矽合金層及第四含矽合金層將根據形成的順序重新依序命名（例如下文討論的第二含矽合金層307a及第三含矽合金層303c將分別對應上述固態電池100中的第三含矽合金層107a及第二含矽合金層103c）。本揭示內容的方法包括以下操作。形成第一含矽合金層覆蓋固態電解質層的上表面及第二含矽合金層覆蓋固態電解質層的下表面。形成第一矽纖維層於第一含矽合金層上及第二矽纖維層於第二含矽合金層下。設置正極於第一矽纖維層上。形成第三含矽合金層於正極及第一矽纖維層間。設置負極於第二矽纖維層下。以及形成第四含矽合金層於負極及第二矽纖維層間。本揭示內容的方法使固態電解質層與正極及負極之間可透過第一含矽合金層、第二含矽合金層、第三含矽合金層、第四含矽合金層、第一矽纖維層及第二矽纖維層穩固地接合在一起、接合的介面電阻低，且固態電池具高電容及高電流密度。接下來詳細說明本揭示內容的方法。The present disclosure also relates to a method of forming the solid-state battery as described above. It should be noted that in order to make the discussion of the method clearer, the above-mentioned first silicon-containing alloy layer, second silicon-containing alloy layer, third silicon-containing alloy layer and fourth silicon-containing alloy layer will be renamed in order according to the order of formation. (For example, the second silicon-containing alloy layer 307a and the third silicon-containing alloy layer 303c discussed below will respectively correspond to the third silicon-containing alloy layer 107a and the second silicon-containing alloy layer 103c in the above-mentioned solid-state battery 100). The methods of this disclosure include the following operations. A first silicon-containing alloy layer is formed to cover the upper surface of the solid electrolyte layer and a second silicon-containing alloy layer is formed to cover the lower surface of the solid electrolyte layer. A first silicon fiber layer is formed on the first silicon-containing alloy layer and a second silicon fiber layer is formed under the second silicon-containing alloy layer. Place the positive electrode on the first silicon fiber layer. A third silicon-containing alloy layer is formed between the positive electrode and the first silicon fiber layer. Place the negative electrode under the second silicon fiber layer. and forming a fourth silicon-containing alloy layer between the negative electrode and the second silicon fiber layer. The method of the present disclosure enables the first silicon-containing alloy layer, the second silicon-containing alloy layer, the third silicon-containing alloy layer, the fourth silicon-containing alloy layer, and the first silicon fiber layer to be permeable between the solid electrolyte layer and the positive and negative electrodes. and the second silicon fiber layer are firmly joined together, the joint interface resistance is low, and the solid-state battery has high capacitance and high current density. Next, the method of this disclosure will be described in detail.
第3圖是根據本揭示內容一些實施方式的形成固態電池的方法200的流程圖。第4圖至第6圖是根據本揭示內容一些實施方式的以方法200形成固態電池300的中間過程示意圖。固態電池300相當於上文的固態電池100，詳細參照上文，下文不再贅述。方法200包括操作202、操作204、操作206、操作208、操作210及操作212。接下來參照第3圖至第6圖詳細說明上述操作。Figure 3 is a flow diagram of a method 200 of forming a solid-state battery in accordance with some embodiments of the present disclosure. Figures 4 to 6 are schematic diagrams of intermediate processes of forming the solid-state battery 300 in the method 200 according to some embodiments of the present disclosure. The solid-state battery 300 is equivalent to the above-mentioned solid-state battery 100. Please refer to the above for details and will not be described again below. Method 200 includes operations 202, 204, 206, 208, 210, and 212. Next, the above operation will be described in detail with reference to Figures 3 to 6 .
在操作202中（對應第4圖），形成第一含矽合金層303a覆蓋固態電解質層305的上表面305U及第二含矽合金層307a覆蓋固態電解質層305的下表面305B。需注意的是，此處第一含矽合金層303a相當於上文的第一含矽合金層103a，以及第二含矽合金層307a相當於上文的第三含矽合金層107a。在一些實施方式中，形成第一含矽合金層303a及第二含矽合金層307a包括以矽烷化合物在400°C至800°C的溫度下處理固態電解質層305的上表面305U及下表面305B。例如將固態電解質層305置於400°C至800°C的爐管中，並通入10 sccm至1000 sccm的矽烷化合物SiH 4作為矽源，使矽沉積於固態電解質層305的上表面305U及下表面305B，並在高溫下形成第一含矽合金層303a及第二含矽合金層307a。 In operation 202 (corresponding to FIG. 4 ), a first silicon-containing alloy layer 303 a is formed to cover the upper surface 305U of the solid electrolyte layer 305 and a second silicon-containing alloy layer 307 a is formed to cover the lower surface 305B of the solid electrolyte layer 305 . It should be noted that the first silicon-containing alloy layer 303a here is equivalent to the above-mentioned first silicon-containing alloy layer 103a, and the second silicon-containing alloy layer 307a is equivalent to the above-mentioned third silicon-containing alloy layer 107a. In some embodiments, forming the first silicon-containing alloy layer 303a and the second silicon-containing alloy layer 307a includes treating the upper surface 305U and the lower surface 305B of the solid electrolyte layer 305 with a silane compound at a temperature of 400°C to 800°C. . For example, the solid electrolyte layer 305 is placed in a furnace tube at 400°C to 800°C, and 10 sccm to 1000 sccm of silane compound SiH 4 is introduced as the silicon source, so that silicon is deposited on the upper surface 305U and 305U of the solid electrolyte layer 305 The lower surface 305B is formed at high temperature, and the first silicon-containing alloy layer 303a and the second silicon-containing alloy layer 307a are formed.
在操作204中（對應第5圖），形成第一矽纖維層303b於第一含矽合金層303a上及第二矽纖維層307b於第二含矽合金層307a下。在一些實施方式中，操作204與操作202同時進行，因此形成第一矽纖維層303b及第二矽纖維層307b同形成第一含矽合金層303a及第二含矽合金層307a，包括以矽烷化合物在400°C至800°C的溫度下處理固態電解質層305的上表面305U及下表面305B（實施方式參照操作202）。當第一含矽合金層303a及第二含矽合金層307a完全形成於固態電解質層305的上表面305U及下表面305B，持續通入的矽烷化合物將於第一含矽合金層303a及第二含矽合金層307a上形成第一矽纖維層303b及第二矽纖維層307b。在一些實施方式中，以矽烷化合物處理固態電解質層305以形成第一含矽合金層303a、第二含矽合金層307a、第一矽纖維層303b及第二矽纖維層307b的時間介於10分鐘至96小時，更佳為2小時至48小時。實際時間取決於所需第一矽纖維層303b及第二矽纖維層307b的厚度（參照上文），時間越長厚度越厚。在一些實施方式中，操作202和/或操作204更包括以含磷化合物處理固態電解質層305的上表面305U及下表面305B。例如通入PH 3至爐管中使磷摻雜至第一矽纖維層303b及第二矽纖維層307b中提高導電性。 In operation 204 (corresponding to FIG. 5 ), a first silicon fiber layer 303b is formed on the first silicon-containing alloy layer 303a and a second silicon fiber layer 307b is formed under the second silicon-containing alloy layer 307a. In some embodiments, operation 204 and operation 202 are performed simultaneously, so forming the first silicon fiber layer 303b and the second silicon fiber layer 307b is the same as forming the first silicon-containing alloy layer 303a and the second silicon-containing alloy layer 307a, including using silane. The compound treats the upper surface 305U and the lower surface 305B of the solid electrolyte layer 305 at a temperature of 400°C to 800°C (refer to operation 202 for implementation). When the first silicon-containing alloy layer 303a and the second silicon-containing alloy layer 307a are completely formed on the upper surface 305U and the lower surface 305B of the solid electrolyte layer 305, the continuously flowing silane compound will pass through the first silicon-containing alloy layer 303a and the second silicon-containing alloy layer 307a. A first silicon fiber layer 303b and a second silicon fiber layer 307b are formed on the silicon-containing alloy layer 307a. In some embodiments, the time for treating the solid electrolyte layer 305 with the silane compound to form the first silicon-containing alloy layer 303a, the second silicon-containing alloy layer 307a, the first silicon fiber layer 303b and the second silicon fiber layer 307b is between 10 minutes to 96 hours, preferably 2 hours to 48 hours. The actual time depends on the required thickness of the first silicon fiber layer 303b and the second silicon fiber layer 307b (refer to the above). The longer the time, the thicker the thickness. In some embodiments, operation 202 and/or operation 204 further includes treating the upper surface 305U and the lower surface 305B of the solid electrolyte layer 305 with a phosphorus-containing compound. For example, PH 3 is introduced into the furnace tube to dope phosphorus into the first silicon fiber layer 303b and the second silicon fiber layer 307b to improve the electrical conductivity.
在操作204之後及操作206至操作212之前，方法更包括在形成第一矽纖維層303b及第二矽纖維層307b之後冷卻固態電解質層305、第一含矽合金層303a、第二含矽合金層307a、第一矽纖維層303b及第二矽纖維層307b至室溫（20°C至30°C的溫度範圍，例如20°C、23°C、25°C、27°C或30°C）。例如將上述元件移出爐管，並自然冷卻至室溫。藉由冷卻再藉由下文將討論的操作206至操作212中的再次加熱，可提升第一含矽合金層303a及第二含矽合金層307a以及將於下文討論的第三含矽合金層303c及第四含矽合金層307c的強度，因此提升介面接合的穩固性。After operation 204 and before operation 206 to operation 212, the method further includes cooling the solid electrolyte layer 305, the first silicon-containing alloy layer 303a, and the second silicon-containing alloy after forming the first silicon fiber layer 303b and the second silicon fiber layer 307b. The layer 307a, the first silicon fiber layer 303b and the second silicon fiber layer 307b are brought to room temperature (a temperature range of 20°C to 30°C, such as 20°C, 23°C, 25°C, 27°C or 30°C). C). For example, the above components are removed from the furnace tube and allowed to cool to room temperature naturally. By cooling and then reheating in operations 206 to 212 to be discussed below, the first and second silicon-containing alloy layers 303a and 307a and the third silicon-containing alloy layer 303c to be discussed below can be improved. and the strength of the fourth silicon-containing alloy layer 307c, thereby improving the stability of the interface bonding.
在操作206至操作212中（對應第6圖），設置正極301於第一矽纖維層303b上、形成第三含矽合金層303c於正極301及第一矽纖維層303b之間、設置負極309於第二矽纖維層307b下，以及形成第四含矽合金層307c於負極309及第二矽纖維層307b之間。需注意的是，此處第三含矽合金層303c相當於上文的第二含矽合金層103c，以及第四含矽合金層307c相當於上文的第四含矽合金層107c。在一些實施方式中，形成第三含矽合金層303c及形成第四含矽合金層307c包括在400°C至800°C的溫度下以矽烷化合物處理正極301及負極309。例如將操作204中形成的對應第5圖的固態電池中間結構與正極301及負極309一同置於400°C至800°C的爐管中，其中正極301位於第一矽纖維層303b上而負極309位於第二矽纖維層307b下，接著通入10 sccm至1000 sccm的矽烷化合物SiH 4作為矽源，使矽沉積於正極301及第一矽纖維層303b之間以及負極309及第二矽纖維層307b之間，並在高溫下形成第三含矽合金層303c及第四含矽合金層307c。在一些實施方式中，以矽烷化合物處理正極301及負極309以形成第三含矽合金層303c及第四含矽合金層307c的時間介於5分鐘至2小時。 In operations 206 to 212 (corresponding to Figure 6), the positive electrode 301 is placed on the first silicon fiber layer 303b, a third silicon-containing alloy layer 303c is formed between the positive electrode 301 and the first silicon fiber layer 303b, and the negative electrode 309 is placed. Under the second silicon fiber layer 307b, a fourth silicon-containing alloy layer 307c is formed between the negative electrode 309 and the second silicon fiber layer 307b. It should be noted that the third silicon-containing alloy layer 303c here is equivalent to the above-mentioned second silicon-containing alloy layer 103c, and the fourth silicon-containing alloy layer 307c is equivalent to the above-mentioned fourth silicon-containing alloy layer 107c. In some embodiments, forming the third silicon-containing alloy layer 303c and forming the fourth silicon-containing alloy layer 307c includes treating the positive electrode 301 and the negative electrode 309 with a silane compound at a temperature of 400°C to 800°C. For example, the solid-state battery intermediate structure corresponding to Figure 5 formed in operation 204 is placed together with the positive electrode 301 and the negative electrode 309 in a furnace tube at 400°C to 800°C, where the positive electrode 301 is located on the first silicon fiber layer 303b and the negative electrode 309 is located under the second silicon fiber layer 307b, and then 10 sccm to 1000 sccm of silane compound SiH 4 is introduced as the silicon source to deposit silicon between the positive electrode 301 and the first silicon fiber layer 303b and between the negative electrode 309 and the second silicon fiber. Between the layers 307b, the third silicon-containing alloy layer 303c and the fourth silicon-containing alloy layer 307c are formed at high temperature. In some embodiments, the time for treating the positive electrode 301 and the negative electrode 309 with the silane compound to form the third silicon-containing alloy layer 303c and the fourth silicon-containing alloy layer 307c is between 5 minutes and 2 hours.
在操作206至操作212之後，方法更包括對正極301進行預鋰化處理，提供更多鋰離子在正極301及負極309之間流動，並提高正極301及負極309的電位差（參照上文）。在一些實施例中，預鋰化處理包括將正極301相對於第三含矽合金層303c的一側（即正極301的暴露表面）浸泡於含鋰溶液中。例如將LiOH及V 2O 5以Li對V的莫耳比為1：3的比例混合後加熱至500°C。加熱16小時之後得到LiV 3O 8。然後在60°C下將正極301相對於第三含矽合金層303c的一側浸泡於含有LiV 3O 8的溶液中，其中LiV 3O 8對第一矽纖維層303b及第二矽纖維層307b中的矽的莫耳比介於0.025至0.1。浸泡12小時之後將正極301連同其下元件在120°C下烘乾48小時。 After operations 206 to 212, the method further includes performing a prelithiation treatment on the positive electrode 301 to provide more lithium ions to flow between the positive electrode 301 and the negative electrode 309, and to increase the potential difference between the positive electrode 301 and the negative electrode 309 (see above). In some embodiments, the prelithiation treatment includes soaking the side of the positive electrode 301 relative to the third silicon-containing alloy layer 303c (ie, the exposed surface of the positive electrode 301) in a lithium-containing solution. For example, LiOH and V 2 O 5 are mixed at a molar ratio of Li to V of 1:3 and then heated to 500°C. LiV 3 O 8 was obtained after heating for 16 hours. Then, the side of the positive electrode 301 relative to the third silicon-containing alloy layer 303c is immersed in a solution containing LiV 3 O 8 at 60°C, where LiV 3 O 8 has a negative effect on the first silicon fiber layer 303b and the second silicon fiber layer. The molar ratio of silicon in 307b ranges from 0.025 to 0.1. After soaking for 12 hours, the positive electrode 301 and its lower components were dried at 120°C for 48 hours.
藉由上述操作完成的第6圖的固態電池300相當於上文討論的第1圖的固態電池100，結構中對應的元件可互相參照。本揭示內容形成固態電池300的方法300使正極301藉由第一含矽合金層303a、第一矽纖維層303b及第三含矽合金層303c穩固的固定在固態電解質層305上，以及使負極309藉由第二含矽合金層307a、第二矽纖維層307b及第四含矽合金層307c穩固的固定在固態電解質層305上。正極301、固態電解質層305及負極309之間介面連續，避免缺陷及孔隙生成造成電阻升高。除了作為良好的接合介面，第一矽纖維層303b及第二矽纖維層307b也作為正極301及負極309的活性材料，避免使用其他活性材料造成成本增加。第一矽纖維層303b及第二矽纖維層307b更具有高電容且高電流密度的特性，可提升固態電池300的效能。The solid-state battery 300 in FIG. 6 completed by the above operations is equivalent to the solid-state battery 100 in FIG. 1 discussed above, and corresponding components in the structure can be referred to each other. The method 300 of forming the solid-state battery 300 of the present disclosure enables the positive electrode 301 to be firmly fixed on the solid electrolyte layer 305 through the first silicon-containing alloy layer 303a, the first silicon fiber layer 303b and the third silicon-containing alloy layer 303c, and the negative electrode 309 is firmly fixed on the solid electrolyte layer 305 through the second silicon-containing alloy layer 307a, the second silicon fiber layer 307b and the fourth silicon-containing alloy layer 307c. The interfaces between the positive electrode 301, the solid electrolyte layer 305 and the negative electrode 309 are continuous to avoid defects and pores causing increased resistance. In addition to serving as good bonding interfaces, the first silicon fiber layer 303b and the second silicon fiber layer 307b also serve as active materials for the positive electrode 301 and the negative electrode 309 to avoid increased costs caused by the use of other active materials. The first silicon fiber layer 303b and the second silicon fiber layer 307b further have the characteristics of high capacitance and high current density, which can improve the performance of the solid-state battery 300.
本揭示內容相當詳細地以一些實施方式進行描述，但其它實施方式也是可行的，因此不應以本揭示內容所含的實施方式的描述限制所附申請專利範圍的範圍和精神。This disclosure is described in considerable detail in terms of some embodiments, but other embodiments are possible and the scope and spirit of the appended claims should not be limited by the description of the embodiments contained in this disclosure.
對於所屬技術領域中具有通常知識者來說，可在不偏離本揭示內容的精神和範圍下對本揭示內容進行修改和變更。只要上述修改和變更屬於所附申請專利範圍的範圍和精神，本揭示內容即涵蓋這些修改和變更。For those of ordinary skill in the art, modifications and changes can be made to the disclosure without departing from the spirit and scope of the disclosure. This disclosure covers such modifications and changes so long as they fall within the scope and spirit of the appended claims.
100:固態電池 101:正極 103:第一介面層 103a:第一含矽合金層 103b:第一矽纖維層 103c:第二含矽合金層 105:固態電解質層 107:第二介面層 107a:第三含矽合金層 107b:第二矽纖維層 107c:第四含矽合金層 109:負極 111:球狀矽纖維 113:線狀矽纖維 200:方法 202:操作 204:操作 206:操作 208:操作 210:操作 212:操作 301:正極 303a:第一含矽合金層 303b:第一矽纖維層 303c:第三含矽合金層 305:固態電解質層 307a:第二含矽合金層 307b:第二矽纖維層 307c:第四含矽合金層 309:負極 T1:第一厚度 T2:第二厚度 T3:第三厚度 T4:第四厚度100:Solid state battery 101: Positive pole 103: First interface layer 103a: First silicon-containing alloy layer 103b: First silicon fiber layer 103c: Second silicon-containing alloy layer 105:Solid electrolyte layer 107: Second interface layer 107a: The third silicon-containing alloy layer 107b: Second silicon fiber layer 107c: The fourth silicon-containing alloy layer 109: Negative pole 111: Spherical silicon fiber 113: Linear silicon fiber 200:Method 202:Operation 204:Operation 206:Operation 208:Operation 210:Operation 212:Operation 301: positive pole 303a: First silicon-containing alloy layer 303b: First silicon fiber layer 303c: The third silicon-containing alloy layer 305:Solid electrolyte layer 307a: Second silicon-containing alloy layer 307b: Second silicon fiber layer 307c: The fourth silicon-containing alloy layer 309: Negative pole T1: first thickness T2: second thickness T3: The third thickness T4: The fourth thickness
閱讀本揭示內容的附圖時，建議從下文敘述瞭解本揭示內容的各個面向。需注意的是，按照行業的標準做法，各種特徵尺寸未依比例繪製。為了使討論清晰，各種特徵尺寸可以任意增加或減少。 第1圖是根據本揭示內容一些實施方式的固態電池的示意圖。 第2圖是根據本揭示內容一些實施方式的固態電池的第四含矽合金層的電子顯微鏡圖。 第3圖是根據本揭示內容一些實施方式的形成固態電池的方法的流程圖。 第4圖至第6圖是根據本揭示內容一些實施方式的形成固態電池的中間過程示意圖。 When reading the accompanying drawings of this disclosure, it is recommended to understand various aspects of this disclosure from the following description. Note that, in accordance with industry standard practice, various feature dimensions are not drawn to scale. To keep the discussion clear, the various feature sizes may be arbitrarily increased or decreased. Figure 1 is a schematic diagram of a solid-state battery in accordance with some embodiments of the present disclosure. Figure 2 is an electron microscopy image of a fourth silicon-containing alloy layer of a solid-state battery according to some embodiments of the present disclosure. Figure 3 is a flow diagram of a method of forming a solid-state battery in accordance with some embodiments of the present disclosure. Figures 4 to 6 are schematic diagrams of intermediate processes for forming a solid-state battery according to some embodiments of the present disclosure.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in order of storage institution, date and number) without Overseas storage information (please note in order of storage country, institution, date, and number) without
100:固態電池 100:Solid state battery
101:正極 101: Positive pole
103:第一介面層 103: First interface layer
103a:第一含矽合金層 103a: First silicon-containing alloy layer
103b:第一矽纖維層 103b: First silicon fiber layer
103c:第二含矽合金層 103c: Second silicon-containing alloy layer
105:固態電解質層 105:Solid electrolyte layer
107:第二介面層 107: Second interface layer
107a:第三含矽合金層 107a: The third silicon-containing alloy layer
107b:第二矽纖維層 107b: Second silicon fiber layer
107c:第四含矽合金層 107c: The fourth silicon-containing alloy layer
109:負極 109: Negative pole
111:球狀矽纖維 111: Spherical silicon fiber
113:線狀矽纖維 113: Linear silicon fiber
T1:第一厚度 T1: first thickness
T2:第二厚度 T2: second thickness
T3:第三厚度 T3: The third thickness
T4:第四厚度 T4: The fourth thickness
Claims (10)
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040258984A1 (en) * | 2003-04-14 | 2004-12-23 | Massachusetts Institute Of Technology | Integrated thin film batteries on silicon integrated circuits |
| CN110226255A (en) * | 2017-01-24 | 2019-09-10 | 日立造船株式会社 | All-solid-state battery and its manufacturing method |
| CN110235295A (en) * | 2016-12-21 | 2019-09-13 | 于利奇研究中心有限公司 | Lithium ion solid battery and its manufacturing method |
| TW202206375A (en) * | 2020-08-04 | 2022-02-16 | 明志科技大學 | Preparation method of composite solid-state electrolyte membrane, and all-solid-state lithium battery using the composite solid-state electrolyte membrane Preparing LaZrGa(OH)x metal hydroxide precursor by co-precipitation method using a continuous Taylor flow reactor |
| CN115023827A (en) * | 2019-07-01 | 2022-09-06 | 离子材料公司 | Composite solid-state battery cell |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040258984A1 (en) * | 2003-04-14 | 2004-12-23 | Massachusetts Institute Of Technology | Integrated thin film batteries on silicon integrated circuits |
| CN110235295A (en) * | 2016-12-21 | 2019-09-13 | 于利奇研究中心有限公司 | Lithium ion solid battery and its manufacturing method |
| CN110226255A (en) * | 2017-01-24 | 2019-09-10 | 日立造船株式会社 | All-solid-state battery and its manufacturing method |
| CN115023827A (en) * | 2019-07-01 | 2022-09-06 | 离子材料公司 | Composite solid-state battery cell |
| TW202206375A (en) * | 2020-08-04 | 2022-02-16 | 明志科技大學 | Preparation method of composite solid-state electrolyte membrane, and all-solid-state lithium battery using the composite solid-state electrolyte membrane Preparing LaZrGa(OH)x metal hydroxide precursor by co-precipitation method using a continuous Taylor flow reactor |
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