TWI830964B - Heat treatment method - Google Patents
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- TWI830964B TWI830964B TW109138456A TW109138456A TWI830964B TW I830964 B TWI830964 B TW I830964B TW 109138456 A TW109138456 A TW 109138456A TW 109138456 A TW109138456 A TW 109138456A TW I830964 B TWI830964 B TW I830964B
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Abstract
本發明提供一種能夠以簡單之構成檢測閃光照射時之基板之破裂之熱處理方法及熱處理裝置。 藉由閃光照射而將半導體晶圓之正面急速加熱。以固定間隔測定閃光照射後之半導體晶圓之正面溫度，並將其等依次儲存，藉此獲取溫度分佈。根據該溫度分佈推算平均值及標準偏差作為特性值。於溫度分佈之平均值偏離自複數個半導體晶圓之總平均±5σ之範圍時、或溫度分佈之標準偏差偏離自複數個半導體晶圓之總平均起為5σ之範圍時，判定半導體晶圓破裂。The present invention provides a heat treatment method and a heat treatment device capable of detecting cracks of a substrate during flash irradiation with a simple configuration. The front side of the semiconductor wafer is rapidly heated by flash irradiation. The front surface temperature of the semiconductor wafer after flash irradiation is measured at regular intervals and stored sequentially to obtain the temperature distribution. From this temperature distribution, the average value and standard deviation are calculated as characteristic values. When the average temperature distribution deviates from the range of ±5σ from the total average of multiple semiconductor wafers, or when the standard deviation of the temperature distribution deviates from the range of 5σ from the total average of multiple semiconductor wafers, the semiconductor wafer is determined to be cracked. .
Description
本發明係關於一種藉由對半導體晶圓等薄板狀精密電子基板(以下，簡稱為「基板」)照射閃光而加熱該基板之熱處理方法及熱處理裝置。The present invention relates to a heat treatment method and a heat treatment apparatus for heating a thin-plate-shaped precision electronic substrate (hereinafter referred to as a "substrate") such as a semiconductor wafer by irradiating the substrate with flash light.
於半導體器件之製造製程中，雜質導入係用以於半導體晶圓內形成pn接面之必需之步驟。目前，雜質導入一般而言係藉由離子注入法與其後之退火法完成。離子注入法係使硼(B)、砷(As)、磷(P)之類之雜質之元素離子化並以高加速電壓與半導體晶圓碰撞而物理性地進行雜質注入之技術。所注入之雜質藉由退火處理而活化。此時，若退火時間為大約數秒以上，則所注入之雜質會因熱而較深地擴散，其結果，有接面深度相較於要求變得過深而導致良好器件之形成產生障礙之虞。 因此，作為以極短時間加熱半導體晶圓之退火技術，近年來，閃光燈退火(FLA，Flash Lamp Annealing)受到關注。閃光燈退火係藉由使用氙閃光燈(以下，於僅設為「閃光燈」時指氙閃光燈)對半導體晶圓之正面照射閃光而僅使注入有雜質之半導體晶圓之正面於極短時間(數毫秒以下)升溫之熱處理技術。 氙閃光燈之輻射分光分佈係自紫外線區域至近紅外線區域，波長較先前之鹵素燈短，且與矽之半導體晶圓之基礎吸收帶大致一致。由此，於自氙閃光燈對半導體晶圓照射閃光時，透過光較少而能夠使半導體晶圓急速升溫。又，亦判明若為數毫秒以下之極短時間之閃光照射，則可選擇性僅使半導體晶圓之正面附近升溫。因此，若為利用氙閃光燈實現之極短時間之升溫，則不會使雜質較深地擴散，可僅執行雜質活化。 於使用此種閃光燈之熱處理裝置中，由於使具有極高能量之閃光瞬間照射至半導體晶圓之正面，故而半導體晶圓之正面溫度一瞬間急速上升，另一方面，背面溫度並未如此上升。因此，僅半導體晶圓之正面產生急遽之熱膨脹而半導體晶圓變形為上表面凸起而翹曲。然後，於下一瞬間因反作用而半導體晶圓變形為下表面凸起而翹曲。 於半導體晶圓變形為上表面凸起時，晶圓之端緣部與晶座碰撞。相反，於半導體晶圓變形為下表面凸起時，晶圓之中央部與晶座碰撞。其結果，有因與晶座碰撞之衝擊而導致半導體晶圓破裂之問題。 於閃光加熱時發生晶圓破裂時，必須迅速地檢測其破裂且停止後續之半導體晶圓之投入，並且進行腔室內之清掃。又，就防止因晶圓破裂產生之顆粒飛散至腔室外並附著於後續之半導體晶圓等弊端之觀點而言，亦較佳為，於打開剛閃光加熱後之腔室之搬入搬出口之前於腔室內檢測半導體晶圓之破裂。 因此，例如於專利文獻1中，揭示有一種技術，其係於進行閃光加熱處理之腔室設置麥克風，藉由偵測半導體晶圓破裂時之聲音而判定晶圓破裂。又，於專利文獻2中，揭示有一種技術，其係於半導體晶圓之搬送路徑上設置光學感測器，藉由測定半導體晶圓之輪廓形狀而檢測晶圓破裂。進而，於專利文獻3中，揭示有一種技術，其係藉由導光棒接收來自半導體晶圓之反射光，並根據該反射光之強度而檢測晶圓破裂。 [先前技術文獻] [專利文獻] [專利文獻1]日本專利特開2009-231697號公報 [專利文獻2]日本專利特開2013-247128號公報 [專利文獻3]日本專利特開2015-130423號公報In the manufacturing process of semiconductor devices, impurity introduction is a necessary step to form a pn junction in a semiconductor wafer. At present, impurity introduction is generally accomplished through ion implantation followed by annealing. The ion implantation method is a technology that ionizes impurity elements such as boron (B), arsenic (As), and phosphorus (P) and collides with the semiconductor wafer at a high acceleration voltage to physically implant the impurities. The implanted impurities are activated by annealing. At this time, if the annealing time is approximately several seconds or more, the implanted impurities will be diffused deeply due to heat. As a result, the junction depth may become too deep compared to the requirement, which may cause obstacles to the formation of good devices. . Therefore, in recent years, Flash Lamp Annealing (FLA) has attracted attention as an annealing technology for heating semiconductor wafers in a very short time. Flash annealing uses a xenon flash lamp (hereinafter, referred to as a xenon flash lamp when only "flash lamp" is set) to irradiate the front side of the semiconductor wafer with a flash, thereby causing only the front side of the semiconductor wafer with impurities to be implanted in a very short time (several milliseconds). Below) heat treatment technology of rising temperature. The radiation spectrum distribution of xenon flash lamps is from the ultraviolet region to the near-infrared region. The wavelength is shorter than that of the previous halogen lamp, and it is roughly consistent with the basic absorption band of silicon semiconductor wafers. Accordingly, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, less light is transmitted and the semiconductor wafer can be rapidly heated. Furthermore, it was also found that only the vicinity of the front surface of the semiconductor wafer can be selectively heated by very short flash irradiation of several milliseconds or less. Therefore, if the temperature is raised in a very short time using a xenon flash lamp, impurities will not be diffused deeply, and only impurity activation can be performed. In a heat treatment device using such a flash lamp, a flash with extremely high energy is instantly irradiated to the front side of the semiconductor wafer, so the temperature of the front side of the semiconductor wafer rises rapidly in an instant. On the other hand, the temperature of the back side does not rise in this way. Therefore, only the front surface of the semiconductor wafer undergoes rapid thermal expansion and the semiconductor wafer is deformed into a bulge on its upper surface and warped. Then, at the next instant, the semiconductor wafer is deformed into a bulge on its lower surface due to the reaction, causing it to warp. When the semiconductor wafer is deformed into a bulge on its upper surface, the end edge of the wafer collides with the crystal holder. On the contrary, when the semiconductor wafer is deformed into a bulge on its lower surface, the center of the wafer collides with the crystal holder. As a result, there is a problem that the semiconductor wafer is broken due to the impact of collision with the crystal holder. When wafer cracks occur during flash heating, the crack must be detected quickly, subsequent input of semiconductor wafers must be stopped, and the chamber must be cleaned. In addition, from the viewpoint of preventing particles generated by wafer breakage from scattering outside the chamber and adhering to subsequent semiconductor wafers, it is also preferable to open the loading and unloading port of the chamber that has just been flash heated. Semiconductor wafer cracks are detected in the chamber. Therefore, for example, Patent Document 1 discloses a technology in which a microphone is installed in a chamber that performs flash heating processing, and the wafer crack is determined by detecting the sound produced when the semiconductor wafer is cracked. Furthermore, Patent Document 2 discloses a technology in which an optical sensor is installed on a transportation path of a semiconductor wafer to detect wafer cracks by measuring the contour shape of the semiconductor wafer. Furthermore, Patent Document 3 discloses a technology in which a light guide rod receives reflected light from a semiconductor wafer and detects wafer cracking based on the intensity of the reflected light. [Prior technical literature] [Patent Document] [Patent Document 1] Japanese Patent Application Publication No. 2009-231697 [Patent Document 2] Japanese Patent Application Publication No. 2013-247128 [Patent Document 3] Japanese Patent Application Publication No. 2015-130423
[發明所欲解決之問題] 然而，於專利文獻1所揭示之技術中，有難以進行用以僅提取半導體晶圓破裂之聲頻之濾波之問題。又，於專利文獻2所揭示之技術中，有對搬送半導體晶圓之搬送機器人之手之形狀施加限制之問題。進而，於專利文獻3所揭示之技術中，使導光棒旋轉之步驟於閃光照射之前後需要執行2次，故有產能惡化之問題。 本發明係鑒於上述問題而完成者，其目的在於提供一種能夠以簡單之構成檢測閃光照射時之基板之破裂之熱處理方法及熱處理裝置。 [解決問題之技術手段] 為解決上述問題，技術方案1之發明係一種熱處理方法，其藉由對基板照射閃光而加熱該基板，其特徵在於包括：閃光照射步驟，其係自閃光燈對基板之正面照射閃光；溫度測定步驟，其係測定照射上述閃光後之特定期間之上述基板之正面溫度而獲取溫度分佈；及檢測步驟，其係對上述溫度分佈進行解析而檢測上述基板之破裂。 又，技術方案2之發明係一種熱處理方法，其藉由對基板照射閃光而加熱該基板，其特徵在於包括：閃光照射步驟，其係自閃光燈對基板之正面照射閃光；溫度測定步驟，其係測定自開始上述閃光照射起之特定期間之上述基板之正面溫度而獲取溫度分佈；及檢測步驟，其係對上述溫度分佈進行解析而檢測上述基板之破裂。 又，技術方案3之發明如技術方案1或2之發明之熱處理方法，其特徵在於：於上述檢測步驟中，於上述溫度分佈之特性值偏離特定範圍時，判定上述基板破裂。 又，技術方案4之發明如技術方案3之發明之熱處理方法，其特徵在於：上述特性值係上述溫度分佈之平均值及標準偏差，且於上述檢測步驟中，於上述溫度分佈之平均值偏離特定範圍、或上述溫度分佈之標準偏差偏離特定範圍時，判定上述基板破裂。 又，技術方案5之發明如技術方案4之發明之熱處理方法，其特徵在於：於上述檢測步驟中，於上述溫度分佈之平均值偏離±5σ之範圍時、或上述分佈之標準偏差超出5σ之範圍時，判定上述基板破裂。 又，技術方案6之發明如技術方案3之發明之熱處理方法，其特徵在於：上述檢測步驟包含選擇並設定上述特性值之步驟。 又，技術方案7之發明如技術方案2之發明之熱處理方法，其特徵在於：於上述檢測步驟中，於自開始上述閃光照射起上述基板之正面溫度持續升溫之時間與上述閃光燈之閃光照射時間背離特定值以上之情形時，判定上述基板破裂。 又，技術方案8之發明如技術方案1或2之發明之熱處理方法，其特徵在於：於上述檢測步驟中，將測定先於上述基板被處理之基板之正面溫度所獲取之基準溫度分佈與上述溫度分佈加以比較而判定上述基板之破裂。 又，技術方案9之發明如技術方案1或2之發明之熱處理方法，其特徵在於：於上述溫度測定步驟中，根據自上述基板之正面輻射之波長5 μm以上且6.5 μm以下之紅外光之強度而測定上述基板之表面溫度。 又，技術方案10之發明係一種熱處理裝置，其藉由對基板照射閃光而加熱該基板，其特徵在於具備：腔室，其收容基板；閃光燈，其對收容於上述腔室之上述基板之正面照射閃光；輻射溫度計，其接收自上述基板之正面輻射之紅外光而測定該正面之溫度；分佈獲取部，其獲取於自上述閃光燈照射閃光後之特定期間藉由上述輻射溫度計所測定之上述基板之正面溫度之溫度分佈；及解析部，其對上述溫度分佈進行解析而檢測上述基板之破裂。 又，技術方案11之發明係一種熱處理裝置，其藉由對基板照射閃光而加熱該基板，其特徵在於具備：腔室，其收容基板；閃光燈，其對收容於上述腔室之上述基板之正面照射閃光；輻射溫度計，其接收自上述基板之正面輻射之紅外光而測定該正面之溫度；分佈獲取部，其獲取於從自上述閃光燈開始閃光照射起之特定期間藉由上述輻射溫度計所測定之上述基板之正面溫度之溫度分佈；及解析部，其對上述溫度分佈進行解析而檢測上述基板之破裂。 又，技術方案12之發明如技術方案10或11之發明之熱處理裝置，其特徵在於：上述解析部於上述溫度分佈之特性值偏離特定範圍時，判定上述基板破裂。 又，技術方案13之發明如技術方案12之發明之熱處理裝置，其特徵在於：上述特性值係上述溫度分佈之平均值及標準偏差，上述解析部於上述溫度分佈之平均值偏離特定範圍、或上述溫度分佈之標準偏差偏離特定範圍時，判定上述基板破裂。 又，技術方案14之發明如技術方案13之發明之熱處理裝置，其特徵在於：上述解析部於上述溫度分佈之平均值偏離±5σ之範圍時、或上述分佈之標準偏差超出5σ之範圍時，判定上述基板破裂。 又，技術方案15之發明如技術方案12之發明之熱處理裝置，其特徵在於：進而具備設定上述特性值之設定部。 又，技術方案16之發明如技術方案11之發明之熱處理裝置，其特徵在於：上述解析部於自開始上述閃光照射起上述基板之正面溫度持續升溫之時間與上述閃光燈之閃光照射時間背離特定值以上之情形時，判定上述基板破裂。 又，技術方案17之發明如技術方案10或11之發明之熱處理裝置，其特徵在於：上述解析部將測定先於上述基板被處理之基板之正面溫度所獲取之基準溫度分佈與上述溫度分佈加以比較而判定上述基板之破裂。 又，技術方案18之發明如技術方案10或11之發明之熱處理裝置，其特徵在於：上述輻射溫度計係根據自上述基板之正面輻射之波長5 μm以上且6.5 μm以下之紅外光之強度而測定上述基板之正面溫度。 [發明之效果] 根據技術方案1至技術方案9之發明，對測定照射閃光後或自開始閃光照射起之特定期間之基板之正面溫度所獲取之溫度分佈進行解析而檢測基板之破裂，故能夠以簡單之構成檢測閃光照射時之基板之破裂。 尤其是，根據技術方案2之發明，根據自開始閃光照射起之溫度分佈而檢測基板之破裂，故可更確實地檢測閃光照射中之基板之破裂。 尤其是，根據技術方案4之發明，於溫度分佈之平均值偏離特定範圍、或溫度分佈之標準偏差偏離特定範圍時判定基板破裂，故可使破裂判定之精度提高。 根據技術方案10至技術方案18之發明，對在自閃光燈照射閃光後或自開始閃光照射起之特定期間藉由輻射溫度計所測定之基板之正面溫度之溫度分佈進行解析而檢測基板之破裂，故能夠以簡單之構成檢測閃光照射時之基板之破裂。 尤其是，根據技術方案11之發明，根據自開始閃光照射起之溫度分佈而檢測基板之破裂，故可更確實地檢測閃光照射中之基板之破裂。 尤其是，根據技術方案13之發明，於溫度分佈之平均值偏離特定範圍、或溫度分佈之標準偏差偏離特定範圍時判定基板破裂，故可使破裂判定之精度提高。[Problem to be solved by the invention] However, in the technology disclosed in Patent Document 1, there is a problem that it is difficult to perform filtering to extract only the audio frequency of the semiconductor wafer cracking. Furthermore, the technology disclosed in Patent Document 2 has a problem in that the shape of the hand of the transfer robot that transfers the semiconductor wafer is restricted. Furthermore, in the technology disclosed in Patent Document 3, the step of rotating the light guide rod needs to be performed twice before and after flash irradiation, so there is a problem of deterioration in throughput. The present invention was made in view of the above-mentioned problems, and an object thereof is to provide a heat treatment method and a heat treatment apparatus capable of detecting cracking of a substrate during flash irradiation with a simple configuration. [Technical means to solve problems] In order to solve the above problems, the invention of technical solution 1 is a heat treatment method, which heats the substrate by irradiating the substrate with flash light. It is characterized by including: a flash irradiation step, which is a flash lamp irradiating the front side of the substrate with flash; and a temperature measurement step. , which is to measure the front surface temperature of the above-mentioned substrate during a specific period after irradiating the above-mentioned flash light to obtain a temperature distribution; and a detection step, which is to analyze the above-mentioned temperature distribution and detect cracks of the above-mentioned substrate. Furthermore, the invention of claim 2 is a heat treatment method that heats the substrate by irradiating the substrate with flash light, and is characterized by including: a flash irradiation step, which is a flash lamp irradiating the front side of the substrate with a flash; and a temperature measurement step, which is measuring the front surface temperature of the substrate during a specific period from the start of the flash irradiation to obtain a temperature distribution; and a detection step of analyzing the temperature distribution to detect cracks in the substrate. Furthermore, the invention of claim 3 is the heat treatment method of the invention of claim 1 or 2, wherein in the detection step, when the characteristic value of the temperature distribution deviates from a specific range, it is determined that the substrate is cracked. Furthermore, the invention of claim 4 is the heat treatment method of the invention of claim 3, wherein the characteristic value is the mean value and standard deviation of the temperature distribution, and in the detection step, the deviation from the mean value of the temperature distribution is When the specific range or the standard deviation of the temperature distribution deviates from the specific range, it is determined that the substrate is cracked. Furthermore, the invention of claim 5 is the heat treatment method of the invention of claim 4, characterized in that in the above-mentioned detection step, when the average value of the above-mentioned temperature distribution deviates from the range of ±5σ, or the standard deviation of the above-mentioned distribution exceeds 5σ. Within the range, the above-mentioned substrate is judged to be cracked. Furthermore, the invention of claim 6 is the heat treatment method of the invention of claim 3, wherein the detection step includes a step of selecting and setting the characteristic value. Furthermore, the invention of claim 7 is the heat treatment method of the invention of claim 2, characterized in that in the above-mentioned detection step, the time during which the front surface temperature of the above-mentioned substrate continues to rise since the start of the above-mentioned flash irradiation is equal to the flash irradiation time of the above-mentioned flash lamp. When the deviation exceeds a specific value, it is determined that the above-mentioned substrate is cracked. Furthermore, the invention of claim 8 is the heat treatment method of the invention of claim 1 or 2, characterized in that in the above-mentioned detection step, the reference temperature distribution obtained by measuring the front surface temperature of the substrate processed before the above-mentioned substrate is combined with the above-mentioned The temperature distribution is compared to determine the crack of the above-mentioned substrate. Furthermore, the invention according to claim 9 is the heat treatment method of the invention according to claim 1 or 2, characterized in that in the temperature measurement step, infrared light with a wavelength of 5 μm or more and 6.5 μm or less is radiated from the front surface of the substrate. Strength and measure the surface temperature of the above substrate. Furthermore, the invention of claim 10 is a heat treatment apparatus that heats the substrate by irradiating the substrate with a flash light, and is characterized in that it is provided with: a chamber that accommodates the substrate; and a flash lamp that illuminates the front surface of the substrate accommodated in the chamber. Irradiation flash; a radiation thermometer that receives infrared light radiated from the front surface of the substrate and measures the temperature of the front surface; a distribution acquisition unit that obtains the above-mentioned substrate measured by the above-mentioned radiation thermometer during a specific period after the flash lamp irradiates the flash a temperature distribution of the front surface temperature; and an analysis part that analyzes the temperature distribution to detect cracks of the substrate. Furthermore, the invention of claim 11 is a heat treatment device that heats the substrate by irradiating the substrate with a flash, and is characterized by having a chamber that accommodates the substrate, and a flash lamp that illuminates the front surface of the substrate accommodated in the chamber. Irradiation flash; a radiation thermometer that receives infrared light radiated from the front surface of the substrate and measures the temperature of the front surface; a distribution acquisition unit that obtains the radiation temperature measured by the above-mentioned radiation thermometer during a specific period from the start of flash irradiation by the above-mentioned flash lamp. a temperature distribution of the front surface temperature of the substrate; and an analysis unit that analyzes the temperature distribution to detect cracks of the substrate. Furthermore, the invention of claim 12 is the heat treatment apparatus of the invention of claim 10 or 11, wherein the analysis unit determines that the substrate is cracked when the characteristic value of the temperature distribution deviates from a specific range. Furthermore, the invention of claim 13 is the heat treatment apparatus of the invention of claim 12, wherein the characteristic value is an average value and a standard deviation of the temperature distribution, and the analysis unit deviates from a specific range when the average value of the temperature distribution deviates, or When the standard deviation of the temperature distribution deviates from a specific range, it is determined that the substrate is cracked. Furthermore, the invention of claim 14 is the heat treatment apparatus of the invention of claim 13, wherein the analysis unit is characterized in that when the average value of the temperature distribution deviates from the range of ±5σ, or when the standard deviation of the distribution exceeds the range of 5σ, It was determined that the above-mentioned substrate was cracked. Moreover, the invention of Claim 15 is the heat treatment apparatus of the invention of Claim 12, and is characterized by further including a setting part for setting the said characteristic value. Furthermore, the invention of claim 16 is the heat treatment apparatus of the invention of claim 11, wherein the analysis unit deviates from a specific value between the time during which the front surface temperature of the substrate continues to rise from the start of the flash irradiation and the flash irradiation time of the flash lamp. In the above situation, it is determined that the above-mentioned substrate is cracked. Furthermore, the invention of claim 17 is the heat treatment apparatus of the invention of claim 10 or 11, wherein the analysis unit combines a reference temperature distribution obtained by measuring the front surface temperature of a substrate processed before the substrate with the temperature distribution. Compare and determine the crack of the above substrate. Furthermore, the invention of claim 18 is the heat treatment apparatus of the invention of claim 10 or 11, wherein the radiation thermometer is measured based on the intensity of infrared light with a wavelength of 5 μm or more and 6.5 μm or less radiated from the front surface of the substrate. The front surface temperature of the above substrate. [Effects of the invention] According to the invention of claims 1 to 9, the cracking of the substrate can be detected by analyzing the temperature distribution obtained by measuring the front temperature of the substrate after flash irradiation or during a specific period from the start of flash irradiation, so detection can be performed with a simple structure Crack of substrate during flash irradiation. In particular, according to the invention of claim 2, cracking of the substrate is detected based on the temperature distribution from the start of flash irradiation, so that cracking of the substrate during flash irradiation can be detected more reliably. In particular, according to the invention of claim 4, cracking of the substrate is determined when the average value of the temperature distribution deviates from a specific range or the standard deviation of the temperature distribution deviates from a specific range, so the accuracy of the crack determination can be improved. According to the invention of claims 10 to 18, the crack of the substrate is detected by analyzing the temperature distribution of the front surface temperature of the substrate measured by a radiation thermometer during a specific period after the flash lamp irradiates the flash or from the start of the flash irradiation. It is possible to detect the cracking of the substrate during flash irradiation with a simple structure. In particular, according to the invention of claim 11, cracking of the substrate is detected based on the temperature distribution from the start of flash irradiation, so that cracking of the substrate during flash irradiation can be detected more reliably. In particular, according to the invention of claim 13, cracking of the substrate is determined when the average value of the temperature distribution deviates from the specific range or the standard deviation of the temperature distribution deviates from the specific range, so the accuracy of the crack determination can be improved.
以下，一面參照圖式一面對本發明之實施形態詳細地進行說明。 ＜第1實施形態＞ 圖1係表示本發明之熱處理裝置1之構成之縱剖視圖。圖1之熱處理裝置1係藉由對作為基板之圓板形狀之半導體晶圓W進行閃光照射而加熱該半導體晶圓W之閃光燈退火裝置。成為處理對象之半導體晶圓W之尺寸並無特別限定，例如為ϕ300 mm或ϕ450 mm(本實施形態中為ϕ300 mm)。於搬入至熱處理裝置1之前之半導體晶圓W中注入有雜質，藉由熱處理裝置1之加熱處理而執行所注入之雜質之活化處理。再者，於圖1及之後之各圖中，為了容易理解，而視需要誇大或簡化地描繪各部之尺寸或數量。 熱處理裝置1具備收容半導體晶圓W之腔室6、內置複數個閃光燈FL之閃光加熱部5、及內置複數個鹵素燈HL之鹵素加熱部4。於腔室6之上側設置有閃光加熱部5，並且於下側設置有鹵素加熱部4。又，熱處理裝置1具備將半導體晶圓W以水平姿勢保持於腔室6之內部之保持部7、及於保持部7與裝置外部之間進行半導體晶圓W之交接之移載機構10。進而，熱處理裝置1具備控制部3，其控制設置於鹵素加熱部4、閃光加熱部5及腔室6之各動作機構而執行半導體晶圓W之熱處理。 腔室6係於筒狀之腔室側部61之上下安裝石英製之腔室窗而構成。腔室側部61具有上下開口之大致筒形狀，於上側開口安裝上側腔室窗63而封閉，於下側開口安裝下側腔室窗64而封閉。構成腔室6之頂壁部之上側腔室窗63係由石英形成之圓板形狀構件，且作為使自閃光加熱部5出射之閃光透過至腔室6內之石英窗而發揮功能。又，構成腔室6之底壁部之下側腔室窗64亦係由石英形成之圓板形狀構件，且作為使來自鹵素加熱部4之光透過至腔室6內之石英窗而發揮功能。 又，於腔室側部61內側之壁面之上部安裝有反射環68，於下部安裝有反射環69。反射環68、69均形成為圓環狀。上側之反射環68係藉由自腔室側部61之上側嵌入而安裝。另一方面，下側之反射環69係藉由自腔室側部61之下側嵌入並以省略圖示之螺釘固定而安裝。即，反射環68、69均裝卸自如地安裝於腔室側部61。將腔室6之內側空間、即由上側腔室窗63、下側腔室窗64、腔室側部61及反射環68、69包圍之空間規定為熱處理空間65。 藉由在腔室側部61安裝反射環68、69而於腔室6之內壁面形成凹部62。即，形成由腔室側部61之內壁面中之未安裝反射環68、69之中央部分、反射環68之下端面、及反射環69之上端面所包圍之凹部62。凹部62於腔室6之內壁面沿水平方向形成為圓環狀，且圍繞保持半導體晶圓W之保持部7。腔室側部61及反射環68、69係由強度與耐熱性優異之金屬材料(例如不鏽鋼)形成。 又，於腔室側部61，形成設置有用以相對於腔室6進行半導體晶圓W之搬入及搬出之搬送開口部(爐口)66。搬送開口部66能夠藉由閘閥185而開閉。搬送開口部66與凹部62之外周面連通連接。因此，於閘閥185將搬送開口部66打開時，可自搬送開口部66通過凹部62而將半導體晶圓W搬入至熱處理空間65及自熱處理空間65搬出半導體晶圓W。又，若閘閥185將搬送開口部66關閉，則使腔室6內之熱處理空間65為密閉空間。 進而，於腔室側部61，穿設有貫通孔61a及貫通孔61b。貫通孔61a係用以將自保持於下述晶座74之半導體晶圓W之上表面輻射之紅外光引導至上部輻射溫度計25之紅外線感測器91之圓筒狀之孔。另一方面，貫通孔61b係用以將自半導體晶圓W之下表面輻射之紅外光引導至下部輻射溫度計20之圓筒狀之孔。貫通孔61a及貫通孔61b係以其等之貫通方向之軸與保持於晶座74之半導體晶圓W之主面交叉之方式相對於水平方向傾斜地設置。於貫通孔61a之面向熱處理空間65之側之端部，安裝有使上部輻射溫度計25能夠測定之波長區域之紅外光透過之包含氟化鈣材料之透明窗26。又，於貫通孔61b之面向熱處理空間65之側之端部，安裝有使下部輻射溫度計20能夠測定之波長區域之紅外光透過之包含氟化鋇材料之透明窗21。 又，於腔室6之內壁上部，形成設置有對熱處理空間65供給處理氣體之氣體供給孔81。氣體供給孔81形成設置於較凹部62更靠上側位置，亦可設置於反射環68。氣體供給孔81係經由呈圓環狀形成於腔室6之側壁內部之緩衝空間82而與氣體供給管83連通連接。氣體供給管83連接於處理氣體供給源85。又，於氣體供給管83之路徑中途介插有閥84。若將閥84打開，則自處理氣體供給源85向緩衝空間82輸送處理氣體。流入至緩衝空間82之處理氣體係以於流體阻力較氣體供給孔81小之緩衝空間82內擴散之方式流動而自氣體供給孔81供給至熱處理空間65內。作為處理氣體，可使用例如氮氣(N2 )等惰性氣體、或氫氣(H2 )、氨氣(NH3 )等反應性氣體、或將其等混合而成之混合氣體(本實施形態中為氮氣)。 另一方面，於腔室6之內壁下部形成設置有對熱處理空間65內之氣體進行排氣之氣體排氣孔86。氣體排氣孔86形成設置於較凹部62更靠下側位置，亦可設置於反射環69。氣體排氣孔86係經由呈圓環狀形成於腔室6之側壁內部之緩衝空間87而與氣體排氣管88連通連接。氣體排氣管88連接於排氣部190。又，於氣體排氣管88之路徑中途介插有閥89。若將閥89打開，則熱處理空間65之氣體自氣體排氣孔86經由緩衝空間87而排出至氣體排氣管88。再者，氣體供給孔81及氣體排氣孔86亦可沿腔室6之圓周方向設置複數個，亦可為狹縫狀者。又，處理氣體供給源85及排氣部190可為設置於熱處理裝置1之機構，亦可為設置熱處理裝置1之工廠之實體。 又，於搬送開口部66之前端亦連接有將熱處理空間65內之氣體排出之氣體排氣管191。氣體排氣管191經由閥192而連接於排氣部190。藉由打開閥192而將腔室6內之氣體經由搬送開口部66排氣。 圖2係表示保持部7之整體外觀之立體圖。保持部7係具備基台環71、連結部72及晶座74而構成。基台環71、連結部72及晶座74均由石英形成。即，保持部7之整體由石英形成。 基台環71係自圓環形狀切掉一部分而成之圓弧形狀之石英構件。該切掉部分係為了防止下述移載機構10之移載臂11與基台環71之干涉而設置。基台環71藉由載置於凹部62之底面而支持於腔室6之壁面(參照圖1)。於基台環71之上表面，沿著其圓環形狀之圓周方向立設有複數個連結部72(本實施形態中為4個)。連結部72亦為石英之構件，且藉由焊接而固著於基台環71。 晶座74由設置於基台環71之4個連結部72支持。圖3係晶座74之俯視圖。又，圖4係晶座74之剖視圖。晶座74具備保持板75、導向環76及複數個基板支持銷77。保持板75係由石英形成之大致圓形之平板狀構件。保持板75之直徑較半導體晶圓W之直徑大。即，保持板75具有較半導體晶圓W大之平面尺寸。 於保持板75之上表面周緣部設置有導向環76。導向環76係具有較半導體晶圓W之直徑大之內徑之圓環形狀之構件。例如，於半導體晶圓W之直徑為ϕ300 mm之情形時，導向環76之內徑為ϕ320 mm。導向環76之內周設為自保持板75朝上方變寬之錐面。導向環76由與保持板75相同之石英形成。導向環76可熔接於保持板75之上表面，亦可藉由另外加工之銷等固定於保持板75。或者，亦可將保持板75與導向環76加工為一體之構件。 將保持板75之上表面中之較導向環76更靠內側之區域設為保持半導體晶圓W之平面狀之保持面75a。於保持板75之保持面75a，立設有複數個基板支持銷77。於本實施形態中，沿著與保持面75a之外周圓(導向環76之內周圓)為同心圓之圓周上每隔30°立設有共計12個基板支持銷77。配置12個基板支持銷77而成之圓之直徑(對向之基板支持銷77間之距離)小於半導體晶圓W之直徑，若半導體晶圓W之直徑為ϕ300 mm，則其為ϕ270 mm～ϕ280 mm(本實施形態中為ϕ270 mm)。各個基板支持銷77係由石英形成。複數個基板支持銷77可藉由焊接而設置於保持板75之上表面，亦可加工成與保持板75為一體。 返回至圖2，立設於基台環71之4個連結部72與晶座74之保持板75之周緣部藉由焊接而固著。即，晶座74與基台環71藉由連結部72而固定地連結。藉由將此種保持部7之基台環71支持於腔室6之壁面而將保持部7安裝於腔室6。於將保持部7安裝於腔室6之狀態下，晶座74之保持板75成為水平姿勢(法線與鉛直方向一致之姿勢)。即，保持板75之保持面75a成為水平面。 已搬入至腔室6之半導體晶圓W以水平姿勢載置並保持於安裝於腔室6之保持部7之晶座74上。此時，半導體晶圓W由立設於保持板75上之12個基板支持銷77支持而保持於晶座74。更嚴格而言，12個基板支持銷77之上端部與半導體晶圓W之下表面接觸而支持該半導體晶圓W。由於12個基板支持銷77之高度(自基板支持銷77之上端至保持板75之保持面75a之距離)均勻，故可藉由12個基板支持銷77將半導體晶圓W以水平姿勢支持。 又，半導體晶圓W藉由複數個基板支持銷77而自保持板75之保持面75a隔開特定之間隔地被支持。導向環76之厚度較基板支持銷77之高度大。因此，由複數個基板支持銷77支持之半導體晶圓W之水平方向之位置偏移藉由導向環76而得以防止。 又，如圖2及圖3所示，於晶座74之保持板75，上下貫通地形成有開口部78。開口部78係為了使下部輻射溫度計20接收自半導體晶圓W之下表面輻射之輻射光(紅外光)而設置。即，下部輻射溫度計20係經由開口部78及安裝於腔室側部61之貫通孔61b之透明窗21接收自半導體晶圓W之下表面輻射之光而測定該半導體晶圓W之溫度。進而，於晶座74之保持板75，穿設有供下述移載機構10之頂起銷12貫通以進行半導體晶圓W之交接之4個貫通孔79。 圖5係移載機構10之俯視圖。又，圖6係移載機構10之側視圖。移載機構10具備2條移載臂11。移載臂11設為沿著大致圓環狀之凹部62般之圓弧形狀。於各個移載臂11立設有2根頂起銷12。移載臂11及頂起銷12係由石英形成。各移載臂11設為能夠藉由水平移動機構13而旋動。水平移動機構13使一對移載臂11於相對於保持部7進行半導體晶圓W之移載之移載動作位置(圖5之實線位置)、與俯視時與保持於保持部7之半導體晶圓W不重疊之退避位置(圖5之二點鏈線位置)之間水平移動。作為水平移動機構13，可為藉由個別之馬達使各移載臂11分別旋動者，亦可為使用連桿機構藉由1個馬達使一對移載臂11連動地旋動者。 又，一對移載臂11藉由升降機構14而與水平移動機構13一起進行升降移動。若升降機構14使一對移載臂11於移載動作位置上升，則共計4根頂起銷12通過穿設於晶座74之貫通孔79(參照圖2、3)，頂起銷12之上端自晶座74之上表面突出。另一方面，若升降機構14使一對移載臂11於移載動作位置下降而將頂起銷12自貫通孔79拔出，並使水平移動機構13以使一對移載臂11張開之方式移動，則各移載臂11移動至退避位置。一對移載臂11之退避位置為保持部7之基台環71之正上方。由於基台環71載置於凹部62之底面，故移載臂11之退避位置成為凹部62之內側。再者，於設置有移載機構10之驅動部(水平移動機構13及升降機構14)之部位之附近亦設置有省略圖示之排氣機構，構成為將移載機構10之驅動部周邊之環境氣體排出至腔室6之外部。 返回至圖1，設置於腔室6之上方之閃光加熱部5係於殼體51之內側具備包含複數根(本實施形態中為30根)氙閃光燈FL之光源、及以覆蓋該光源上方之方式設置之反射器52而構成。又，於閃光加熱部5之殼體51之底部安裝有燈光輻射窗53。構成閃光加熱部5之底壁部之燈光輻射窗53係由石英形成之板狀之石英窗。藉由將閃光加熱部5設置於腔室6之上方而燈光輻射窗53與上側腔室窗63相對向。閃光燈FL自腔室6之上方經由燈光輻射窗53及上側腔室窗63而對熱處理空間65照射閃光。 複數個閃光燈FL分別為具有長條之圓筒形狀之棒狀燈，其等以各自之長度方向沿著保持於保持部7之半導體晶圓W之主面(亦即沿著水平方向)成為相互平行之方式排列成平面狀。由此，藉由閃光燈FL之排列而形成之平面亦為水平面。 氙閃光燈FL具備：棒狀之玻璃管(放電管)，其於內部封入有氙氣且於其兩端部配設有連接於電容器之陽極及陰極；及觸發電極，其附設於該玻璃管之外周面上。由於氙氣為電性絕緣體，故即便電容器中儲存有電荷，於通常狀態下亦不會向玻璃管內流通電流。然而，於對觸發電極施加高電壓而破壞絕緣之情形時，蓄積於電容器中之電瞬間流向玻璃管內，藉由此時之氙之原子或分子之激發而發出光。於此種氙閃光燈FL中，預先蓄積於電容器之靜電能量轉換為0.1毫秒至100毫秒之極短之光脈衝，故與如鹵素燈HL之連續點亮之光源相比具有能夠照射極強之光之特徵。即，閃光燈FL係以未達1秒之極短時間瞬間發光之脈衝發光燈。再者，閃光燈FL之發光時間可根據對閃光燈FL進行電力供給之燈電源之線圈常數而調整。 又，反射器52係於複數個閃光燈FL之上方以覆蓋其等整體之方式設置。反射器52之基本功能係使自複數個閃光燈FL出射之閃光向熱處理空間65側反射。反射器52由鋁合金板形成，其表面(面向閃光燈FL之側之面)藉由噴砂處理而實施粗面化加工。 設置於腔室6之下方之鹵素加熱部4於殼體41之內側內置有複數根(本實施形態中為40根)鹵素燈HL。鹵素加熱部4係藉由複數個鹵素燈HL自腔室6之下方經由下側腔室窗64對熱處理空間65進行光照射而加熱半導體晶圓W之光照射部。 圖7係表示複數個鹵素燈HL之配置之俯視圖。40根鹵素燈HL分為上下2層而配置。於靠近保持部7之上層配設有20根鹵素燈HL，並且於較上層更遠離保持部7之下層亦配設有20根鹵素燈HL。各鹵素燈HL為具有長條之圓筒形狀之棒狀燈。上層、下層均為20根之鹵素燈HL係以各自之長度方向沿著保持於保持部7之半導體晶圓W之主面(亦即沿著水平方向)成為相互平行之方式排列。由此，藉由鹵素燈HL之排列而形成之平面於上層、下層均為水平面。 又，如圖7所示，上層、下層中，均係相較於與保持於保持部7之半導體晶圓W之中央部對向之區域，而與周緣部對向之區域之鹵素燈HL之配設密度更高。即，上下層均係相較於燈排列之中央部而周緣部之鹵素燈HL之配設間距更短。因此，於藉由來自鹵素加熱部4之光照射進行加熱時可對容易產生溫度降低之半導體晶圓W之周緣部進行更多光量之照射。 又，包含上層之鹵素燈HL之燈群與包含下層之鹵素燈HL之燈群以呈格子狀交叉之方式排列。即，以配置於上層之20根鹵素燈HL之長度方向與配置於下層之20根鹵素燈HL之長度方向彼此正交之方式配設共計40根鹵素燈HL。 鹵素燈HL係藉由對配設於玻璃管內部之燈絲通電而使燈絲白熾化而發光之燈絲方式之光源。於玻璃管之內部，封入有對氮氣或氬氣等惰性氣體導入微量之鹵素元素(碘、溴等)所得之氣體。藉由導入鹵素元素而能夠抑制燈絲之折損並且將燈絲之溫度設定為高溫。因此，鹵素燈HL具有與通常之白熾燈相比壽命較長且可連續地照射較強之光之特性。即，鹵素燈HL係至少1秒以上連續發光之連續點亮燈。又，鹵素燈HL由於為棒狀燈，故壽命長，藉由將鹵素燈HL沿著水平方向配置而成為對上方之半導體晶圓W之輻射效率優異者。 又，於鹵素加熱部4之殼體41內，亦於2層鹵素燈HL之下側設置有反射器43(圖1)。反射器43使自複數個鹵素燈HL出射之光向熱處理空間65側反射。 控制部3控制設置於熱處理裝置1之上述各種動作機構。作為控制部3之硬體之構成與一般的電腦相同。即，控制部3具備進行各種運算處理之電路即CPU(Central Processing Unit，中央處理單元)、記憶基本程式之讀出專用之記憶體即ROM(Read Only Memory，唯讀記憶體)、記憶各種資訊之讀寫自如之記憶體即RAM(Random Access Memory，隨機存取記憶體)、以及預先記憶控制用軟體或資料等之磁碟。控制部3之CPU藉由執行特定之處理程式而進行熱處理裝置1中之處理。 又，如圖1所示，熱處理裝置1具備上部輻射溫度計25及下部輻射溫度計20。上部輻射溫度計25係用以測定自閃光燈FL照射閃光之瞬間之半導體晶圓W之上表面之急遽之溫度變化的高速輻射溫度計。 圖8係表示包含上部輻射溫度計25之主要部分之高速輻射溫度計單元90之構成之方塊圖。上部輻射溫度計25之紅外線感測器91係以其光軸與貫通孔61a之貫通方向之軸一致之方式安裝於腔室側部61之外壁面。紅外線感測器91經由氟化鈣之透明窗26而接收自保持於晶座74之半導體晶圓W之上表面輻射之紅外光。紅外線感測器91具備InSb(銻化銦)之光學元件，其測定波長區域為5 μm～6.5 μm。氟化鈣之透明窗26選擇性地使紅外線感測器91之測定波長區域之紅外光透過。InSb光學元件係根據所接收到之紅外光之強度而電阻發生變化。具備InSb光學元件之紅外線感測器91能夠進行響應時間極短且取樣間隔為明顯短之時間(例如，約40微秒)之高速測定。紅外線感測器91與高速輻射溫度計單元90電性連接，將響應受光所產生之信號傳輸至高速輻射溫度計單元90。 高速輻射溫度計單元90具備信號轉換電路92、放大電路93、A/D(Analog/Digital，類比/數位)轉換器94、溫度轉換部95、特性值推算部96及記憶部97。信號轉換電路92係將紅外線感測器91之InSb光學元件中產生之電阻變化以電流變化、電壓變化之順序進行信號轉換，最終轉換為易處理之電壓信號而輸出之電路。信號轉換電路92例如使用運算放大器構成。放大電路93將自信號轉換電路92輸出之電壓信號放大並輸出至A/D轉換器94。A/D轉換器94將經放大電路93放大之電壓信號轉換為數位信號。 溫度轉換部95及特性值推算部96係藉由高速輻射溫度計單元90之CPU(省略圖示)執行特定之處理程式而實現之功能處理部。溫度轉換部95對自A/D轉換器94輸出之信號、亦即表示紅外線感測器91所接收之紅外光之強度之信號進行特定之運算處理而轉換為溫度。由溫度轉換部95求出之溫度為半導體晶圓W之上表面之溫度。再者，由紅外線感測器91、信號轉換電路92、放大電路93、A/D轉換器94、及溫度轉換部95構成上部輻射溫度計25。下部輻射溫度計20亦具備與上部輻射溫度計25大致相同之構成，但亦可不應對高速測定。 又，溫度轉換部95將所獲取之溫度資料儲存於記憶部97。作為記憶部97，可使用磁碟或記憶體等公知之記憶媒體。溫度轉換部95將以固定間隔取樣之溫度資料依次儲存於記憶部97，藉此獲取表示半導體晶圓W之上表面之溫度之時間變化之溫度分佈。 如圖8所示，高速輻射溫度計單元90與熱處理裝置1整體之控制器即控制部3電性連接。控制部3具備破裂判定部31。破裂判定部31係藉由控制部3之CPU執行特定之處理程式而實現之功能處理部。關於高速輻射溫度計單元90之特性值推算部96及控制部3之破裂判定部31之處理內容，將於下文進一步進行敍述。 又，於控制部3連接有顯示部32及輸入部33。控制部3將各種資訊顯示於顯示部32。輸入部33係用以由熱處理裝置1之操作員將各種指令或參數輸入至控制部3之機器。操作員亦可自輸入部33進行記述有半導體晶圓W之處理條件之處理方案之條件設定。作為顯示部32及輸入部33，例如可採用設置於熱處理裝置1之外壁之液晶觸控面板。 除上述構成以外，熱處理裝置1亦具備各種冷卻用構造，以防止於半導體晶圓W之熱處理時自鹵素燈HL及閃光燈FL產生之熱能所引起之鹵素加熱部4、閃光加熱部5及腔室6之過剩之溫度上升。例如，於腔室6之壁體設置有水冷管(省略圖示)。又，鹵素加熱部4及閃光加熱部5設為於內部形成氣流而排熱之空冷構造。又，亦對上側腔室窗63與燈光輻射窗53之間隙供給空氣，使閃光加熱部5及上側腔室窗63冷卻。 其次，對熱處理裝置1中之半導體晶圓W之處理順序進行說明。圖9係表示半導體晶圓W之處理順序之流程圖。此處，成為處理對象之半導體晶圓W係藉由離子注入法而添加有雜質(離子)之半導體基板。該雜質之活化藉由熱處理裝置1之閃光照射加熱處理(退火)而執行。以下說明之熱處理裝置1之處理順序藉由控制部3控制熱處理裝置1之各動作機構而進行。 首先，打開用以供氣之閥84，並且打開排氣用之閥89、192而開始進行對腔室6內之供排氣。若打開閥84，則自氣體供給孔81對熱處理空間65供給氮氣。又，若打開閥89，則自氣體排氣孔86對腔室6內之氣體進行排氣。藉此，自腔室6內之熱處理空間65之上部供給之氮氣流向下方，且自熱處理空間65之下部排氣。 又，藉由打開閥192而亦自搬送開口部66對腔室6內之氣體進行排氣。進而，藉由省略圖示之排氣機構亦對移載機構10之驅動部周邊之環境氣體進行排氣。再者，於熱處理裝置1中之半導體晶圓W之熱處理時將氮氣持續地供給至熱處理空間65，且其供給量根據處理步驟而適當變更。 繼而，打開閘閥185而將搬送開口部66打開，藉由裝置外部之搬送機器人將成為處理對象之半導體晶圓W經由搬送開口部66而搬入至腔室6內之熱處理空間65(步驟S1)。此時，有伴隨半導體晶圓W之搬入而夾帶裝置外部之環境氣體之虞，但由於對腔室6持續地供給氮氣，故氮氣自搬送開口部66流出而可將此種外部環境氣體之夾帶抑制為最小限度。 由搬送機器人搬入之半導體晶圓W進入至保持部7之正上方位置後停止。然後，移載機構10之一對移載臂11自退避位置水平移動至移載動作位置並上升，藉此頂起銷12通過貫通孔79自晶座74之保持板75之上表面突出而接收半導體晶圓W。此時，頂起銷12上升至較基板支持銷77之上端更上方。 將半導體晶圓W載置於頂起銷12之後，搬送機器人自熱處理空間65退出，並藉由閘閥185將搬送開口部66關閉。然後，藉由一對移載臂11下降而將半導體晶圓W自移載機構10交接至保持部7之晶座74並以水平姿勢自下方保持。半導體晶圓W由立設於保持板75上之複數個基板支持銷77支持而保持於晶座74。又，半導體晶圓W係將完成圖案形成且注入有雜質之正面作為上表面而保持於保持部7。於由複數個基板支持銷77支持之半導體晶圓W之背面(與正面為相反側之主面)與保持板75之保持面75a之間形成特定之間隔。下降至晶座74之下方之一對移載臂11藉由水平移動機構13而退避至退避位置、即凹部62之內側。 於半導體晶圓W由以石英形成之保持部7之晶座74以水平姿勢自下方保持之後，鹵素加熱部4之40根鹵素燈HL同時點亮而開始預加熱(輔助加熱)(步驟S2)。自鹵素燈HL出射之鹵素光透過由石英形成之下側腔室窗64及晶座74而照射至半導體晶圓W之下表面。藉由接受來自鹵素燈HL之光照射而半導體晶圓W進行預加熱而溫度上升。再者，由於移載機構10之移載臂11退避至凹部62之內側，故不會妨礙鹵素燈HL之加熱。 於利用鹵素燈HL進行預加熱時，藉由下部輻射溫度計20測定半導體晶圓W之溫度。即，使自保持於晶座74之半導體晶圓W之下表面經由開口部78輻射之紅外光透過透明窗21而由下部輻射溫度計20接收而測定升溫中之晶圓溫度。所測定之半導體晶圓W之溫度被傳輸至控制部3。控制部3一面監視藉由來自鹵素燈HL之光照射而升溫之半導體晶圓W之溫度是否已達到特定之預加熱溫度T1，一面控制鹵素燈HL之輸出。即，控制部3根據下部輻射溫度計20之測定值，以半導體晶圓W之溫度成為預加熱溫度T1之方式對鹵素燈HL之輸出進行反饋控制。如此，下部輻射溫度計20係用於預加熱時之半導體晶圓W之溫度控制之輻射溫度計。預加熱溫度T1設為不存在半導體晶圓W中所添加之雜質因熱而擴散之可能性的200℃至800℃左右、較佳為350℃至600℃左右(於本實施形態中為600℃)。 於半導體晶圓W之溫度達到預加熱溫度T1之後，控制部3將半導體晶圓W暫時維持於該預加熱溫度T1。具體而言，於由下部輻射溫度計20測定之半導體晶圓W之溫度達到預加熱溫度T1之時間點，控制部3調整鹵素燈HL之輸出，而將半導體晶圓W之溫度大致維持於預加熱溫度T1。 藉由進行此種利用鹵素燈HL之預加熱而使半導體晶圓W之整體均勻地升溫至預加熱溫度T1。於利用鹵素燈HL進行預加熱之階段，有更容易產生散熱之半導體晶圓W之周緣部之溫度較中央部降低之傾向，但鹵素加熱部4之鹵素燈HL之配設密度係相較於與基板W之中央部對向之區域而與周緣部對向之區域更高。因此，照射至容易產生散熱之半導體晶圓W之周緣部之光量變多，而可使預加熱階段之半導體晶圓W之面內溫度分佈均勻。 於半導體晶圓W之溫度達到預加熱溫度T1之後，於即將進行來自閃光燈FL之閃光照射之前，開始由上部輻射溫度計25進行之半導體晶圓W之正面溫度之測定(步驟S3)。自被加熱之半導體晶圓W之正面輻射與其溫度對應之強度之紅外光。自半導體晶圓W之正面輻射之紅外光透過透明窗26而由上部輻射溫度計25之紅外線感測器91接收。 於紅外線感測器91之InSb光學元件中產生與所接收之紅外光之強度對應之電阻變化。紅外線感測器91之InSb光學元件中產生之電阻變化藉由信號轉換電路92而轉換為電壓信號。自信號轉換電路92輸出之電壓信號經放大電路93放大之後，藉由A/D轉換器94轉換為適合於電腦進行處理之數位信號。然後，溫度轉換部95對自A/D轉換器94輸出之信號實施特定之運算處理而轉換為溫度資料。即，上部輻射溫度計25接收自被加熱之半導體晶圓W之正面輻射之紅外光，並根據該紅外光之強度而測定半導體晶圓W之正面溫度。 於本實施形態中，上部輻射溫度計25係使用InSb光學元件之高速輻射溫度計，上部輻射溫度計25以40微秒之極短之取樣間隔測定半導體晶圓W之正面溫度。而且，上部輻射溫度計25將以固定間隔所測定出之半導體晶圓W之正面溫度之資料依次儲存於記憶部97。 於半導體晶圓W之溫度達到預加熱溫度T1且經過特定時間後之時間點，閃光加熱部5之閃光燈FL對保持於晶座74之半導體晶圓W之正面進行閃光照射(步驟S4)。此時，自閃光燈FL輻射之閃光之一部分直接朝向腔室6內，另一部分暫且先由反射器52反射然後朝向腔室6內，藉由該等閃光之照射而進行半導體晶圓W之閃光加熱。 閃光加熱係藉由來自閃光燈FL之閃光(flashing light)照射而進行，故可使半導體晶圓W之正面溫度在短時間內上升。即，自閃光燈FL照射之閃光係將預先蓄積於電容器中之靜電能量轉換為極短之光脈衝、照射時間為大約0.1毫秒以上且100毫秒以下之極短且較強之閃光。而且，藉由來自閃光燈FL之閃光照射而被閃光加熱之半導體晶圓W之正面溫度瞬間上升至1000℃以上之處理溫度T2，於注入至半導體晶圓W之雜質活化之後，正面溫度急速下降。如此，熱處理裝置1可使半導體晶圓W之正面溫度以極短時間升降，故可一面抑制注入至半導體晶圓W之雜質因熱而擴散一面進行雜質之活化。再者，雜質之活化所需之時間與其熱擴散所需之時間相比極短，故即便為0.1毫秒至100毫秒左右之不會產生擴散之短時間，亦完成活化。 於藉由閃光加熱而半導體晶圓W之正面溫度急速上升後下降時，其正面溫度亦藉由上部輻射溫度計25測定。由於上部輻射溫度計25以40微秒之極短之取樣間隔測定半導體晶圓W之正面溫度，故即便於閃光照射時半導體晶圓W之正面溫度急遽地變化，亦能夠追隨該變化。例如，即便半導體晶圓W之正面溫度以4毫秒升溫降溫，上部輻射溫度計25亦可於此期間獲取100點之溫度資料。上部輻射溫度計25於閃光燈FL照射閃光之後預先設定之特定期間(例如120毫秒)之間，測定半導體晶圓W之正面溫度而獲取溫度資料。然後，上部輻射溫度計25將所獲取之半導體晶圓W之正面溫度之資料依次儲存於記憶部97。藉此，製成閃光照射時之半導體晶圓W之正面溫度之溫度分佈(步驟S5)。 圖10係表示閃光照射時之半導體晶圓W之正面溫度之溫度分佈之一例之圖。圖10所示之例係於閃光照射時半導體晶圓W並未破裂而正常地進行閃光加熱處理之情形時之溫度分佈例。於時刻t0閃光燈FL發光而對半導體晶圓W之正面照射閃光，半導體晶圓W之正面溫度瞬間自預加熱溫度T1上升至處理溫度T2後急速下降。其後，如圖10所示，半導體晶圓W之正面之測定溫度以微小之振幅變動。認為產生此種測定溫度之微小變動之原因在於，於閃光照射後於晶座74上半導體晶圓W產生振動。即，於閃光照射時，照射時間極短地將具有較高能量之閃光照射至半導體晶圓W之正面，故半導體晶圓W之正面溫度瞬間上升至1000℃以上之處理溫度T2，另一方面，該瞬間之背面溫度並未自預加熱溫度T1大幅上升。因此，僅於半導體晶圓W之正面產生急遽之熱膨脹，而背面幾乎未產生熱膨脹，故半導體晶圓W瞬間翹曲成正面凸起。然後，於下一瞬間，半導體晶圓W以使該翹曲復原之方式變形，因反覆此種行為而導致半導體晶圓W於晶座74上振動。由於上部輻射溫度計25之紅外線感測器91設置於半導體晶圓W之斜上方，故若半導體晶圓W振動則自紅外線感測器91觀察所得之晶圓正面之輻射率產生變動，其結果，上部輻射溫度計25之測定溫度產生微小變動。再者，雖因半導體晶圓W之振動而導致上部輻射溫度計25之測定溫度變動，但實際之半導體晶圓W之正面溫度並未變動。 於閃光照射時半導體晶圓W並未破裂而正常地進行閃光加熱處理之情形時，以較高之再現性獲得如圖10所示之溫度分佈。另一方面，於閃光照射時半導體晶圓W產生破裂之情形時，溫度分佈中會出現異常之測定資料。因此，於第1實施形態中，藉由對溫度分佈進行統計解析而識別異常之測定資料而檢測半導體晶圓W之破裂。 於閃光加熱處理結束之後，特性值推算部96根據所製成之溫度分佈而推算特性值(步驟S6)。所謂特性值係指對溫度分佈進行統計處理時之統計量，於本實施形態中，係溫度分佈之平均值及標準偏差。具體而言，特性值推算部96推算時刻t1至時刻t2之期間內之溫度分佈之平均值及標準偏差作為特性值。推算期間之起始期即時刻t1例如係自閃光燈FL發光之時刻t0起經過30毫秒後。使推算期間之起始期即時刻t1較閃光燈FL發光之時刻t0晚之原因在於，若將由閃光加熱引起之半導體晶圓W之正面溫度之升降包含於推算期間則會對特性值造成影響。又，推算期間之終止期即時刻t2例如係自閃光燈FL發光之時刻t0起經過100毫秒後。由此，特性值推算部96推算特性值之推算期間(t2－t1)為70毫秒，係閃光照射後半導體晶圓W之正面溫度穩定之期間。 其次，基於由特性值推算部96推算出之特性值，控制部3之破裂判定部31進行半導體晶圓W之破裂判定(步驟S7)。破裂判定部31判定溫度分佈之特性值是否偏離特定之範圍而進行破裂判定。圖11係用以說明基於溫度分佈之平均值之破裂判定之圖。圖11係對針對複數片半導體晶圓W照射閃光而製成之溫度分佈之平均值進行繪圖所得之圖。再者，所謂溫度分佈之平均值，與上述同樣地，係指自時刻t1至時刻t2之推算期間內之溫度分佈之平均值，以下亦稱為「分佈平均值」。 圖11之橫軸表示複數個半導體晶圓W中之每一個之資料點，圖11之縱軸表示溫度分佈之平均值。上方管理極限值U1係將複數個半導體晶圓W之分佈平均值之總平均加上該等複數個半導體晶圓W之分佈平均值之標準偏差σ之5倍值所得之值。另一方面，下方管理極限值L1係自複數個半導體晶圓W之分佈平均值之總平均減去該等複數個半導體晶圓W之分佈平均值之標準偏差σ之5倍值所得之值。即，圖11之由虛線所夾之範圍為自分佈平均值之總平均±5σ之範圍。 破裂判定部31係於對某半導體晶圓W照射閃光時所獲得之溫度分佈之平均值落在自分佈平均值之總平均±5σ之範圍內時，判定半導體晶圓W未破裂，於偏離該範圍時判定半導體晶圓W破裂。於圖11所示之例中，由資料點A1表示之半導體晶圓W之分佈平均值大於上方管理極限值U1。又，由資料點A2表示之半導體晶圓W之分佈平均值小於下方管理極限值L1。即，由資料點A1、A2表示之半導體晶圓W之分佈平均值偏離自分佈平均值之總平均±5σ之範圍，破裂判定部31判定該等2片半導體晶圓W破裂。 另一方面，圖12係用以說明基於溫度分佈之標準偏差之破裂判定之圖。圖12係對針對複數片半導體晶圓W照射閃光而製成之溫度分佈之標準偏差進行繪圖所得之圖。再者，所謂溫度分佈之標準偏差，與上述同樣地，係指自時刻t1至時刻t2之推算期間內之溫度分佈之標準偏差，以下亦稱為「分佈標準偏差」。 圖12之橫軸表示複數個半導體晶圓W中之每一個之資料點，圖12之縱軸表示溫度分佈之標準偏差。上方管理極限值U2係將複數個半導體晶圓W之分佈標準偏差之總平均加上該等複數個半導體晶圓W之分佈標準偏差之標準偏差σ之5倍值所得之值。即，圖12之較虛線更下方之範圍係自分佈標準偏差之總平均起為5σ之範圍。再者，關於分佈標準偏差，於測定溫度之變動最少時為0，下方管理極限值之概念不存在。 破裂判定部31係於對某半導體晶圓W照射閃光時所獲得之溫度分佈之標準偏差落在自分佈標準偏差之總平均起為5σ之範圍內時，判定半導體晶圓W未破裂，於偏離該範圍時判定半導體晶圓W破裂。於圖12所示之例中，由資料點B1表示之半導體晶圓W之分佈標準偏差大於上方管理極限值U2。即，由資料點B1表示之半導體晶圓W之分佈標準偏差偏離自分佈標準偏差之總平均起為5σ之範圍，破裂判定部31判定該半導體晶圓W破裂。 又，破裂判定部31對2個特性值即平均值與標準偏差進行「OR(或)判定」。即，破裂判定部31係於關於某半導體晶圓W之溫度分佈之平均值偏離自分佈平均值之總平均±5σ之範圍時、或該溫度分佈之標準偏差偏離自分佈標準偏差之總平均起為5σ之範圍時，判定該半導體晶圓W破裂。如此構成之原因在於，僅對任一個特性值進行判定時，有儘管實際上半導體晶圓W已破裂但判定為未破裂之虞。例如，作為於半導體晶圓W產生破裂之結果而閃光照射後之測定溫度穩定地成為與通常相比明顯更高之溫度(或更低之溫度)之情形時，若為關於平均值之判定則判定為破裂，但於關於標準偏差之判定時有判定為未破裂之虞。相反，作為於半導體晶圓W產生破裂之結果而閃光照射後之測定溫度將通常之溫度夾在中間而上下較大地變動之情形時，若為關於標準偏差之判定則判定為破裂，但於關於平均值之判定時則有判定為未破裂之虞。因此，藉由對平均值與標準偏差進行「OR判定」而可提高破裂之檢測精度。 返回至圖9，於破裂判定部31判定閃光照射後之半導體晶圓W破裂時，自步驟S8進入至步驟S9，控制部3中斷熱處理裝置1之處理，亦停止將半導體晶圓W相對於腔室6搬入搬出之搬送系統之動作。又，控制部3亦可於顯示部32發出晶圓破裂產生之警告。於半導體晶圓W產生破裂時，腔室6內產生顆粒，故打開腔室6進行清掃作業。 另一方面，於破裂判定部31判定閃光照射後之半導體晶圓W未破裂時，自步驟S8進入至步驟S10，進行半導體晶圓W之搬出處理。具體而言，於閃光加熱處理結束之後，經過特定時間後鹵素燈HL熄滅。藉此，半導體晶圓W自預加熱溫度T1急速降溫。降溫中之半導體晶圓W之溫度藉由下部輻射溫度計20測定，其測定結果被傳輸至控制部3。控制部3根據下部輻射溫度計20之測定結果而監視半導體晶圓W之溫度是否已降溫至特定溫度。然後，於半導體晶圓W之溫度已降溫至特定溫度以下之後，移載機構10之一對移載臂11再次自退避位置水平移動至移載動作位置並上升，藉此頂起銷12自晶座74之上表面突出而自晶座74接收熱處理後之半導體晶圓W。繼而，藉由閘閥185將關閉之搬送開口部66打開，將載置於頂起銷12上之半導體晶圓W藉由裝置外部之搬送機器人搬出，而熱處理裝置1中之半導體晶圓W之加熱處理完成。 於本實施形態中，藉由上部輻射溫度計25測定閃光照射後之半導體晶圓W之正面溫度而獲取溫度分佈，於該溫度分佈之平均值偏離自分佈平均值之總平均±5σ之範圍時、或該溫度分佈之標準偏差偏離自分佈標準偏差之總平均起為5σ之範圍時，判定半導體晶圓W破裂。即，並未對熱處理裝置1追加用於晶圓破裂檢測之特別之硬體構成，而以簡單之構成檢測閃光照射時之半導體晶圓W之破裂。又，藉由簡單之統計運算處理而檢測半導體晶圓W之破裂，故亦不用擔心使產能降低。 又，於本實施形態中，對溫度分佈之平均值與標準偏差進行「OR判定」，故能夠以較高之精度檢測閃光照射時之半導體晶圓W之破裂。 又，於本實施形態中，上部輻射溫度計25之測定波長區域為5 μm以上且6.5 μm以下。即，上部輻射溫度計25根據自半導體晶圓W之正面輻射之波長5 μm以上且6.5 μm以下之紅外光之強度而測定半導體晶圓W之正面溫度。無論有無產生半導體晶圓W之破裂，半導體晶圓W之正面溫度本身不會產生較大之變動。認為於半導體晶圓W產生破裂時溫度分佈中出現異常之測定資料之原因在於，破裂之破片進行與正常時不同之行為(物理運動)。具體而言，上部輻射溫度計25之光軸與破裂之破片所成之角度成為與正常時不同之值，由此，半導體晶圓W之表觀輻射率產生較大之變化，其結果，獲得異常之測定資料。因此，為了精度良好地檢測破裂，上部輻射溫度計25之溫度測定需對其與半導體晶圓W之角度變化敏銳。另一方面，於半導體晶圓W之正面形成有各種圖案或薄膜的情況較多。半導體晶圓W之輻射率亦會因該等圖案或薄膜而受到影響，但就破裂檢測之觀點而言，較佳為上部輻射溫度計25之溫度測定不易受到圖案或膜種之變化之影響。 圖13係表示上部輻射溫度計25之光軸與半導體晶圓W之主面所成之角度對半導體晶圓W之表觀輻射率造成之影響之圖。將於半導體晶圓W之上表面形成膜厚不同之2種薄膜且上部輻射溫度計25之光軸與半導體晶圓W之主面所成之角度為15°與90°之各情形時的表觀輻射率示於該圖。又，於圖13中表示上部輻射溫度計25之測定波長區域(5 μm～6.5 μm)下之半導體晶圓W之表觀輻射率。 如圖13所示，於5 μm以上且6.5 μm以下之波長區域，若上部輻射溫度計25之光軸與半導體晶圓W之主面所成之角度發生變化則表觀輻射率產生較大變化。此表示於上部輻射溫度計25之測定波長區域之範圍內，上部輻射溫度計25之溫度測定對其與半導體晶圓W之角度變化敏銳。由此，若半導體晶圓W產生破裂而破裂之破片與上部輻射溫度計25之角度與正常時稍有不同，則表觀輻射率發生變化而獲得異常之測定資料。其結果，可精度良好地檢測半導體晶圓W之破裂。另一方面，與角度變化所產生之影響相比，薄膜之膜厚對輻射率之影響較小。此表示上部輻射溫度計25之溫度測定不易受到圖案或膜種之變化之影響。即，為了兼顧圖案或膜種之影響之排除與對角度變化之敏銳度，較佳為上部輻射溫度計25之測定波長區域為5 μm以上且6.5 μm以下。 又，於本實施形態中，上部輻射溫度計25設置於半導體晶圓W之斜上方，上部輻射溫度計25之光軸與半導體晶圓W之主面所成之角度相對較小。因此，上部輻射溫度計25之檢測範圍涵蓋半導體晶圓W之上表面之相對較大之範圍，而容易檢測半導體晶圓W之破裂。 ＜第2實施形態＞ 其次，對本發明之第2實施形態進行說明。第2實施形態之熱處理裝置1之構成與第1實施形態完全相同。又，第2實施形態之熱處理裝置1中之半導體晶圓W之處理順序亦與第1實施形態大致相同。第2實施形態與第1實施形態之不同之處在於溫度分佈之特性值之推算期間。 於第2實施形態中，將閃光燈FL開始閃光照射之圖10之時刻t0設為推算期間之起始期。即，於第2實施形態中，將自開始閃光照射起之特定期間設為推算期間，使由閃光加熱引起之半導體晶圓W之正面溫度之升降包含於特性值之推算期間。特性值之推算方法及基於特性值之半導體晶圓W之破裂之判定方法與第1實施形態相同。於包含閃光照射期間之溫度分佈之平均值偏離自分佈平均值之總平均±5σ之範圍時、或該溫度分佈之標準偏差偏離自分佈標準偏差之總平均起為5σ之範圍時，判定半導體晶圓W破裂。 根據圖10可明確，由閃光加熱引起之半導體晶圓W之正面溫度之升降對溫度分佈之平均值、標準偏差等特性值造成較大影響。然而，於半導體晶圓W並未破裂而正常地進行處理之情形時，由閃光加熱引起之半導體晶圓W之正面溫度之升降圖案具有較高之再現性，溫度分佈之特性值本身穩定(特性值之標準偏差與第1實施形態相同程度地小)。因此，與第1實施形態同樣地，於半導體晶圓W產生破裂而溫度分佈中出現異常之測定資料之情形時，溫度分佈之特性值偏離特定之範圍。因此，可藉由判定溫度分佈之特性值是否偏離特定之範圍而進行半導體晶圓W之破裂判定。 且說，於第2實施形態中，閃光照射期間亦包含於特性值之推算期間，故於閃光照射中於半導體晶圓W產生破裂而獲得異常之測定資料時，溫度分佈之特性值亦偏離特定之範圍。因此，可更確實地檢測閃光照射中之半導體晶圓W之破裂。尤其於閃光燈FL之照射時間相對較長(6毫秒以上)之情形時，擔心於閃光照射中半導體晶圓W破裂，較佳為如第2實施形態般閃光照射期間亦包含於特性值之推算期間。 將特性值之推算期間如第1實施形態般設為照射閃光後之特定期間、還是如第2實施形態般設為自開始閃光照射起之特定期間可由熱處理裝置1之操作員自輸入部33適當地輸入而設定。 ＜第3實施形態＞ 其次，對本發明之第3實施形態進行說明。第3實施形態之熱處理裝置1之構成與第1實施形態完全相同。又，第3實施形態之熱處理裝置1中之半導體晶圓W之處理順序亦與第1實施形態大致相同。第3實施形態與第1實施形態之不同之處在於基於溫度分佈之半導體晶圓W之破裂之判定方法。 與第1實施形態同樣地，自利用閃光燈FL進行閃光照射之前開始由上部輻射溫度計25測定半導體晶圓W之正面溫度。於開始進行來自閃光燈FL之閃光照射而半導體晶圓W之正面溫度急速上升時，其正面溫度亦藉由上部輻射溫度計25測定。如上所述，上部輻射溫度計25以40微秒之極短之取樣間隔測定半導體晶圓W之正面溫度，故即便於閃光照射時半導體晶圓W之正面溫度急遽地變化，亦能夠追隨該變化。上部輻射溫度計25將所獲取之半導體晶圓W之正面溫度之資料依次儲存於記憶部97。藉此，製成閃光照射時之半導體晶圓W之正面溫度之溫度分佈。 於第3實施形態中，基於自閃光燈FL開始閃光照射起半導體晶圓W之正面溫度持續升溫之時間而判定半導體晶圓W之破裂。圖14係用以說明基於半導體晶圓W之升溫持續時間之破裂判定之圖。圖14所示之內容與圖10相同，係閃光照射時之半導體晶圓W之正面溫度之溫度分佈。與於時刻t0閃光燈FL發光而開始閃光照射大致同時地，半導體晶圓W之正面溫度自預加熱溫度T1開始升溫。於閃光照射中半導體晶圓W並未破裂而正常地進行閃光加熱處理之情形時，閃光燈FL之閃光照射時間f(閃光燈FL之發光時間)與半導體晶圓W之正面溫度持續升溫之時間d大致一致。 但是，於閃光照射中半導體晶圓W破裂之情形時，閃光燈FL之閃光照射時間f與半導體晶圓W之正面溫度持續升溫之時間d產生背離。通常，如圖14所示，半導體晶圓W之正面溫度之升溫持續時間d較閃光照射時間f短。於第3實施形態中，破裂判定部31係於開始閃光照射後半導體晶圓W之正面溫度持續升溫之時間d與閃光燈FL之閃光照射時間f背離特定值以上之情形時，判定半導體晶圓W破裂。例如，於升溫持續時間d與閃光照射時間f背離±10%以上之情形時，判定半導體晶圓W破裂。 於第3實施形態中，僅根據設為處理對象之半導體晶圓W之正面溫度之溫度分佈而檢測閃光照射時之該半導體晶圓W之破裂。因此，無需如第1實施形態般製作多個半導體晶圓W之溫度分佈並推算其等之特性值而求出管理極限值之步驟。 閃光燈FL之閃光照射時間f可根據將絕緣閘雙極電晶體(IGBT，Insulated Gate Bipolar Transistor)組入至閃光燈FL之電路中並對閃光燈FL之通電進行接通斷開控制、或對閃光燈FL進行電力供給之燈電源之線圈常數而調整。如上所述，於使閃光照射時間f相對較長(6毫秒以上)之情形時，擔心於閃光照射中半導體晶圓W破裂。第3實施形態之破裂判定方法適於此種情形。 ＜變化例＞ 以上，對本發明之實施形態進行了說明，但本發明只要不脫離其主旨，則可在上述者以外進行各種變更。例如，於上述實施形態中，使用平均值及標準偏差作為溫度分佈之特性值，但並不限定於此，亦可使用其他統計量。例如，作為溫度分佈之特性值，亦可代替平均值而使用中央值，代替標準偏差而使用最大值與最小值之差即全距。 又，作為溫度分佈之特性值，亦可使用例如溫度分佈之波形之最大值、最小值。若可將溫度分佈之波形理解為週期性正弦波，則亦可採用該波之週期、頻率、振幅等作為特性值。或者，若將溫度分佈之波形視為脈衝波，則亦可使用工作比、半峰全幅值、半峰半幅值、最大斜率等作為特性值。進而，作為特性值，亦可使用對溫度分佈進行微分所得之微分波形之平均值、標準偏差、中央值、全距(range)、最大值、最小值或波形之積分值等。 用於晶圓破裂之判定之特性值並不限定於2個，亦可為上述各種特性值之3個以上，亦可僅為1個。用於晶圓破裂之判定之特性值之數量越多則判定精度越提高，但運算處理所需之時間越長。 又，於晶圓破裂之判定時使用複數個特性值之情形時，並不限定於其等之「OR判定」，亦可進行其他邏輯運算(例如AND(及)、XOR(exclusive or，互斥或)等)之判定。但是，就提高判定精度之觀點而言，較佳為與上述實施形態相同之「OR判定」。 於晶圓破裂之判定時關於哪一特性值使用幾個，可由操作員自輸入部33適當地選擇並設定於處理方案中。又，於使用複數個特性值之情形時，操作員亦可自輸入部33選擇進行「OR判定」抑或是「AND判定」並設定。藉此，於變更特性值之情形時，亦無需熱處理裝置1之每次改造或軟體之升級。 又，於上述實施形態中，將管理極限值設為5σ之範圍，但亦可代替此而設為更一般的3σ。 又，每當重複進行熱處理裝置1中之半導體晶圓W之處理便獲得新的溫度分佈，故亦可重新計算用於晶圓破裂判定之管理極限值並逐次更新。例如，亦可基於關於在同一處理條件下處理之半導體晶圓W之最近10000個溫度分佈而推算管理極限值。如此一來，即便因裝置零件之經年劣化等而導致溫度分佈變化，亦可追隨該變化而設定最佳之管理極限值。 又，亦可將測定與成為處理對象之半導體晶圓W於相同處理條件下在不久前(或數片前)處理之半導體晶圓W之正面溫度所獲取之溫度分佈設為基準溫度分佈，將該基準溫度分佈與該處理對象之半導體晶圓W之溫度分佈加以比較而判定半導體晶圓W之破裂。再者，於採用該方法之情形時，以上述不久前(或數片前)之半導體晶圓W並未破裂而正常地進行處理作為前提。如此一來，與第3實施形態同樣地，可無需製作多個半導體晶圓W之溫度分佈並求出管理極限值之步驟。 又，亦可代替製作半導體晶圓W之正面溫度之分佈而製作轉換為溫度前之紅外線感測器91之輸出值(亦即，自半導體晶圓W之正面輻射之紅外光之強度)之分佈並用於晶圓破裂判定。 又，於上述實施形態中，藉由將上部輻射溫度計25設置於半導體晶圓W之斜上方而使上部輻射溫度計25之檢測範圍(視野)擴大，但亦可代替此，藉由使上部輻射溫度計25與半導體晶圓W之距離變長而使半導體晶圓W之上表面中之上部輻射溫度計25之檢測範圍擴大。進而，亦可藉由設置複數個輻射溫度計、或於輻射溫度計設置複數個紅外線感測器而使半導體晶圓W之上表面中之檢測範圍擴大。 又，於上述實施形態中，使閃光加熱部5具備30根閃光燈FL，但並不限定於此，閃光燈FL之根數可設為任意數。又，閃光燈FL並不限定於氙閃光燈，亦可為氪閃光燈。又，鹵素加熱部4所具備之鹵素燈HL之根數亦並不限定於40根，可設為任意數。 又，於上述實施形態中，使用燈絲方式之鹵素燈HL作為1秒以上連續發光之連續點亮燈而進行半導體晶圓W之預加熱，但並不限定於此，亦可代替鹵素燈HL，將放電型之電弧燈(例如，氙電弧燈)用作連續點亮燈而進行預加熱。 又，於上述實施形態中，藉由來自鹵素燈HL之光照射而進行半導體晶圓W之預加熱，但亦可代替此，將保持半導體晶圓W之晶座載置於加熱板上，藉由來自該加熱板之熱傳導而將半導體晶圓W預加熱。 又，根據熱處理裝置1，成為處理對象之基板並不限定於半導體晶圓，亦可為用於液晶顯示裝置等平板顯示器之玻璃基板或太陽電池用之基板。又，本發明之技術亦可應用於高介電常數閘極絕緣膜(High-k膜)之熱處理、金屬與矽之接合、或多晶矽之結晶化。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. <First Embodiment> Fig. 1 is a longitudinal sectional view showing the structure of the heat treatment apparatus 1 of the present invention. The heat treatment apparatus 1 in FIG. 1 is a flash lamp annealing apparatus that heats a semiconductor wafer W in a disc shape as a substrate by flash irradiation. The size of the semiconductor wafer W to be processed is not particularly limited, but is, for example, ϕ300 mm or ϕ450 mm (ϕ300 mm in this embodiment). Impurities are implanted into the semiconductor wafer W before being loaded into the heat treatment apparatus 1, and the activation process of the implanted impurities is performed by the heat treatment of the heat treatment apparatus 1. In addition, in FIG. 1 and subsequent figures, the size or number of each part is exaggerated or simplified as necessary for ease of understanding. The heat treatment apparatus 1 includes a chamber 6 for accommodating a semiconductor wafer W, a flash heating unit 5 incorporating a plurality of flash lamps FL, and a halogen heating unit 4 incorporating a plurality of halogen lamps HL. The flash heating part 5 is provided on the upper side of the chamber 6, and the halogen heating part 4 is provided on the lower side. Furthermore, the heat treatment apparatus 1 is provided with the holding part 7 which holds the semiconductor wafer W in a horizontal position inside the chamber 6, and the transfer mechanism 10 which transfers the semiconductor wafer W between the holding part 7 and the outside of the apparatus. Furthermore, the heat treatment apparatus 1 includes a control unit 3 that controls each operating mechanism provided in the halogen heating unit 4, the flash heating unit 5, and the chamber 6 to perform heat treatment of the semiconductor wafer W. The chamber 6 is formed by installing quartz chamber windows above and below a cylindrical chamber side portion 61 . The chamber side portion 61 has a substantially cylindrical shape with upper and lower openings. An upper chamber window 63 is attached to the upper opening to close it, and a lower chamber window 64 is attached to the lower opening to close it. The upper side chamber window 63 constituting the top wall portion of the chamber 6 is a disk-shaped member made of quartz, and functions as a quartz window that transmits the flash light emitted from the flash heating unit 5 into the chamber 6 . In addition, the chamber window 64 on the lower side of the bottom wall of the chamber 6 is also a disc-shaped member made of quartz, and functions as a quartz window that transmits light from the halogen heating unit 4 into the chamber 6 . Furthermore, a reflection ring 68 is installed on the upper part of the wall surface inside the chamber side part 61 , and a reflection ring 69 is installed on the lower part. The reflection rings 68 and 69 are both formed in annular shapes. The upper reflective ring 68 is installed by being embedded from the upper side of the chamber side 61 . On the other hand, the lower reflection ring 69 is installed by being inserted from the lower side of the chamber side part 61 and fixed with screws (not shown). That is, both the reflection rings 68 and 69 are detachably attached to the chamber side portion 61 . The space inside the chamber 6 , that is, the space surrounded by the upper chamber window 63 , the lower chamber window 64 , the chamber side portion 61 and the reflection rings 68 and 69 is defined as a heat treatment space 65 . The recess 62 is formed in the inner wall of the chamber 6 by installing the reflection rings 68 and 69 on the side portion 61 of the chamber. That is, the recessed portion 62 is formed in the inner wall surface of the chamber side portion 61 and is surrounded by the central portion where the reflection rings 68 and 69 are not mounted, the lower end surface of the reflection ring 68, and the upper end surface of the reflection ring 69. The recessed portion 62 is formed in an annular shape along the horizontal direction on the inner wall surface of the chamber 6 and surrounds the holding portion 7 that holds the semiconductor wafer W. The chamber side portion 61 and the reflection rings 68 and 69 are made of a metal material with excellent strength and heat resistance (such as stainless steel). Furthermore, a transfer opening (furnace mouth) 66 for loading and unloading the semiconductor wafer W into and out of the chamber 6 is formed on the chamber side 61 . The transfer opening 66 can be opened and closed by the gate valve 185 . The transfer opening 66 is in communication with the outer peripheral surface of the recess 62 . Therefore, when the gate valve 185 opens the transfer opening 66 , the semiconductor wafer W can be transferred into and out of the heat treatment space 65 through the recess 62 from the transfer opening 66 . Furthermore, when the gate valve 185 closes the transfer opening 66, the heat treatment space 65 in the chamber 6 becomes a sealed space. Furthermore, the through-hole 61a and the through-hole 61b are penetrated in the chamber side part 61. The through hole 61a is a cylindrical hole for guiding the infrared light radiated from the upper surface of the semiconductor wafer W held on the crystal holder 74 described below to the infrared sensor 91 of the upper radiation thermometer 25 . On the other hand, the through hole 61 b is a cylindrical hole for guiding the infrared light radiated from the lower surface of the semiconductor wafer W to the lower radiation thermometer 20 . The through-hole 61a and the through-hole 61b are provided obliquely with respect to the horizontal direction so that the axis of the through-hole 61a and the through-hole 61b intersects the main surface of the semiconductor wafer W held on the wafer holder 74. A transparent window 26 made of calcium fluoride material that transmits infrared light in a wavelength range that can be measured by the upper radiation thermometer 25 is installed at the end of the through hole 61 a facing the heat treatment space 65 . In addition, a transparent window 21 made of barium fluoride material that transmits infrared light in a wavelength range that can be measured by the lower radiation thermometer 20 is installed at the end of the through hole 61 b facing the heat treatment space 65 . In addition, a gas supply hole 81 for supplying processing gas to the heat treatment space 65 is formed on the upper portion of the inner wall of the chamber 6 . The gas supply hole 81 is formed above the recess 62 and may be provided in the reflection ring 68 . The gas supply hole 81 is connected to the gas supply pipe 83 through a buffer space 82 formed in an annular shape inside the side wall of the chamber 6 . The gas supply pipe 83 is connected to the processing gas supply source 85 . Furthermore, a valve 84 is interposed in the path of the gas supply pipe 83 . When the valve 84 is opened, the processing gas is supplied from the processing gas supply source 85 to the buffer space 82 . The processing gas system flowing into the buffer space 82 flows in a manner of diffusing in the buffer space 82 having a smaller fluid resistance than the gas supply hole 81 and is supplied from the gas supply hole 81 into the heat treatment space 65 . As the processing gas, for example, an inert gas such as nitrogen (N 2 ), a reactive gas such as hydrogen (H 2 ), ammonia (NH 3 ), or a mixed gas (in this embodiment: nitrogen). On the other hand, a gas exhaust hole 86 for exhausting the gas in the heat treatment space 65 is formed in the lower part of the inner wall of the chamber 6 . The gas exhaust hole 86 is formed lower than the recess 62 , and may also be provided in the reflection ring 69 . The gas exhaust hole 86 is connected to the gas exhaust pipe 88 through a buffer space 87 formed in an annular shape inside the side wall of the chamber 6 . The gas exhaust pipe 88 is connected to the exhaust part 190 . In addition, a valve 89 is interposed in the path of the gas exhaust pipe 88 . When the valve 89 is opened, the gas in the heat treatment space 65 is discharged from the gas exhaust hole 86 through the buffer space 87 to the gas exhaust pipe 88 . Furthermore, a plurality of gas supply holes 81 and gas exhaust holes 86 may be provided along the circumferential direction of the chamber 6, or may be slit-shaped. In addition, the processing gas supply source 85 and the exhaust part 190 may be a mechanism provided in the heat treatment apparatus 1, or may be an entity of the factory in which the heat treatment apparatus 1 is installed. In addition, a gas exhaust pipe 191 for discharging the gas in the heat treatment space 65 is also connected to the front end of the transfer opening 66 . The gas exhaust pipe 191 is connected to the exhaust part 190 via a valve 192 . By opening the valve 192, the gas in the chamber 6 is exhausted through the transfer opening 66. FIG. 2 is a perspective view showing the overall appearance of the holding portion 7 . The holding part 7 is composed of a base ring 71, a connecting part 72, and a crystal base 74. The base ring 71, the connecting portion 72, and the crystal base 74 are all made of quartz. That is, the entire holding portion 7 is formed of quartz. The abutment ring 71 is an arc-shaped quartz member formed by cutting off a portion of a circular ring shape. This cut-out portion is provided to prevent interference between the transfer arm 11 of the transfer mechanism 10 and the abutment ring 71 described below. The abutment ring 71 is supported on the wall surface of the chamber 6 by being placed on the bottom surface of the recess 62 (see FIG. 1 ). A plurality of connecting portions 72 (four in this embodiment) are erected on the upper surface of the abutment ring 71 along the circumferential direction of its annular shape. The connecting part 72 is also made of quartz, and is fixed to the abutment ring 71 by welding. The crystal base 74 is supported by four connecting parts 72 provided on the base ring 71 . Figure 3 is a top view of the crystal holder 74. Also, FIG. 4 is a cross-sectional view of the crystal base 74. The crystal base 74 includes a retaining plate 75 , a guide ring 76 , and a plurality of substrate support pins 77 . The holding plate 75 is a substantially circular flat plate member made of quartz. The diameter of the holding plate 75 is larger than the diameter of the semiconductor wafer W. That is, the holding plate 75 has a larger plane size than the semiconductor wafer W. A guide ring 76 is provided on the upper surface peripheral portion of the holding plate 75 . The guide ring 76 is a ring-shaped member having an inner diameter larger than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is ϕ300 mm, the inner diameter of the guide ring 76 is ϕ320 mm. The inner circumference of the guide ring 76 is a tapered surface that widens upward from the retaining plate 75 . The guide ring 76 is formed of the same quartz as the retaining plate 75 . The guide ring 76 can be welded to the upper surface of the retaining plate 75, or can be fixed to the retaining plate 75 through separately processed pins. Alternatively, the retaining plate 75 and the guide ring 76 can also be processed into an integral component. A region on the upper surface of the holding plate 75 that is further inside than the guide ring 76 is formed as a planar holding surface 75 a for holding the semiconductor wafer W. A plurality of substrate support pins 77 are erected on the holding surface 75a of the holding plate 75. In this embodiment, a total of 12 substrate support pins 77 are erected every 30° along a circumference that is concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle formed by arranging 12 substrate support pins 77 (the distance between the opposing substrate support pins 77) is smaller than the diameter of the semiconductor wafer W. If the diameter of the semiconductor wafer W is ϕ300 mm, then it is ϕ270 mm~ φ280 mm (φ270 mm in this embodiment). Each substrate support pin 77 is formed of quartz. The plurality of substrate support pins 77 can be disposed on the upper surface of the holding plate 75 by welding, or can be processed to be integrated with the holding plate 75 . Returning to FIG. 2 , the four connecting portions 72 standing on the base ring 71 and the peripheral portion of the holding plate 75 of the crystal base 74 are fixed by welding. That is, the crystal holder 74 and the base ring 71 are fixedly connected by the connection part 72 . The holding part 7 is mounted on the chamber 6 by supporting the abutment ring 71 of the holding part 7 on the wall surface of the chamber 6 . In a state where the holding part 7 is installed in the chamber 6, the holding plate 75 of the crystal holder 74 assumes a horizontal posture (an posture in which the normal line coincides with the vertical direction). That is, the holding surface 75a of the holding plate 75 becomes a horizontal surface. The semiconductor wafer W loaded into the chamber 6 is placed in a horizontal posture and held on the wafer holder 74 attached to the holding portion 7 of the chamber 6 . At this time, the semiconductor wafer W is supported by the 12 substrate support pins 77 standing on the holding plate 75 and held on the wafer holder 74 . More strictly speaking, the upper ends of the twelve substrate support pins 77 are in contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W. Since the height of the 12 substrate support pins 77 (the distance from the upper end of the substrate support pin 77 to the holding surface 75a of the holding plate 75) is uniform, the semiconductor wafer W can be supported in a horizontal position by the 12 substrate support pins 77. In addition, the semiconductor wafer W is supported by a plurality of substrate support pins 77 at a specific interval from the holding surface 75 a of the holding plate 75 . The thickness of the guide ring 76 is larger than the height of the substrate support pin 77 . Therefore, positional deviation in the horizontal direction of the semiconductor wafer W supported by the plurality of substrate support pins 77 is prevented by the guide ring 76 . Furthermore, as shown in FIGS. 2 and 3 , an opening 78 is formed in the holding plate 75 of the crystal base 74 to penetrate up and down. The opening 78 is provided so that the lower radiation thermometer 20 receives radiation light (infrared light) radiated from the lower surface of the semiconductor wafer W. That is, the lower radiation thermometer 20 receives light radiated from the lower surface of the semiconductor wafer W through the opening 78 and the transparent window 21 installed in the through hole 61 b of the chamber side 61 to measure the temperature of the semiconductor wafer W. Furthermore, the holding plate 75 of the wafer holder 74 is provided with four through holes 79 through which the lifting pins 12 of the transfer mechanism 10 to be described below penetrate to transfer the semiconductor wafer W. FIG. 5 is a top view of the transfer mechanism 10 . Moreover, FIG. 6 is a side view of the transfer mechanism 10. The transfer mechanism 10 is provided with two transfer arms 11 . The transfer arm 11 is formed in an arc shape along the substantially annular concave portion 62 . Each transfer arm 11 is provided with two lifting pins 12 erected. The transfer arm 11 and the lifting pin 12 are made of quartz. Each transfer arm 11 is rotatable by the horizontal movement mechanism 13 . The horizontal movement mechanism 13 moves the pair of transfer arms 11 to a transfer operation position (solid line position in FIG. 5 ) for transferring the semiconductor wafer W with respect to the holding part 7 , and the semiconductor wafer held in the holding part 7 when viewed from above. The wafer W moves horizontally between the non-overlapping retraction positions (the two-point chain line position in Figure 5). The horizontal moving mechanism 13 may be one in which each transfer arm 11 is rotated by a separate motor, or a link mechanism may be used to rotate a pair of transfer arms 11 in conjunction with one motor. Furthermore, the pair of transfer arms 11 moves up and down together with the horizontal movement mechanism 13 by the lifting mechanism 14 . When the lifting mechanism 14 raises the pair of transfer arms 11 in the transfer operation position, a total of four lifting pins 12 pass through the through holes 79 (refer to FIGS. 2 and 3 ) of the crystal base 74 , and the lifting pins 12 The upper end protrudes from the upper surface of the crystal base 74 . On the other hand, if the lifting mechanism 14 lowers the pair of transfer arms 11 in the transfer operation position to pull out the jacking pin 12 from the through hole 79, and moves the horizontal movement mechanism 13 to open the pair of transfer arms 11, When moving, each transfer arm 11 moves to the retraction position. The retracted position of the pair of transfer arms 11 is directly above the abutment ring 71 of the holding part 7 . Since the abutment ring 71 is placed on the bottom surface of the recess 62 , the retracted position of the transfer arm 11 is inside the recess 62 . Furthermore, an exhaust mechanism (not shown) is also provided near the location where the driving part (horizontal moving mechanism 13 and lifting mechanism 14) of the transfer mechanism 10 is installed, and is configured to surround the driving part of the transfer mechanism 10. Ambient gas is exhausted outside the chamber 6 . Returning to FIG. 1 , the flash heating unit 5 provided above the chamber 6 is equipped with a light source including a plurality of xenon flash lamps FL inside the housing 51 (30 in this embodiment), and a light source covering the top of the light source. It is composed of reflector 52 arranged in this way. In addition, a light radiation window 53 is installed at the bottom of the housing 51 of the flash heating unit 5 . The light radiation window 53 constituting the bottom wall of the flash heating unit 5 is a plate-shaped quartz window made of quartz. By disposing the flash heating unit 5 above the chamber 6, the light radiation window 53 faces the upper chamber window 63. The flash lamp FL irradiates the heat treatment space 65 with flash light from above the chamber 6 through the light radiation window 53 and the upper chamber window 63 . The plurality of flash lamps FL are respectively rod-shaped lamps having a long cylindrical shape, and they are mutually aligned with each other in their respective length directions along the main surface of the semiconductor wafer W held in the holding part 7 (that is, along the horizontal direction). Arranged in a parallel manner into a plane. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane. The xenon flash lamp FL is equipped with: a rod-shaped glass tube (discharge tube) with xenon gas sealed inside and an anode and a cathode connected to a capacitor at both ends of the rod-shaped glass tube (discharge tube); and a trigger electrode attached to the outer periphery of the glass tube. On the surface. Since xenon is an electrical insulator, even if there is charge stored in the capacitor, no current will flow into the glass tube under normal conditions. However, when a high voltage is applied to the trigger electrode and the insulation is destroyed, the electricity accumulated in the capacitor instantly flows into the glass tube, and light is emitted by the excitation of xenon atoms or molecules at this time. In this type of xenon flash lamp FL, the electrostatic energy accumulated in the capacitor in advance is converted into extremely short light pulses of 0.1 milliseconds to 100 milliseconds. Therefore, compared with a continuously lit light source such as a halogen lamp HL, it is capable of irradiating extremely strong light. characteristics. That is, the flash lamp FL is a pulse light-emitting lamp that emits light instantaneously for a very short time of less than 1 second. Furthermore, the lighting time of the flash lamp FL can be adjusted according to the coil constant of the lamp power supply that supplies power to the flash lamp FL. In addition, the reflector 52 is provided above the plurality of flash lamps FL to cover them entirely. The basic function of the reflector 52 is to reflect the flash light emitted from the plurality of flash lamps FL toward the heat treatment space 65 side. The reflector 52 is formed of an aluminum alloy plate, and its surface (the side facing the flash lamp FL) is roughened by sandblasting. The halogen heating part 4 provided below the chamber 6 has a plurality of (40 in this embodiment) halogen lamps HL built inside the housing 41 . The halogen heating section 4 is a light irradiation section that heats the semiconductor wafer W by irradiating the heat treatment space 65 with light from below the chamber 6 through the lower chamber window 64 through a plurality of halogen lamps HL. FIG. 7 is a top view showing the arrangement of a plurality of halogen lamps HL. 40 halogen lamps HL are arranged in two layers: upper and lower. There are 20 halogen lamps HL arranged on the upper layer close to the holding part 7 , and 20 halogen lamps HL are also arranged on the lower layer further away from the upper layer than the holding part 7 . Each halogen lamp HL is a rod-shaped lamp having a long cylindrical shape. There are 20 halogen lamps HL in both the upper layer and the lower layer, arranged so that their longitudinal directions are parallel to each other along the main surface of the semiconductor wafer W held in the holder 7 (that is, along the horizontal direction). Therefore, the plane formed by the arrangement of the halogen lamps HL is a horizontal plane on both the upper and lower layers. Furthermore, as shown in FIG. 7 , in both the upper and lower layers, the halogen lamp HL is located in the area facing the peripheral portion compared to the area facing the central portion of the semiconductor wafer W held by the holding portion 7 . The configuration density is higher. That is, the arrangement pitch of the halogen lamps HL in the upper and lower layers is shorter in the peripheral portion than in the center portion of the lamp array. Therefore, when heating by light irradiation from the halogen heating unit 4, a larger amount of light can be irradiated to the peripheral portion of the semiconductor wafer W where a temperature drop is likely to occur. Moreover, the lamp group including the halogen lamp HL of the upper layer and the lamp group including the halogen lamp HL of the lower layer are arranged in a lattice-like cross pattern. That is, a total of 40 halogen lamps HL are arranged so that the longitudinal directions of the 20 halogen lamps HL arranged on the upper layer are orthogonal to each other. Halogen lamp HL is a filament-type light source that emits light by energizing a filament arranged inside a glass tube to turn the filament incandescent. A gas obtained by introducing trace amounts of halogen elements (iodine, bromine, etc.) into an inert gas such as nitrogen or argon is sealed inside the glass tube. By introducing a halogen element, breakage of the filament can be suppressed and the temperature of the filament can be set to a high temperature. Therefore, the halogen lamp HL has the characteristics of having a longer lifespan than a normal incandescent lamp and can continuously irradiate stronger light. That is, the halogen lamp HL is a continuously lit lamp that emits light continuously for at least 1 second. In addition, since the halogen lamp HL is a rod-shaped lamp, it has a long life. By arranging the halogen lamp HL in the horizontal direction, it has excellent radiation efficiency to the semiconductor wafer W above. Furthermore, in the housing 41 of the halogen heating unit 4, a reflector 43 is also provided below the double-layer halogen lamp HL (Fig. 1). The reflector 43 reflects the light emitted from the plurality of halogen lamps HL toward the heat treatment space 65 side. The control unit 3 controls the above-mentioned various operating mechanisms provided in the heat treatment device 1 . The hardware structure of the control unit 3 is the same as that of a general computer. That is, the control unit 3 is equipped with a CPU (Central Processing Unit), which is a circuit that performs various calculations, a ROM (Read Only Memory), which is a dedicated memory for reading basic programs, and a memory for storing various information. The memory that can be read and written freely is RAM (Random Access Memory), and the disk that stores control software or data in advance. The CPU of the control unit 3 performs processing in the heat treatment device 1 by executing a specific processing program. Moreover, as shown in FIG. 1, the heat treatment apparatus 1 is equipped with the upper radiation thermometer 25 and the lower radiation thermometer 20. The upper radiation thermometer 25 is a high-speed radiation thermometer for measuring rapid temperature changes on the upper surface of the semiconductor wafer W at the moment when a flash light is irradiated from the flash lamp FL. FIG. 8 is a block diagram showing the structure of the high-speed radiation thermometer unit 90 including the main part of the upper radiation thermometer 25. The infrared sensor 91 of the upper radiation thermometer 25 is installed on the outer wall of the chamber side 61 in such a manner that its optical axis coincides with the axis of the penetration direction of the through hole 61 a. The infrared sensor 91 receives the infrared light radiated from the upper surface of the semiconductor wafer W held on the wafer holder 74 through the transparent window 26 of calcium fluoride. The infrared sensor 91 is equipped with an optical element of InSb (indium antimonide), and its measurement wavelength range is 5 μm to 6.5 μm. The transparent window 26 of calcium fluoride selectively transmits infrared light in the measurement wavelength region of the infrared sensor 91 . InSb optical elements change resistance based on the intensity of infrared light received. The infrared sensor 91 with an InSb optical element is capable of high-speed measurement with extremely short response time and a significantly short sampling interval (for example, about 40 microseconds). The infrared sensor 91 is electrically connected to the high-speed radiation thermometer unit 90 and transmits signals generated in response to receiving light to the high-speed radiation thermometer unit 90 . The high-speed radiation thermometer unit 90 includes a signal conversion circuit 92 , an amplifier circuit 93 , an A/D (Analog/Digital) converter 94 , a temperature conversion unit 95 , a characteristic value estimation unit 96 and a memory unit 97 . The signal conversion circuit 92 is a circuit that converts the resistance change generated in the InSb optical element of the infrared sensor 91 into a signal in the order of current change and voltage change, and finally converts it into a voltage signal that is easy to process and outputs it. The signal conversion circuit 92 is configured using an operational amplifier, for example. The amplification circuit 93 amplifies the voltage signal output from the signal conversion circuit 92 and outputs it to the A/D converter 94 . The A/D converter 94 converts the voltage signal amplified by the amplifier circuit 93 into a digital signal. The temperature conversion unit 95 and the characteristic value estimation unit 96 are functional processing units realized by the CPU (not shown) of the high-speed radiation thermometer unit 90 executing a specific processing program. The temperature conversion unit 95 performs specific calculation processing on the signal output from the A/D converter 94 , that is, the signal indicating the intensity of the infrared light received by the infrared sensor 91 , and converts the signal into a temperature. The temperature determined by the temperature conversion unit 95 is the temperature of the upper surface of the semiconductor wafer W. Furthermore, the upper radiation thermometer 25 is composed of an infrared sensor 91, a signal conversion circuit 92, an amplifier circuit 93, an A/D converter 94, and a temperature conversion part 95. The lower radiation thermometer 20 also has substantially the same structure as the upper radiation thermometer 25, but it does not need to be suitable for high-speed measurement. In addition, the temperature conversion unit 95 stores the acquired temperature data in the memory unit 97 . As the storage unit 97, a known storage medium such as a magnetic disk or a memory can be used. The temperature conversion part 95 sequentially stores the temperature data sampled at regular intervals in the memory part 97, thereby obtaining a temperature distribution representing the temporal change of the temperature of the upper surface of the semiconductor wafer W. As shown in FIG. 8 , the high-speed radiation thermometer unit 90 is electrically connected to the control unit 3 which is the overall controller of the heat treatment device 1 . The control unit 3 includes a rupture determination unit 31 . The rupture determination unit 31 is a functional processing unit realized by the CPU of the control unit 3 executing a specific processing program. The processing contents of the characteristic value estimation unit 96 of the high-speed radiation thermometer unit 90 and the rupture determination unit 31 of the control unit 3 will be further described below. Furthermore, a display unit 32 and an input unit 33 are connected to the control unit 3 . The control unit 3 displays various information on the display unit 32 . The input unit 33 is a machine used by the operator of the heat treatment apparatus 1 to input various instructions or parameters to the control unit 3 . The operator can also set the conditions of the processing plan in which the processing conditions of the semiconductor wafer W are described from the input unit 33 . As the display unit 32 and the input unit 33, for example, a liquid crystal touch panel provided on the outer wall of the heat treatment device 1 can be used. In addition to the above-described configuration, the heat treatment apparatus 1 is also equipped with various cooling structures to prevent the halogen heating part 4, the flash heating part 5 and the chamber from being damaged by the heat energy generated from the halogen lamp HL and the flash lamp FL during the heat treatment of the semiconductor wafer W. 6 The excess temperature rises. For example, a water-cooling pipe (not shown) is provided on the wall of the chamber 6 . In addition, the halogen heating part 4 and the flash heating part 5 have an air-cooling structure in which air flow is formed inside to dissipate heat. In addition, air is also supplied to the gap between the upper chamber window 63 and the light radiation window 53 to cool the flash heating part 5 and the upper chamber window 63. Next, the processing sequence of the semiconductor wafer W in the heat treatment apparatus 1 will be described. FIG. 9 is a flowchart showing the processing sequence of the semiconductor wafer W. Here, the semiconductor wafer W to be processed is a semiconductor substrate to which impurities (ions) are added by an ion implantation method. The activation of the impurities is performed by flash irradiation heat treatment (annealing) of the heat treatment device 1 . The processing sequence of the heat treatment device 1 described below is performed by the control unit 3 controlling each operating mechanism of the heat treatment device 1 . First, the valve 84 for air supply is opened, and the valves 89 and 192 for exhaust are opened to start supply and exhaust of the chamber 6 . When the valve 84 is opened, nitrogen gas is supplied to the heat treatment space 65 from the gas supply hole 81 . Furthermore, when the valve 89 is opened, the gas in the chamber 6 is exhausted from the gas exhaust hole 86 . Thereby, the nitrogen gas supplied from the upper part of the heat treatment space 65 in the chamber 6 flows downward, and is exhausted from the lower part of the heat treatment space 65 . Furthermore, by opening the valve 192, the gas in the chamber 6 is also exhausted from the transfer opening 66. Furthermore, the ambient air around the driving part of the transfer mechanism 10 is also exhausted by an exhaust mechanism (not shown). Furthermore, during the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1, nitrogen gas is continuously supplied to the heat treatment space 65, and the supply amount is appropriately changed according to the processing steps. Next, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W to be processed is transferred into the heat treatment space 65 in the chamber 6 through the transfer opening 66 by a transfer robot outside the apparatus (step S1). At this time, there is a risk that ambient gas outside the device may be entrained as the semiconductor wafer W is loaded in. However, since nitrogen gas is continuously supplied to the chamber 6 , the nitrogen gas flows out from the transfer opening 66 and can entrain such external ambient gas. Suppressed to a minimum. The semiconductor wafer W loaded by the transfer robot reaches a position directly above the holding portion 7 and then stops. Then, one pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retreat position to the transfer operation position and rises, whereby the lifting pin 12 protrudes from the upper surface of the holding plate 75 of the crystal base 74 through the through hole 79 and is received. Semiconductor wafer W. At this time, the lifting pin 12 rises above the upper end of the substrate support pin 77 . After placing the semiconductor wafer W on the jacking pin 12 , the transfer robot exits the heat treatment space 65 and closes the transfer opening 66 with the gate valve 185 . Then, the semiconductor wafer W is transferred from the transfer mechanism 10 to the crystal holder 74 of the holding part 7 by the pair of transfer arms 11 descending, and is held in a horizontal posture from below. The semiconductor wafer W is supported by a plurality of substrate support pins 77 standing on the holding plate 75 and held on the wafer holder 74 . In addition, the semiconductor wafer W is held by the holding part 7 with the front surface where the pattern formation is completed and the impurities are injected as the upper surface. A specific gap is formed between the back surface (the main surface opposite to the front surface) of the semiconductor wafer W supported by the plurality of substrate support pins 77 and the holding surface 75 a of the holding plate 75 . A pair of transfer arms 11 that descends below the crystal base 74 is retracted to the retracted position, that is, inside the recess 62 by the horizontal moving mechanism 13 . After the semiconductor wafer W is held in a horizontal position from below by the crystal holder 74 of the holding part 7 made of quartz, the 40 halogen lamps HL of the halogen heating part 4 are turned on simultaneously to start preheating (auxiliary heating) (step S2) . The halogen light emitted from the halogen lamp HL passes through the lower chamber window 64 and the crystal base 74 formed of quartz and is irradiated to the lower surface of the semiconductor wafer W. By being irradiated with light from the halogen lamp HL, the semiconductor wafer W is preheated and its temperature rises. Furthermore, since the transfer arm 11 of the transfer mechanism 10 is retracted to the inside of the recess 62, it will not hinder the heating of the halogen lamp HL. During preheating using the halogen lamp HL, the temperature of the semiconductor wafer W is measured by the lower radiation thermometer 20 . That is, infrared light radiated from the lower surface of the semiconductor wafer W held on the wafer holder 74 through the opening 78 is transmitted through the transparent window 21 and received by the lower radiation thermometer 20 to measure the temperature of the rising wafer. The measured temperature of the semiconductor wafer W is transmitted to the control unit 3 . The control unit 3 controls the output of the halogen lamp HL while monitoring whether the temperature of the semiconductor wafer W heated by irradiation with light from the halogen lamp HL has reached a specific preheating temperature T1. That is, the control unit 3 performs feedback control on the output of the halogen lamp HL so that the temperature of the semiconductor wafer W reaches the preheating temperature T1 based on the measured value of the lower radiation thermometer 20 . In this way, the lower radiation thermometer 20 is a radiation thermometer used for temperature control of the semiconductor wafer W during preheating. The preheating temperature T1 is set to about 200°C to 800°C, preferably about 350°C to 600°C (600°C in this embodiment), where there is no possibility that the impurities added to the semiconductor wafer W will diffuse due to heat. ). After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the control unit 3 temporarily maintains the semiconductor wafer W at the preheating temperature T1. Specifically, when the temperature of the semiconductor wafer W measured by the lower radiation thermometer 20 reaches the preheating temperature T1, the control unit 3 adjusts the output of the halogen lamp HL to maintain the temperature of the semiconductor wafer W substantially at the preheating temperature T1. Temperature T1. By performing such preheating using the halogen lamp HL, the entire semiconductor wafer W is uniformly heated to the preheating temperature T1. During the preheating stage using halogen lamps HL, the temperature of the peripheral portion of the semiconductor wafer W, where heat dissipation is more likely to occur, tends to be lower than that of the central portion. However, the arrangement density of the halogen lamps HL in the halogen heating portion 4 is relatively high. The area facing the central part of the substrate W and the area facing the peripheral part are higher. Therefore, the amount of light irradiated to the peripheral portion of the semiconductor wafer W that is prone to heat dissipation increases, and the in-plane temperature distribution of the semiconductor wafer W in the preheating stage can be made uniform. After the temperature of the semiconductor wafer W reaches the preheating temperature T1 and immediately before flash irradiation from the flash lamp FL, measurement of the front surface temperature of the semiconductor wafer W by the upper radiation thermometer 25 is started (step S3). Infrared light with intensity corresponding to its temperature is radiated from the front surface of the heated semiconductor wafer W. The infrared light radiated from the front surface of the semiconductor wafer W passes through the transparent window 26 and is received by the infrared sensor 91 of the upper radiation thermometer 25 . A resistance change corresponding to the intensity of the received infrared light is generated in the InSb optical element of the infrared sensor 91 . The resistance change generated in the InSb optical element of the infrared sensor 91 is converted into a voltage signal by the signal conversion circuit 92 . The voltage signal output from the signal conversion circuit 92 is amplified by the amplifier circuit 93 and then converted into a digital signal suitable for computer processing by the A/D converter 94 . Then, the temperature conversion unit 95 performs specific arithmetic processing on the signal output from the A/D converter 94 and converts it into temperature data. That is, the upper radiation thermometer 25 receives infrared light radiated from the front surface of the heated semiconductor wafer W, and measures the front surface temperature of the semiconductor wafer W based on the intensity of the infrared light. In this embodiment, the upper radiation thermometer 25 is a high-speed radiation thermometer using an InSb optical element. The upper radiation thermometer 25 measures the front surface temperature of the semiconductor wafer W at an extremely short sampling interval of 40 microseconds. Furthermore, the upper radiation thermometer 25 sequentially stores the data on the front surface temperature of the semiconductor wafer W measured at regular intervals in the memory unit 97 . When the temperature of the semiconductor wafer W reaches the preheating temperature T1 and a specific time has elapsed, the flash lamp FL of the flash heating unit 5 irradiates the front surface of the semiconductor wafer W held on the wafer holder 74 with flash (step S4). At this time, part of the flash radiated from the flash lamp FL is directly directed into the chamber 6, and the other part is temporarily reflected by the reflector 52 and then directed into the chamber 6. The semiconductor wafer W is flash heated by the irradiation of these flashes. . Flash heating is performed by flashing light from the flash lamp FL, so the front surface temperature of the semiconductor wafer W can be increased in a short time. That is, the flash light emitted from the flash lamp FL converts the electrostatic energy stored in the capacitor in advance into an extremely short light pulse, and the irradiation time is approximately 0.1 milliseconds to 100 milliseconds, and the extremely short and strong flash light is. Furthermore, the front surface temperature of the semiconductor wafer W heated by the flash light from the flash lamp FL instantly rises to the processing temperature T2 of more than 1000°C. After the impurities injected into the semiconductor wafer W are activated, the front surface temperature drops rapidly. In this way, the heat treatment device 1 can raise and lower the front surface temperature of the semiconductor wafer W in an extremely short time, and therefore can activate the impurities while suppressing thermal diffusion of the impurities injected into the semiconductor wafer W. Furthermore, the time required for activation of impurities is extremely short compared to the time required for thermal diffusion. Therefore, activation is completed even for a short time of about 0.1 milliseconds to 100 milliseconds in which diffusion does not occur. When the front surface temperature of the semiconductor wafer W rises rapidly by flash heating and then decreases, the front surface temperature is also measured by the upper radiation thermometer 25 . Since the upper radiation thermometer 25 measures the front surface temperature of the semiconductor wafer W at an extremely short sampling interval of 40 microseconds, even if the front surface temperature of the semiconductor wafer W changes suddenly during flash irradiation, the change can be followed. For example, even if the front surface temperature of the semiconductor wafer W rises and falls in 4 milliseconds, the upper radiation thermometer 25 can obtain 100 points of temperature data during this period. The upper radiation thermometer 25 measures the front surface temperature of the semiconductor wafer W during a preset specific period (for example, 120 milliseconds) after the flash lamp FL irradiates the flash to obtain temperature data. Then, the upper radiation thermometer 25 sequentially stores the acquired data on the front surface temperature of the semiconductor wafer W in the memory unit 97 . Thereby, the temperature distribution of the front surface temperature of the semiconductor wafer W during flash irradiation is created (step S5). FIG. 10 is a diagram showing an example of the temperature distribution of the front surface temperature of the semiconductor wafer W during flash irradiation. The example shown in FIG. 10 is an example of the temperature distribution when the semiconductor wafer W is not cracked during flash irradiation and the flash heating process is performed normally. At time t0, the flash lamp FL emits light and irradiates the front side of the semiconductor wafer W with a flash. The temperature of the front side of the semiconductor wafer W instantly rises from the preheating temperature T1 to the processing temperature T2 and then drops rapidly. Thereafter, as shown in FIG. 10 , the measured temperature of the front surface of the semiconductor wafer W changes with a slight amplitude. It is considered that the reason for such a slight change in the measured temperature is that the semiconductor wafer W on the wafer 74 vibrates after flash irradiation. That is, during flash irradiation, the flash with higher energy is irradiated to the front surface of the semiconductor wafer W in a very short irradiation time, so the front surface temperature of the semiconductor wafer W instantly rises to the processing temperature T2 above 1000°C. On the other hand, , the back surface temperature at this moment does not rise significantly from the preheating temperature T1. Therefore, rapid thermal expansion occurs only on the front side of the semiconductor wafer W, while almost no thermal expansion occurs on the back side. Therefore, the semiconductor wafer W instantly warps into a front-side bulge. Then, at the next instant, the semiconductor wafer W is deformed to restore the warpage. Repeating this behavior causes the semiconductor wafer W to vibrate on the wafer holder 74 . Since the infrared sensor 91 of the upper radiation thermometer 25 is disposed obliquely above the semiconductor wafer W, if the semiconductor wafer W vibrates, the radiation rate of the front surface of the wafer observed from the infrared sensor 91 will change. As a result, The temperature measured by the upper radiation thermometer 25 changes slightly. Furthermore, although the temperature measured by the upper radiation thermometer 25 changes due to the vibration of the semiconductor wafer W, the actual front temperature of the semiconductor wafer W does not change. When the semiconductor wafer W is not cracked during flash irradiation and the flash heating process is performed normally, the temperature distribution shown in FIG. 10 is obtained with high reproducibility. On the other hand, if the semiconductor wafer W is cracked during flash irradiation, abnormal measurement data will appear in the temperature distribution. Therefore, in the first embodiment, cracking of the semiconductor wafer W is detected by statistically analyzing the temperature distribution to identify abnormal measurement data. After the flash heating process is completed, the characteristic value estimation unit 96 estimates the characteristic value based on the produced temperature distribution (step S6). The so-called characteristic value refers to a statistical quantity when performing statistical processing on the temperature distribution. In this embodiment, it refers to the average value and the standard deviation of the temperature distribution. Specifically, the characteristic value estimation unit 96 estimates the average value and the standard deviation of the temperature distribution during the period from time t1 to time t2 as the characteristic value. The starting period of the estimation period, namely time t1, is, for example, 30 milliseconds after the elapse of 30 milliseconds from the time t0 when the flash FL emits light. The reason why the starting period of the estimation period, i.e. time t1, is later than the time t0 when the flash lamp FL emits light is that if the rise and fall of the front surface temperature of the semiconductor wafer W caused by flash heating is included in the estimation period, it will affect the characteristic values. In addition, the end period of the estimation period, namely time t2, is, for example, 100 milliseconds after the elapse of 100 milliseconds from the time t0 when the flashlight FL emits light. Accordingly, the characteristic value estimation unit 96 estimates the estimation period (t2-t1) of the characteristic value to be 70 milliseconds, which is the period during which the front surface temperature of the semiconductor wafer W is stabilized after flash irradiation. Next, based on the characteristic value estimated by the characteristic value estimation unit 96, the crack determination unit 31 of the control unit 3 performs crack determination of the semiconductor wafer W (step S7). The rupture determination unit 31 determines whether the characteristic value of the temperature distribution deviates from a specific range and performs rupture determination. FIG. 11 is a diagram for explaining fracture determination based on the average value of temperature distribution. FIG. 11 is a graph plotting the average value of the temperature distribution produced by irradiating a plurality of semiconductor wafers W with flash light. In addition, the average value of the temperature distribution refers to the average value of the temperature distribution within the estimation period from time t1 to time t2, and is also referred to as the "distribution average value" below. The horizontal axis of FIG. 11 represents the data points of each of the plurality of semiconductor wafers W, and the vertical axis of FIG. 11 represents the average value of the temperature distribution. The upper management limit value U1 is a value obtained by adding the total average of the distribution averages of a plurality of semiconductor wafers W to a value 5 times the standard deviation σ of the distribution average of the plurality of semiconductor wafers W. On the other hand, the lower management limit value L1 is a value obtained by subtracting five times the standard deviation σ of the distribution averages of the plurality of semiconductor wafers W from the total average of the distribution averages of the plurality of semiconductor wafers W. That is, the range enclosed by the dotted line in Figure 11 is the range of ±5σ from the overall mean of the distribution mean. The crack determination unit 31 determines that the semiconductor wafer W is not cracked when the average value of the temperature distribution obtained when irradiating the flash light falls within the range of ±5σ from the total average of the distribution average. Within this range, it is determined that the semiconductor wafer W is cracked. In the example shown in FIG. 11 , the distribution average of the semiconductor wafer W represented by the data point A1 is greater than the upper management limit value U1. In addition, the distribution average of the semiconductor wafer W represented by the data point A2 is smaller than the lower management limit value L1. That is, when the distribution average value of the semiconductor wafers W represented by the data points A1 and A2 deviates from the overall average ±5σ range from the distribution average value, the crack determination unit 31 determines that the two semiconductor wafers W are cracked. On the other hand, FIG. 12 is a diagram for explaining fracture determination based on the standard deviation of the temperature distribution. FIG. 12 is a graph plotting the standard deviation of the temperature distribution produced by irradiating a plurality of semiconductor wafers W with flash light. In addition, the standard deviation of the temperature distribution refers to the standard deviation of the temperature distribution within the estimation period from time t1 to time t2 in the same manner as above, and is also referred to as "distribution standard deviation" below. The horizontal axis of FIG. 12 represents the data points for each of the plurality of semiconductor wafers W, and the vertical axis of FIG. 12 represents the standard deviation of the temperature distribution. The upper management limit value U2 is a value obtained by adding the total average of the distribution standard deviations of a plurality of semiconductor wafers W to a value 5 times the standard deviation σ of the distribution standard deviations of the plurality of semiconductor wafers W. That is, the range below the dotted line in Figure 12 is a range of 5σ from the overall average of the distribution standard deviations. Furthermore, regarding the distribution standard deviation, it is 0 when the variation in the measured temperature is minimal, and the concept of lower management limit does not exist. The crack determination unit 31 determines that the semiconductor wafer W is not cracked when the standard deviation of the temperature distribution obtained when irradiating the flash light falls within a range of 5σ from the total average of the distribution standard deviations. Within this range, the semiconductor wafer W is judged to be cracked. In the example shown in FIG. 12, the standard deviation of the distribution of the semiconductor wafer W represented by the data point B1 is greater than the upper management limit value U2. That is, when the distribution standard deviation of the semiconductor wafer W represented by the data point B1 deviates within a range of 5σ from the overall average of the distribution standard deviations, the crack determination unit 31 determines that the semiconductor wafer W is cracked. Furthermore, the rupture determination unit 31 performs an "OR (or) determination" on the two characteristic values, that is, the average value and the standard deviation. That is, the crack determination unit 31 determines when the average value of the temperature distribution of a certain semiconductor wafer W deviates from the range of ±5σ from the overall average of the distribution average, or when the standard deviation of the temperature distribution deviates from the overall average of the distribution standard deviation. When it is within the range of 5σ, it is determined that the semiconductor wafer W is cracked. The reason for this structure is that when only one of the characteristic values is judged, the semiconductor wafer W may be judged not to be cracked even though it is actually cracked. For example, when the measured temperature after flash irradiation stably becomes a significantly higher temperature (or lower temperature) than usual as a result of cracking in the semiconductor wafer W, the determination of the average value is It is judged to be ruptured, but there is a possibility that it will be judged not to be ruptured when judging the standard deviation. On the contrary, when the measured temperature after flash irradiation greatly fluctuates up and down sandwiching the normal temperature as a result of cracking in the semiconductor wafer W, it is judged to be cracked based on the standard deviation. When judging the average value, there is a risk that it will be judged as unbroken. Therefore, by performing an "OR judgment" on the average value and the standard deviation, the detection accuracy of cracks can be improved. Returning to FIG. 9 , when the crack determination unit 31 determines that the semiconductor wafer W after flash irradiation is cracked, step S8 proceeds to step S9 , and the control unit 3 interrupts the processing of the heat treatment device 1 and stops moving the semiconductor wafer W relative to the cavity. The operation of the transport system for moving in and out of room 6. In addition, the control unit 3 may also issue a warning on the display unit 32 that the wafer is cracked. When the semiconductor wafer W is cracked, particles are generated in the chamber 6 , so the chamber 6 is opened for cleaning. On the other hand, when the crack determination unit 31 determines that the semiconductor wafer W after flash irradiation is not cracked, the process proceeds from step S8 to step S10 and the unloading process of the semiconductor wafer W is performed. Specifically, after the flash heating process is completed, the halogen lamp HL is turned off after a specific time has elapsed. Thereby, the semiconductor wafer W rapidly cools down from the preheating temperature T1. The temperature of the semiconductor wafer W being cooled is measured by the lower radiation thermometer 20 , and the measurement result is transmitted to the control unit 3 . The control unit 3 monitors whether the temperature of the semiconductor wafer W has dropped to a specific temperature based on the measurement result of the lower radiation thermometer 20 . Then, after the temperature of the semiconductor wafer W has dropped below a specific temperature, one pair of transfer arms 11 of the transfer mechanism 10 moves horizontally from the retreat position to the transfer operation position and rises, thereby lifting the pin 12 from the wafer W. The upper surface of the base 74 protrudes to receive the heat-treated semiconductor wafer W from the crystal base 74 . Then, the closed transfer opening 66 is opened by the gate valve 185, and the semiconductor wafer W placed on the lift pin 12 is transferred out by the transfer robot outside the device, and the semiconductor wafer W in the heat treatment device 1 is heated. Processing completed. In this embodiment, the temperature distribution is obtained by measuring the front surface temperature of the semiconductor wafer W after flash irradiation with the upper radiation thermometer 25. When the average value of the temperature distribution deviates from the overall average ±5σ range from the distribution average value, Or when the standard deviation of the temperature distribution deviates from the range of 5σ from the overall average of the distribution standard deviations, the semiconductor wafer W is determined to be cracked. That is, a special hardware structure for wafer crack detection is not added to the heat treatment apparatus 1, and cracks of the semiconductor wafer W during flash irradiation are detected with a simple structure. In addition, cracks of the semiconductor wafer W are detected through simple statistical calculation processing, so there is no need to worry about reducing productivity. Furthermore, in this embodiment, "OR determination" is performed on the average value and the standard deviation of the temperature distribution, so that the crack of the semiconductor wafer W during flash irradiation can be detected with high accuracy. Furthermore, in this embodiment, the measurement wavelength range of the upper radiation thermometer 25 is 5 μm or more and 6.5 μm or less. That is, the upper radiation thermometer 25 measures the front surface temperature of the semiconductor wafer W based on the intensity of infrared light with a wavelength of 5 μm or more and 6.5 μm or less radiated from the front surface of the semiconductor wafer W. Regardless of whether the semiconductor wafer W is cracked or not, the front temperature of the semiconductor wafer W itself will not change significantly. It is thought that the reason why the abnormal measurement data appears in the temperature distribution when the semiconductor wafer W is cracked is that the cracked fragments behave (physically move) differently from normal. Specifically, the angle between the optical axis of the upper radiation thermometer 25 and the broken piece becomes a different value from the normal value. As a result, the apparent emissivity of the semiconductor wafer W changes greatly, and as a result, an abnormality is obtained. measurement data. Therefore, in order to detect cracks with high accuracy, the temperature measurement of the upper radiation thermometer 25 needs to be sensitive to changes in the angle between the upper radiation thermometer 25 and the semiconductor wafer W. On the other hand, various patterns or films are often formed on the front surface of the semiconductor wafer W. The emissivity of the semiconductor wafer W will also be affected by such patterns or films. However, from the perspective of crack detection, it is preferable that the temperature measurement by the upper radiation thermometer 25 is not easily affected by changes in patterns or films. 13 is a diagram showing the influence of the angle between the optical axis of the upper radiation thermometer 25 and the main surface of the semiconductor wafer W on the apparent emissivity of the semiconductor wafer W. Appearances when two types of films with different film thicknesses are formed on the upper surface of the semiconductor wafer W and the angles formed by the optical axis of the upper radiation thermometer 25 and the main surface of the semiconductor wafer W are 15° and 90°. The radiance is shown in this figure. In addition, FIG. 13 shows the apparent emissivity of the semiconductor wafer W in the measurement wavelength range (5 μm to 6.5 μm) of the upper radiation thermometer 25. As shown in FIG. 13 , in the wavelength range of 5 μm and above and 6.5 μm and below, if the angle between the optical axis of the upper radiation thermometer 25 and the main surface of the semiconductor wafer W changes, the apparent emissivity will change significantly. This means that within the range of the measurement wavelength region of the upper radiation thermometer 25, the temperature measurement of the upper radiation thermometer 25 is sensitive to changes in the angle between the upper radiation thermometer 25 and the semiconductor wafer W. Therefore, if the semiconductor wafer W is cracked and the angle between the cracked fragments and the upper radiation thermometer 25 is slightly different from normal, the apparent emissivity will change and abnormal measurement data will be obtained. As a result, cracks of the semiconductor wafer W can be detected with high accuracy. On the other hand, the film thickness has a smaller impact on the emissivity than the impact of angle changes. This means that the temperature measurement of the upper radiation thermometer 25 is not easily affected by changes in pattern or film type. That is, in order to balance the elimination of the influence of patterns or film types with the sensitivity to angle changes, it is preferable that the measurement wavelength range of the upper radiation thermometer 25 is 5 μm or more and 6.5 μm or less. Furthermore, in this embodiment, the upper radiation thermometer 25 is installed obliquely above the semiconductor wafer W, and the angle between the optical axis of the upper radiation thermometer 25 and the main surface of the semiconductor wafer W is relatively small. Therefore, the detection range of the upper radiation thermometer 25 covers a relatively large range of the upper surface of the semiconductor wafer W, and the crack of the semiconductor wafer W can be easily detected. <Second Embodiment> Next, a second embodiment of the present invention will be described. The structure of the heat treatment apparatus 1 of the second embodiment is exactly the same as that of the first embodiment. In addition, the processing sequence of the semiconductor wafer W in the heat treatment apparatus 1 of the second embodiment is also substantially the same as that of the first embodiment. The difference between the second embodiment and the first embodiment lies in the estimation period of the characteristic value of the temperature distribution. In the second embodiment, time t0 in FIG. 10 when the flash lamp FL starts flash irradiation is set as the starting period of the estimation period. That is, in the second embodiment, a specific period from the start of flash irradiation is set as the estimation period, so that the rise and fall of the front surface temperature of the semiconductor wafer W caused by flash heating is included in the estimation period of the characteristic values. The method of estimating the characteristic values and the method of determining the crack of the semiconductor wafer W based on the characteristic values are the same as those in the first embodiment. When the average value of the temperature distribution including the flash irradiation period deviates from the range of ±5σ from the overall average of the distribution average, or when the standard deviation of the temperature distribution deviates from the range of 5σ from the overall average of the distribution standard deviation, the semiconductor crystal is determined to be Circle W breaks. It is clear from Figure 10 that the rise and fall of the front surface temperature of the semiconductor wafer W caused by flash heating has a great impact on characteristic values such as the average value and standard deviation of the temperature distribution. However, when the semiconductor wafer W is not cracked and is processed normally, the rise and fall pattern of the front surface temperature of the semiconductor wafer W caused by flash heating has high reproducibility, and the characteristic value of the temperature distribution itself is stable (characteristics The standard deviation of the values is as small as in the first embodiment). Therefore, similarly to the first embodiment, when a crack occurs in the semiconductor wafer W and abnormal measurement data appears in the temperature distribution, the characteristic value of the temperature distribution deviates from a specific range. Therefore, the cracking of the semiconductor wafer W can be determined by determining whether the characteristic value of the temperature distribution deviates from a specific range. In addition, in the second embodiment, the flash irradiation period is also included in the estimation period of the characteristic values. Therefore, when a crack occurs in the semiconductor wafer W during the flash irradiation and abnormal measurement data is obtained, the characteristic value of the temperature distribution also deviates from a specific value. Scope. Therefore, cracking of the semiconductor wafer W during flash irradiation can be detected more reliably. Especially when the irradiation time of the flash lamp FL is relatively long (more than 6 milliseconds), there is a concern that the semiconductor wafer W may be broken during the flash irradiation. It is preferable that the flash irradiation period is also included in the estimation period of the characteristic values as in the second embodiment. . Whether the estimation period of the characteristic value is set to a specific period after flash irradiation like the first embodiment or to a specific period from the start of flash irradiation like the second embodiment can be appropriately determined by the operator of the heat treatment apparatus 1 from the input unit 33 input and set. <Third Embodiment> Next, a third embodiment of the present invention will be described. The structure of the heat treatment apparatus 1 of the third embodiment is exactly the same as that of the first embodiment. In addition, the processing sequence of the semiconductor wafer W in the heat treatment apparatus 1 of the third embodiment is also substantially the same as that of the first embodiment. The difference between the third embodiment and the first embodiment lies in the method of determining cracks of the semiconductor wafer W based on the temperature distribution. Like the first embodiment, the front surface temperature of the semiconductor wafer W is measured by the upper radiation thermometer 25 before flash irradiation with the flash lamp FL. When the flash irradiation from the flash lamp FL starts and the front surface temperature of the semiconductor wafer W rises rapidly, the front surface temperature is also measured with the upper radiation thermometer 25 . As described above, the upper radiation thermometer 25 measures the front surface temperature of the semiconductor wafer W at an extremely short sampling interval of 40 microseconds. Therefore, even if the front surface temperature of the semiconductor wafer W changes suddenly during flash irradiation, the change can be followed. The upper radiation thermometer 25 sequentially stores the acquired data on the front surface temperature of the semiconductor wafer W in the memory unit 97 . Thereby, the temperature distribution of the front surface temperature of the semiconductor wafer W during flash irradiation is obtained. In the third embodiment, the crack of the semiconductor wafer W is determined based on the time that the front surface temperature of the semiconductor wafer W continues to rise since the flash lamp FL starts flash irradiation. FIG. 14 is a diagram for explaining crack determination based on the temperature rise duration of the semiconductor wafer W. The content shown in FIG. 14 is the same as that of FIG. 10 , and is the temperature distribution of the front surface temperature of the semiconductor wafer W during flash irradiation. At approximately the same time as the flash lamp FL emits light at time t0 and starts flash irradiation, the front surface temperature of the semiconductor wafer W starts to rise from the preheating temperature T1. When the semiconductor wafer W is not cracked during flash irradiation and the flash heat treatment is performed normally, the flash irradiation time f of the flash lamp FL (the emission time of the flash lamp FL) is approximately the same as the time d during which the front surface temperature of the semiconductor wafer W continues to rise. consistent. However, when the semiconductor wafer W is cracked during flash irradiation, the flash irradiation time f of the flash lamp FL and the time d during which the front surface temperature of the semiconductor wafer W continues to rise are deviated. Generally, as shown in FIG. 14 , the temperature rise duration d of the front surface temperature of the semiconductor wafer W is shorter than the flash irradiation time f. In the third embodiment, the crack determination unit 31 determines the semiconductor wafer W when the time d during which the front surface temperature of the semiconductor wafer W continues to rise after the flash irradiation is started and the flash irradiation time f of the flash lamp FL deviate by more than a specific value. rupture. For example, when the temperature rise duration d and the flash irradiation time f deviate by more than ±10%, the semiconductor wafer W is determined to be cracked. In the third embodiment, cracking of the semiconductor wafer W during flash irradiation is detected based only on the temperature distribution of the front surface temperature of the semiconductor wafer W to be processed. Therefore, there is no need to create the temperature distribution of a plurality of semiconductor wafers W and estimate their characteristic values to obtain the management limit value, as in the first embodiment. The flash irradiation time f of the flash lamp FL can be controlled by integrating an insulated gate bipolar transistor (IGBT, Insulated Gate Bipolar Transistor) into the circuit of the flash lamp FL and controlling the power on and off of the flash lamp FL, or by controlling the power of the flash lamp FL. The power supply is adjusted according to the coil constant of the lamp power supply. As described above, when the flash irradiation time f is made relatively long (6 milliseconds or more), there is a concern that the semiconductor wafer W may be broken during the flash irradiation. The rupture determination method of the third embodiment is suitable for this situation. <Modifications> The embodiments of the present invention have been described above. However, the present invention can be modified in various ways other than those described above as long as it does not deviate from the gist of the invention. For example, in the above-mentioned embodiment, the average value and the standard deviation are used as the characteristic values of the temperature distribution. However, the present invention is not limited to this, and other statistical quantities may also be used. For example, as the characteristic value of the temperature distribution, the central value can be used instead of the average value, and the range, which is the difference between the maximum value and the minimum value, can be used instead of the standard deviation. In addition, as the characteristic value of the temperature distribution, for example, the maximum value and the minimum value of the waveform of the temperature distribution can also be used. If the waveform of the temperature distribution can be understood as a periodic sine wave, the period, frequency, amplitude, etc. of the wave can also be used as characteristic values. Alternatively, if the waveform of the temperature distribution is regarded as a pulse wave, the operating ratio, full amplitude at half maximum, half amplitude at half maximum, maximum slope, etc. can also be used as characteristic values. Furthermore, as the characteristic value, the average value, standard deviation, central value, range, maximum value, minimum value of the differential waveform obtained by differentiating the temperature distribution, or the integrated value of the waveform, etc. can also be used. The characteristic values used for determining wafer cracks are not limited to two, and may be three or more of the above various characteristic values, or may be only one. The greater the number of characteristic values used to determine wafer cracks, the higher the accuracy of the determination, but the longer the calculation processing time is required. In addition, when a plurality of characteristic values are used to determine wafer breakage, it is not limited to "OR judgment" among them. Other logical operations (such as AND (and), XOR (exclusive or, mutually exclusive)) can also be performed. or) etc.). However, from the viewpoint of improving the judgment accuracy, "OR judgment" similar to the above-mentioned embodiment is preferable. Which characteristic value to use when determining wafer cracks can be appropriately selected by the operator from the input unit 33 and set in the processing plan. In addition, when using a plurality of characteristic values, the operator can also select and set "OR judgment" or "AND judgment" from the input unit 33 . Thereby, when the characteristic values are changed, there is no need to modify the heat treatment device 1 or upgrade the software every time. Furthermore, in the above-mentioned embodiment, the management limit value is set to the range of 5σ, but it may be set to a more general 3σ range instead. In addition, every time the semiconductor wafer W is processed in the heat treatment apparatus 1, a new temperature distribution is obtained, so the management limit value used for wafer crack determination can also be recalculated and updated successively. For example, the management limit value may also be calculated based on the most recent 10,000 temperature distributions of semiconductor wafers W processed under the same processing conditions. In this way, even if the temperature distribution changes due to aging deterioration of device parts, etc., the optimal management limit value can be set following the change. Alternatively, a temperature distribution obtained by measuring the front surface temperature of a semiconductor wafer W processed not long ago (or several wafers ago) under the same processing conditions as the semiconductor wafer W to be processed may be used as the reference temperature distribution, and The reference temperature distribution is compared with the temperature distribution of the semiconductor wafer W to be processed, and cracking of the semiconductor wafer W is determined. Furthermore, when this method is adopted, it is assumed that the semiconductor wafer W not long ago (or several wafers ago) was not cracked and was processed normally. In this way, as in the third embodiment, the step of creating temperature distributions of a plurality of semiconductor wafers W and determining the management limit values is unnecessary. In addition, instead of producing the distribution of the front surface temperature of the semiconductor wafer W, the distribution of the output value of the infrared sensor 91 before conversion into temperature (that is, the intensity of the infrared light radiated from the front surface of the semiconductor wafer W) can also be produced. And used for wafer crack determination. Furthermore, in the above embodiment, the detection range (field of view) of the upper radiation thermometer 25 is enlarged by disposing the upper radiation thermometer 25 obliquely above the semiconductor wafer W. However, it may be replaced by disposing the upper radiation thermometer 25 obliquely above the semiconductor wafer W. The distance between 25 and the semiconductor wafer W becomes longer, thereby expanding the detection range of the upper radiation thermometer 25 on the upper surface of the semiconductor wafer W. Furthermore, the detection range on the upper surface of the semiconductor wafer W can also be expanded by arranging a plurality of radiation thermometers or arranging a plurality of infrared sensors on the radiation thermometers. Furthermore, in the above embodiment, the flash heating unit 5 is provided with 30 flash lamps FL, but the present invention is not limited to this, and the number of flash lamps FL may be any number. In addition, the flash lamp FL is not limited to a xenon flash lamp and may be a krypton flash lamp. In addition, the number of halogen lamps HL provided in the halogen heating part 4 is not limited to 40, and may be any number. Furthermore, in the above embodiment, the filament-type halogen lamp HL is used as a continuous lighting lamp that continuously emits light for more than 1 second to preheat the semiconductor wafer W. However, the present invention is not limited to this and may be used instead of the halogen lamp HL. A discharge type arc lamp (for example, a xenon arc lamp) is used as a continuous lighting lamp for preheating. Furthermore, in the above embodiment, the semiconductor wafer W is preheated by irradiation with light from the halogen lamp HL, but instead of this, the wafer holding the semiconductor wafer W may be placed on a heating plate. The semiconductor wafer W is preheated by heat conduction from the heating plate. Furthermore, according to the heat treatment apparatus 1, the substrate to be processed is not limited to the semiconductor wafer, but may also be a glass substrate used for a flat panel display such as a liquid crystal display device or a substrate for a solar cell. In addition, the technology of the present invention can also be applied to the heat treatment of high-k gate insulating films (High-k films), the bonding of metal and silicon, or the crystallization of polycrystalline silicon.
1:熱處理裝置 3:控制部 4:鹵素加熱部 5:閃光加熱部 6:腔室 7:保持部 10:移載機構 11:移載臂 12:頂起銷 13:水平移動機構 14:升降機構 20:下部輻射溫度計 21:透明窗 25:上部輻射溫度計 26:透明窗 31:破裂判定部 32:顯示部 33:輸入部 41:殼體 43:反射器 51:殼體 52:反射器 53:燈光輻射窗 61:腔室側部 61a:貫通孔 61b:貫通孔 62:凹部 63:上側腔室窗 64:下側腔室窗 65:熱處理空間 66:搬送開口部 68:反射環 69:反射環 71:基台環 72:連結部 74:晶座 75:保持板 75a:保持面 76:導向環 77:基板支持銷 78:開口部 79:貫通孔 81:氣體供給孔 82:緩衝空間 83:氣體供給管 84:閥 85:處理氣體供給源 86:氣體排氣孔 87:緩衝空間 88:氣體排氣管 89:閥 90:高速輻射溫度計單元 91:紅外線感測器 92:信號轉換電路 93:放大電路 94: A/D轉換器 95:溫度轉換部 96:特性值推算部 97:記憶部 185:閘閥 190:排氣部 191:氣體排氣管 192:閥 A1:資料點 A2:資料點 B1:資料點 d:升溫持續時間 f:閃光照射時間 FL:閃光燈 HL:鹵素燈 L1:下方管理極限值 S1:步驟 S2:步驟 S3:步驟 S4:步驟 S5:步驟 S6:步驟 S7:步驟 S8:步驟 S9:步驟 S10:步驟 T1:預加熱溫度 T2:處理溫度 t0:時刻 t1:時刻 t2:時刻 U1:上方管理極限值 U2:上方管理極限值 W:半導體晶圓1:Heat treatment device 3:Control Department 4: Halogen heating part 5: Flash heating part 6: Chamber 7: Maintenance Department 10:Transfer mechanism 11:Transfer arm 12: Jacking pin 13: Horizontal moving mechanism 14:Lifting mechanism 20: Lower radiation thermometer 21:Transparent window 25: Upper radiation thermometer 26:Transparent window 31: Rupture determination part 32:Display part 33:Input part 41: Shell 43:Reflector 51: Shell 52:Reflector 53:Light radiation window 61: Chamber side 61a:Through hole 61b:Through hole 62: concave part 63: Upper chamber window 64: Lower chamber window 65:Heat treatment space 66:Transportation opening 68:Reflection Ring 69:Reflection Ring 71:Abutment ring 72:Connection Department 74: Crystal base 75:keep board 75a:Maintenance surface 76:Guide ring 77:Substrate support pin 78:Opening part 79:Through hole 81:Gas supply hole 82: Buffer space 83:Gas supply pipe 84:Valve 85: Handling gas supply sources 86:Gas exhaust hole 87:Buffer space 88:Gas exhaust pipe 89:Valve 90: High-speed radiation thermometer unit 91: Infrared sensor 92: Signal conversion circuit 93: Amplification circuit 94: A/D converter 95:Temperature conversion part 96:Characteristic value estimation department 97:Memory Department 185: Gate valve 190:Exhaust part 191:Gas exhaust pipe 192:Valve A1: Data points A2: Data point B1: Data point d: heating duration f: flash exposure time FL: flash HL: Halogen lamp L1: lower management limit value S1: Steps S2: Step S3: Steps S4: Steps S5: Steps S6: Steps S7: Steps S8: Steps S9: Steps S10: Steps T1: preheating temperature T2: Processing temperature t0: time t1: time t2: time U1: upper management limit value U2: upper management limit value W: semiconductor wafer
圖1係表示本發明之熱處理裝置之構成之縱剖視圖。 圖2係表示保持部之整體外觀之立體圖。 圖3係晶座之俯視圖。 圖4係晶座之剖視圖。 圖5係移載機構之俯視圖。 圖6係移載機構之側視圖。 圖7係表示複數個鹵素燈之配置之俯視圖。 圖8係表示具備上部輻射溫度計之主要部分之高速輻射溫度計單元之構成之方塊圖。 圖9係表示半導體晶圓之處理順序之流程圖。 圖10係表示閃光照射時之半導體晶圓之正面溫度之溫度分佈之一例之圖。 圖11係用以說明基於溫度分佈之平均值之破裂判定之圖。 圖12係用以說明基於溫度分佈之標準偏差之破裂判定之圖。 圖13係表示上部輻射溫度計之光軸與半導體晶圓之主面所成之角度對半導體晶圓之表觀輻射率所造成之影響之圖。 圖14係用以說明基於半導體晶圓之升溫持續時間之破裂判定之圖。Fig. 1 is a longitudinal sectional view showing the structure of the heat treatment apparatus of the present invention. Fig. 2 is a perspective view showing the overall appearance of the holding portion. Figure 3 is a top view of the crystal holder. Figure 4 is a cross-sectional view of the crystal holder. Figure 5 is a top view of the transfer mechanism. Figure 6 is a side view of the transfer mechanism. FIG. 7 is a top view showing the arrangement of a plurality of halogen lamps. FIG. 8 is a block diagram showing the structure of a high-speed radiation thermometer unit including the main parts of the upper radiation thermometer. FIG. 9 is a flowchart showing the processing sequence of a semiconductor wafer. FIG. 10 is a diagram showing an example of the temperature distribution of the front surface temperature of a semiconductor wafer during flash irradiation. FIG. 11 is a diagram for explaining fracture determination based on the average value of temperature distribution. FIG. 12 is a diagram for explaining fracture determination based on the standard deviation of temperature distribution. Figure 13 is a diagram showing the influence of the angle between the optical axis of the upper radiation thermometer and the main surface of the semiconductor wafer on the apparent emissivity of the semiconductor wafer. FIG. 14 is a diagram for explaining crack determination based on the temperature rise duration of the semiconductor wafer.
S1:步驟 S1: Steps
S2:步驟 S2: Step
S3:步驟 S3: Steps
S4:步驟 S4: Steps
S5:步驟 S5: Steps
S6:步驟 S6: Steps
S7:步驟 S7: Steps
S8:步驟 S8: Steps
S9:步驟 S9: Steps
S10:步驟 S10: Steps
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| JP2017-235948 | 2017-12-08 |
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| US20150092814A1 (en) | 2013-10-01 | 2015-04-02 | Infineon Technologies Ag | Method of examining a substrate and corresponding device |
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| US20150092814A1 (en) | 2013-10-01 | 2015-04-02 | Infineon Technologies Ag | Method of examining a substrate and corresponding device |
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