TWI828382B - Voltage detector device and method for preventing system failure - Google Patents

Abstract

A voltage detector device includes a reference voltage latch circuit, first and second voltage detector, and a digital circuit. The reference voltage latch circuit outputs one of first and second sets of reference voltages as a third set of reference voltages according to a selection signal, and selectively to be reset or to continue outputting the one of first and second sets of reference voltages to be the third set of reference voltages according to a first detection signal. The first set of reference voltages is lower than the second set of reference voltages. The first voltage detector generates the first detection signal according to a fourth set of reference voltages and an input voltage, in which the fourth set of reference voltages is lower than or equal to the first set of reference voltages. The second voltage detector generates a second detection signal according to the third set of reference voltages and the input voltage. The digital circuit outputs the selection signal according to the second detection signal.

Description

Voltage detection device and method to prevent system failure

This case is about voltage detection devices, especially voltage detection devices that can prevent electronic circuits from malfunctioning due to sudden power on and off and methods of preventing system failures.

In existing electronic devices, if the power supply voltage or its internal voltage experiences an instantaneous voltage drop due to sudden power on or off, the electronic circuit or circuit system in the electronic device may malfunction or operate incorrectly. In the existing technology, a single set of reference voltages is used to detect whether there is a voltage drop in the power supply voltage or the internal voltage. However, if the voltage drop is not large enough, the above-mentioned voltage detection mechanism cannot correctly determine that the voltage is abnormal, so that the electronic circuit and/or circuit system may still malfunction.

In some embodiments, one of the purposes of this case is to provide a voltage detection device and a method to prevent system failure, which can improve the accuracy of voltage detection and improve the shortcomings of the previous technology.

In some implementations, the voltage detection device includes a reference voltage latch circuit, a first voltage detector, a second voltage detector and a digital circuit. The reference voltage latch circuit outputs one of a first set of reference voltages and a second set of reference voltages as a third set of reference voltages according to a selection signal, and selectively resets according to a first detection signal. Or the one of the first set of reference voltages and the second set of reference voltages is continuously output as the third set of reference voltages, wherein the first set of reference voltages is lower than the second set of reference voltages. The first voltage detector generates the first detection signal according to a fourth set of reference voltages and an input voltage, wherein the fourth set of reference voltages are lower than or the same as the first set of reference voltages. The second voltage detector generates a second detection signal based on the third set of reference voltages and the input voltage. The digital circuit generates the selection signal according to the second detection signal.

In some implementations, the method for preventing system failure includes the following operations: outputting one of a first set of reference voltages and a second set of reference voltages as a third set of reference voltages according to a selection signal, wherein the first set of reference voltages is One set of reference voltages is lower than the second set of reference voltages; selectively reset or continuously output the first set of reference voltages and the second set of reference voltages as the first set of reference voltages according to a first detection signal. Three sets of reference voltages; comparing a fourth set of reference voltages with an input voltage to generate the first detection signal, wherein the input voltage is used to drive a circuit system, and the fourth set of reference voltages are lower than or the same as the first set of reference voltages voltage; compare the third set of reference voltages with the input voltage to generate a second detection signal; and generate the selection signal according to the second detection signal.

Regarding the characteristics, implementation and functions of this case, the preferred embodiments are described in detail below with reference to the drawings.

100:Voltage detection device

110: Reference voltage latch circuit

120,130: Voltage detector

140:Digital circuit

310: Trigger

311: Anti-and gate

312:Inverter

320: flip-flop

330,510:Mux

410,420,520: Comparator

430:Latch

600:Methods to Prevent System Failures

CLK: clock signal

P1: Default value

S1: signal

S610, S620, S630, S640, S650: Operation

SD1, SD2: detection signal

SEL: select signal

SR: reset signal

SS: setting signal

ST: trigger signal

SW: switch signal

V3,VH1~VH4,VL1~VL4: voltage

VIN: input voltage

VREF1: The first set of reference voltages

VREF2: The second set of reference voltage

VREF3: The third set of reference voltage

VREF4: The fourth group of reference voltage

t1~t4: time

[Fig. 1] is a schematic diagram of a voltage detection device drawn according to some embodiments of this case; [Fig. 2] is a schematic diagram of the waveforms of multiple signals in Fig. 1 according to some embodiments of this case; [Fig. 3] is a schematic diagram of a voltage detection device according to some embodiments of this case. Embodiment Draw a schematic diagram of the reference voltage latch circuit in Figure 1; [Figure 4] is a schematic diagram of the voltage detector in Figure 1 according to some embodiments of the present case; [Fig. 5] is a diagram drawn according to some embodiments of the present case A schematic diagram of the voltage detector in 1; and [Fig. 6] is a flow chart of a method for preventing system failure according to some embodiments of this case.

All words used in this article have their ordinary meanings. The definitions of the above words in commonly used dictionaries, and the use examples of any of the words discussed here in the content of this case are only examples and should not limit the scope and meaning of this case. Likewise, this case is not limited to the various embodiments shown in this specification.

As used in this article, "coupling" or "connection" can refer to two or more components that are in direct physical or electrical contact with each other, or that are in indirect physical or electrical contact with each other. It can also refer to two or more components. Components interact or act with each other. As used herein, the term "circuit" may refer to a device consisting of at least one transistor and/or at least one active and passive component connected in a certain manner to process signals.

Figure 1 is a schematic diagram of a voltage detection device 100 drawn according to some embodiments of this case. In some embodiments, the voltage detection device 100 can detect the input voltage VIN to prevent the circuit system from malfunctioning in situations such as sudden power on and off. In some embodiments, the input voltage VIN can be used to drive a circuit system. For example, the input voltage VIN can be, but is not limited to, a supply voltage of a digital circuit system, a driving voltage used by an input-output interface circuit system, and so on.

The voltage detection device 100 includes a reference voltage latch circuit 110, a voltage detector 120, a voltage detector 130 and a digital circuit 140. The reference voltage latch circuit 110 can output one of the first set of reference voltage VREF1 and the second set of reference voltage VREF2 as a third set of reference voltage VREF3 according to the selection signal SEL, wherein the first set of reference voltage VREF1 is lower than the second set of reference voltage VREF3. Reference voltage VREF2. For example, the first set of reference voltages VREF1 includes voltages VH1 and voltages VL1, and the second set of reference voltages VREF2 includes voltages VH2 and voltages VL2. Voltage VH1 is higher than voltage VL1 and lower than voltage VH2, and voltage VL2 is lower than voltage VH2 and higher than voltage VL1. For example, voltage VH2 may be set to about 1.58 volts, voltage VL2 may be set to about 1.44 volts, voltage VH1 may be set to about 1.34 volts, and voltage VL1 may be set to about 1.3 volts. The voltage values mentioned above are only examples and are not limited to this case. The reference voltage latch circuit 110 may output the voltage VH1 and the voltage VL1 respectively as the voltage VH3 and the voltage VL3 in the third group of reference voltages VREF3 according to the selection signal SEL, or output the voltage VH2 and the voltage VL2 as the voltage VH3 and the voltage VL3 respectively.

The reference voltage latch circuit 110 can store (or latch) the selection signal SEL as a switching signal (for example, the switching signal SW in FIG. 3) according to the default value P1 corresponding to the clock signal CLK and the input voltage VIN, and according to the switching signal Output the third set of reference voltage VREF3. Furthermore, the reference voltage latch circuit 110 can also selectively reset according to the detection signal SD1, or continuously output the one of the first set of reference voltage VREF1 and the second set of reference voltage VREF2 as the third set of reference voltage. VREF3. For example, if the detection signal SD1 indicates that the input voltage VIN is not lower than the fourth set of reference voltage VREF4 described later (for example, if the fourth set of reference voltage VREF4 is the same as the first set of reference voltage VREF1, the condition here refers to the input voltage VIN not lower than the lower limit of the first set of reference voltage VREF1, that is, voltage VL1), the reference voltage latch circuit 110 can continue to output the previously selected set of reference voltages (for example, the second set of reference voltage VREF2) as the third set. Reference voltage VREF3. Or, if the detection signal SD1 indicates that the input voltage VIN is lower than the fourth set of reference voltage VREF4 described later (for example, if the fourth set of reference voltage VREF4 is the same as the first set of reference voltage VREF4 Taking the voltage VREF1 (where the condition refers to the input voltage VIN being lower than the voltage VL1), the reference voltage latch circuit 110 can be reset to clear the internal circuit settings and reselect a set of reference voltages. Detailed operations of the reference voltage latch circuit 110 will be described later with reference to FIG. 2 and/or FIG. 3 .

The voltage detector 120 can compare the input voltage VIN with a fourth set of reference voltages VREF4 to generate the detection signal SD1. In some embodiments, if some circuits in the system are set to operate at a lower voltage, the fourth set of reference voltages VREF4 can be set lower than the first set of reference voltages VREF1. For example, the upper limit of the fourth set of reference voltages VREF4 is low. at voltage VH1, and the lower limit of the fourth set of reference voltage VREF4 is lower than voltage VL1. In some embodiments, the upper limit of the fourth group of reference voltage VREF4 can be set to 0.6~0.9 (eg, about 0.75) times of the voltage VH1, and the lower limit of the fourth group of reference voltage VREF4 can be set to 0.6~0.9 of the voltage VL1 (For example, it can be about 0.75) times. In some embodiments, the fourth set of reference voltages VREF4 may be set to be the same as the first set of reference voltages VREF1. For ease of understanding, in the following embodiments, the fourth set of reference voltage VREF4 is the same as the first set of reference voltage VREF1 as an example, but the present case is not limited to this. Under the condition that the fourth set of reference voltage VREF4 is the same as the first set of reference voltage VREF1, the voltage detector 120 can compare the input voltage VIN with the first set of reference voltage VREF1 (in other embodiments, it can be replaced by a voltage lower than the first set of reference voltage VREF1). A set of reference voltages VREF1 is compared with another set of voltages to generate a detection signal SD1. The detection signal SD1 can indicate whether the input voltage VIN is higher than the voltage VH1 or lower than the voltage VL1. Similarly, the voltage detector 130 can generate the detection signal SD2 according to the third set of reference voltage VREF3 and the input voltage VIN. For example, the voltage detector 130 may compare the input voltage VIN with the third set of reference voltages VREF3 to generate the detection signal SD2. The detection signal SD2 can indicate whether the input voltage VIN is higher than the voltage VH2 or lower than the voltage VL2. If the input voltage VIN is higher than the voltage VH2, it means that the input voltage VIN has risen to a target level and stabilized.

The digital circuit 140 generates the selection signal SEL according to the detection signal SD2. In some embodiments, the digital circuit 140 is further controlled by a software (or firmware) in the system to switch the selection signal SEL under a preset condition. In some embodiments, the digital circuit 140 is provided in an electronic device including the voltage detection device 100, such as a control circuit, a central processing unit, etc. In some embodiments, the digital circuit 140 may include a register that stores control values or parameters to control the operation of the voltage detection device 100 . The preset conditions for switching the selection signal SEL will be described later with reference to FIG. 2 .

FIG. 2 is a schematic diagram of waveforms of multiple signals in FIG. 1 according to some embodiments of the present invention. During the initial period (for example, when the system is first started), the digital circuit 140 outputs the selection signal SEL (not shown) with a first value (for example, a logic value of 0), so that the reference voltage latch circuit 110 sets the first set of reference voltages VREF1 The output is the third set of reference voltage VREF3. Under this condition, the level of voltage VH3 is the same as voltage VH1, and the level of voltage VL3 is the same as voltage VL1. At time t1, the input voltage VIN begins to be higher than the voltage VH3, causing both the detection signal SD1 and the detection signal SD2 to switch from a low level (corresponding to a logic value of 0) to a high level (corresponding to a logic value of 1). At time t2, under the control of the software or firmware in the system, the digital circuit 140 outputs the selection signal SEL with a second value (for example, a logic value 1), so that the reference voltage latch circuit 110 switches to SEL according to the selection signal SEL. The second set of reference voltage VREF2 is output as the third set of reference voltage VREF3. Under this condition, the level of voltage VH3 will increase to voltage VH2, and the level of voltage VL3 will increase to voltage VL2. In other words, if the detection signal SD2 meets a preset condition (for example, the detection signal SD2 is within a predetermined period after the reference voltage latch circuit 110 outputs the first set of reference voltages VREF1 to the third set of reference voltages VREF3 ( For example, there is a preset level (for example, a high level) during the period between time t1 and time t2). The software or firmware in the system will control the digital circuit 140 to adjust the selection signal SEL so that the reference voltage latch circuit 110 switches to output the second set of reference voltage VREF2 as the third set of reference voltage VREF3.

Then, at time t3, due to sudden power on and off, the input voltage VIN is lower than the voltage VL3 (for example, lower than the voltage VL2 but not lower than the voltage VL1). Under this condition, the detection signal SD2 will switch to a low level to notify the circuit system to reset to avoid circuit system failure. At the same time, since the input voltage VIN is not lower than the voltage VL1, the detection signal SD1 still maintains a high level. Under this condition, the reference voltage latch circuit 110 can continuously output the second set of reference voltage VREF2 as the third set of reference voltage VREF3. In this way, it can be ensured that the circuit system will not cause erroneous operation or failure due to this voltage drop. At time t4, the input voltage VIN is higher than the voltage VH3 again, causing the detection signal SD2 to switch to a high level. In this way, the circuit system can continue its original operation. On the other hand, if the input voltage VIN is lower than the voltage VL3 and the voltage VL1 at time t3, both the detection signal SD1 and the detection signal SD2 will switch to a low level. Under this condition, it means that the level of the input voltage VIN is too low, and the reference voltage latch circuit 110 can be reset according to the detection signal SD1 (for example, to clear the internal circuit settings) to reselect a voltage in the next operation. set of reference voltages and output a third set of reference voltages VREF3 accordingly.

In some related technologies, the voltage detection mechanism in the electronic device only uses a set of reference voltages (for example, a second set of reference voltages VREF2) to determine whether the input voltage suddenly becomes low. However, if the voltage drop of the input voltage is not obvious (for example, the input voltage VIN is lower than the voltage VH2 but higher than the voltage VL2), the voltage detection mechanism still misjudges that the input voltage still has a normal level and does not perform other operations. However, actual circuit systems may malfunction or generate erroneous signals due to this voltage drop. Compared with the above technology, in some embodiments of the present case, the voltage detection device 100 uses two sets of reference voltages, and switches to use a reference voltage with a higher level to determine the input voltage VIN within a period of time after power-on. Does the above pressure drop occur? In this way, it can be more accurately determined whether there is a voltage drop in the input voltage VIN to avoid system failure.

FIG. 3 is a schematic diagram of the reference voltage latch circuit 110 in FIG. 1 according to some embodiments of the present case. The reference voltage latch circuit 110 includes a flip-flop 310 , a flip-flop 320 and a multiplexer 330 . The flip-flop 310 generates the trigger signal ST according to the clock signal CLK and the preset value P1. In some embodiments, the preset value P1 may be the target level of the input voltage VIN. For example, if the input voltage VIN is preset to have a voltage of 1.8 volts in a steady state, the preset value P1 may be a voltage of 1.8 volts. The flip-flop 310 includes an NAND gate 311 and an inverter 312 . The NAND gate 311 generates the signal S1 according to the clock signal CLK and the preset value P1. The inverter 312 generates the trigger signal ST according to the signal S1.

The flip-flop 320 outputs the selection signal SEL as the switching signal SW according to the trigger signal ST, and selectively continuously outputs the selection signal SEL as the switching signal SW according to the detection signal SD1, or resets the switching signal SW. For example, the flip-flop 320 can be a D-type flip-flop with a reset input terminal (labeled R), wherein the reset input terminal receives the detection signal SD1. When the detection signal SD1 has a high level, the flip-flop 320 can sequentially output the selection signal SEL as the switching signal SW according to the trigger signal ST. When the detection signal SD1 has a low level, the flip-flop 320 can reset the switching signal SW (for example, reset the signal value of the switching signal SW to a logic value 0). On the other hand, as shown in FIG. 2 , when the input voltage VIN is lower than the voltage VL2 but not lower than the voltage VL1 , the detection signal SD1 still has a high level. In this way, the flip-flop 320 can continuously output the selection signal SEL as the switching signal SW according to the trigger signal ST. In other words, when the input voltage VIN is not too low (that is, not lower than the voltage VL1), the flip-flop 320 can continue to latch the selection signal SEL as the switching signal SW. Until the input voltage VIN is too low (that is, lower than the voltage VL1), the detection signal SD1 has a low level, causing the flip-flop 320 to reset the signal value of the switching signal SW.

The multiplexer 330 may output the first set of reference voltages VREF1 or the second set of reference voltages VREF2 as the third set of reference voltages VREF3 according to the switching signal SW. For example, multiplexer circuit 330 includes multiple switches. Some of the switches are turned on when the switching signal SW has a logic value of 0 to switch the voltage VH1 is output as voltage VH3 and voltage VL1 is output as voltage VL3. Another part of the switches are turned on when the switching signal SW has a logic value of 1 to output the voltage VH2 as the voltage VH3 and the voltage VL2 as the voltage VL3.

FIG. 4 is a schematic diagram of the voltage detector 130 in FIG. 1 according to some embodiments of the present invention. In this example, the voltage detector 130 includes a comparator 410 , a comparator 420 and a latch 430 . The comparator 410 can compare the input voltage VIN and the voltage VH3 to generate the setting signal SS. The comparator 420 can compare the input voltage VIN and the voltage VL3 to generate the reset signal SR. The latch 430 can generate the detection signal SD2 according to the setting signal SS and the reset signal SR. For example, the latch 430 can be an S-R latch, the setting input terminal (labeled S) of which can receive the setting signal SS and the reset input terminal (labeled R) can receive the reset signal SR. In this way, when the input voltage VIN is higher than the voltage VH3, the latch 430 can output the detection signal SD2 with a high level. Alternatively, when the input voltage VIN is lower than the voltage VL3, the latch 430 may output the detection signal SD2 with a low level.

FIG. 5 is a schematic diagram of the voltage detector 130 in FIG. 1 according to some embodiments of the present invention. In this example, the voltage detector 130 includes a multiplexer 510 and a comparator 520 . The multiplexer 510 selectively outputs the voltage VH3 or the voltage VL3 as the voltage V3 according to the detection signal SD2. For example, the multiplexer 510 includes a first switch and a second switch. When the detection signal SD1 has a low level (for example, a logic value of 0), the first switch is turned on to output the voltage VH3 as the voltage V3. Or, when the detection signal SD1 has a high level (for example, a logic value of 1), the second switch is turned on to output the voltage VL3 as the voltage V3. The comparator 520 compares the input voltage VIN with the voltage V3 to generate the detection signal SD2. In this way, when the input voltage VIN is higher than the voltage VH3, the detection signal SD2 can have a high level. Alternatively, when the input voltage VIN is lower than the voltage VL3, the detection signal SD2 may have a low level.

In some embodiments, the implementation of the voltage detector 120 may refer to the voltage detector 130 in FIG. 4 and FIG. 5 . For example, if you want to implement the voltage detector 120, you can replace the voltage VH3 in Figures 4 and 5 with the voltage VH1, and replace the voltage VL3 with the voltage VL1 (or replace it with another voltage lower than the first set of reference voltages VREF1. a set of voltages). Other operations and settings are the same as the examples in FIG. 4 and FIG. 5 , so the details will not be repeated here.

Figure 6 is a flow chart of a method 600 for preventing system failure according to some embodiments of this case. In operation S610, one of the first set of reference voltages and the second set of reference voltages is output as a third set of reference voltages according to the selection signal, wherein the first set of reference voltages is lower than the second set of reference voltages. In operation S620, selectively reset or continuously output the first set of reference voltages and the second set of reference voltages as a third set of reference voltages according to the first detection signal. In operation S630, a fourth set of reference voltages is compared with an input voltage to generate a first detection signal, where the input voltage is used to drive the circuit system, and the fourth set of reference voltages is lower than or the same as the first set of reference voltages. In operation S640, the third set of reference voltages and the input voltage are compared to generate a second detection signal. In operation S650, a selection signal is generated according to the second detection signal.

The description of the above multiple operations can refer to the aforementioned embodiments, so the details will not be repeated. The multiple operations of the method 600 for preventing system failure are only examples, and are not limited to be performed in the order in this example. Without violating the operating mode and scope of each embodiment of the present case, various operations under the method 600 for preventing system failure can be appropriately added, replaced, omitted, or executed in a different order (for example, they can be executed simultaneously or partially simultaneously. implement).

In summary, the voltage detection device and the method to prevent system failure in some embodiments of this case can use multiple sets of reference voltages to improve the accuracy of detecting voltage drops, and use latches, etc. Circuit concept to latch the currently used reference voltage. This ensures that the circuit system can correctly reset due to a sudden voltage drop, thereby ensuring that the operation of the circuit system will not malfunction.

Although the embodiments of this case are as described above, these embodiments are not intended to limit this case. Those with ordinary knowledge in the technical field can make changes to the technical features of this case based on the explicit or implicit contents of this case. All these changes All may fall within the scope of patent protection sought in this case. In other words, the scope of patent protection in this case must be determined by the scope of the patent application in this specification.

100:Voltage detection device

110: Reference voltage latch circuit

120,130: Voltage detector

140:Digital circuit

CLK: clock signal

P1: Default value

SD1, SD2: detection signal

SEL: select signal

VH1~VH4, VL1~VL4: voltage

VIN: input voltage

VREF1: The first set of reference voltages

VREF2: The second set of reference voltage

VREF3: The third set of reference voltage

VREF4: The fourth group of reference voltage

Claims (10)

A voltage detection device includes: a reference voltage latch circuit, which outputs one of a first set of reference voltages and a second set of reference voltages as a third set of reference voltages according to a selection signal, and according to a first A detection signal is selectively reset to re-output the third set of reference voltages from the first set of reference voltages and the second set of reference voltages, or to re-output the first set of reference voltages and the second set of reference voltages. The one of them continues to output the third set of reference voltages, wherein the first set of reference voltages is lower than the second set of reference voltages; a first voltage detector generates a signal based on a fourth set of reference voltages and an input voltage. The first detection signal, wherein the fourth set of reference voltages is lower than or the same as the first set of reference voltages, and the input voltage is used to drive a circuit system; a second voltage detector, according to the third set of The reference voltage and the input voltage generate a second detection signal; and a digital circuit generates the selection signal according to the second detection signal. The voltage detection device of claim 1, wherein if the first detection signal indicates that the input voltage is not lower than the fourth set of reference voltages, the reference voltage latch circuit separates the first set of reference voltages from the second set of reference voltages. The one of the reference voltages is continuously output as the third set of reference voltages. The voltage detection device of claim 1, wherein if the first detection signal indicates that the input voltage is lower than the fourth set of reference voltages, the reference voltage latch circuit is reset. The voltage detection device of claim 1, wherein if the second detection signal has a preset value within a predetermined period after the reference voltage latch circuit outputs the first set of reference voltages to the third set of reference voltages, level, the reference voltage latch circuit switches to output the second set of reference voltages as the third set of reference voltages according to the selection signal. The voltage detection device of claim 1, wherein the reference voltage latch circuit further stores the selection signal as a switching signal according to a clock signal and a preset value corresponding to the input voltage, and outputs the first switching signal according to the switching signal. Three sets of reference voltages. The voltage detection device of claim 1, wherein the reference voltage latch circuit includes: a flip-flop that generates a trigger signal based on a clock signal and a preset value corresponding to the input voltage; a flip-flop that generates a trigger signal based on the trigger The signal outputs the selection signal as a switching signal and resets the switching signal according to the first detection signal; and a multiplexer switches the first set of reference voltages and the second set of reference voltages according to the switching signal. One of the outputs is the third set of reference voltages. For example, the voltage detection device of claim 6, wherein the flip-flop includes: an NAND gate that generates a first signal based on the clock signal and the preset value; and an inverter that generates the first signal based on the first signal. Trigger signal. The voltage detection device of claim 1, wherein the second voltage detector includes: a first comparator that compares the input voltage with a first voltage in the third set of reference voltages to generate a setting signal; a second comparator that compares the input voltage with a second voltage in the third set of reference voltages to generate a reset signal, wherein the first voltage is higher than the second voltage; and a latch The lock generates the second detection signal according to the setting signal and the reset signal. The voltage detection device of claim 1, wherein the second voltage detector includes: a multiplexer that selectively converts a first voltage or a first voltage in the third set of reference voltages according to the second detection signal. The second voltage output is a third voltage, wherein the first voltage is higher than the second voltage; and a comparator compares the input voltage with the third voltage to generate the second detection signal. A method for preventing system failure, including: outputting one of a first set of reference voltages and a second set of reference voltages as a third set of reference voltages according to a selection signal, wherein the first set of reference voltages are lower than the a second set of reference voltages; selectively reset according to a first detection signal to re-output the third set of reference voltages from the first set of reference voltages and the second set of reference voltages or to continuously output the first set of reference voltages; The output of the reference voltage and the second set of reference voltages is the third set of reference voltages; a fourth set of reference voltages and an input voltage are compared to generate the first detection signal, wherein the input voltage is used to drive a a circuit system, wherein the fourth set of reference voltages is lower than or the same as the first set of reference voltages; comparing the third set of reference voltages with the input voltage to generate a second detection signal; and based on the second detection signal Generate the selection signal.

Images