TWI826076B - Display device - Google Patents

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TWI826076B
TWI826076B TW111140957A TW111140957A TWI826076B TW I826076 B TWI826076 B TW I826076B TW 111140957 A TW111140957 A TW 111140957A TW 111140957 A TW111140957 A TW 111140957A TW I826076 B TWI826076 B TW I826076B
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light
layer
shielding structure
pad
display device
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TW111140957A
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TW202418254A (en
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宋文清
黃國有
林容甫
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友達光電股份有限公司
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Priority to CN202310197606.8A priority patent/CN115966588A/en
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Abstract

A display device includes a pixel circuit substrate and a light emitting component. The pixel circuit substrate includes a substrate, a metal layer and a light shielding structure. The light shielding structure is formed on the metal layer. A stack of the light shielding structure and the metal layer has a reflectivity of 3%-30% for visible light. The light emitting component is electrically connected to the pixel circuit substrate. The light shielding structure is partially overlapping with the light emitting component in the normal direction of the top surface of the substrate.

Description

顯示裝置display device

本發明是有關於一種顯示裝置。 The present invention relates to a display device.

隨著科技的發展,市面上出現了各種不同類型的顯示裝置。為了使建築窗戶、車窗等透明的結構具有顯示畫面的功能,目前許多廠商致力於發展透明顯示裝置。一般而言,透明顯示裝置包括穿透區與非穿透區,其中穿透區中包含許多發光元件,而這些發光元件可以用來顯示畫面。 With the development of technology, various types of display devices have appeared on the market. In order to enable transparent structures such as building windows and car windows to display images, many manufacturers are currently committed to developing transparent display devices. Generally speaking, a transparent display device includes a transmissive area and a non-transmissive area, where the transmissive area contains many light-emitting elements, and these light-emitting elements can be used to display images.

本發明提供一種顯示裝置,能改善發光元件所發出的光線被畫素電路反射所導致的漏光問題。 The present invention provides a display device that can improve the light leakage problem caused by the light emitted by the light-emitting element being reflected by the pixel circuit.

本發明的至少一實施例提供一種顯示裝置。顯示裝置包括畫素電路基板以及發光元件。畫素電路基板包括基板、金屬層以及遮光結構。遮光結構形成於金屬層上。遮光結構與金屬層之堆疊對於可見光的反射率為3%~30%。發光元件電性連接至畫素電路基板。遮光結構在基板的頂面的法線方向上部分重疊於發光 元件。 At least one embodiment of the present invention provides a display device. The display device includes a pixel circuit substrate and a light-emitting element. The pixel circuit substrate includes a substrate, a metal layer and a light-shielding structure. The light-shielding structure is formed on the metal layer. The stacking of the light-shielding structure and the metal layer has a reflectivity of 3% to 30% for visible light. The light-emitting element is electrically connected to the pixel circuit substrate. The light-shielding structure partially overlaps the light-emitting structure in the normal direction of the top surface of the substrate. element.

基於上述,由於遮光結構與金屬層之堆疊對於可見光的反射率為3%~30%,可以減少發光元件所發出之光線被畫素電路反覆反射的機率,進而改善顯示裝置的漏光問題。 Based on the above, since the stacking of the light-shielding structure and the metal layer has a reflectivity of 3% to 30% for visible light, the probability of light emitted by the light-emitting element being repeatedly reflected by the pixel circuit can be reduced, thereby improving the light leakage problem of the display device.

1,2,3,4,5:顯示裝置 1,2,3,4,5: display device

10:畫素電路基板 10: Pixel circuit substrate

20:發光元件 20:Light-emitting components

20a:藍色發光元件 20a: blue light emitting element

20b:綠色發光元件 20b: Green light-emitting component

20c:紅色發光元件 20c: red light-emitting component

100:基板 100:Substrate

102:緩衝層 102:Buffer layer

110:閘極絕緣層 110: Gate insulation layer

120:層間介電層 120: Interlayer dielectric layer

130:第一絕緣層 130: First insulation layer

132:第一阻障層 132: First barrier layer

140:第二絕緣層 140: Second insulation layer

142:第二阻障層 142: Second barrier layer

144:第三阻障層 144:Third barrier layer

144H,152H,154H,400H,410H:通孔 144H, 152H, 154H, 400H, 410H: through hole

150:擋牆層 150:Retaining wall layer

150H:開口 150H:Open

150s:側壁 150s: Sidewall

150t:頂面 150t:Top surface

152:第四阻障層 152: The fourth barrier layer

154:保護層 154:Protective layer

202:第一電極 202:First electrode

204:第二電極 204: Second electrode

400:金屬層 400:Metal layer

410:遮光結構 410:Light-shielding structure

410H1:第一開孔 410H1: First opening

410H2:第二開孔 410H2: Second opening

A-A’:線 A-A’: line

CL:共用訊號線 CL: Common signal line

G:閘極 G: Gate

M0:輔助導電層 M0: auxiliary conductive layer

M1:第一導電層 M1: first conductive layer

M2:第二導電層 M2: Second conductive layer

M3:第三導電層 M3: The third conductive layer

M4:第四導電層 M4: The fourth conductive layer

ND:法線方向 ND: normal direction

P1:第一接墊 P1: first pad

P2:第二接墊 P2: Second pad

S1:第一連接材 S1: first connecting material

S2:第二連接材 S2: Second connecting material

SM:半導體圖案 SM: semiconductor pattern

SD1:第一源極/汲極 SD1: first source/drain

SD2:第二源極/汲極 SD2: Second source/drain

SL1:第一訊號線 SL1: first signal line

SL2:第二訊號線 SL2: Second signal line

SL3:第三訊號線 SL3: The third signal line

T1:第一轉接結構 T1: first transfer structure

T2:第二轉接結構 T2: Second transfer structure

圖1A是依照本發明的一實施例的一種顯示裝置的上視示意圖。 FIG. 1A is a schematic top view of a display device according to an embodiment of the present invention.

圖1B是沿著圖1A的線A-A’的剖面示意圖。 Fig. 1B is a schematic cross-sectional view along line A-A' of Fig. 1A.

圖2是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 FIG. 2 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

圖3是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 FIG. 3 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

圖4是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 FIG. 4 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

圖5是依照本發明的一實施例的一種顯示裝置的剖面示意圖。 FIG. 5 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

圖6是依照本發明的一實施例的金屬層與遮光結構之疊層的反射率與光線波長關係圖。 FIG. 6 is a graph showing the relationship between reflectivity and light wavelength of a stack of a metal layer and a light-shielding structure according to an embodiment of the present invention.

圖1A是依照本發明的一實施例的一種顯示裝置1的上視示意圖。圖1B是沿著圖1A的線A-A’的剖面示意圖。顯示裝置1包括穿透區TR與位於穿透區TR周圍的非穿透區NTR,其中非穿透區NTR中設置有電路,而穿透區TR則可以透光。換句話說,顯示裝置1為透明顯示裝置。為了方便說明,圖1A省略繪示了非穿透區NTR中的部分電路。非穿透區NTR中的線路布局可以依照實際需求而進行調整。 FIG. 1A is a schematic top view of a display device 1 according to an embodiment of the present invention. Fig. 1B is a schematic cross-sectional view along line A-A' of Fig. 1A. The display device 1 includes a transmissive region TR and a non-transmissive region NTR located around the transmissive region TR, wherein a circuit is provided in the non-transmissive region NTR, and the transmissive region TR can transmit light. In other words, the display device 1 is a transparent display device. For convenience of explanation, FIG. 1A omits part of the circuit in the non-penetrating region NTR. The line layout in the non-penetrating zone NTR can be adjusted according to actual needs.

請參考圖1A與圖1B,顯示裝置1包括畫素電路基板10以及發光元件20。 Please refer to FIG. 1A and FIG. 1B . The display device 1 includes a pixel circuit substrate 10 and a light-emitting element 20 .

畫素電路基板10包括基板100、金屬層400以及遮光結構410。在本實施例中,畫素電路基板10還包括輔助導電層M0、緩衝層102、半導體圖案SM、閘極絕緣層110、第一導電層M1、層間介電層120、第二導電層M2、第一絕緣層130、第一阻障層132、第三導電層M3、第二絕緣層140、第二阻障層142、第四導電層M4、第三阻障層144、擋牆層150、第四阻障層152以及保護層154。 The pixel circuit substrate 10 includes a substrate 100, a metal layer 400 and a light-shielding structure 410. In this embodiment, the pixel circuit substrate 10 further includes an auxiliary conductive layer M0, a buffer layer 102, a semiconductor pattern SM, a gate insulating layer 110, a first conductive layer M1, an interlayer dielectric layer 120, a second conductive layer M2, The first insulating layer 130, the first barrier layer 132, the third conductive layer M3, the second insulating layer 140, the second barrier layer 142, the fourth conductive layer M4, the third barrier layer 144, the barrier layer 150, The fourth barrier layer 152 and the protective layer 154.

基板100之材質可為玻璃、石英、有機聚合物或不透光/反射材料(例如:導電材料、金屬、晶圓、陶瓷或其他可適用的材料)或是其他可適用的材料。若使用導電材料或金屬時,則在基板100上覆蓋一層絕緣層(未繪示),以避免短路問題。 The material of the substrate 100 may be glass, quartz, organic polymer, opaque/reflective material (such as conductive material, metal, wafer, ceramic or other applicable materials) or other applicable materials. If conductive materials or metals are used, an insulating layer (not shown) is covered on the substrate 100 to avoid short circuit problems.

輔助導電層M0位於基板100上。在本實施例中,輔助導電層M0直接形成於基板100上,但本發明不以此為限。在其他實 施例中,輔助導電層M0與基板100之間夾有其他絕緣層(未繪示)。在一些實施例中,輔助導電層M0的材料包括金屬或其他合適的遮光材料。 The auxiliary conductive layer M0 is located on the substrate 100 . In this embodiment, the auxiliary conductive layer M0 is directly formed on the substrate 100, but the invention is not limited thereto. In other cases In the embodiment, other insulating layers (not shown) are sandwiched between the auxiliary conductive layer M0 and the substrate 100 . In some embodiments, the material of the auxiliary conductive layer M0 includes metal or other suitable light-shielding materials.

緩衝層102位於輔助導電層M0以及基板100上。在一些實施例中,緩衝層102的材料包括氧化矽、氮化矽、氮氧化矽、有機絕緣材料或其他合適的絕緣材料。 The buffer layer 102 is located on the auxiliary conductive layer M0 and the substrate 100 . In some embodiments, the material of the buffer layer 102 includes silicon oxide, silicon nitride, silicon oxynitride, organic insulating materials or other suitable insulating materials.

半導體圖案SM位於緩衝層102上。在本實施例中,半導體圖案SM於基板100的頂面的法線方向ND上部分重疊於輔助導電層M0。在一些實施例中,半導體圖案SM為單層或多層結構,其包含非晶矽、多晶矽、微晶矽、單晶矽、有機半導體材料、氧化物半導體材料(例如:銦鋅氧化物、銦鎵鋅氧化物或是其他合適的材料、或上述材料之組合)或其他合適的材料或上述材料之組合。 The semiconductor pattern SM is located on the buffer layer 102 . In this embodiment, the semiconductor pattern SM partially overlaps the auxiliary conductive layer M0 in the normal direction ND of the top surface of the substrate 100 . In some embodiments, the semiconductor pattern SM is a single-layer or multi-layer structure, which includes amorphous silicon, polycrystalline silicon, microcrystalline silicon, single crystal silicon, organic semiconductor materials, oxide semiconductor materials (for example: indium zinc oxide, indium gallium Zinc oxide or other suitable materials or combinations of the above materials) or other suitable materials or combinations of the above materials.

閘極絕緣層110位於半導體圖案SM以及緩衝層102上。在一些實施例中,閘極絕緣層110的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The gate insulating layer 110 is located on the semiconductor pattern SM and the buffer layer 102 . In some embodiments, the material of the gate insulating layer 110 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第一導電層M1位於閘極絕緣層110上。第一導電層M1包括閘極G以及第一訊號線SL1。在一些實施例中,第一導電層M1還包括其他導電結構。半導體圖案SM在法線方向ND上重疊於閘極G。在一些實施例中,第一導電層M1為單層或多層結構,且包括鉻、金、銀、銅、錫、鉛、鉿、鎢、鉬、釹、鈦、鉭、鋁、 鋅等金屬、合金或上述材料之組合或其他導電材料。 The first conductive layer M1 is located on the gate insulating layer 110 . The first conductive layer M1 includes a gate G and a first signal line SL1. In some embodiments, the first conductive layer M1 also includes other conductive structures. The semiconductor pattern SM overlaps the gate G in the normal direction ND. In some embodiments, the first conductive layer M1 is a single-layer or multi-layer structure and includes chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, Zinc and other metals, alloys or combinations of the above materials or other conductive materials.

層間介電層120位於第一導電層M1以及閘極絕緣層110上。在一些實施例中,層間介電層120的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The interlayer dielectric layer 120 is located on the first conductive layer M1 and the gate insulating layer 110 . In some embodiments, the material of the interlayer dielectric layer 120 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第二導電層M2位於層間介電層120上。第二導電層M2包括第一源極/汲極SD1、第二源極/汲極SD2以及第二訊號線SL2。在一些實施例中,第二導電層M2還包括其他導電結構。第一源極/汲極SD1以及第二源極/汲極SD2透過層間介電層120以及閘極絕緣層110中的通孔而電性連接至半導體圖案SM。在一些實施例中,第二導電層M2為單層或多層結構,且包括鉻、金、銀、銅、錫、鉛、鉿、鎢、鉬、釹、鈦、鉭、鋁、鋅等金屬、合金或上述材料之組合或其他導電材料。 The second conductive layer M2 is located on the interlayer dielectric layer 120 . The second conductive layer M2 includes a first source/drain SD1, a second source/drain SD2 and a second signal line SL2. In some embodiments, the second conductive layer M2 also includes other conductive structures. The first source/drain SD1 and the second source/drain SD2 are electrically connected to the semiconductor pattern SM through the through holes in the interlayer dielectric layer 120 and the gate insulating layer 110 . In some embodiments, the second conductive layer M2 is a single-layer or multi-layer structure, and includes metals such as chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc, etc. Alloys or combinations of the above materials or other conductive materials.

第一絕緣層130位於第二導電層M2以及層間介電層120上。在一些實施例中,第一絕緣層130的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The first insulating layer 130 is located on the second conductive layer M2 and the interlayer dielectric layer 120 . In some embodiments, the material of the first insulating layer 130 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第一阻障層132位於第一絕緣層130上。在一些實施例中,第一絕緣層130包括重疊於部分第二導電層M2(例如第一源極/汲極SD1)的通孔,且第一阻障層132填入前述通孔中。在一些實施例中,第一阻障層132具有通孔,且第一阻障層132的通孔重疊於第一絕緣層130的通孔,使位於第一阻障層132之上的 其他導電結構可以透過第一阻障層132的通孔而電性連接至第二導電層M2。在一些實施例中,第一阻障層132的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The first barrier layer 132 is located on the first insulation layer 130 . In some embodiments, the first insulating layer 130 includes a through hole that overlaps a portion of the second conductive layer M2 (eg, the first source/drain electrode SD1 ), and the first barrier layer 132 is filled in the through hole. In some embodiments, the first barrier layer 132 has a through hole, and the through hole of the first barrier layer 132 overlaps the through hole of the first insulating layer 130 , so that the first barrier layer 132 has a through hole. Other conductive structures may be electrically connected to the second conductive layer M2 through the through holes of the first barrier layer 132 . In some embodiments, the material of the first barrier layer 132 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第三導電層M3位於第一絕緣層130之上。在本實施例中,第三導電層M3位於第一阻障層132上。在本實施例中,第三導電層M3包括第一轉接結構T1、第二轉接結構T2以及第三訊號線SL3。在一些實施例中,第三導電層M3還包括其他導電結構。至少部分第三導電層M3電性連接至第二導電層M2。舉例來說,第一轉接結構T1透過第一阻障層132的通孔而電性連接至第一源極/汲極SD1。在一些實施例中,第三導電層M3為單層或多層結構,且包括鉻、金、銀、銅、錫、鉛、鉿、鎢、鉬、釹、鈦、鉭、鋁、鋅等金屬、合金或上述材料之組合或其他導電材料。 The third conductive layer M3 is located on the first insulating layer 130 . In this embodiment, the third conductive layer M3 is located on the first barrier layer 132 . In this embodiment, the third conductive layer M3 includes a first transfer structure T1, a second transfer structure T2 and a third signal line SL3. In some embodiments, the third conductive layer M3 also includes other conductive structures. At least part of the third conductive layer M3 is electrically connected to the second conductive layer M2. For example, the first transfer structure T1 is electrically connected to the first source/drain SD1 through the through hole of the first barrier layer 132 . In some embodiments, the third conductive layer M3 is a single-layer or multi-layer structure, and includes metals such as chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc, etc. Alloys or combinations of the above materials or other conductive materials.

第二絕緣層140位於第三導電層M3以及第一絕緣層130之上。在本實施例中,第二絕緣層140位於第三導電層M3以及第一阻障層132上。在一些實施例中,第二絕緣層140的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The second insulating layer 140 is located on the third conductive layer M3 and the first insulating layer 130 . In this embodiment, the second insulating layer 140 is located on the third conductive layer M3 and the first barrier layer 132 . In some embodiments, the material of the second insulating layer 140 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第二阻障層142位於第二絕緣層140上。在一些實施例中,第二絕緣層140包括重疊於部分第三導電層M3(例如第一轉接結構T1以及第二轉接結構T2)的通孔,且第二阻障層142填入前述通孔中。在一些實施例中,第二阻障層142具有通孔,且 第二阻障層142的通孔重疊於第二絕緣層140的通孔,使位於第二阻障層142之上的其他導電結構可以透過第二阻障層142的通孔而電性連接至第三導電層M3。在一些實施例中,第二阻障層142的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。 The second barrier layer 142 is located on the second insulation layer 140 . In some embodiments, the second insulating layer 140 includes a through hole that overlaps part of the third conductive layer M3 (such as the first transfer structure T1 and the second transfer structure T2), and the second barrier layer 142 fills the aforementioned in the through hole. In some embodiments, the second barrier layer 142 has a via, and The through holes of the second barrier layer 142 overlap with the through holes of the second insulating layer 140, so that other conductive structures located on the second barrier layer 142 can be electrically connected to the through holes of the second barrier layer 142. The third conductive layer M3. In some embodiments, the material of the second barrier layer 142 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials.

第四導電層M4位於第二絕緣層140之上。在本實施例中,第四導電層M4位於第二阻障層142上。在本實施例中,第四導電層M4包括第一接墊P1、第二接墊P2以及共用訊號線CL。在一些實施例中,第四導電層M4還包括其他導電結構。至少部分第四導電層M4電性連接至第三導電層M3。舉例來說,第一接墊P1以及第二接墊P2分別透過第二阻障層142的通孔而電性連接至第一轉接結構T1以及第二轉接結構T2。在一些實施例中,第四導電層M4為單層或多層結構,且包括鉻、金、銀、銅、錫、鉛、鉿、鎢、鉬、釹、鈦、鉭、鋁、鋅等金屬、合金或上述材料之組合或其他導電材料。 The fourth conductive layer M4 is located on the second insulating layer 140 . In this embodiment, the fourth conductive layer M4 is located on the second barrier layer 142 . In this embodiment, the fourth conductive layer M4 includes a first pad P1, a second pad P2 and a common signal line CL. In some embodiments, the fourth conductive layer M4 also includes other conductive structures. At least part of the fourth conductive layer M4 is electrically connected to the third conductive layer M3. For example, the first pad P1 and the second pad P2 are electrically connected to the first transfer structure T1 and the second transfer structure T2 through the through holes of the second barrier layer 142 respectively. In some embodiments, the fourth conductive layer M4 is a single-layer or multi-layer structure, and includes metals such as chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc, etc. Alloys or combinations of the above materials or other conductive materials.

第三阻障層144位於第四導電層M4以及第二阻障層142上。第三阻障層144具有重疊於第一接墊P1以及第二接墊P2的一個或多個通孔144H。在本實施例中,一個通孔144H同時重疊於第一接墊P1以及第二接墊P2,但本發明不以此為限。在其他實施例中,多個通孔144H分別重疊於第一接墊P1以及第二接墊P2。在一些實施例中,第三阻障層144的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕 緣材料。在一些實施例中,多個發光元件20所對應的第二接墊P2彼此電性連接。舉例來說,第四導電層M4包括將多個第二接墊P2連接在一起的共用訊號線CL。 The third barrier layer 144 is located on the fourth conductive layer M4 and the second barrier layer 142 . The third barrier layer 144 has one or more through holes 144H overlapping the first pad P1 and the second pad P2. In this embodiment, a through hole 144H overlaps the first pad P1 and the second pad P2 at the same time, but the invention is not limited to this. In other embodiments, the plurality of through holes 144H overlap the first pad P1 and the second pad P2 respectively. In some embodiments, the material of the third barrier layer 144 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials. edge material. In some embodiments, the second pads P2 corresponding to the plurality of light-emitting elements 20 are electrically connected to each other. For example, the fourth conductive layer M4 includes a common signal line CL that connects the plurality of second pads P2 together.

擋牆層150位於基板100之上。在本實施例中,擋牆層150位於第三阻障層144上。擋牆層150具有開口150H,且開口150H適用於容納發光元件20。開口150H重疊於第一接墊P1以及第二接墊P2。在一些實施例中,擋牆層150的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。在一些實施例中,擋牆層150的厚度為0.5微米至6微米。 The retaining wall layer 150 is located on the substrate 100 . In this embodiment, the barrier layer 150 is located on the third barrier layer 144 . The barrier layer 150 has an opening 150H, and the opening 150H is suitable for accommodating the light emitting element 20 . The opening 150H overlaps the first pad P1 and the second pad P2. In some embodiments, the material of the barrier layer 150 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials. In some embodiments, the barrier layer 150 has a thickness of 0.5 microns to 6 microns.

第四阻障層152位於擋牆層150上。在一些實施例中,第四阻障層152從擋牆層150的頂面150t沿著開口150H的側壁150s延伸至開口150H的底部。在一些實施例中,位於開口150H的底部的第四阻障層152接觸第三阻障層144。第四阻障層152具有重疊於第一接墊P1以及第二接墊P2的一個或多個通孔152H。在本實施例中,一個通孔152H同時重疊於第一接墊P1以及第二接墊P2,但本發明不以此為限。在其他實施例中,多個通孔152H分別重疊於第一接墊P1以及第二接墊P2。在一些實施例中,通孔144H以及通孔152H是透過相同的微影製程與蝕刻製程所形成,因此,通孔144H的側壁對齊於通孔152H的側壁,但本發明不以此為限。在一些實施例中,第四阻障層152的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或 其他合適的絕緣材料。 The fourth barrier layer 152 is located on the retaining wall layer 150 . In some embodiments, the fourth barrier layer 152 extends from the top surface 150t of the barrier layer 150 along the sidewalls 150s of the opening 150H to the bottom of the opening 150H. In some embodiments, the fourth barrier layer 152 at the bottom of the opening 150H contacts the third barrier layer 144 . The fourth barrier layer 152 has one or more through holes 152H overlapping the first pad P1 and the second pad P2. In this embodiment, a through hole 152H overlaps the first pad P1 and the second pad P2 at the same time, but the invention is not limited to this. In other embodiments, the plurality of through holes 152H overlap the first pad P1 and the second pad P2 respectively. In some embodiments, the through hole 144H and the through hole 152H are formed through the same photolithography process and etching process. Therefore, the side walls of the through hole 144H are aligned with the side walls of the through hole 152H, but the invention is not limited thereto. In some embodiments, the material of the fourth barrier layer 152 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating material or Other suitable insulating materials.

發光元件20電性連接至畫素電路基板100。發光元件20之第一電極202與第二電極204分別電性連接至畫素電路基板100的第一接墊P1以及第二接墊P2。舉例來說,第一連接材S1連接第一電極202與第一接墊P1,且第二連接材S2連接第二電極204與第二接墊P2。在一些實施例中,第一連接材S1與第二連接材S2的材料包括導電膠、銲料或其他導電接合材料。發光元件20例如為任意形式的微型發光二極體。第一電極202與第二電極204中的一者發光元件20的陰極,且另一者為發光元件20的陽極。在本實施例中顯示裝置1包括不同顏色的發光元件20,例如藍色發光元件20a、綠色發光元件20b以及紅色發光元件20c,藉此顯示彩色畫面。 The light-emitting element 20 is electrically connected to the pixel circuit substrate 100 . The first electrode 202 and the second electrode 204 of the light-emitting element 20 are electrically connected to the first pad P1 and the second pad P2 of the pixel circuit substrate 100 respectively. For example, the first connecting material S1 connects the first electrode 202 and the first pad P1, and the second connecting material S2 connects the second electrode 204 and the second pad P2. In some embodiments, the materials of the first connecting material S1 and the second connecting material S2 include conductive glue, solder or other conductive joining materials. The light-emitting element 20 is, for example, any form of micro-light-emitting diode. One of the first electrode 202 and the second electrode 204 is the cathode of the light-emitting element 20 , and the other one is the anode of the light-emitting element 20 . In this embodiment, the display device 1 includes light-emitting elements 20 of different colors, such as blue light-emitting elements 20a, green light-emitting elements 20b, and red light-emitting elements 20c, thereby displaying color images.

在本實施例中,金屬層400位於擋牆層150之上。金屬層400形成於第四阻障層152上。第四阻障層152位於金屬層400與擋牆層150之間,藉此避免形成金屬層400的製程對擋牆層150造成損傷。在一些實施例中,金屬層400自擋牆層150的頂面150t的上方沿著開口150H的側壁150s而延伸至發光元件20的下方。金屬層400位於開口150H的側壁150s與發光元件20之間。在一些實施例中,金屬層400還延伸至開口150H底部的第四導電層M4上方,且金屬層400與第四導電層M4之間夾有第三阻障層144以及第四阻障層152。在一些實施例中,金屬層400具有通孔400H,且發光元件20之第一電極202與第二電極204對應於前述 通孔400H而設置。 In this embodiment, the metal layer 400 is located on the barrier layer 150 . The metal layer 400 is formed on the fourth barrier layer 152 . The fourth barrier layer 152 is located between the metal layer 400 and the barrier layer 150, thereby preventing the barrier layer 150 from being damaged by the process of forming the metal layer 400. In some embodiments, the metal layer 400 extends from above the top surface 150t of the barrier layer 150 to below the light emitting element 20 along the sidewalls 150s of the opening 150H. The metal layer 400 is located between the sidewall 150s of the opening 150H and the light emitting element 20 . In some embodiments, the metal layer 400 also extends to above the fourth conductive layer M4 at the bottom of the opening 150H, and the third barrier layer 144 and the fourth barrier layer 152 are sandwiched between the metal layer 400 and the fourth conductive layer M4 . In some embodiments, the metal layer 400 has a through hole 400H, and the first electrode 202 and the second electrode 204 of the light-emitting element 20 correspond to the aforementioned Through hole 400H is provided.

在一些實施例中,金屬層400為單層或多層結構,且包括鉻、金、銀、銅、錫、鉛、鉿、鎢、鉬、釹、鈦、鉭、鋁、鋅等金屬、合金或上述材料之組合或其他金屬材料。在一些實施例中,金屬層400的厚度為250埃至8000埃。 In some embodiments, the metal layer 400 is a single-layer or multi-layer structure and includes chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, zinc and other metals, alloys or Combinations of the above materials or other metallic materials. In some embodiments, metal layer 400 has a thickness of 250 Angstroms to 8000 Angstroms.

遮光結構410形成於金屬層400上。遮光結構410自擋牆層150的頂面150t的上方沿著開口150H的側壁150s而延伸至發光元件20的下方。遮光結構410位於開口150H的側壁150s與發光元件20之間。在本實施例中,金屬層400以及遮光結構410在基板100的頂面的法線方向ND上部分重疊於發光元件20。在一些實施例中,遮光結構410還延伸至開口150H底部的第四導電層M4上方。在一些實施例中,遮光結構410具有通孔410H,且發光元件20之第一電極202與第二電極204對應於前述通孔410H而設置。在一些實施例中,金屬層400的形狀以及遮光結構410的形狀是藉由同一道蝕刻製程所定義,因此,金屬層400垂直投影於基板100上的圖案相等於遮光結構410垂直投影於基板100上的圖案。舉例來說,形成金屬層400以及遮光結構410的方法包括:藉由物理氣相沉積、化學氣相沉積、電鍍、濺鍍、無電電鍍或其他製程沉積金屬材料於第四阻障層152上;接著,藉由物理氣相沉積、化學氣相沉積、原子層沉積或其他合適的方法沉積遮光材料於金屬材料的整個上頂面;最後,執行微影製程以及蝕刻製程以圖案化前述遮光材料以及金屬材料,藉此獲得堆疊的遮 光結構410以及金屬層400。 The light-shielding structure 410 is formed on the metal layer 400 . The light-shielding structure 410 extends from above the top surface 150t of the barrier layer 150 to below the light-emitting element 20 along the side walls 150s of the opening 150H. The light-shielding structure 410 is located between the sidewall 150s of the opening 150H and the light-emitting element 20 . In this embodiment, the metal layer 400 and the light-shielding structure 410 partially overlap the light-emitting element 20 in the normal direction ND of the top surface of the substrate 100 . In some embodiments, the light shielding structure 410 also extends to above the fourth conductive layer M4 at the bottom of the opening 150H. In some embodiments, the light-shielding structure 410 has a through hole 410H, and the first electrode 202 and the second electrode 204 of the light-emitting element 20 are arranged corresponding to the aforementioned through hole 410H. In some embodiments, the shape of the metal layer 400 and the shape of the light-shielding structure 410 are defined by the same etching process. Therefore, the pattern of the metal layer 400 vertically projected on the substrate 100 is equal to the pattern of the light-shielding structure 410 vertically projected on the substrate 100 pattern on. For example, the method of forming the metal layer 400 and the light-shielding structure 410 includes: depositing metal materials on the fourth barrier layer 152 through physical vapor deposition, chemical vapor deposition, electroplating, sputtering, electroless plating or other processes; Then, a light-shielding material is deposited on the entire top surface of the metal material by physical vapor deposition, chemical vapor deposition, atomic layer deposition or other suitable methods; finally, a photolithography process and an etching process are performed to pattern the aforementioned light-shielding material and Metal materials, thereby obtaining stacked shields Optical structure 410 and metal layer 400.

在其他實施例中,遮光結構410以及金屬層400是藉由不同道蝕刻製程所定義,因此,金屬層400垂直投影於基板100上的圖案可以不等於遮光結構410垂直投影於基板100上的圖案。 In other embodiments, the light-shielding structure 410 and the metal layer 400 are defined by different etching processes. Therefore, the pattern vertically projected by the metal layer 400 on the substrate 100 may not be equal to the pattern vertically projected by the light-shielding structure 410 on the substrate 100 . .

在一些實施例中,遮光結構410的材料包括鉬的氧化物或包含鉬元素與其他金屬元素的氧化物或其他可以吸收可見光的金屬氧化物,例如鈮鉭矽碳氧化物等。在一些實施例中,遮光結構410與金屬層400之堆疊的光學密度(Optical density,OD)大於2。在本實施例中,遮光結構410與金屬層400之堆疊對於可見光的反射率為3%~30%。在一些實施例中,遮光結構410的厚度為250埃至2000埃。 In some embodiments, the material of the light-shielding structure 410 includes molybdenum oxide or an oxide containing molybdenum element and other metal elements or other metal oxides that can absorb visible light, such as niobium tantalum silicon carbon oxide, etc. In some embodiments, the optical density (OD) of the stack of the light-shielding structure 410 and the metal layer 400 is greater than 2. In this embodiment, the reflectivity of the stack of the light-shielding structure 410 and the metal layer 400 for visible light is 3% to 30%. In some embodiments, the light shielding structure 410 has a thickness of 250 angstroms to 2000 angstroms.

在本實施例中,金屬層400以及遮光結構410環繞發光元件20,但本發明不以此為限。在其他實施例中,金屬層400以及遮光結構410僅設置於開口150H靠近穿透區TR的一側。在一些實施例中,輔助導電層M0、半導體圖案SM、第一導電層M1、第二導電層M2、第三導電層M3、第四導電層M4、金屬層400、遮光結構410以及發光元件20設置於非穿透區NTR中,穿透區TR中則皆為透明材料。 In this embodiment, the metal layer 400 and the light-shielding structure 410 surround the light-emitting element 20, but the invention is not limited thereto. In other embodiments, the metal layer 400 and the light-shielding structure 410 are only provided on the side of the opening 150H close to the penetration region TR. In some embodiments, the auxiliary conductive layer M0, the semiconductor pattern SM, the first conductive layer M1, the second conductive layer M2, the third conductive layer M3, the fourth conductive layer M4, the metal layer 400, the light-shielding structure 410 and the light-emitting element 20 It is arranged in the non-penetrating area NTR, and the penetrating area TR is made of transparent materials.

保護層154位於遮光結構410以及第四阻障層152上,且覆蓋遮光結構410。在一些實施例中,保護層154的材料包括氧化矽、氮化矽、氮氧化矽、氧化鋁、氧化鉿、有機絕緣材料或其他合適的絕緣材料。保護層154的通孔154H重疊於發光元件20。 The protective layer 154 is located on the light-shielding structure 410 and the fourth barrier layer 152 and covers the light-shielding structure 410 . In some embodiments, the material of the protective layer 154 includes silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, hafnium oxide, organic insulating materials or other suitable insulating materials. The through hole 154H of the protective layer 154 overlaps the light emitting element 20 .

基於上述,遮光結構410與金屬層400之堆疊對於可見光的反射率僅有3%~30%,因此,可以避免發光元件20所發出之光線在畫素電路基板10中的各導電層之間反覆反射而導致的漏光問題。此外,由於遮光結構410與金屬層400之堆疊仍能反射少量光線,因此,遮光結構410與金屬層400之堆疊具有增加顯示裝置1之出光效率的功效。 Based on the above, the stack of the light-shielding structure 410 and the metal layer 400 has a reflectivity of only 3% to 30% for visible light. Therefore, the light emitted by the light-emitting element 20 can be prevented from being repeated between the conductive layers in the pixel circuit substrate 10 Light leakage problem caused by reflection. In addition, since the stacking of the light-shielding structure 410 and the metal layer 400 can still reflect a small amount of light, the stacking of the light-shielding structure 410 and the metal layer 400 has the effect of increasing the light extraction efficiency of the display device 1 .

圖2是依照本發明的一實施例的一種顯示裝置2的剖面示意圖。在此必須說明的是,圖2的實施例沿用圖1A和圖1B的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Figure 2 is a schematic cross-sectional view of a display device 2 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 2 follows the component numbers and part of the content of the embodiment of FIG. 1A and FIG. 1B , where the same or similar numbers are used to represent the same or similar elements, and references with the same technical content are omitted. instruction. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

圖2的顯示裝置2與圖1的顯示裝置1的差異包括:顯示裝置2的金屬層400電性連接至發光元件20至第三導電層M3。 The difference between the display device 2 of FIG. 2 and the display device 1 of FIG. 1 includes that the metal layer 400 of the display device 2 is electrically connected to the light-emitting element 20 to the third conductive layer M3.

請參考圖2,金屬層400位於第二絕緣層140之上。在本實施例中,金屬層400位於第二阻障層142上。在本實施例中,金屬層400包括第一接墊P1、第二接墊P2以及共用訊號線CL。在一些實施例中,金屬層400還包括其他導電結構。至少部分金屬層400電性連接至第三導電層M3。舉例來說,第一接墊P1以及第二接墊P2分別透過第二阻障層142的通孔而電性連接至第一轉接結構T1以及第二轉接結構T2。 Referring to FIG. 2 , the metal layer 400 is located on the second insulating layer 140 . In this embodiment, the metal layer 400 is located on the second barrier layer 142 . In this embodiment, the metal layer 400 includes a first pad P1, a second pad P2 and a common signal line CL. In some embodiments, metal layer 400 also includes other conductive structures. At least part of the metal layer 400 is electrically connected to the third conductive layer M3. For example, the first pad P1 and the second pad P2 are electrically connected to the first transfer structure T1 and the second transfer structure T2 through the through holes of the second barrier layer 142 respectively.

遮光結構410形成於金屬層400上。在一些實施例中,先執行金屬層400的圖案化製程之後,才形成遮光結構410於金 屬層400上。在一些實施例中,形成遮光結構410的方法包括:藉由物理氣相沉積、化學氣相沉積、原子層沉積或其他合適的方法沉積遮光材料於金屬層400上;接著,透過微影製程與蝕刻製程圖案化前述遮光材料以形成暴露出部分金屬層400的遮光結構410,藉此使後續植入的發光元件20可以電性連接至被遮光結構410所暴露之部分金屬層400。 The light-shielding structure 410 is formed on the metal layer 400 . In some embodiments, the patterning process of the metal layer 400 is performed first, and then the light-shielding structure 410 is formed on the metal layer 400 . On layer 400. In some embodiments, the method of forming the light-shielding structure 410 includes: depositing a light-shielding material on the metal layer 400 through physical vapor deposition, chemical vapor deposition, atomic layer deposition or other suitable methods; and then, through a lithography process and The etching process patterns the aforementioned light-shielding material to form a light-shielding structure 410 that exposes a portion of the metal layer 400 , thereby allowing the subsequently implanted light-emitting element 20 to be electrically connected to the portion of the metal layer 400 exposed by the light-shielding structure 410 .

在本實施例中,遮光結構410具有第一開孔410H1以及第二開孔410H2,其中第一開孔410H1重疊於第一電極202、第一連接材S1以及第一接墊P1,且第二開孔410H2重疊於第二電極204、第二連接材S2以及第二接墊P2,但本發明不以此為限。在其他實施例中,遮光結構410的一個開孔同時重疊於第一電極202以及第二電極204。在一些實施例中,第一開孔410H1以及第二開孔410H2各自的寬度大於4微米,藉此提升發光元件20接合至第一接墊P1與第二接墊P2的製程良率。 In this embodiment, the light-shielding structure 410 has a first opening 410H1 and a second opening 410H2, where the first opening 410H1 overlaps the first electrode 202, the first connecting material S1 and the first pad P1, and the second opening 410H1 overlaps the first electrode 202, the first connecting material S1 and the first pad P1. The opening 410H2 overlaps the second electrode 204, the second connecting material S2 and the second pad P2, but the invention is not limited thereto. In other embodiments, an opening of the light-shielding structure 410 overlaps the first electrode 202 and the second electrode 204 at the same time. In some embodiments, the width of each of the first opening 410H1 and the second opening 410H2 is greater than 4 microns, thereby improving the process yield of the light-emitting element 20 being bonded to the first pad P1 and the second pad P2.

在一些實施例中,部分遮光結構410直接形成於第二阻障層142的上表面。換句話說,部分遮光結構410於法線方向ND上不重疊於金屬層400。舉例來說,第一接墊P1以及第二接墊P2之間的部分遮光結構410於法線方向ND上不重疊於金屬層400。在一些實施例中,遮光結構410覆蓋金屬層400的側壁。舉例來說,遮光結構410覆蓋第一接墊P1的側壁、第二接墊P2的側壁以及共用訊號線CL的側壁。 In some embodiments, the partial light-shielding structure 410 is directly formed on the upper surface of the second barrier layer 142 . In other words, the partial light-shielding structure 410 does not overlap the metal layer 400 in the normal direction ND. For example, the partial light-shielding structure 410 between the first pad P1 and the second pad P2 does not overlap the metal layer 400 in the normal direction ND. In some embodiments, the light shielding structure 410 covers the sidewalls of the metal layer 400 . For example, the light-shielding structure 410 covers the sidewalls of the first pad P1, the sidewalls of the second pad P2, and the sidewalls of the common signal line CL.

在本實施例中,遮光結構410與金屬層400之堆疊對於 可見光的反射率僅有3%~30%,因此,可以避免發光元件20所發出之光線在畫素電路基板10中的各導電層之間反覆反射而導致的漏光問題。 In this embodiment, the stacking of the light-shielding structure 410 and the metal layer 400 is The reflectivity of visible light is only 3% to 30%. Therefore, the light leakage problem caused by the light emitted by the light-emitting element 20 being repeatedly reflected between the conductive layers in the pixel circuit substrate 10 can be avoided.

在本實施例中,部分遮光結構410與金屬層400之堆疊延伸至開口150H的側壁150s下方,藉此減少穿過開口150H的側壁150s之光線在畫素電路基板10中反覆反射的機率。 In this embodiment, the stack of the partial light-shielding structure 410 and the metal layer 400 extends below the side walls 150s of the opening 150H, thereby reducing the probability of light passing through the side walls 150s of the opening 150H being reflected repeatedly in the pixel circuit substrate 10.

圖3是依照本發明的一實施例的一種顯示裝置3的剖面示意圖。在此必須說明的是,圖3的實施例沿用圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Figure 3 is a schematic cross-sectional view of a display device 3 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 3 follows the component numbers and part of the content of the embodiment of FIG. 2 , where the same or similar numbers are used to represent the same or similar elements, and descriptions of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

圖3的顯示裝置3與圖2的顯示裝置2的差異包括:顯示裝置3不包括第三阻障層144、擋牆層150、第四阻障層152以及保護層154。 The difference between the display device 3 in FIG. 3 and the display device 2 in FIG. 2 includes that the display device 3 does not include the third barrier layer 144 , the barrier layer 150 , the fourth barrier layer 152 and the protective layer 154 .

圖4是依照本發明的一實施例的一種顯示裝置4的剖面示意圖。在此必須說明的是,圖4的實施例沿用圖2的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Figure 4 is a schematic cross-sectional view of a display device 4 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 4 follows the component numbers and part of the content of the embodiment of FIG. 2 , where the same or similar numbers are used to represent the same or similar elements, and descriptions of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

圖4的顯示裝置4與圖2的顯示裝置2的差異包括:顯示裝置4的金屬層400位於第一絕緣層130與第二絕緣層140之間。 The difference between the display device 4 of FIG. 4 and the display device 2 of FIG. 2 includes that the metal layer 400 of the display device 4 is located between the first insulating layer 130 and the second insulating layer 140 .

請參考圖4,金屬層400位於第一絕緣層130之上。在本實施例中,金屬層400位於第一阻障層132上。在本實施例中,金屬層400包括第一轉接結構T1、第二轉接結構T2以及第三訊號線SL3。在一些實施例中,金屬層400還包括其他導電結構。在一些實施例中,第三訊號線SL3可以作為共用訊號線,且第三訊號線SL3將多個第二轉接結構T2彼此電性連接,但本發明不以此為限。在其他實施例中,多個第二轉接結構T2透過其他導電層而電性連接。至少部分金屬層400電性連接至第二導電層M2。舉例來說,第一轉接結構T1透過第一阻障層132的通孔而電性連接至第一源極/汲極SD1。 Referring to FIG. 4 , the metal layer 400 is located on the first insulating layer 130 . In this embodiment, the metal layer 400 is located on the first barrier layer 132 . In this embodiment, the metal layer 400 includes a first transfer structure T1, a second transfer structure T2 and a third signal line SL3. In some embodiments, metal layer 400 also includes other conductive structures. In some embodiments, the third signal line SL3 can be used as a common signal line, and the third signal line SL3 electrically connects the plurality of second switching structures T2 to each other, but the invention is not limited thereto. In other embodiments, the plurality of second transfer structures T2 are electrically connected through other conductive layers. At least part of the metal layer 400 is electrically connected to the second conductive layer M2. For example, the first transfer structure T1 is electrically connected to the first source/drain SD1 through the through hole of the first barrier layer 132 .

遮光結構410形成於金屬層400上。在一些實施例中,先執行金屬層400的圖案化製程之後,才形成遮光結構410於金屬層400上。在一些實施例中,形成遮光結構410的方法包括:藉由物理氣相沉積、化學氣相沉積、原子層沉積或其他合適的方法沉積遮光材料於金屬層400上;接著,透過微影製程與蝕刻製程圖案化前述遮光材料以形成暴露出部分金屬層400的遮光結構410,藉此使後續形成之第四金屬層M4可以電性連接至被遮光結構410所暴露之部分金屬層400。 The light-shielding structure 410 is formed on the metal layer 400 . In some embodiments, the light-shielding structure 410 is formed on the metal layer 400 after the patterning process of the metal layer 400 is first performed. In some embodiments, the method of forming the light-shielding structure 410 includes: depositing a light-shielding material on the metal layer 400 through physical vapor deposition, chemical vapor deposition, atomic layer deposition or other suitable methods; and then, through a lithography process and The etching process patterns the light-shielding material to form a light-shielding structure 410 that exposes a portion of the metal layer 400 , so that the subsequently formed fourth metal layer M4 can be electrically connected to the portion of the metal layer 400 exposed by the light-shielding structure 410 .

在本實施例中,遮光結構410具有第一開孔410H1以及第二開孔410H2,其中第一開孔410H1重疊於第一接墊P1,且第二開孔410H2重疊於第二接墊P2。第一接墊P1穿過第一開孔410H1以電性連接第一轉接結構T1,且第二接墊P2穿過第二開孔 410H2以電性連接第二轉接結構T2。在其他實施例中,遮光結構410的一個開孔同時重疊於第一接墊P1以及第二接墊P2。在一些實施例中,第一開孔410H1以及第二開孔410H2各自的寬度大於4微米,藉此提升第四金屬層M4電性連接至金屬層400的製程良率。 In this embodiment, the light-shielding structure 410 has a first opening 410H1 and a second opening 410H2. The first opening 410H1 overlaps the first pad P1, and the second opening 410H2 overlaps the second pad P2. The first pad P1 passes through the first opening 410H1 to electrically connect the first transfer structure T1, and the second pad P2 passes through the second opening. 410H2 is electrically connected to the second transfer structure T2. In other embodiments, an opening of the light-shielding structure 410 overlaps the first pad P1 and the second pad P2 at the same time. In some embodiments, the width of each of the first opening 410H1 and the second opening 410H2 is greater than 4 microns, thereby improving the process yield of the fourth metal layer M4 being electrically connected to the metal layer 400 .

在一些實施例中,部分遮光結構410直接形成於第一阻障層132的上表面。換句話說,部分遮光結構410於法線方向ND上不重疊於金屬層400。舉例來說,第一轉接結構T1以及第二轉接結構T2之間的部分遮光結構410於法線方向ND上不重疊於金屬層400。在一些實施例中,遮光結構410覆蓋金屬層400的側壁。舉例來說,遮光結構410覆蓋第一轉接結構T1的側壁、第二轉接結構T2的側壁以及第三訊號線SL3的側壁。 In some embodiments, the partial light-shielding structure 410 is directly formed on the upper surface of the first barrier layer 132 . In other words, the partial light-shielding structure 410 does not overlap the metal layer 400 in the normal direction ND. For example, the partial light-shielding structure 410 between the first transfer structure T1 and the second transfer structure T2 does not overlap the metal layer 400 in the normal direction ND. In some embodiments, the light shielding structure 410 covers the sidewalls of the metal layer 400 . For example, the light-shielding structure 410 covers the sidewalls of the first transfer structure T1, the sidewalls of the second transfer structure T2, and the sidewalls of the third signal line SL3.

第二絕緣層140位於金屬層400、遮光結構410以及第一絕緣層130之上。在本實施例中,第二絕緣層140位於金屬層400、遮光結構410以及第一阻障層132上。第二阻障層142位於第二絕緣層140上。在一些實施例中,第二絕緣層140包括重疊於部分金屬層400(例如第一轉接結構T1以及第二轉接結構T2)的通孔,且第二阻障層142填入前述通孔中。在一些實施例中,第二阻障層142具有通孔,且第二阻障層142的通孔重疊於第二絕緣層140的通孔,使第二阻障層142上之導電結構可以透過第二阻障層142的通孔而電性連接至金屬層400。 The second insulating layer 140 is located on the metal layer 400, the light-shielding structure 410 and the first insulating layer 130. In this embodiment, the second insulating layer 140 is located on the metal layer 400, the light-shielding structure 410 and the first barrier layer 132. The second barrier layer 142 is located on the second insulation layer 140 . In some embodiments, the second insulating layer 140 includes a through hole that overlaps part of the metal layer 400 (such as the first transfer structure T1 and the second transfer structure T2), and the second barrier layer 142 fills the aforementioned through hole. middle. In some embodiments, the second barrier layer 142 has a through hole, and the through hole of the second barrier layer 142 overlaps the through hole of the second insulating layer 140 so that the conductive structure on the second barrier layer 142 can pass through. The through hole of the second barrier layer 142 is electrically connected to the metal layer 400 .

第四導電層M4位於第二絕緣層140之上。在本實施例 中,第四導電層M4位於第二阻障層142上。在本實施例中,第四導電層M4包括第一接墊P1、第二接墊P2以及共用訊號線CL。在一些實施例中,第四導電層M4還包括其他導電結構。至少部分第四導電層M4電性連接至金屬層400。舉例來說,第一接墊P1以及第二接墊P2分別透過第二阻障層142的通孔而電性連接至第一轉接結構T1以及第二轉接結構T2。 The fourth conductive layer M4 is located on the second insulating layer 140 . In this embodiment , the fourth conductive layer M4 is located on the second barrier layer 142 . In this embodiment, the fourth conductive layer M4 includes a first pad P1, a second pad P2 and a common signal line CL. In some embodiments, the fourth conductive layer M4 also includes other conductive structures. At least part of the fourth conductive layer M4 is electrically connected to the metal layer 400 . For example, the first pad P1 and the second pad P2 are electrically connected to the first transfer structure T1 and the second transfer structure T2 through the through holes of the second barrier layer 142 respectively.

圖5是依照本發明的一實施例的一種顯示裝置5的剖面示意圖。在此必須說明的是,圖5的實施例沿用圖4的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。 Figure 5 is a schematic cross-sectional view of a display device 5 according to an embodiment of the present invention. It must be noted here that the embodiment of FIG. 5 follows the component numbers and part of the content of the embodiment of FIG. 4 , where the same or similar numbers are used to represent the same or similar elements, and descriptions of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

圖5的顯示裝置5與圖4的顯示裝置4的差異包括:顯示裝置5不包括第三阻障層144、擋牆層150、第四阻障層152以及保護層154。 The differences between the display device 5 of FIG. 5 and the display device 4 of FIG. 4 include that the display device 5 does not include the third barrier layer 144 , the barrier layer 150 , the fourth barrier layer 152 and the protective layer 154 .

圖6是依照本發明的一實施例的金屬層與遮光結構之疊層的反射率與光線波長關係圖。請參考圖6,以厚度為50奈米之鉬金屬(Mo)為金屬層,並以不同厚度的氧化鉬鉭為遮光結構,其中氧化鉬鉭是由MoOxTa8作為靶材進行濺鍍而形成。測量金屬層與遮光結構之疊層的反射率與光線波長之間的關係。 FIG. 6 is a graph showing the relationship between reflectivity and light wavelength of a stack of a metal layer and a light-shielding structure according to an embodiment of the present invention. Please refer to Figure 6. Molybdenum metal (Mo) with a thickness of 50 nanometers is used as the metal layer, and molybdenum and tantalum oxide of different thicknesses are used as the light-shielding structure. The molybdenum and tantalum oxide is formed by sputtering with MoOxTa8 as the target material. Measure the relationship between the reflectivity of a stack of metal layers and light-shielding structures and the wavelength of light.

在遮光結構的厚度為55奈米的數據中,分別量測有對疊層結構進行退火(圖中顯示為實線)以及未對疊層結構進行退火(圖中顯示為虛線)的反射率與光線波長之間的關係,其中前述 退火例如是在攝氏400度進行。由圖6可以得知,金屬層與遮光結構之疊層的反射率會與遮光結構的厚度有相關。此外,疊層結構在進行退火之後,遮光結構的厚度對反射率之影響會變得較為明顯,這是因為遮光結構在退火之後會結晶。金屬層與遮光結構之疊層在遮光結構的厚度為75奈米至85奈米時所反射的光線偏深藍,因此遮光結構的厚度較佳為75奈米至85奈米。 In the data where the thickness of the light-shielding structure is 55 nm, the reflectance and reflectivity of the laminated structure are measured with and without annealing (shown as a solid line in the figure) and without annealing (shown as a dotted line in the figure). The relationship between the wavelengths of light, where the aforementioned Annealing is performed at 400 degrees Celsius, for example. It can be known from Figure 6 that the reflectivity of the stack of the metal layer and the light-shielding structure is related to the thickness of the light-shielding structure. In addition, after the laminated structure is annealed, the impact of the thickness of the light-shielding structure on the reflectance will become more obvious, because the light-shielding structure will crystallize after annealing. When the thickness of the light-shielding structure is 75 nanometers to 85 nanometers, the light reflected by the stack of the metal layer and the light-shielding structure is darker blue, so the thickness of the light-shielding structure is preferably 75 nanometers to 85 nanometers.

1:顯示裝置 1:Display device

10:畫素電路基板 10: Pixel circuit substrate

20:發光元件 20:Light-emitting components

100:基板 100:Substrate

102:緩衝層 102:Buffer layer

110:閘極絕緣層 110: Gate insulation layer

120:層間介電層 120: Interlayer dielectric layer

130:第一絕緣層 130: First insulation layer

132:第一阻障層 132: First barrier layer

140:第二絕緣層 140: Second insulation layer

142:第二阻障層 142: Second barrier layer

144:第三阻障層 144:Third barrier layer

144H,152H,154H,400H,410H:通孔 144H, 152H, 154H, 400H, 410H: through hole

150:擋牆層 150:Retaining wall layer

150H:開口 150H:Open

150s:側壁 150s: Sidewall

150t:頂面 150t:Top surface

152:第四阻障層 152: The fourth barrier layer

154:保護層 154:Protective layer

202:第一電極 202:First electrode

204:第二電極 204: Second electrode

400:金屬層 400:Metal layer

410:遮光結構 410:Light-shielding structure

A-A’:線 A-A’: line

CL:共用訊號線 CL: Common signal line

G:閘極 G: gate

M0:輔助導電層 M0: auxiliary conductive layer

M1:第一導電層 M1: first conductive layer

M2:第二導電層 M2: Second conductive layer

M3:第三導電層 M3: The third conductive layer

M4:第四導電層 M4: The fourth conductive layer

ND:法線方向 ND: normal direction

P1:第一接墊 P1: first pad

P2:第二接墊 P2: Second pad

S1:第一連接材 S1: first connecting material

S2:第二連接材 S2: Second connecting material

SM:半導體圖案 SM: semiconductor pattern

SD1:第一源極/汲極 SD1: first source/drain

SD2:第二源極/汲極 SD2: Second source/drain

SL1:第一訊號線 SL1: first signal line

SL2:第二訊號線 SL2: Second signal line

SL3:第三訊號線 SL3: The third signal line

T1:第一轉接結構 T1: first transfer structure

T2:第二轉接結構 T2: Second transfer structure

Claims (10)

一種顯示裝置,包括:一畫素電路基板,包括:一基板;一金屬層;以及一遮光結構,形成於該金屬層上,其中該遮光結構與該金屬層之堆疊對於可見光的反射率為3%~30%;以及一發光元件,電性連接至該畫素電路基板,且其中該遮光結構在該基板的頂面的法線方向上部分重疊於該發光元件。 A display device, including: a pixel circuit substrate, including: a substrate; a metal layer; and a light-shielding structure formed on the metal layer, wherein the stack of the light-shielding structure and the metal layer has a reflectivity of 3 for visible light %~30%; and a light-emitting element electrically connected to the pixel circuit substrate, and wherein the light-shielding structure partially overlaps the light-emitting element in the normal direction of the top surface of the substrate. 如請求項1所述的顯示裝置,其中該畫素電路基板更包括:一擋牆層,位於該基板之上,且具有一開口,其中該遮光結構位於該開口的側壁與該發光元件之間。 The display device of claim 1, wherein the pixel circuit substrate further includes: a barrier layer located on the substrate and having an opening, wherein the light-shielding structure is located between a side wall of the opening and the light-emitting element . 如請求項2所述的顯示裝置,其中該遮光結構自該擋牆層的頂面的上方延伸至該發光元件的下方。 The display device of claim 2, wherein the light-shielding structure extends from above the top surface of the barrier layer to below the light-emitting element. 如請求項1所述的顯示裝置,其中該發光元件之一第一電極與一第二電極分別電性連接至該畫素電路基板,且該第一電極對應於該遮光結構的一第一開孔而設置。 The display device of claim 1, wherein a first electrode and a second electrode of the light-emitting element are electrically connected to the pixel circuit substrate respectively, and the first electrode corresponds to a first opening of the light-shielding structure. hole and set. 如請求項1所述的顯示裝置,其中該畫素電路基板更包括:一第一導電層,包括一閘極;一半導體圖案,重疊於該閘極; 一第二導電層,包括電性連接至該半導體圖案的一第一源極/汲極與一第二源極/汲極;一第一絕緣層,位於該第二導電層之上;一第三導電層,位於該第一絕緣層之上,且至少部分該第三導電層電性連接至該第二導電層;一第二絕緣層,位於該第三導電層之上,其中該金屬層位於該第二絕緣層之上,且至少部分該金屬層電性連接至該第三導電層,其中該金屬層包括一第一接墊與一第二接墊,且該發光元件電性連接至該第一接墊與該第二接墊。 The display device of claim 1, wherein the pixel circuit substrate further includes: a first conductive layer including a gate; a semiconductor pattern overlapping the gate; a second conductive layer, including a first source/drain and a second source/drain electrically connected to the semiconductor pattern; a first insulating layer located on the second conductive layer; a first Three conductive layers are located on the first insulating layer, and at least part of the third conductive layer is electrically connected to the second conductive layer; a second insulating layer is located on the third conductive layer, wherein the metal layer Located on the second insulating layer, and at least part of the metal layer is electrically connected to the third conductive layer, wherein the metal layer includes a first pad and a second pad, and the light-emitting element is electrically connected to the first pad and the second pad. 如請求項5所述的顯示裝置,其中該發光元件之一第一電極與一第二電極分別電性連接至該第一接墊與該第二接墊,且該遮光結構具有重疊於該第一電極的一第一開孔。 The display device of claim 5, wherein a first electrode and a second electrode of the light-emitting element are electrically connected to the first pad and the second pad respectively, and the light-shielding structure has a structure overlapping the first A first opening of an electrode. 如請求項6所述的顯示裝置,更包括:一第一連接材,連接該第一電極與該第一接墊,且該第一連接材重疊於該第一開孔。 The display device of claim 6, further comprising: a first connecting material connecting the first electrode and the first pad, and the first connecting material overlaps the first opening. 如請求項1所述的顯示裝置,其中該畫素電路基板包括:一第一導電層,包括一閘極;一半導體圖案,重疊於該閘極;一第二導電層,包括電性連接至該半導體圖案的一第一源極/汲極與一第二源極/汲極;一第一絕緣層,位於該第二導電層之上,其中該金屬層位於 該第一絕緣層之上,且至少部分該金屬層電性連接至該第二導電層;一第二絕緣層,位於該金屬層以及該遮光結構之上;以及一第三導電層,位於該第二絕緣層之上,且至少部分該第三導電層電性連接至該金屬層,其中該第三導電層包括一第一接墊與一第二接墊,且該發光元件電性連接至該第一接墊與該第二接墊。 The display device of claim 1, wherein the pixel circuit substrate includes: a first conductive layer including a gate; a semiconductor pattern overlapping the gate; and a second conductive layer including a gate electrically connected to A first source/drain and a second source/drain of the semiconductor pattern; a first insulating layer located on the second conductive layer, wherein the metal layer is located On the first insulating layer, and at least part of the metal layer is electrically connected to the second conductive layer; a second insulating layer on the metal layer and the light-shielding structure; and a third conductive layer on the On the second insulating layer, and at least part of the third conductive layer is electrically connected to the metal layer, wherein the third conductive layer includes a first pad and a second pad, and the light-emitting element is electrically connected to the first pad and the second pad. 如請求項1所述的顯示裝置,其中該顯示裝置包括一穿透區與位於該穿透區周圍的一非穿透區,其中該金屬層、該發光元件以及該遮光結構設置於該非穿透區中。 The display device of claim 1, wherein the display device includes a transmissive area and a non-transmissive area located around the transmissive area, wherein the metal layer, the light-emitting element and the light-shielding structure are disposed in the non-transmissive area. District. 如請求項1所述的顯示裝置,其中該遮光結構的材料包括金屬氧化物。 The display device according to claim 1, wherein the material of the light-shielding structure includes metal oxide.
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Citations (4)

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TW200509017A (en) * 2003-06-26 2005-03-01 Casio Computer Co Ltd Display apparatus
TW201824236A (en) * 2016-12-29 2018-07-01 南韓商樂金顯示科技股份有限公司 Transparent display device
US20220165993A1 (en) * 2020-11-20 2022-05-26 Xiamen Tianma Micro-Electronics Co., Ltd. Display panel with a display function layer and display device
CN115172402A (en) * 2021-09-16 2022-10-11 友达光电股份有限公司 Light-emitting panel

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200509017A (en) * 2003-06-26 2005-03-01 Casio Computer Co Ltd Display apparatus
TW201824236A (en) * 2016-12-29 2018-07-01 南韓商樂金顯示科技股份有限公司 Transparent display device
US20220165993A1 (en) * 2020-11-20 2022-05-26 Xiamen Tianma Micro-Electronics Co., Ltd. Display panel with a display function layer and display device
CN115172402A (en) * 2021-09-16 2022-10-11 友达光电股份有限公司 Light-emitting panel

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