TWI820063B - Image processing device and method for operating image processing device - Google Patents

Abstract

An image processing device and method for operating image processing device are provided. The image processing device includes a multimedia intellectual property (IP) block which processes image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) which compresses the image data to generate compressed data and stores the compressed data in the memory. The frame buffer compressor includes a logic circuit which controls a compression sequence of the first component and the second component of the image data.

Description

Image processing device and operating method of the image processing device

The present disclosure relates to an image processing device and an operating method of the image processing device.

More and more applications require high-resolution video images and high frame rate images. As a result, the amount of data accessed from the memory (ie, bandwidth) used to store these images through various multimedia Intellectual Property (IP) blocks of image processing devices has greatly increased.

Each image processing device has limited processing capabilities. When the bandwidth increases, the processing capability of the image processing device may reach this limit. Therefore, users of image processing devices may experience slowdowns when recording or playing back video images.

Aspects of the present disclosure provide an image processing device that performs compression of image data with excellent compression quality.

Another aspect of the present disclosure provides a method of operating an image processing device that performs compression of image data with excellent compression quality.

According to aspects of the present disclosure, an image processing device is provided. The image processing device includes: a multimedia intellectual property (IP) block configured to process image data including a first component and a second component; a memory; and an image. A frame buffer compressor (FBC) configured to compress the image data to generate compressed data and store the compressed data in the memory, wherein the frame buffer compressor includes a logic circuit , the logic circuit is configured to control the compression order of the first component and the second component of the image data.

According to another aspect of the present disclosure, an image processing device is provided. The image processing device includes: a multimedia intellectual property (IP) block configured to process image data conforming to the YUV format; a memory; and frame buffer compression. A processor (FBC) configured to compress the image data to generate compressed data and store the compressed data in the memory, wherein the frame buffer compressor includes logic circuitry configured to The compression sequence is controlled so that the chroma components including the Cb component and the Cr component of the YUV format of the image data are compressed before compressing the luminance component including the Y component of the YUV format of the image data.

According to another aspect of the present disclosure, an operating method of an image processing device is provided, including: calculating the total target bits based on a target compression ratio of image data conforming to the YUV format; calculating a Cb component for compressing the YUV format and the chroma component target bits of the chroma component of the Cr component; allocate the chroma component target bits to compress the chroma component; use the chroma component usage bits of the compressed data of the chroma component to Calculating a luma component target bit including a luma component of the Y component of the YUV format; allocating the luma component target bits to compress the luma component; and when the luma component of the compressed data is When the sum of component usage bits and the chrominance component usage bits is less than the total target bits, dummy bits are added after the compressed data of the luma component.

Aspects of the present disclosure are not limited to the above-mentioned aspects, and those with ordinary skill in the art will clearly understand other aspects not mentioned based on the following description.

1 to 3 are block diagrams for explaining an image processing device according to an exemplary embodiment of the inventive concept.

Referring to FIG. 1 , an image processing device according to an exemplary embodiment of the inventive concept includes a multimedia IP (intellectual property) 100 (such as IP blocks and IP cores, circuits, etc.), a frame buffer compressor (FBC) 200 (such as a circuit , digital signal processor, etc.), memory 300 and system bus 400.

In the embodiment, the multimedia IP 100 is a part of the image processing device, and directly performs image processing of the image processing device. The multimedia IP 100 may include multiple modules for recording and reproducing images, such as camera encoding and playback of video images.

The multimedia IP 100 receives first data (eg, image data) from an external source, such as a camera, and converts the first data into second data. For example, the first data may be moving image data or original image data. The second data is data generated by the multimedia IP 100 and may include data generated by the multimedia IP 100 that processes the first data. The multimedia IP 100 can repeatedly store the second data in the memory 300 and update the second data through multiple steps. The secondary data can include all data used in these steps. The second data may be stored in the memory 300 in the form of third data. Therefore, the second data may be data before being stored in the memory 300 or after being read from the memory 300 . This is explained in more detail below.

In an exemplary embodiment, the multimedia IP 100 includes an image signal processor ISP 110, an oscillation correction module G2D 120, a multi-format codec MFC 130, a GPU 140, and a display 150. However, the inventive concept is not limited thereto. That is, the multimedia IP 100 may include at least one of the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140, and the display 150. Multimedia IP 100 may be implemented by a processing module (eg, a processor) that accesses memory 300 to process data representing moving images or still images.

The image signal processor 110 receives the first data and pre-processes the first data to convert the first data into second data. In an exemplary embodiment, the first data is RGB type image source data. For example, the image signal processor 110 may convert the first data of RGB type into the second data of YUV type.

In embodiments, RGB type data means a data format representing colors based on three primary colors of light. That is, it is a type that expresses images using three types of colors, namely red (RED), green (GREEN), and blue (BLUE). In contrast, the YUV type means a data type that represents brightness alone, that is, a luma signal and a chrominance signal. That is, Y means a brightness signal, and U(Cb) and V(Cr) respectively mean a chrominance signal. U means the difference between the luminance signal and the blue signal component, and V means the difference between the luminance signal and the red signal component.

YUV type data can be obtained by converting RGB type data using conversion formulas. For example, you can use conversion formulas such as Y = 0.3R+0.59G+0.11B, U = (B-Y)x0.493, V = (R-Y)x0.877, etc. to convert RGB type data into YUV type data. .

Since the human eye is sensitive to brightness signals and less sensitive to color signals, it is easier to compress YUV type data than RGB type data. Therefore, the image signal processor 110 can convert the first data of RGB type into the second data of YUV type.

The image signal processor 110 converts the first data into second data, and then stores the second data in the memory 300 .

The oscillation correction module 120 can perform oscillation correction of static image data or moving image data. The oscillation correction module 120 may perform oscillation correction by reading the first data or the second data stored in the memory 300 . In an embodiment, oscillation correction means detecting oscillations of a camera from moving image data and removing oscillations from moving image data.

The oscillation correction module 120 can correct the oscillation of the first data or the second data to update the first data or the second data and store the updated data in the memory 300 .

The multi-format codec 130 may be a codec for compressing moving image data. Generally speaking, since the size of mobile image data is very large, compression modules that reduce its size are necessary. Moving image data can be compressed through the association between multiple frames, and this compression can be performed by the multi-format codec 130. The multi-format codec 130 can read and compress the first data or the second data stored in the memory 300 .

The multi-format codec 130 can compress the first data or the second data to generate new second data or update the second data to store it in the memory 300 .

The Graphics Processing Unit (GPU) 140 can perform arithmetic processing and generation of two-dimensional graphics or three-dimensional graphics. The GPU 140 can perform arithmetic processing on the first data or the second data stored in the memory 300 . The GPU 140 may be specifically used for graphics data processing to process graphics data in parallel.

The GPU 140 may compress the first data or the second data to generate updated first data or updated second data, and store the updated data in the memory 300 .

The display 150 can display the second data stored in the memory 300 on the screen. The display 150 may display image data processed by components of the multimedia IP 100, including the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, and the GPU 140. However, the inventive concept is not limited to these examples.

The image signal processor 110, oscillation correction module 120, multi-format codec 130, GPU 140 and display 150 of the multimedia IP 100 can operate independently. That is, the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140 and the display 150 can individually access the memory 300 to write or read data.

In an embodiment, the frame buffer compressor 200 compresses the second data to convert the second data into third data before the multimedia IP 100 separately accesses the memory 300 . The frame buffer compressor 200 transmits the third data to the multimedia IP 100, and the multimedia IP 100 transmits the third data to the memory 300.

Therefore, the third data compressed by the frame buffer compressor 200 is stored in the memory 300 . On the contrary, the third data stored in the memory 300 can be loaded by the multimedia IP 100 and transmitted to the frame buffer compressor 200 . In an embodiment, the frame buffer compressor 200 decompresses the third data to convert the third data into the second data. The frame buffer compressor 200 can transmit the second data (ie, the decompressed data) to the multimedia IP 100 .

In an embodiment, whenever the image signal processor 110 , oscillation correction module 120 , multi-format codec 130 , GPU 140 and display 150 of the multimedia IP 100 individually access the memory 300 , the frame buffer compressor 200 That is, the second data is compressed into third data, and the third data is transferred to the memory 300 . For example, after one of the components of the multimedia IP 100 generates the second data and stores the second data in the memory 300 , the frame buffer compressor 200 can compress the stored data and store the compressed data in the memory 300 middle. In an embodiment, each time a data request is transmitted from the memory 300 to the multimedia IP's image signal processor 110 , oscillation correction module 120 , multi-format codec 130 , GPU 140 and display 150 , the frame buffer compressor 200 decompresses the third data into second data, and transmits the second data to the image data processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140 and the display 150 of the multimedia IP 100 respectively.

The memory 300 stores the third data generated by the frame buffer compressor 200, and can provide the stored third data to the frame buffer compressor 200, so that the frame buffer compressor 200 can decompress the third data.

In an embodiment, multimedia IP 100 and memory 300 are connected to system bus 400 . Specifically, the image signal processor 110 , the oscillation correction module 120 , the multi-format codec 130 , the GPU 140 and the display 150 of the multimedia IP 100 may be individually connected to the system bus 400 . The system bus 400 may be a path through which the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140, the display 150 and the memory 300 of the multimedia IP 100 transmit data to each other.

The frame buffer compressor 200 is not connected to the system bus 400, and when the image signal processor 110, oscillation correction module 120, multi-format codec 130, GPU 140 and display 150 of the multimedia IP 100 respectively access the memory , and perform operations of converting the second data into third data and converting the third data into second data.

Next, referring to FIG. 2 , the frame buffer compressor 200 of the image processing device according to an exemplary embodiment of the inventive concept is directly connected to the system bus 400 .

The frame buffer compressor 200 is not directly connected to the multimedia IP 100 but is connected to the multimedia IP 100 via the system bus 400 . Specifically, each of the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140 and the display 150 of the multimedia IP 100 can transmit data to the frame buffer via the system bus 400 The compressor 200 transfers data to and from the frame buffer compressor 200 and thus the data can be transferred to the memory 300 .

That is, during the compression process, each of the image signal processor 110 , the oscillation correction module 120 , the multi-format codec 130 , the GPU 140 and the display 150 of the multimedia IP 100 can transmit the second video signal to the computer via the system bus 400 The data is transferred to the frame buffer compressor 200. Then, the frame buffer compressor 200 may compress the second data into third data, and transmit the third data to the memory 300 via the system bus 400 .

Similarly, even during the decompression process, the frame buffer compressor 200 can receive the third data stored in the memory 300 via the system bus 400 and can decompress it into the second data. Then, the frame buffer compressor 200 may transmit the second data to the image signal processor 110, oscillation correction module 120, multi-format codec 130, GPU 140 and display 150 of the multimedia IP 100 via the system bus 400.

Referring to FIG. 3 , in an image processing device according to an exemplary embodiment of the inventive concept, a memory 300 and a system bus 400 are connected to each other via a frame buffer compressor 200 .

That is, the memory 300 is not directly connected to the system bus 400 , but is only connected to the system bus 400 via the frame buffer compressor 200 . In addition, the image signal processor 110 , oscillation correction module 120 , multi-format codec 130 , GPU 140 and display 150 of the multimedia IP 100 are directly connected to the system bus 400 . Therefore, the image signal processor 110 , oscillation correction module 120 , multi-format codec 130 , GPU 140 and display 150 of the multimedia IP 100 only access the memory 300 through the frame buffer compressor 200 .

In the present invention, the second data is called image data 10 and the third data is called compressed data 20 .

FIG. 4 is a block diagram for explaining the frame buffer compressor of FIGS. 1 to 3 in detail.

Referring to FIG. 4 , the frame buffer compressor 200 includes an encoder 210 (eg, encoding circuit) and a decoder 220 (eg, decoding circuit).

The encoder 210 may receive the image data 10 from the multimedia IP 100 to generate the compressed data 20 . The image data 10 may be transmitted from each of the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140 and the display 150 of the multimedia IP 100. The compressed data 20 can be transmitted to the memory 300 via the multimedia IP 100 and the system bus 400.

On the contrary, the decoder 220 can decompress the compressed data 20 stored in the memory 300 into the image data 10 . The image data 10 can be transmitted to the multimedia IP 100. The image data 10 may be transmitted to each of the image signal processor 110, the oscillation correction module 120, the multi-format codec 130, the GPU 140 and the display 150 of the multimedia IP 100.

FIG. 5 is a block diagram for explaining the encoder of FIG. 4 in detail.

Referring to FIG. 5 , the encoder 210 includes a first mode selector 219 (eg, a logic circuit), a prediction module 211 (eg, a logic circuit), a quantization module 213 (eg, a logic circuit), and an entropy encoding module 215 (eg, a logic circuit). and padding modules 217 (e.g. logic circuits).

In an embodiment, the first mode selector 219 determines whether the encoder 210 is operating in a lossless mode or a lossy mode. When the encoder 210 operates in the lossless mode according to the first mode selector 219, the image data 10 is compressed along the lossless path (Lossless) of FIG. 5, and when the encoder 210 operates in the lossy mode, the image data 10 is compressed along the lossy path (Lossless). Lossy) compressed image data 10.

The first mode selector 219 may receive a signal from the multimedia IP 100 for determining whether to perform lossless compression or perform lossy compression. Lossless compression means compression without data loss. The compression ratio may vary depending on the lossless compressed data. Unlike lossless compression, lossy compression is compression in which part of the data is lost. Compared with lossless compression, lossy compression has a higher compression ratio and can have a fixed compression ratio set in advance.

In the case of the lossless mode, the first mode selector 219 enables the image data 10 to flow along the lossless path to the prediction module 211, the entropy coding module 215 and the padding module 217. On the contrary, in the lossy mode, the first mode selector 219 enables the image data 10 to flow along the lossy path (Lossy) to the prediction module 211 , the quantization module 213 and the entropy coding module 215 .

The prediction module 211 can compress the image data 10 by dividing the image data 10 into prediction data and residual data. The prediction data and residual data together occupy less space than the image data 10 . In an embodiment, the prediction data is the image data of one pixel of the image data, and the residual data is generated from the difference between the prediction data and the image data of the pixel of the image data adjacent to one pixel. For example, if a pixel's image data has a difference between 0 and 255, 8 bits may be needed to represent this value. When neighboring pixels have similar values to one pixel's image data, the residual data for each of the neighboring pixels is much smaller than the predicted data, and therefore the number of data bits representing the image data can be greatly reduced. For example, when pixels with values 253, 254, and 255 are consecutive, if the prediction data is set to 253, it means that the residual data of (253 (prediction), 1 (residual), and 2 (residual)) is sufficient, And the number of bits per pixel used to represent these residual data can be greatly reduced from 8 bits to 2 bits. For example, 24 bits of data for 253, 254, and 255 are due to 8 bits of predicted data for 253 (11111101), 2 bits of residual data for 254-251 = 1 (01), and 255-253= The 2-bit residual data of 2(10) can be reduced to 12 bits.

Therefore, the prediction module 211 can compress the total size of the image data 10 by dividing the image data 10 into prediction data and residual data. Various methods are available for setting the type of forecast data.

The prediction module 211 may perform prediction on a pixel basis or may perform prediction on a block basis. In this case, a block may mean an area formed by a plurality of adjacent pixels. For example, pixel-based prediction may mean that all residual data is generated from one of the pixels, and block-based prediction may mean that for each block, residual data is generated from the pixel corresponding to the block.

The quantization module 213 can further compress the image data 10 compressed by the prediction module 211 . In an exemplary embodiment, the quantization module 213 removes lower bits of the image data 10 through the preset quantization coefficient. Specifically, representative values are selected by multiplying the data by a quantization coefficient, but losses may occur by truncating the decimal part. If the value of the pixel data is between 0 and 2 ⁸ -1 (= 255), the quantization coefficient can be defined as /(2 ⁿ -1)12(n-1) (where n is an integer equal to or less than 8) . However, embodiments of the present invention are not limited thereto. For example, if the prediction data is 253 (11111101), the prediction data can be reduced from 8 bits to 6 bits by removing the lower 2 bits, which results in prediction data of (111111) 252.

However, the removed lower bits are not later restored and are therefore lost. Therefore, the quantization module 213 is only used in lossy mode. However, since the lossy mode has a relatively higher compression ratio than the lossless mode and can have a fixed compression ratio set in advance, information about the compression ratio is not needed separately later.

The entropy coding module 215 can compress the image data 10 compressed by the quantization module 213 in the lossy mode or the image data 10 compressed by the prediction module 211 through entropy coding in the lossless mode. In an embodiment, entropy coding uses a number of video rate allocation bits.

In the exemplary embodiment, the entropy coding module 215 uses Huffman coding to compress the image data 10 . In alternative embodiments, the entropy coding module 215 compresses the image data 10 via exponential golomb coding or golomb rice coding. In an exemplary embodiment, the entropy coding module 215 determines the entropy coding value (eg, k value) based on the data to be compressed, generates a graph based on the k value, and uses the graph to compress the image data 10 .

The padding module 217 can perform padding on the image data 10 compressed by the entropy encoding module 215 in the lossless mode. In this context, padding can mean adding nonsensical material to match specific dimensions. This is explained in more detail below.

The padding module 217 can be enabled not only in lossless mode but also in lossy mode. In the lossy mode, when compressed by the quantization module 213, the image data 10 may be further compressed than the required compression ratio. In this case, even in lossy mode, the image data 10 can be converted into compressed data 20 through the padding module 217 and transferred to the memory 300 . In the exemplary embodiment, padding module 217 is omitted so that padding is not performed.

The compression management module 218 controls the compression sequence of the first component and the second component of the image data 10 . In this article, the image data 10 may be image data conforming to the YUV format.

In this case, the first mode selector 219 determines that the encoder 210 operates in the lossy mode, and therefore the image data 10 is compressed along the lossy path (Lossy) of FIG. 5 . That is, the compression management module 218 controls the configuration of the compression order of the first component and the second component of the image data 10 based on the situation that the frame buffer compressor 200 uses a lossy compression algorithm to compress the image data 10 .

Specifically, the image data 10 may include a first component and a second component. Herein, the first component may include, for example, a luminance component including the Y component of the YUV format (corresponding to the aforementioned "luminance signal"), and the second component may include, for example, a chrominance component including the Cb component and Cr component of the YUV format (corresponding to the aforementioned "luminance signal"). Corresponding to the aforementioned "color difference signal").

The compression management module 218 determines the compression order of the first component and the second component of the image data 10, and the frame buffer compressor 200 decompresses the first component and the second component according to the compression order determined by the compression management module 218. .

That is, if the compression management module 218 determines the compression order of the first component and the second component of the image data 10, the frame buffer compressor 200 uses the prediction module 211, the quantization module 213 and the quantization module 213 of the encoder 210 according to the compression order. The entropy coding module 215 is used to compress the image data 10.

Thereafter, the frame buffer compressor 200 combines the compressed data of the first component and the compressed data of the second component to generate a single bit stream, and may write the generated single bit stream to the memory 300 . In addition, the frame buffer compressor 200 can read a single bit stream from the memory 300 and decompress the read single bit stream to provide the decompressed data to the multimedia IP 100 .

More details of the compression management module 218 for performing this operation will be described later with reference to Figures 9-15.

FIG. 6 is a block diagram for explaining the decoder of FIG. 4 in detail.

Referring to FIG. 6 , the decoder 220 includes a second mode selector 229 (eg, a logic circuit), an unpadding module 227 (eg, a logic circuit), an entropy decoding module 225 (eg, a logic circuit), an inverse quantization module 223 (eg, a logic circuit). circuit) and the prediction compensation module 221 (such as a logic circuit).

The second mode selector 229 determines whether the compressed data 20 stored in the memory 300 has been compressed in a lossless manner or a lossy manner. In the exemplary embodiment, the second mode selector 229 determines whether the compressed data 20 has been compressed by the lossless mode or the lossy mode via the presence or absence of the header. This is explained in more detail below.

In the case of the lossless mode, the second mode selector 229 enables the compressed data 20 to flow along the lossless path to the unpadding module 227, the entropy decoding module 225 and the prediction compensation module 221. On the contrary, in the case of lossy mode, the second mode selector 229 enables the compressed data 20 to flow along the lossy path (Lossy) to the entropy decoding module 225 , the inverse quantization module 223 and the prediction compensation module 221 .

The unpadded module 227 removes the padded portion of the data padded by the padded module 217 of the encoder 210 . When padding module 217 is omitted, unpadded module 227 may be omitted.

The entropy decoding module 225 can decompress data compressed by the entropy encoding module 215 . The entropy decoding module 225 may perform decompression via Huffman coding, Exponential Golomb coding, or Golomb-Rice coding. Since the compressed data 20 includes k values, the entropy decoding module 225 can use the k values to perform decoding.

The inverse quantization module 223 can decompress the data compressed by the quantization module 213 . The inverse quantization module 223 can recover the compressed data 20 compressed using the quantization coefficients determined by the quantization module 213, but it is impossible to completely recover the parts lost during the compression process. Therefore, the inverse quantization module 223 is only used in lossy mode.

The prediction compensation module 221 can recover the data represented by the prediction data as well as the residual data generated by the prediction module 211 . The prediction compensation module 221 may, for example, convert the residual data representations (253 (prediction), 1 (residual), and 2 (residual)) into 253, 254, and 255. For example, the prediction compensation module 221 can restore the data by adding residual data to the prediction data.

The prediction compensation module 221 can recover predictions performed in units of pixels or blocks according to the prediction module 211 . Therefore, the compressed data 20 can be recovered or decompressed and transmitted to the multimedia IP 100 .

When decompressing the compressed data 20 , the decompression management module 228 may execute a merging sequence that appropriately reflects the first and second components determined by the compression management module 218 described above with reference to FIG. 5 to execute the image data 10 of compression work.

The image data 10 of the image processing device according to the exemplary embodiment of the present invention is YUV type data. For example, YUV type data may have YUV 420 format or YUV 422 format.

FIG. 7 is a diagram for explaining three operating modes of YUV 420 format data of an image processing device according to an exemplary embodiment of the inventive concept.

Referring to FIGS. 1 to 7 , the encoder 210 and the decoder 220 of the frame buffer compressor 200 may have three operating modes. The image data 10 in the YUV 420 format may have a luminance signal block Y of 16×16 size, and a first color difference signal block Cb or U and a second color difference signal block Cr or V each of 8×8 size. . In this article, the size of each block means whether it contains pixels arranged in several rows and columns, and the size 16×16 means the size of a block composed of multiple pixels with 16 rows and 16 columns.

The frame buffer compressor 200 may include three operating modes, namely (1) cascade mode, (2) partial cascade mode, and (3) separate mode. The three modes are related to the compression format of the data, and can be operating modes determined respectively according to the lossy mode and the lossless mode.

First, the cascade mode (1) is an operation mode for compressing and decompressing all the brightness signal blocks Y, the first color difference signal block Cb, and the second color difference signal block Cr. That is, as shown in FIG. 5 , in the cascade mode (1), the compressed unit block is a unit block in which the brightness signal block Y, the first color difference signal block Cb and the second color difference signal block Cr are combined. block. Therefore, the size of the compressed unit block can be 16'24. For example, in cascade mode, all blocks (eg, Y block, Cb block, and Cr block) are merged into a single larger block, and a single compression operation is performed on the single larger block.

In the partial concatenation mode (2), the luminance signal block Y is compressed and decompressed respectively, and the first color difference signal block Cb and the second color difference signal block Cr are combined with each other and can be compressed and decompressed jointly. Compression. Therefore, the original size of the brightness signal block Y is 16'16, and the combined block of the first color difference signal block Cb and the second color difference signal block Cr is 16'8. For example, in partial cascading mode, the 8´8 Cr block and the 8´8 Cb block are merged into the second block, the first compression operation is performed on the Y block, and the second block is performed separately Second compression operation.

The separation mode (3) is an operation mode in which all the brightness signal blocks Y, the first color difference signal blocks Cb, and the second color difference signal blocks Cr are individually compressed and decompressed. For example, in split mode, a first compression operation is performed on the Y block, a second compression operation is performed on the Cb block, and a third compression operation is performed on the Cr block. In the exemplary embodiment, in order to make the compressed and decompressed unit blocks have the same size, the luminance signal block Y remains at the original size of 16×16, while the first color difference signal block Cb and the second color difference signal block Cr Increases size to 16´16. For example, the Cb block and Cr block can be enlarged so that they are the same size as the Y block.

Therefore, if the number of blocks Y of the brightness signal is N, the number of the first color difference signal blocks Cb and the number of the second color difference signal blocks Cr can be reduced to N/4 respectively.

When the frame buffer compressor 200 of the image processing device according to an exemplary embodiment of the inventive concept operates in the cascade mode (1), all required data can be read via a single access request to the memory 300 . In particular, the frame buffer compressor 200 may operate more efficiently in the cascade mode (1) when RGB type data is required instead of YUV type data in the multimedia IP 100. This is because it is possible to simultaneously acquire the brightness signal block Y, the first color difference signal block Cb, and the second color difference signal block Cr in the cascade mode (1), and in order to obtain RGB data, all brightness signal blocks are required Y, the first color difference signal block Cb and the second color difference signal block Cr.

When the compression unit block ratio becomes smaller in cascade mode (1), split mode (3) may require lower hardware resources. Therefore, when YUV type data is required instead of RGB type data in the multimedia IP 100, the frame buffer compressor 200 can operate more efficiently in the split mode (3).

Finally, the partial cascade mode (2) is a mode in which there is a compromise between the cascade mode (1) and the separation mode (3). Even when RGB data is required, some cascade modes (2) require lower hardware resources than cascade modes (1). In partially cascaded mode (2), the number of access requests to memory 300 may be fewer (twice) than in split mode (3).

The first mode selector 219 can select to compress the image data 10 in any one of three modes, namely concatenation mode (1), partial concatenation mode (2) or separation mode (3). The first mode selector 219 may receive a signal from the multimedia IP 100 instructing the frame buffer compressor 200 to operate in a given one of the available modes of cascaded mode (1), partially cascaded mode (2), and split mode (3). Operate next time.

The second mode selector 229 can decompress the compressed data 20 according to the compression mode of the first mode selector 219 among the cascade mode (1), the partial cascade mode (2) and the separation mode (3). For example, if the frame buffer compressor 200 was recently used to compress data in the partial cascade mode (2), the second mode selector 229 may assume that the partial cascade mode (2) is used to compress the data to be decompressed. .

FIG. 8 is a conceptual diagram for explaining three operating modes of YUV 422 format data of the image processing device according to an exemplary embodiment of the inventive concept.

Referring to FIGS. 1 to 6 and 8 , the encoder 210 and the decoder 220 of the frame buffer compressor 200 also have three operating modes in the YUV 422 format. The image data 10 in the YUV 422 format may have a luminance signal block Y of 16×16 size, and a first color difference signal block (Cb or U) and a second color difference signal block (Cb or U) each of 16×8 size. Cr or V).

In the cascade mode (1), the compressed unit block is a block in which the luminance signal block Y, the first color difference signal block Cb, and the second color difference signal block Cr are merged into a single larger block. Therefore, the size of the compressed unit block may be 16×32.

In the partial concatenation mode (2), the luminance signal block Y is compressed and decompressed respectively, and the first color difference signal block Cb and the second color difference signal block Cr are merged with each other and compressed and decompressed together. . Therefore, the luminance signal block Y remains at its original size of 16×16, and the block in which the first color difference signal block Cb and the second color difference signal block Cr are coupled may be 16×16. Therefore, the sizes of the merged blocks in which the brightness signal block Y, the first color difference signal block Cb and the second color difference signal block Cr are combined may be the same.

The separation mode (3) is an operation mode in which all the brightness signal blocks Y, the first color difference signal blocks Cb, and the second color difference signal blocks Cr are individually compressed and decompressed. In the embodiment, in order to make the size of the compressed and decompressed unit blocks the same, the brightness signal block Y remains at the original size of 16×16, while the first color difference signal block Cb and the second color difference signal block Cr are increased to 16×16 size.

Therefore, when the number of brightness signal blocks Y is N, the number of the first color difference signal blocks Cb and the number of the second color difference signal blocks Cr can be reduced to N/2 respectively.

The operation of the above image processing device will now be described with reference to FIGS. 9 to 15 . The operation of the image processing device described below may be performed in the cascade mode (1) described above with reference to FIGS. 7 and 8 .

9 to 11 are schematic diagrams for explaining the operation of an image processing device for YUV 420 format data according to an exemplary embodiment of the inventive concept.

Figures 9 and 10 show that when the image data 10 complies with the YUV 420 format, the target compression ratio of the image data 10 is 50% and the color depth is 8 bits.

Referring to FIG. 9 , the first component (ie, the brightness component) of the image data 10 corresponds to the Y plane 510Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Cb plane of the image data 10 510Cb and Cr flat 510Cr.

For Y plane 510Y, since the target compression ratio is 50% and the color depth is 8 bits, the luma component target bits can be calculated as follows.

Luminance component target bits = 16 × 16 × 8 × 0.5 bits = 128 × 8 bits

For the Cb plane 510Cb and the Cr plane 510Cr, the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cb plane component target bits = 8×8×8×0.5 bits = 32×8 bits

Cr plane component target bits = 8×8×8×0.5 bits = 32×8 bits

Therefore, the chrominance component target bits obtained by combining the Cb plane component target bits and the Cr plane component target bits are 64×8 bits.

When the luma component and the chroma component are compressed based on the target bits calculated in this manner, both the luma component and the chroma component are compressed with the same compression ratio of 50%.

The compressed bit stream 512 corresponding to the compression result may be formed as a single bit stream in the order, for example, Y component bit stream 512Y, Cb component bit stream 512Cb, and Cr component bit stream 512Cr. However, the scope of the inventive concept is not limited thereto, and the frame buffer compressor 200 may compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. One component of compressed data and a second component of compressed data are combined to generate a compressed bit stream 512 . That is, the order of the Y component bit stream 512Y, the Cb component bit stream 512Cb, and the Cr component bit stream 512Cr in the compressed bit stream 512 may be different from the order shown in FIG. 9 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 interleaves and combines the compressed data of the first component and the compressed data of the second component to generate the compressed bit stream 512 . That is, the Y component bit stream 512Y, Y, Cb component bit stream 512Cb and Cr component bit stream 512Cr.

For example, the compressed bit stream 512 may include the Y component bit stream of the first pixel of the image data 10, the Cb component bit stream of the first pixel, the Cr component bit stream of the first pixel, and the th component bit stream of the image data 10. The Y component bit stream of the two pixels, the Cb component bit stream of the second pixel, and the Cr component bit stream of the second pixel are interleaved and combined in the order of connection, and the Y component, Cb component, and Staggered order of Cr components.

Generally speaking, the human eye is more sensitive to brightness changes than color changes. Therefore, in the image data 10 according to the YUV format, the luminance component may be of higher importance than the chrominance component.

However, when compressing image data 10 according to the YUV format, since the pixel correlation of the chroma component is higher than that of the luma component, prediction is easier, and therefore, the compression efficiency of the chroma component becomes higher than that of the luma component.

Therefore, in order to further improve the quality of the compressed data 20 obtained by compressing the image data 10, relative compression may be applied by allocating more bits to the luma component with lower compression efficiency than the chrominance component with good compression efficiency. Methods to improve compression ratio.

Referring to FIG. 10 , the first component (ie, the brightness component) of the image data 10 corresponds to the Y plane 520Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Cb plane of the image data 10 520Cb and Cr flat 520Cr.

In this embodiment, the compression management module 218 controls the compression order such that the frame buffer compressor 200 compresses the chroma component first, followed by the luma component. To this end, the compression management module 218 calculates the chrominance component target bits before calculating the luma component target bits.

For Cb plane 520Cb and Cr plane 520Cr, each of the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cr plane component target bits = 8×8×8×0.5 bits = 32×8 bits

Cr plane component target bits = 8×8×8×0.5 bits = 32×8 bits

The compression management module 218 allocates chroma component target bits to perform compression on the chroma component first before calculating the luma component target bits. Specifically, the compression management module 218 determines the quantization parameter (QP) value and the entropy k value, so that the used bits of the chroma component are smaller than and closest to the value of the chroma target bits, thereby adjusting the chroma Components perform compression.

Therefore, we assume that 28×8 bits are used for compression of the Cb plane component, and 30×8 bits are used for compression of the Cb plane component. That is, in the embodiment of the present invention, the used bits of the chroma component ((28+30)×8 bits) are smaller than the target bits of the chroma component ((32+32)×8) bits).

The compression management module 218 uses the chroma component usage bits of the compressed data on the chroma component to calculate the luma component target bits on the luma component.

The compression management module 218 may calculate the luma component target bits as follows.

Luminance component target bits = total target bits - chrominance component used bits = 192 × 8 bits - (28 + 30) × 8 bits = 132 × 8 bits

In this paper, for the 16×16 size Y plane (520Y), the 8×8 size Cb plane (520Cb), and the 8×8 size Cr plane (520Cr), the total target bits are obtained by making the total ( The value obtained by multiplying the size of 192 by the color depth value of 8. In addition, 0.5 means the target compression ratio.

The compression management module 218 allocates the thus calculated luma component target bits to compress the luma component.

According to this embodiment, the compressed bit stream 512 of FIG. 9 includes a 128-bit Y component bit stream 512Y, a 32-bit Cb component bit stream 512Cb, and a 32-bit Cr component bit stream 512Cr. , a compressed bit stream 522 including a 28-bit Cb component bit stream 522Cb, a 30-bit Cr component bit stream 522Cr, and a 134-bit Y component bit stream 522Y becomes the compression result.

As described above, the frame buffer compressor 200 can compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. The two components of compressed data are combined to generate a compressed bit stream 522. That is, the order of the Y component bit stream 522Y, the Cb component bit stream 522Cb, and the Cr component bit stream 522Cr in the compressed bit stream 522 may be different from the order shown in FIG. 10 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 interleaves and combines the compressed data of the first component and the compressed data of the second component to generate the compressed bit stream 522 . That is, the Y component bit stream 522Y, Y, Cb component bit stream 522Cb and Cr component bit stream 522Cr. In this way, within the same total target bits, by allocating more bits to luma components with higher importance and relatively lower compression efficiency, and by allocating fewer bits to relatively different colors The degree component can improve the compression quality of the compressed data 20 obtained by compressing the image data 10 .

Next, referring to FIG. 11 , the first component (ie, the brightness component) of the image data 10 corresponds to the Y plane 530Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Y plane 530Y of the image data 10 . Cb plane 530 Cb and Cr plane 530Cr.

In this embodiment, the compression management module 218 controls the compression order such that the frame buffer compressor 200 compresses the chroma component first, followed by the luma component. To this end, the compression management module 218 calculates the chrominance component target bits before calculating the luma component target bits. However, the difference from the embodiment of FIG. 10 is that the compression management module 218 may previously set the compression ratio of the chroma component to, for example, 40.625%, which is less than 50%.

Therefore, for the Cb plane 530Cb and the Cr plane 530Cr, the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cb plane component target bits=8×8×8×0.40625 bits=26×8 bits

Cr plane component target bits=8×8×8×0.40625 bits=26×8 bits

The compression management module 218 first performs compression on the chroma component according to a compression ratio set in advance to, for example, 40.625%. Specifically, the compression management module 218 determines that the QP value and the entropy k value meet the preset compression ratio, and performs compression on the chroma component. Therefore, 26x8 bits are used to compress the Cb plane component, and 26x8 bits are used to compress the Cb plane component.

The compression management module 218 may calculate the luma component target bits as follows.

Luminance component target bits = total target bits - chrominance component target bits according to the preset compression ratio = 192 × 8 bits - (26 + 26) × 8 bits = 140 × 8 bits

In this article, for the 16×16 size Y plane (530Y), the 8×8 size Cb plane (530Cb), and the 8×8 size Cr plane (530Cr), the total target bits are obtained by making the total ( The value obtained by multiplying the size of 192 by the color depth value of 8. In addition, 0.5 means the target compression ratio.

The compression management module 218 allocates the thus calculated luma component target bits to compress the luma component.

Therefore, in at least one embodiment of the inventive concept, when the image data 10 complies with the YUV 420 format, the chroma component target bits can be calculated by the compression management module 218 as the total target bits/3×W (herein, W is a positive real number equal to or less than 1). For example, the embodiment of FIG. 11 shows a case where the value of W is 0.40625.

According to this embodiment, the compressed bit stream 512 of FIG. 9 includes a 128-bit Y component bit stream 512Y, a 32-bit Cb component bit stream 512Cb, and a 32-bit Cr component bit stream 512Cr. , the compressed bit stream 532 including the 26-bit Cb component bit stream 532Cb, the 26-bit Cr component bit stream 532Cr, and the 140-bit Y component bit stream 532Y becomes the compression result.

As described above, the frame buffer compressor 200 can compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. The two components of compressed data are combined to generate a compressed bit stream 532. That is, the order of the Y component bit stream 532Y, the Cb component bit stream 532Cb, and the Cr component bit stream 532Cr in the compressed bit stream 532 may be different from the order shown in FIG. 11 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 generates the compressed bit stream 532 by interleaving and combining the compressed data of the first component and the compressed data of the second component. That is, the Y component bit stream 532Y, Y, Cb component bit stream 532Cb and Cr component bit stream 532Cr.

As described above, within the same total target bits, by allocating more bits to luma components with higher importance and relatively lower compression efficiency, and by allocating fewer bits to relatively different The chrominance component can improve the compression quality of the compressed data 20 obtained by compressing the image data 10 .

12 to 14 are schematic diagrams for explaining the operation of an image processing device for YUV 422 format data according to an exemplary embodiment of the inventive concept.

Figures 12 and 13 show that when the image data 10 complies with the YUV 422 format, the target compression ratio of the image data 10 is 50% and the color depth is 8 bits.

Referring to FIG. 12 , the first component (ie, the brightness component) of the image data 10 corresponds to the Y plane 540Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Cb plane of the image data 10 540Cb and Cr flat 540Cr.

For Y plane 540Y, since the target compression ratio is 50% and the color depth is 8 bits, the luma component target bits can be calculated as follows.

Luminance component target bits = 16×16×8×0.5 bits = 128×8 bits

For the Cb plane 540Cb and the Cr plane 540Cr, the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cb plane component target bits=16×8×8×0.5 bits=64×8 bits

Cr plane component target bits=16×8×8×0.5 bits=64×8 bits

Therefore, the chrominance component target bits obtained by adding the Cb plane component target bits and Cr plane component target bits are 128×8 bits.

When the luma component and the chroma component are compressed based on the target bits calculated in this manner, both the luma component and the chroma component are compressed with the same compression ratio of 50%.

The compressed bit stream 542 corresponding to the compression result may be formed as a single bit stream in the order, for example, Y component bit stream 542Y, Cb component bit stream 542Cb, and Cr component bit stream 542Cr. However, the scope of the inventive concept is not limited thereto. For example, the frame buffer compressor 200 can compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. The compressed data of the components are combined to generate a compressed bit stream 542. That is, the order of the Y component bit stream 542Y, the Cb component bit stream 542Cb, and the Cr component bit stream 542Cr in the compressed bit stream 542 may be different from the order shown in FIG. 12 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 generates the compressed bit stream 542 by interleaving and combining the compressed data of the first component and the compressed data of the second component. That is, the Y component bit stream 542Y, Y, Cb component bit stream 542Cb and Cr component bit stream 542Cr.

For example, the compressed bit stream 542 may include the Y component bit stream of the first pixel of the image data 10 , the Cb component bit stream of the first pixel, the Cr component bit stream of the first pixel, and the The Y component bit stream of the second pixel, the Cb component bit stream of the second pixel, and the Cr component bit stream of the second pixel are interleaved and combined in the order of connection, and the Y component and Cb component can also be determined in any order. and the staggered order of Cr components.

Referring to FIG. 13 , the first component (ie, the luminance component) of the image data 10 corresponds to the Y plane 550Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Cb plane of the image data 10 550 Cb and Cr flat 550Cr.

In this embodiment, the compression management module 218 controls the compression order such that the frame buffer compressor 200 compresses the chroma component first, followed by the luma component. To this end, the compression management module 218 first calculates the chrominance component target bits before calculating the luma component target bits.

For the Cb plane 550Cb and the Cr plane 550Cr, the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cb plane component target bits=16×8×8×0.5 bits=64×8 bits

Cr plane component target bits=16×8×8×0.5 bits=64×8 bits

The compression management module 218 allocates chroma component target bits to perform compression on the chroma component first before calculating the luma component target bits. Specifically, the compression management module 218 determines the QP value and the entropy k value so that the chrominance component usage bit becomes a value smaller than and closest to the chrominance target bit, and performs compression on the chrominance component.

Therefore, we assume that 62×8 bits are used for compression of the Cb plane component, and 60×8 bits are used for the compression of the Cb plane component. That is, in the embodiment of the present invention, the chroma component usage bits ((62+60)×8 bits) are smaller than the chroma component target bits ((64+64)0×8) bits).

The compression management module 218 uses the chroma component usage bits of the compressed data on the chroma component to calculate the luma component target bits of the luma component.

The compression management module 218 can now calculate the luma component target bits as follows.

Luminance component target bits = total target bits - chrominance component used bits = 256 × 8 bits - (62 + 60) × 8 bits = 134 × 8 bits.

In this article, for the 16×16 size Y plane 550Y, the 8×8 size Cb plane 550Cb, and the 8×8 size Cr plane 550Cr, the total target bits are obtained by making the total size (16+8+8 )×16×0.5=256 multiplied by the color depth value of 8. In addition, 0.5 means the target compression ratio.

The compression management module 218 allocates the thus calculated luma component target bits to compress the luma component.

According to an embodiment of the present invention, different from the compressed bit stream of FIG. 12 including a 128-bit Y component bit stream 542Y, a 64-bit Cb component bit stream 542Cb, and a 64-bit Cr component bit stream 542Cr. 542, the compressed bit stream 552 including the 62-bit Cb component bit stream 552Cb, the 60-bit Cr component bit stream 552Cr, and the 134-bit Y component bit stream 552Y becomes the compression result.

As described above, the frame buffer compressor 200 can compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. The two components of compressed data are combined to generate a compressed bit stream 552. That is, the order of the Y component bit stream 552Y, the Cb component bit stream 552Cb, and the Cr component bit stream 552Cr in the compressed bit stream 552 may be different from the order shown in FIG. 13 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 generates the compressed bit stream 552 by interleaving and combining the compressed data of the first component and the compressed data of the second component. That is, the Y component bit stream 552Y, Y, Cb component bit stream 552Cb and Cr component bit stream 552Cr.

In this way, within the same total target bits, by allocating more bits to luma components with higher importance and relatively lower compression efficiency, and by allocating fewer bits to relatively different colors The degree component can improve the compression quality of the compressed data 20 obtained by compressing the image data 10 .

Next, referring to FIG. 14 , the first component (ie, the brightness component) of the image data 10 corresponds to the Y plane 560Y of the image data 10 , and the second component (ie, the chrominance component) of the image data 10 corresponds to the Y plane 560Y of the image data 10 . Cb plane 560Cb and Cr plane 560Cr.

In the embodiment of the present invention, the compression management module 218 controls the compression sequence so that the frame buffer compressor 200 first compresses the chroma component and then compresses the luma component. To this end, the compression management module 218 first calculates the chrominance component target bits before calculating the luma component target bits. However, the difference from the embodiment of FIG. 13 is that the compression management module 218 previously set the compression ratio of the chroma component to, for example, 40.625%, which is less than 50%.

Therefore, for the Cb plane 560Cb and the Cr plane 560Cr, the Cb plane component target bits and Cr plane component target bits can be calculated as follows.

Cb plane component target bits=16×8×8×0.40625 bits=52×8 bits

Cr plane component target bits=16×8×8×0.40625 bits=52×8 bits

The compression management module 218 first performs compression on the chroma component according to a compression ratio set in advance to, for example, 40.625%. Specifically, the compression management module 218 determines that the QP value and the entropy k value meet the preset compression ratio, and performs compression on the chroma component. Therefore, 52x8 bits are used to compress the Cb plane component, and 52x8 bits are used to compress the Cb plane component.

The compression management module 218 can now calculate the luma component target bits as follows.

Luminance component target bits = total target bits - chroma component target bits according to the preset compression ratio = 256 × 8 bits - (52 + 52) × 8 bits = 152 × 8 bits.

In this article, for the 16×16 size Y plane 560Y, the 8×8 size Cb plane 560Cb, and the 8×8 size Cr plane 560Cr, the total target bits are obtained by making the total size (16+8+8 )×8=256 multiplied by the color depth value of 8. In addition, 0.5 means the target compression ratio.

The compression management module 218 allocates the thus calculated luma component target bits and compresses the luma component.

Therefore, in at least one embodiment of the inventive concept, when the image data 10 complies with the YUV 422 format, the chroma component target bits can be calculated by the compression management module 218 as the total target bits/2×W (herein, W is a positive real number equal to or less than 1). For example, the embodiment of FIG. 14 shows a case where the value of W is 0.5.

According to an embodiment of the present invention, different from the compressed bit stream of FIG. 12 including a 128-bit Y component bit stream 542Y, a 64-bit Cb component bit stream 542Cb, and a 64-bit Cr component bit stream 542Cr. 542, the compressed bit stream 562 including the 52-bit Cb component bit stream 562Cb, the 52-bit Cr component bit stream 562Cr, and the 152-bit Y component bit stream 562Y becomes the compression result.

As described above, the frame buffer compressor 200 can compress the first component (eg, luma component) and the second component (eg, chroma component) in any order different from the compression order. The two components of compressed data are combined to generate a compressed bit stream 562. That is, the order of the Y component bit stream 562Y, the Cb component bit stream 562Cb, and the Cr component bit stream 562Cr in the compressed bit stream 562 may be different from the order shown in FIG. 14 .

In an exemplary embodiment of the inventive concept, the frame buffer compressor 200 generates the compressed bit stream 562 by interleaving and combining the compressed data of the first component and the compressed data of the second component. That is, the Y component bit stream 562Y, Y, Cb component bit stream 562Cb and Cr component bit stream 562Cr.

In this way, within the same total target bits, by allocating more bits to luma components with higher importance and relatively lower compression efficiency, and by allocating fewer bits to relatively different colors The degree component can improve the compression quality of the compressed data 20 obtained by compressing the image data 10 .

FIG. 15 is a flowchart illustrating an operating method of an image processing apparatus according to an exemplary embodiment of the inventive concept.

Referring to FIG. 15 , an operating method of an image processing device according to an exemplary embodiment of the inventive concept includes calculating a target bit of a chrominance component ( S1501 ).

Specifically, before calculating the target bits of the chrominance component, the image processing device calculates the total target bits based on the target compression ratio of the image data 10 in the YUV format, and then calculates the total target bits for compressing the Cb component including the YUV format. and the chroma component target bit of the chroma component of the Cr component.

In addition, the method includes allocating chrominance component target bits to compress the chrominance component (S1503).

Additionally, the method includes obtaining the number of compressed bits of the chroma component (S1505). The number of compressed bits of the chroma component may be referred to as chroma component usage bits of the compressed data of the chroma component.

The method further includes calculating a target bit of the luma component (eg, a target bit of the luma component) (S1507). The lightness component is the Y component in YUV format.

Additionally, the method includes allocating luma component target bits to compress the luma component (S1509).

In addition, when the sum of the luma component usage bits and the chrominance component usage bits of the compressed data of the luma component is less than the total target bits, the method may further include adding dummy bits after the compressed data of the luma component,

Those of ordinary skill in the art will appreciate that many changes and modifications can be made to the illustrative embodiments without materially departing from the principles of the inventive concept.

10‧‧‧Image data 20‧‧‧Compressed data 100‧‧‧Multimedia IP110‧‧‧Image signal processor 120‧‧‧Oscillation correction module 130‧‧‧Multi-format codec 140‧‧‧Graphics processing unit 150 ‧‧‧Displayer 200‧‧‧Frame buffer compressor 210‧‧‧Encoder 211‧‧‧Prediction module 213‧‧‧Quantization module 215‧‧‧Entropy coding module 217‧‧‧Padding module 218‧ ‧‧Compression management module 219‧‧‧Mode selector 220‧‧‧Decoder 221‧‧‧Prediction compensation module 223‧‧‧Inverse quantization module 225‧‧‧Entropy decoding module 227‧‧‧Unfilled module Group 228‧‧‧Decompression Management Module 229‧‧‧Mode Selector 300‧‧‧Memory 400‧‧‧System Bus 510Cb, 520Cb, 530Cb, 540Cb, 550Cb, 560Cb‧‧‧Cb Planar 510Cr, 520Cr, 530Cr, 540Cr, 550Cr, 560Cr‧‧‧Cr plane 510Y, 520Y, 530Y, 540Y, 550Y, 560Y‧‧‧Y plane 512, 522, 532, 542, 552, 562‧‧‧Compressed bit stream 512Cb, 522Cb , 532Cb, 542Cb, 552Cb, 562Cb‧‧‧Cb component bit stream 512Cr, 522Cr, 532Cr, 542Cr, 552Cr, 562Cr‧‧‧Cr component bit stream 512Y, 522Y, 532Y, 542Y, 552Y, 562Y‧‧ ‧Y Component bit stream S1501‧‧‧Step S1503‧‧‧Step S1505‧‧‧Step S1507‧‧‧Step S1509‧‧‧Step

The present invention will become clearer by describing exemplary embodiments thereof in detail with reference to the accompanying drawings, in which: FIGS. 1 to 3 are block diagrams for explaining an image processing apparatus according to some embodiments of the inventive concept. FIG. 4 is a block diagram for explaining the frame buffer compressor of FIGS. 1 to 3 in detail. FIG. 5 is a block diagram for explaining the encoder of FIG. 4 in detail. FIG. 6 is a block diagram for explaining the decoder of FIG. 4 in detail. FIG. 7 is a conceptual diagram for explaining three operating modes of YUV 420 format data of the image processing device according to an exemplary embodiment of the inventive concept. FIG. 8 is a conceptual diagram for explaining three operating modes of YUV 422 format data of the image processing device according to an exemplary embodiment of the inventive concept. 9 to 11 are schematic diagrams for explaining the operation of an image processing device for YUV 420 format data according to an exemplary embodiment of the inventive concept. 12 to 14 are schematic diagrams for explaining the operation of an image processing device for YUV 422 format data according to an exemplary embodiment of the inventive concept. FIG. 15 is a flowchart illustrating an operating method of an image processing apparatus according to an exemplary embodiment of the inventive concept.

100‧‧‧Multimedia IP

110‧‧‧Image signal processor

120‧‧‧oscillation correction module

130‧‧‧Multiple format codecs

140‧‧‧Graphics processing unit

150‧‧‧Monitor

200‧‧‧Frame Buffer Compressor

300‧‧‧Memory

400‧‧‧System Bus

Claims (19)

An image processing device includes: a multimedia intellectual property (IP) block configured to process image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) configured to compress the the image data to generate compressed data and store the compressed data in the memory, wherein the frame buffer compressor includes logic circuitry configured to control the third portion of the image data A compression order of one component and the second component such that the frame buffer compressor first compresses the second component and then compresses the first component, wherein the first component includes a luma component and the third component The two components contain the chrominance component. The image processing device as claimed in claim 1, wherein after compressing the first component and the second component according to the compression order determined by the logic circuit, the frame buffer compressor The compressed data of the first component is combined with the compressed data of the second component to generate a single bit stream. The image processing device as claimed in claim 2, wherein the frame buffer compressor compresses the first component in any order different from the compression order of the first component and the second component. The compressed data of the second component are combined with the compressed data of the second component to generate the single bit stream. The image processing device as claimed in claim 2, wherein the frame buffer compressor interleaves and combines the compressed data of the first component and the compressed data of the second component to generate The single bit stream. The image processing device as described in item 1 of the patent application scope, wherein The image data is image data conforming to the YUV format, the brightness component includes the Y component in the YUV format, and the chrominance component includes the Cb component and Cr component in the YUV format. The image processing device as claimed in claim 1 of the patent application, wherein the logic circuit calculates the total target bits and the chroma component target bits of the chroma component based on the target compression ratio of the image data, and allocates all the target bits. the chroma component target bits to compress the chroma component, calculate the luma component target bits of the luma component using chroma component usage bits of the compressed data for the chroma component, and allocate the luma component target bits Specifies the luma component target bits to compress the luma component. The image processing device as claimed in claim 6 of the patent application, wherein the used bits of the chroma component are smaller than the target bits of the chroma component. The image processing device as described in item 6 of the patent application, wherein when the image data complies with the YUV 420 format, the chroma component target bits are set to the total target bits/3×W, where W is a positive real number <=1. The image processing device as described in item 6 of the patent application, wherein when the image data complies with the YUV 422 format, the chroma component target bits are set to the total target bits/2×W, where W is a positive real number <=1. The image processing device of claim 6, wherein the luma component target bits are calculated by subtracting the chrominance component usage bits from the total target bits. An image processing device comprising: a multimedia intellectual property (IP) block configured to process a YUV format image data; a memory; and a frame buffer compressor (FBC) configured to compress the image data to generate compressed data and store the compressed data in the memory, wherein the frame buffer The compressor includes logic circuitry configured to control a compression sequence such that compression of the YUV format including the image data is performed before compressing a luma component of the Y component of the YUV format including the image data. Compression of the chrominance component of the Cb component and Cr component. The image processing device as claimed in claim 11 of the patent application, wherein the logic circuit calculates the total target bits and the chroma component target bits of the chroma component based on the target compression ratio of the image data, and allocates all the target bits. the chroma component target bits to compress the chroma component, calculate the luma component target bits of the luma component using chroma component usage bits of the compressed data for the chroma component, and allocate the luma component target bits Specifies the luma component target bits to compress the luma component. The image processing device as claimed in claim 12 of the patent application, wherein the used bits of the chroma component are smaller than the target bits of the chroma component. The image processing device as described in claim 13 of the patent application, wherein the logic circuit determines a quantization parameter (QP) value and an entropy k encoding value so that the chrominance component uses bits that are smaller than and closest to the chrominance component. The value of the target bit. The image processing device as described in item 12 of the patent application, wherein when the image data complies with the YUV 420 format, the chroma component target bits are set to the total target bits/3×W, where W is a positive real number >=1. The image processing device as described in item 12 of the patent application, wherein when the image data complies with the YUV 422 format, the chroma component target bits are set to the total target bits/2×W, where W is a positive real number <=1. The image processing device of claim 12, wherein the luma component target bits are calculated by subtracting the chrominance component usage bits from the total target bits. The image processing device as claimed in claim 12 of the patent application, wherein when the sum of the luminance component usage bits and the chrominance component usage bits of the luminance component of the compressed data is less than the total target bits, the logic circuit adds dummy bits after the compressed data of the luma component. An operating method of an image processing device, the method includes: calculating the total target bits based on the target compression ratio of image data conforming to the YUV format; calculating the chroma component for compressing the Cb component and Cr component of the YUV format The chroma component target bits; allocate the chroma component target bits to compress the chroma component; use the chroma component usage bits of the compressed data of the chroma component to calculate the YUV format containing a luma component target bit of the luma component of the Y component; allocating the luma component target bits to compress the luma component; and when the luma component of the compressed data uses bits of the luma component and the When the sum of bits used by the chroma component is less than the total target bits, dummy bits are added after the compressed data of the luma component.