TWI818416B - Wafer - Google Patents

Abstract

A wafer includes a ring part and a processed part. The processed part is connected to the ring part. The processed part has a top surface which has been grounded and a bottom surface opposite to the top surface. The processed part is surrounded by the ring part. An area where the top surface connects to the ring part is a curved surface facing upwards.

Description

wafer

The present invention relates to a wafer, and in particular to a processed wafer.

In the semiconductor industry, the method of manufacturing a wafer includes first forming an ingot and then slicing the ingot to obtain a wafer. The crystal is produced in a high-temperature environment, for example. Currently, crystal growth methods include the Czochralski process, Physical Vapor Transport (PVT), and High Temperature Chemical Vapor Deposition (HT-CVD). And liquid phase epitaxy (Liquid Phase Epitaxy, LPE), etc.

In a common crystal ingot manufacturing method, a seed crystal is placed in a high-temperature furnace. The seed crystal contacts gaseous or liquid raw materials, and semiconductor material is formed on the surface of the seed crystal until a crystal ingot with the desired size is obtained. Crystals can have different crystal structures depending on the manufacturing method and raw materials.

After the growth of the crystal is completed, the temperature of the crystal is cooled to room temperature by furnace cooling or other means. After the crystal has cooled down, use a cutting machine to remove the head and tail ends of the crystal with poor shape, and then use a grinding wheel to grind the crystal to the desired size (for example, 3 inches to 12 inches). In some examples, a flat edge or V-shaped groove is ground on the edge of the crystal. This flat edge or V-shaped groove is suitable for marking the crystallization direction of the crystal or for fixing the crystal.

Then the wafer is sliced to obtain multiple wafers. For example, a method of slicing crystals includes cutting with a knife or a steel wire and abrasive grains (such as diamond grains). Generally speaking, after the wafer is sliced, the thickness of the wafer is adjusted through a grinding process. At the same time, the grinding process can also make the surface of the wafer relatively flat. However, during the grinding process, the wafer is easily damaged due to abrasives or Debris generated by grinding gets stuck on the surface of the wafer, causing scratches on the surface of the wafer.

When the current common wafer grinding process processes the wafer to a thinner thickness, it is easy to cause the wafer to break due to the high intensity of the processing. Therefore, a Taiko grinding process has been developed that is used to reduce the thickness of the wafer to less than 200 microns (or even less than 50 microns). During the wafer grinding process using the Taiko drum grinding process, a certain thickness is retained at the edge of the wafer to enhance the structural strength of the wafer. However, such a design results in the fine chips generated when grinding or polishing the wafer being unable to be well removed due to the thick edge of the wafer. It is easy to cause unnecessary scratches and impacts on the wafer during processing, seriously damaging the processing quality and geometric shape of the wafer. Therefore, how to improve the chip removal ability of wafers during grinding or polishing has become a problem that still needs to be solved today.

The invention provides a wafer that can improve the problem of scratches on the edges of processed parts.

At least one embodiment of the present invention provides a wafer. The wafer includes a ring portion and a processing portion. The machined part connects the ring part. The machined portion has a ground top surface and a bottom surface opposite the top surface. The machined part is surrounded by an annular part. The area where the top surface connects to the annular part is an upwardly curved arc surface, and the arc surface causes the thickness of the processed part in the local area connecting the annular part to increase as it approaches the annular part.

FIG. 1 is a schematic top view of a wafer grinding process according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention.

Referring to FIGS. 1 and 2 , a grinding process is performed on the wafer 100 . For example, the wafer 100 is placed on the work platform C, and then the top surface of the wafer 100 is polished with the polishing head P. In some embodiments, one of the working platform C and the grinding head P rotates in the clockwise direction, and the other rotates in the counterclockwise direction, but the invention is not limited thereto. In this embodiment, the grinding process is Taiko grinding. In this embodiment, the material of the wafer 100 includes, for example, silicon (Si), gallium arsenide (GaAs), indium phosphide (InP), indium antimonide (InSb), gallium nitride (GaN), silicon carbide (SiC). ), zinc selenide (ZnSe) or other suitable semiconductor materials.

The polished wafer 100 includes an annular portion 110 and a processed portion 120 . The machined portion 120 connects the annular portion 110 . The processed portion 120 has a ground top surface T1 and a bottom surface B1 opposite the top surface T1. The machined portion 120 is surrounded by the annular portion 110 . The thickness of the annular portion 110 is greater than the thickness of the processing portion 120 . Therefore, the annular portion 110 can increase the strength of the wafer 100 and reduce warp of the wafer 100 . In addition, since the annular portion 110 of the wafer 100 is thicker, the edge of the wafer 100 is less likely to be cracked or chipped during processing.

In this embodiment, the area where the top surface T1 of the processing part 120 connects to the annular part 110 is an upwardly curved arc surface CS (ie, curved in a direction close to the top surface T2 of the annular part 110). The arc surface CS makes The thickness of the machined portion 120 in the local area connected to the annular portion 110 increases as it approaches the annular portion 110 .

When the thickness of the processed part 120 in the local area connected to the annular part 110 increases as it approaches the annular part 110, as shown in FIG. 8A, at the arc surface CS, the thickness of the processed part 120 is relatively close to the annular part 110. Thickness The fine particles Z are stuck at the interface between the processed part 120 and the annular part 110 to reduce the problem of scratches on the edge of the processed part 120. In some embodiments, the cross-sectional shape of the top surface T1 of the processed portion 120 is W-shaped or U-shaped. This embodiment does not limit the thickness of the entire processed portion 120 to increase as it approaches the annular portion 110 .

If the area where the top surface T1 of the processed portion 120 connects to the annular portion 110 is a downwardly curved arc surface CS (that is, curved in a direction away from the top surface T2 of the annular portion 110) or a plane perpendicular to the side of the annular portion , then the fine particles Z generated during the grinding process of the wafer 100 are easily stuck at the interface between the processing part 120 and the annular part 110, and cause scratches on the edges of the processing part 120. These scratches may cause subsequent deposition on the wafer. The film layers above 100 (such as epitaxial layer, metal layer or insulating layer) have problems with poor yield. For example, as shown in FIG. 8B , the area where the top surface T1 of the processing part 120 connects to the annular part 110 is a downwardly curved arc surface CS. At the arc surface CS, the processing part 120 is relatively close to the annular part 110 The thickness 120 has scratches on the edges. In some embodiments, the area where the top surface T1 of the processing part 120 connects to the annular part 110 is a downwardly curved arc surface CS, which may cause the cross-sectional shape of the top surface T1 of the processing part 120 to be M-shaped or n-shaped.

Returning to FIG. 1 , in this embodiment, in order to further avoid scratches on the edge of the processing part 120 of the wafer 100 , the structure of the top surface T1 of the processing part 120 is adjusted. In this embodiment, the thickness of the annular portion 110 is Rim _H microns, and Rim _H ranges from 200 microns to 1500 microns, and preferably from 300 microns to 900 microns, and most preferably from 400 microns to 800 microns. In some embodiments, the annular portion 110 of the wafer 100 is chamfered, that is, the top surface T2 of the annular portion 110 and the bottom surface B2 of the annular portion 110 are arcs or bevels, and the thickness of the annular portion 110 Rim _H is defined as the maximum thickness of the annular portion 110 (ie, the maximum thickness from the top surface T2 to the bottom surface B2). In this embodiment, the grinding head P grinds downward along the side wall S2 of the annular portion 110 so that the extending direction of the side wall S2 of the annular portion 110 is substantially perpendicular to the work platform C (or the bottom surface B1 of the processing part 120). The bottom surface B1 of the processed part 120 and the bottom surface B2 of the annular part 110 are substantially flush. It can also be said that the bottom surface B1 and the bottom surface B2 are substantially continuous surfaces.

The maximum thickness at the location where the machined portion 120 connects to the annular portion 110 is _TE microns. In other words, the maximum thickness of the portion of the processed portion 120 connecting the side wall S2 of the annular portion 110 is _TE microns. In other words, the distance from the junction of the side wall S2 of the annular portion 110 to the top surface T1 of the processing portion 120 to the bottom surface B2 of the annular portion 110 is _TE micrometers. The design of the curved surface CS is to make it easy to remove the debris generated during the machining process. Therefore, the smaller the difference between the thickness Rim _H and the thickness T _E , the better. In some embodiments, 0.5 ≤ thickness _TE /thickness Rim _H ≤ 1, and 0.75 ≤ thickness _TE /thickness Rim _H ≤ 1 is preferred.

The width (or diameter) of the processed portion 120 is L mm, and L is 70 mm to 300 mm. The part of the processed part located within 0.15L of the annular part 110 is defined as the edge area R3. The arc surface CS is located in the edge area R3, and the arc surface CS causes the thickness of the processed part 120 in the edge area R3 to increase away from the annular shape. Part 110 and reduced. In this embodiment, the upper surface of the entire edge region R3 of the processing part 120 is a curved surface CS, that is, the horizontal width is limited. In some embodiments, the horizontal width of the upwardly curved arc surface CS in the edge region R3 is X, and 0.01L ≤ X ≤ 0.15L. In a preferred embodiment, 0.02L ≤ X ≤ 0.14L. In a more preferred embodiment, 0.03L ≤ X ≤ 0.13L.

The part of the processed part 120 located at a distance of 0.15L to 0.3L from the annular part 110 is defined as the first region R1. The thinnest part of the processed part 120 is located in the first region R1, and the thickness of the thinnest part of the processed part R1 is T. _L micron. In this embodiment, ( _TE - T _L ) is greater than or equal to 4 microns, so that the fine particles generated by grinding the wafer 100 are easier to be eliminated along the arc surface CS. In this embodiment, the thickness of the thinnest part from the top surface T1 of the processing part 120 to the bottom surface B1 of the processing part 120 is _TL microns.

The part of the processed part 120 located at a distance of 0.3L to 0.5L from the annular part 110 is defined as the second region R2. The thickness of the thickest part of the processed part 120 located in the second region R2 is _TH micrometer, and _TH is 0.1 Rim _H to 0.7Rim _H . In this embodiment, the thickness of the thickest part from the top surface T1 of the processed part 120 located in the second region R2 to the bottom surface B1 of the processed part 120 located in the second region R2 is _TH micrometer. In this embodiment, _{TE is} greater than _TH , and _TH is greater than _TL . In some embodiments, the arc surface CS surrounds the first region R1 and the second region R2.

In this embodiment, the average thickness of the processed part 120 in the second region R2 is greater than the average thickness of the processed part 120 in the first region R1, thereby preventing the thinnest part of the processed part 120 from appearing in the second region R2, reducing the The probability of a portion having a thickness smaller than _TL appearing in the second region R2 prevents the fine chips generated by processing from staying in the second region R2 and increases the probability of the fine chips being discharged from the edge region R3.

In this embodiment, the cross-sectional shape of the top surface T1 of the processed portion 120 is similar to a W-shape.

Based on the above, the wafer 100 of this embodiment can avoid the problem of scratches on the edge of the processed part 120 after grinding.

FIG. 3 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention.

It must be noted here that the embodiment of Figure 3 follows the component numbers and part of the content of the embodiment of Figures 1 and 2, where the same or similar numbers are used to represent the same or similar elements, and references to the same technical content are omitted. instruction. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

Referring to FIG. 3 , the polished wafer 100 a includes an annular portion 110 and a processed portion 120 . The machined portion 120 connects the annular portion 110 . The processed portion 120 has a ground top surface T1 and a bottom surface B1 opposite the top surface T1. The machined portion 120 is surrounded by the annular portion 110 . The thickness of the annular portion 110 is greater than the thickness of the processing portion 120. Therefore, the annular portion 110 can increase the strength of the wafer 100a and reduce warp of the wafer 100a. In addition, since the annular portion 110 of the wafer 100 is thicker than the processed portion 120, the edge of the wafer 100a is less likely to be cracked or chipped during processing.

In this embodiment, the area where the top surface T1 of the processing part 120 connects to the annular part 110 is an upwardly curved arc surface CS (that is, bent in a direction close to the top surface T2 of the annular part 110), thereby making the crystal The fine particles generated during the grinding process of the circle 100a are easily eliminated along the aforementioned arc surface CS, preventing the aforementioned fine particles from getting stuck at the interface between the processed part 120 and the annular part 110, thereby reducing the problem of scratches on the edge of the processed part 120.

In this embodiment, the part of the processed part 120 located within 0.15L of the annular part 110 is defined as the edge area R3, and the arc surface CS causes the thickness of the processed part 120 in the edge area R3 to increase away from the annular part 110 And decreases, and the arc surface CS is located in the edge region R3. In this embodiment, the upper surface of the entire edge region R3 of the processing part 120 is a curved surface CS, that is, the horizontal width X of the curved surface CS is 0.15L, but the invention is not limited thereto. In some embodiments, the horizontal width of the upwardly curved arc surface CS in the edge region R3 is X, and 0.01L ≤ X ≤ 0.15L. In a preferred embodiment, 0.02L ≤ X ≤ 0.14L. In a more preferred embodiment, 0.03L ≤ X ≤ 0.13L.

In this embodiment, the portion of the processed portion 120 located at a distance of 0.15L to 0.5L from the annular portion is defined as the first region R1. The thickness of the thinnest portion of the processed portion 120 in the first region R1 is _TL microns. In other words, the thickness of the thinnest portion from the top surface T1 of the processed portion 120 located in the first region R1 to the bottom surface B1 of the processed portion 120 located in the first region R1 is _TL microns. The thickness of the thickest portion of the processed portion 120 in the first region R1 is _TH micrometer. In other words, the thickness of the thickest portion from the top surface T1 of the processed portion 120 located in the first region R1 to the bottom surface B1 of the processed portion 120 located in the first region R1 is _TH micrometer. In some embodiments, the arcuate surface CS surrounds the first region R1.

In this embodiment, the thickest part of the processed part 120 in the first region R1 appears at the position closest to the edge region R3 of the first region R1, but the invention is not limited thereto. In other embodiments, the thickest portion of the machined portion 120 in the first region R1 occurs elsewhere in the first region R1.

In this embodiment, ( _TE - _TL ) is greater than or equal to ( _TH - _{TL +} 1.5 microns), where _TH is 0.1Rim _H to 0.7Rim _H . In some embodiments, the first region R1 of the processed portion 120 is substantially planar, that is, _TH equals _TL , and therefore, ( _TE - _TL ) is greater than or equal to 1.5 microns.

In this embodiment, the cross-sectional shape of the top surface T1 of the processing part 120 is similar to a U-shape.

Based on the above, the wafer 100a of this embodiment can avoid the problem of scratches on the edge of the processed part 120 after grinding.

4 is a graph showing a thickness distribution of a cross-section of a processed portion of a wafer according to an embodiment of the present invention. 5 is a graph showing a thickness distribution of a cross-section of a processed portion of a wafer according to another embodiment of the present invention.

It must be noted here that the embodiment of Figure 4 and the embodiment of Figure 5 follow the component numbers and part of the content of the embodiment of Figures 1 and 2, where the same or similar numbers are used to represent the same or similar elements, and Explanations of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

In Figures 4 and 5, the horizontal axis represents the lateral position of the cross section of the processed part of the wafer, in millimeters; the vertical axis represents the thickness of the processed part of the wafer at different positions, in microns. In the embodiment of FIG. 4 and the embodiment of FIG. 5, _TE is greater than _TH , and _TH is greater than _TL . (T _E - T _L ) is greater than or equal to 4 microns.

Based on the above, the wafer can avoid the problem of scratches on the edges of the processed parts after grinding.

FIG. 6 is a graph showing a thickness distribution of a cross-section of a processed part of another wafer according to an embodiment of the present invention. FIG. 7 is a graph showing a thickness distribution of a cross-section of a processed portion of a wafer according to yet another embodiment of the present invention.

It must be noted here that the embodiment of Figure 6 and the embodiment of Figure 7 follow the component numbers and part of the content of the embodiment of Figure 3, where the same or similar numbers are used to represent the same or similar elements, and the same or similar elements are omitted. Description of technical content. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be described again here.

In Figures 6 and 7, the horizontal axis represents the lateral position of the cross section of the processed part of the wafer, in millimeters; the vertical axis represents the thickness of the processed part of the wafer at different positions, in microns. In the embodiment of FIG. 6 and the embodiment of FIG. 7, _TE is greater than _TH , and _TH is greater than _TL . (T _E - T _L ) is greater than or equal to ( _TH - T _{L +} 1.5 microns).

Based on the above, the wafer can avoid the problem of scratches on the edges of the processed parts after grinding.

FIG. 9 is a partial cross-sectional schematic diagram of a wafer grinding process according to an embodiment of the present invention. For example, FIG. 9 is a partial cross-sectional schematic diagram of the wafer grinding process in any of the aforementioned embodiments.

Referring to FIG. 9 , the wafer 100 is polished with the polishing head P. In this embodiment, the grinding head P includes a grinding stone (grinding abrasives) P1 and a grinding wheel P2. A plurality of grindstones P1 are provided on the grinding wheel P2. In this embodiment, the area where the top surface T1 of the processing part 120 connects to the annular part 110 is an upwardly curved arc surface CS (ie, curved in a direction close to the top surface T2 of the annular part 110). The arc surface CS makes The thickness of the machined portion 120 in the local area connected to the annular portion 110 increases as it approaches the annular portion 110 . In some embodiments, assuming that the width (or diameter) of the processed part 120 is L mm (please refer to Figure 2 or Figure 3), the radius of curvature of the R angle (Radius) of the arc surface CS is CR, 0.01L ≤ CR ≤ L . In a preferred embodiment, 0.01L ≤ CR ≤ 0.5L. In a more preferred embodiment, 0.01L ≤ CR ≤ 0.25L. In some embodiments, the width W (or diameter) of the grindstone P1 on the grinding head P is smaller than the radius of curvature of the R angle of the arc surface CS. Therefore, the grinding head P can better control the width and shape of the arc surface CS. , so that 0.01L<CR<L.

100, 100a: Wafer 110: Ring part 120: Processing part B1, B2: Bottom surface C: Working platform CR: Curvature radius CS: Arc surface D: Direction L: Width P: Grinding head P1: Grinding stone P2: Grinding wheel R1: first area R2: second area R3: edge area Rim _H , _TE , _TL , _TH , X1, X2: thickness S2: side wall T1, T2: top surface W: width Z: particles

FIG. 1 is a schematic top view of a wafer grinding process according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of a wafer according to an embodiment of the present invention. 4 is a graph showing a thickness distribution of a cross-section of a processed portion of a wafer according to an embodiment of the present invention. 5 is a graph showing a thickness distribution of a cross-section of a processed portion of another wafer according to an embodiment of the present invention. FIG. 6 is a graph showing a thickness distribution of a cross-section of a processed part of another wafer according to an embodiment of the present invention. 7 is a graph showing a thickness distribution of a cross-section of a processed portion of yet another wafer according to an embodiment of the present invention. FIG. 8A is a schematic cross-sectional view of a partial area of a wafer according to an embodiment of the present invention. 8B is a schematic cross-sectional view of a partial area of a wafer according to a comparative example of the present invention. FIG. 9 is a schematic cross-sectional view of a wafer grinding process according to an embodiment of the present invention.

100:wafer

110: Ring part

120: Processing part

B1, B2: bottom surface

CS:Curved surface

L: Width

R1: first area

R2: Second area

R3: Edge area

Rim _H , _TE , _TL , _TH : Thickness

S2: side wall

T1, T2: top surface

Claims (10)

A wafer includes: an annular portion; and a processing portion connected to the annular portion, wherein the processing portion has a ground top surface and a bottom surface relative to the top surface, and the processing portion is connected to the annular portion Surrounded by the area where the top surface connects to the annular part is an upwardly curved arc surface, and the arc surface causes the thickness of the processed part in the local area connected to the annular part to increase as it approaches the annular part , where the width of the processed part is L mm, the part of the processed part located within 0.15L of the annular part is defined as an edge area, and the arc surface causes the thickness of the processed part in the edge area to follow decreases away from the annular portion, and the arc surface is located in the edge area, and the horizontal width of the arc surface is X, and 0.01L

X

0.15L, and the radius of curvature of the R angle of the arc surface is CR, 0.01L

CR

L. The wafer as described in claim 1, wherein the maximum thickness of the processed part connecting the annular part is _TE microns, the width of the processed part is L mm, and the processed part is located at a distance of 0.15 from the annular part. The part from L to 0.3L is defined as a first region, and the part of the processed part located at a distance of 0.3L to 0.5L from the annular part is defined as a second region, in which the thinnest part of the processed part is located in the first region. region, and the thickness of the thinnest part of the processed part is TL _microns , where the thickness of the thickest part of the processed part is located in the second region is _TH microns, where ( _TE - T _L ) is greater than or equal to 4 microns, where the thickness of the annular portion is Rim _H microns, and _TH is _0.1RimH to _0.7RimH . The wafer of claim 2, wherein _TE is greater than _TH , and _TH is greater than _TL . The wafer of claim 2, wherein the average thickness of the processed portion in the second region is greater than the average thickness of the processed portion in the first region. The wafer of claim 2, wherein the extending direction of the inner side wall of the annular portion is perpendicular to the bottom surface of the processing portion, and the side wall of the annular portion is connected to the junction of the top surface of the processing portion The distance to the bottom surface of the annular part is T _E microns, the thickness of the thinnest part from the top surface of the processed part to the bottom surface of the processed part is _TL microns, and the top surface of the processed part located in the second area to the The thickness of the thickest portion of the bottom surface of the processed portion located in the second region is _TH microns. The wafer as described in claim 1, wherein the maximum thickness of the processed part connecting the annular part is _TE microns, the width of the processed part is L mm, and the processed part is located at a distance of 0.15 from the annular part. The portion L to 0.5L is defined as a first region, wherein the thickness of the thinnest part of the processed part in the first region is _TL microns, and wherein the thickness of the thickest part of the processed part in the first region is T _H microns, where ( _TE - T _L ) is greater than or equal to (TH - _{T L +} 1.5 microns), where the thickness of the annular portion is Rim _H microns, and T _H is 0.1Rim _H to 0.7Rim _H . The wafer of claim 6, wherein _TH equals _TL and ( _TE - _TL ) is greater than or equal to 1.5 microns. The wafer of claim 6, wherein the extension direction of the inner side wall of the annular portion is perpendicular to the bottom surface of the processing portion, and the side wall of the annular portion is connected to the interface of the top surface of the processing portion The distance from the bottom surface of the annular part is T _E microns, and the thickness of the thinnest part from the top surface of the processed part located in the first area to the bottom surface of the processed part located in the first area is T _L microns. The thickness of the thickest portion from the top surface where the portion is located in the first region to the bottom surface where the processed portion is located in the first region is _TH microns. The wafer as claimed in claim 1, wherein the bottom surface of the processed portion is substantially flush with the bottom surface of the annular portion. The wafer according to claim 1, wherein the maximum thickness of the position where the processed part is connected to the annular part is TE microns, the thickness of the annular part is RimH microns, and 0.5

TE/RimH

1.

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