TWI814618B - Matrix computing device and operation method thereof - Google Patents

Abstract

A matrix computing device and an operation method for the matrix computing device are provided. The matrix computing device includes a storage unit, a control circuit and a computing circuit. The storage unit includes a weight matrix. The control circuit re-orders the weight matrix according to a shape of the output matrix to determine a weight readout order of the weights. The computing circuit receives the weights based on the weight readout order, and performs a matrix computation on the weights and an input matrix to generate a computing matrix. The control circuit performs reshape transformation on the computing matrix to generate an output matrix, and writes the output matrix into the storage unit.

Description

Matrix operation device and operation method thereof

The present invention relates to a computing device and an operating method for the computing device, and in particular, to a matrix computing device and an operating method for the matrix computing device.

Figure 1 is a schematic diagram of matrix multiplication operation. Figure 1 shows matrices MA, MB. Matrix MA is a matrix having M columns (rows) and K rows (columns). Matrix MB is a matrix with K columns and N rows. Therefore, multiplying matrix MA by matrix MB produces matrix MP with M columns and N rows.

It should be noted that based on matrix multiplication, the vector directions of matrices MA, MB are different from each other. That is to say, the reading order of the element values in the matrix MB is not the same as the reading order of the element values in the matrix MA. Generally speaking, the arrangement order of the element values of the matrix is to complete the arrangement of the element columns first. Once the matrix operation device completes the arrangement of a single element column, the matrix operation device will arrange the next element column. The order of reading the element values of the matrix is to read the element column first. However, based on matrix multiplication, the reading order of element values of matrix MB is to read element rows first. Once the matrix operation device is completed Arrangement into a single element row, the matrix operation device will arrange the next element row.

The matrix operation device uses additional transpose tools (such as circuits or algorithms) to perform transpose operations on the matrix MB. Therefore, the cost of the matrix operation device increases.

The present invention provides a matrix operation device and an operation method that can avoid transposition operations.

The matrix operation device of the present invention includes a storage unit, a control circuit and an operation circuit. The storage unit includes a weight matrix. The control circuit is coupled to the storage unit. The control circuit reorders the arrangement order of the plurality of weights in the weight matrix according to the matrix shape of the output matrix to determine the weight reading order of the plurality of weights. The weight reading order is different from the arrangement order of the multiple weights in the weight matrix. The computing circuit is coupled to the control circuit. The operation circuit receives the plurality of weights based on the weight reading sequence, and performs matrix operation on the plurality of weights and the input data matrix to generate an operation matrix. The control circuit performs dimension conversion on the operation matrix to generate an output matrix, and writes the output matrix into the storage unit.

The operating method of the present invention is used in a matrix operation device. The matrix operation device includes a storage unit and an operation circuit. The operation method includes: re-sequencing the arrangement order of the plurality of weights in the weight matrix of the storage unit according to the matrix shape of the output matrix to determine the weight readout order of the plurality of weights, wherein the weight readout order is different from The order of arrangement of the multiple weights in the weight matrix; determined by the operation circuit based on The weight reading sequence receives the multiple weights, performs matrix operations on the multiple weights and the input data matrix to generate an operation matrix; and performs dimension conversion on the operation matrix to generate an output matrix, and writes the output matrix to storage unit.

Based on the above, the matrix operation device and the operation method reorder the arrangement order of the plurality of weights in the weight matrix according to the matrix shape of the output matrix to determine the weight reading order of the plurality of weights. The operation circuit performs matrix operation on the plurality of weights and the input data matrix based on the weight reading order to generate an operation matrix. It should be noted that the weight reading order changes the order of elements of the operation matrix. The order in which the elements of the operation matrix are arranged helps achieve the transposition effect when performing dimension conversion. Therefore, the matrix operation device does not need to use additional transposition tools to perform transpose operations on the matrix. Therefore, the operating cost of the matrix operation device of the present invention will not be increased.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, embodiments are given below and described in detail with reference to the accompanying drawings.

100:Matrix operation device

110:Storage unit

120:Control circuit

130, 230: Arithmetic circuit

231(1)~231(N): Multiply and accumulate circuit

AD: Adder

CH(1)~CH(N): channel

E ₁ ~E _N , E ₁₁ ~E _TS : operation element value

IN ₁ ~IN _M : Input element value

MA, MB, MP: matrix

MC: operation matrix

MI: input data matrix

MO: output matrix

MT: transposed matrix

MU: Multiplier

MV: product value

MW: weight matrix

ORD: weight reading order

RO1: The first read column

RO2: The second read column

RO3: The third read column

RON:Nth read column

RO(S+1): The (S+1)th read column

RG: register

S100: How to operate

S110~S130: steps

W ₁₁ ~W _NM : weight

Figure 1 is a schematic diagram of matrix multiplication operation.

FIG. 2 is a schematic diagram of a matrix operation device according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of matrix operations according to an embodiment of the present invention.

Figure 4A is a schematic diagram of a simple example of current matrix operations.

FIG. 4B is a schematic diagram of a simple example of matrix operation according to an embodiment of the present invention.

FIG. 5 is a schematic circuit diagram of a computing circuit according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of an operating method according to an embodiment of the present invention.

Some embodiments of the present invention will be described in detail with reference to the accompanying drawings. The component symbols cited in the following description will be regarded as the same or similar components when the same component symbols appear in different drawings. These embodiments are only part of the present invention and do not disclose all possible implementations of the present invention. Rather, these embodiments are only examples within the scope of the patent application of the invention.

Please refer to FIG. 2 , which is a schematic diagram of a matrix operation device according to an embodiment of the present invention. In this embodiment, the matrix operation device 100 includes a storage unit 110, a control circuit 120 and an operation circuit 130. The storage unit 110 includes a weight matrix MW. In this embodiment, the weight matrix MW is, for example, a two-dimensional matrix having N columns and M rows (the invention is not limited to this). The weight matrix MW includes weights W ₁₁ ~W _NM . In this embodiment, the storage unit 110 may be implemented by a memory element well known to those skilled in the art.

In this embodiment, the control circuit 120 is coupled to the storage unit 110 . The control circuit 120 re-orders the arrangement order of the weights W ₁₁ ~W _NM according to the matrix shape of the output matrix MO to determine the weight readout order ORD of the weights W ₁₁ ~W _NM . The output matrix MO is, for example, a two-dimensional matrix having T columns and S rows (the present invention is not limited to this). In this embodiment, S and T are positive integers greater than 1 respectively.

In this embodiment, during the process of writing the weights W ₁₁ ~W _NM into the storage unit 110 , the weights W ₁₁ ~W _NM are first written in a column manner. That is to say, the weights W ₁₁ ~W _1M are sequentially written to the first column of the weight matrix MW. Next, the weights W ₂₁ ~W _2M are sequentially written to the second column of the weight matrix MW, and so on. Therefore, in the row direction of the weight matrix MW, the weights W ₁₁ ~W _1M , the weights W ₂₁ ~W _2M , ..., and the weights W _N1 ~W _NM are arranged in order. Through reordering, the weight reading order ORD of the weights W ₁₁ ~W _NM is different from the arrangement order of the weights W ₁₁ ~W _NM in the weight matrix MW. For example, the control circuit 120 may first read the weights W ₁₁ -W _1M based on the weight reading order ORD, then read the weights W ₃₁ -W _3M , and then read the weights W ₂₁ -W _2M .

In this embodiment, the operation circuit 130 is coupled to the control circuit 120 . The operation circuit 130 receives the weights W ₁₁ ~W _NM based on the weight readout sequence ORD. Therefore, in the row direction, the column order of the weights W ₁₁ ~W _NM received by the operation circuit 130 is different from the column order of the weights W ₁₁ ~W _NM in the weight matrix MW. The operation circuit 130 also receives the input data matrix MI, and performs matrix operations on the weights W ₁₁ ~W _NM and the input data matrix MI to generate the operation matrix MC. In this embodiment, the input data matrix MI is, for example, a one-dimensional matrix having M columns and 1 row (the invention is not limited to this). Therefore, the input data matrix MI includes input element values IN ₁ ~IN _M . The operation circuit 130 performs matrix multiplication on the weights W ₁₁ ~W _NM and the input data matrix MI to generate the operation matrix MC. Therefore, the operation matrix MC is a one-dimensional matrix with N columns and 1 row (the present invention is not limited to this). The operation matrix MC includes operation element values E ₁ to E _N .

The control circuit 120 performs dimension conversion (reshape) on the operation matrix MC to generate the output matrix MO. The control circuit 120 writes the output matrix MO into the storage unit 110 . The control circuit 120 increases the dimension of the operation matrix MC to generate the output matrix MO. In this embodiment, the control circuit 120 converts the dimension of the operation matrix MC from one dimension to two dimensions, thereby generating the output matrix MO. For example, the control circuit 120 reads the operation element values E _{1 -EN} in sequence, and writes the operation element values E _{1 -EN} to the output matrix MO sequentially and in a column manner first. Therefore, matrix MO includes operation element values E ₁₁ ~E _TS . It should be understood that the operation element value E ₁₁ is equal to E ₁ . The operand element value E _TS is equal to _EN .

It is worth mentioning here that the control circuit 120 reorders the order of the weights W ₁₁ ~W _NM in the weight matrix MW according to the matrix shape of the output matrix MO to determine the weight reading of the weights W ₁₁ ~W _NM Out of sequence ORD. The operation circuit 130 performs matrix operation on the weights W ₁₁ ~W _NM and the input data matrix MI based on the weight readout sequence ORD to generate the operation matrix MC. It should be noted that the weight reading order ORD changes the arrangement order of the operation element values E ₁ ~ _EN of the operation matrix MC. The arrangement order of the operation element values E ₁ ~E _N helps to achieve the transposition effect when performing dimension conversion. In this way, the matrix operation device 100 does not need to use additional transposition tools to perform transpose operation on the operation matrix MC or the output matrix MO. The operating cost of the matrix operation device 100 will not be increased.

In this embodiment, the control circuit 120 may be a logic circuit, a memory controller, an input/output buffer (I/O buffer) or a central processing unit (CPU). to implement. In this embodiment, the operation circuit 130 may be suitable for matrix operation of a neural network (neural network, NN).

In some embodiments, the input data matrix MI may be provided by an external device. In some embodiments, the input data matrix MI may be provided by the storage unit 110 .

For ease of explanation, the weight matrix MW is exemplified as a two-dimensional array. The input data matrix MI is exemplified as a one-dimensional array. However, the present invention is not limited to this. In some embodiments, the weight matrix MW may be a one-dimensional array with multiple columns and a single row. The input data matrix MI can be a two-dimensional array.

Please refer to FIG. 2 and FIG. 3 at the same time. FIG. 3 is a schematic diagram of a matrix operation device according to an embodiment of the present invention. In this embodiment, the weight matrix MW includes multiple weight columns. The first weight column includes weights W ₁₁ ~W _1M . The second weight column includes weights W ₂₁ ~W _2M . The (T+1)th weight column includes weights W _(T+1)1 ~W _(T+1)M . The (2T+1)th weight column includes weights W _(2T+1)1 ~W _(2T+1)M . By the same token, the Nth weight column includes weights W _N1 ~W _NM . The control circuit 120 determines the weight reading order ORD of the weights W ₁₁ ~W _NM in an interleave manner according to the number of rows and columns of the output matrix MO.

In this embodiment, the output matrix MO is, for example, a two-dimensional matrix having T columns and S rows. The control circuit 120 will use the first weight column of the weight matrix MW as the first readout column RO1, and the (nT+1)th weight column of the weight matrix MW as the (n+1)th readout column RO(n+1 ). n is less than S. The control circuit 120 takes the second weight column of the weight matrix MW as the (S+1)th readout column RO(S+1), and takes the (nT+2)th weight column of the weight matrix MW as the (S+n+ 1) Read the column (not shown). Therefore, the readout matrix MW' generated based on the weighted readout order ORD is formed. In other words, the control circuit 120 converts the weight matrix MW into the readout matrix MW' according to the weight readout order ORD. The first readout column RO1 includes weights W ₁₁ ~W _1M . The second readout column RO2 includes weights W _(T+1)1 ~W _(T+1)M (ie, n=1). The third readout column RO3 includes weights W _(2T+1)1 ~ W _(2T+1)M (ie, n=2). The (S+1)th readout column RO(S+1) includes weights W ₂₁ ~W _2M .

The arrangement of the weights W ₁₁ ~W _NM received by the operation circuit 130 based on the weight readout sequence ORD is equivalent to the readout matrix MW'. The operation circuit 130 multiplies the read matrix MW′ and the input data matrix MI to generate the operation matrix MC. The operation element value E ₁ will be equal to the multiplication and accumulation (Multiply Accumulate) value of the weight W ₁₁ ~W _1M of the first read column RO1 and the input element value IN ₁ ~IN _M. The operation element value E ₂ will be equal to the multiplication and accumulation value of the weight W ₂₁ ~W _2M of the second read column RO2 and the input element value IN ₁ ~IN _M , and so on. The operation element values E ₁ and E ₂ are as shown in formula (1) and formula (2) respectively.

The control circuit 120 receives the operation matrix MC and converts the dimension of the operation matrix MC from one dimension to two dimensions to generate the output matrix MO. It should be noted that the weight reading order ORD changes the arrangement order of the operation element values E ₁ ~ _EN of the operation matrix MC. The arrangement order of the operation element values E ₁ ~E _N helps to achieve the transposition effect when performing dimension conversion.

In some embodiments, the control circuit 120 stores the readout matrix MW′ to the storage unit 110 . Therefore, in the case where the weights W ₁₁ ~W _NM are not updated, the control circuit 120 can read the readout matrix MW′ without performing a resequencing operation. In some embodiments, the readout matrix MW′ and the weight matrix MW are stored in different segments of the storage unit 110 respectively. In some embodiments, when the readout matrix MW' is stored in the storage unit 110, the readout matrix MW' overwrites the weight matrix MW.

For example, please refer to FIG. 4A and FIG. 4B at the same time. FIG. 4A is a schematic diagram of a simple example of a current matrix operation. FIG. 4B is a schematic diagram of a simple example of matrix operation according to an embodiment of the present invention. Figure 4A shows how the output matrix MO is generated. In the current matrix operation, the weight matrix MW is multiplied by the input data matrix MI to generate the operation matrix MC. Therefore, the operation element values of the operation matrix MC are "37", "50", "18", and "36" in order. After dimension conversion, the operation element values of the output matrix MO are also "37", "50", "18", and "36" in order. It should be noted that when the output matrix MO is used as the matrix MB as shown in Figure 1, the output matrix MO must be formed through a transposition operation to form the transpose matrix MT, so that the arrangement of the operation element values is changed to "37" , "18", "50", "36". The generation of the output matrix MO already involves the reception of the input element values. The input element values are the variables received by the neural network when it operates. Therefore, the completed transpose operation of the output matrix MO is an additional matrix operation. In the application of neural network, the transpose operation of the output matrix MO must be performed when the neural network is operating. Therefore, the transpose operation of the output matrix MO will consume computational costs.

FIG. 4B shows how the output matrix MO is generated in this embodiment. In this embodiment, the weight matrix MW is first reordered to generate the readout matrix MW'. It should be noted that in neural network-like applications, weights are parameters rather than variables. Therefore, the reordering of the weight matrix MW can be completed offline. The reordering of the weight matrix MW does not need to be performed when the neural network is operating. In other words, the generation of the readout matrix MW' will not increase the computational cost and power consumption when operating a neural network. The readout matrix MW' will be multiplied by the input data matrix MI to generate the operation matrix MC. Therefore, the operation element values of the operation matrix MC are "37", "18", "50", and "36" in order. After dimension conversion, the operation element values of the output matrix MO are also "37", "18", "50", and "36" in order. The output matrix MO shown in Figure 4B is equal to the transposed matrix MT shown in Figure 4A. That is to say, this embodiment can increase the reordering of the weight matrix MW to achieve the result of the transpose operation of the output matrix MO as shown in Figure 4A.

Please refer to FIG. 2 , FIG. 3 and FIG. 5 at the same time. FIG. 5 is a circuit schematic diagram of a computing circuit according to an embodiment of the present invention. In this embodiment, the operation circuit 230 includes multiply-accumulate circuits 231(1)˜231(N). The multiplication and accumulation circuits 231(1)~231(N) are respectively coupled to the control circuit 120 through different channels. The multiply-accumulate circuits 231(1)~231(N) respectively receive the corresponding weight columns of the weight matrix MW through different channels. The multiply-accumulate circuit 231(1) is coupled to the control circuit 120 through the channel CH(1). The multiply-accumulate circuit 231(2) is coupled to the control circuit 120 through the channel CH(2). By the same token, the multiply-accumulate circuit 231(N) is coupled to the control circuit 120 through the channel CH(N).

Taking this embodiment as an example, the multiply-accumulate circuit 231(1) receives the corresponding weight sequence (ie, the first readout column RO1) through the channel CH(1). Therefore, the multiply-accumulate circuit 231(1) will receive the weights W ₁₁ ~W _1M in sequence through the channel CH(1), and perform multiply-accumulate computing on the weights W ₁₁ ~W _1M and the input data matrix MI. MAC) to generate the operation element value E ₁ of the operation matrix MC. The multiply-accumulate circuit 231(2) receives the corresponding weight sequence (ie, the second readout column RO2) through the channel CH(2). Therefore, the multiply-accumulate circuit 231(2) will receive the weights W _(T+1)1 ~W _(T+1)M in sequence through the channel CH(2), and calculate the weights W _(T+1)1 ~W _{( T+1)M} and the input data matrix MI perform a multiplication and accumulation operation to generate the operation element value E ₂ of the operation matrix MC. In the same way, the multiply-accumulate circuit 231(N) will sequentially receive the weights W _N1 ~W _NM of the Nth read column RON through the channel CH(N), and multiply the weights W _N1 ~W _NM and the input data matrix MI The accumulation operation is performed to generate the operation element value _EN of the operation matrix MC.

Taking the multiply-accumulate circuit 231(1) as an example, the multiply-accumulate circuit 231(1) includes a multiplier MU, a register RG, and an adder AD. The register RG stores the operation element value E ₁ at the first time. At this time, the operation element value E ₁ may be an initial value (for example, "0"). Multiplier MU is coupled to channel CH(1) and input data matrix MI. The multiplier MU receives the weight W ₁₁ and the input data IN ₁ in the input data matrix MI at the first time, and multiplies the weight W ₁₁ and the input data IN ₁ to generate a product value MV. The adder AD receives at the first time the operation element value E ₁ stored in the register RG and the product value MV from the multiplier MU. The adder AD performs an addition operation on the operation element value E ₁ and the product value MV to generate a new operation element value E ₁ , and stores the new operation element value E ₁ into the register RG. At the second time, the multiplier MU receives the weight W ₁₂ and the input data IN ₂ in the input data matrix MI, and multiplies the weight W ₁₂ and the input data IN ₂ to generate a new product value MV. The adder AD receives the new product value MV and the operation element value E ₁ stored in the register RG at the first time. The adder AD adds the operation element value E ₁ and the new product value MV to generate a new operation element value E ₁ , and so on.

In this embodiment, the circuit configuration of the multiply-accumulate circuits 231(2)~231(N) is similar to the circuit configuration of the multiply-accumulate circuit 231(1), so it will not be repeated here.

Please refer to FIG. 2 and FIG. 6 at the same time. FIG. 6 is a schematic diagram of an operating method according to an embodiment of the present invention. The operation method S100 is applicable to the matrix operation device 100 . The operation method S100 includes steps S110 to S130. In step S110, the control circuit 120 reorders the order of the weights W ₁₁ ~W _NM in the weight matrix MW of the storage unit 110 according to the matrix shape of the output matrix MO to determine the weights of the weights W ₁₁ ~W _NM Read the sequential ORD.

In step S120, the operation circuit 130 receives the weights W ₁₁ ~W _NM based on the weight readout sequence ORD, and performs matrix operations on the weights W ₁₁ ~W _NM and the input data matrix MI to generate the operation matrix MC.

In step S130 , the control circuit 120 performs dimension conversion on the operation matrix MC to generate an output matrix MO, and writes the output matrix MO into the storage unit 110 . The implementation details of steps S110 to S130 have been clearly explained in the embodiments of FIGS. 1 to 5 , so they will not be repeated here.

To sum up, the matrix operation device and the operation method reorder the arrangement order of the plurality of weights in the weight matrix according to the matrix shape of the output matrix to determine the weight reading order of the plurality of weights. The arithmetic circuit reads out the order based on the weight. The matrix operation is performed on the plurality of weights and the input data matrix in order to generate an operation matrix. The weight reading order changes the order of elements of the operation matrix. The order in which the elements of the operation matrix are arranged helps achieve the transposition effect when performing dimension conversion. Therefore, the matrix operation device does not need to use additional transposition tools to perform transpose operations on the matrix. The operating cost of the matrix operation device of the present invention will not be increased.

Although the present invention has been disclosed above through embodiments, they are not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some modifications and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the appended patent application scope.

100:Matrix operation device

110:Storage unit

120:Control circuit

130: Arithmetic circuit

E ₁ ~E _N , E ₁₁ ~E _TS : operation element value

IN ₁ ~IN _M : Input element value

ORD: weight reading order

MC: operation matrix

MI: input data matrix

MO: output matrix

MW: weight matrix

W ₁₁ ~W _NM : weight

Claims (16)

A matrix operation device, including: Storage unit, including weight matrix; a control circuit coupled to the storage unit and configured to reorder the arrangement order of a plurality of weights in the weight matrix according to a matrix shape of the output matrix to determine a weight readout of the plurality of weights Sequence, wherein the weight reading order is different from the ranking order; and an operation circuit, coupled to the control circuit, configured to receive the plurality of weights based on the weight reading order, and perform matrix operations on the plurality of weights and the input data matrix to generate an operation matrix, The control circuit performs dimension conversion on the operation matrix to generate the output matrix, and writes the output matrix into the storage unit. The matrix operation device according to claim 1, wherein the control circuit determines the weight reading order of the plurality of weights in an interleave manner based on the number of rows and columns of the output matrix. The matrix operation device as described in claim 2, wherein: The output matrix is a two-dimensional matrix with T columns and S rows, where S and T are positive integers greater than 1, respectively. The control circuit uses the first weight column of the weight matrix as the first readout column and the (nT+1)th weight column of the weight matrix as the (n+1)th column, where n is less than S, and The control circuit uses the second weight column of the weight matrix as the (S+1)th column and the (nT+2)th weight column of the weight matrix as the (S+n+1)th column. The matrix operation device according to claim 1, wherein the operation circuit includes: A plurality of multiply-accumulate circuits are respectively coupled to the control circuit through different corresponding channels, and are respectively configured to receive weights of corresponding weight columns of the weight matrix through the corresponding channels. The matrix operation device according to claim 4, wherein the first multiply-accumulate circuit among the plurality of multiply-accumulate circuits receives the first weight column and the input data matrix through the first channel, and performs the The first weight column and the input data matrix perform a multiplication and accumulation operation to generate the first operation element value of the operation matrix. The matrix operation device according to claim 4, wherein each of the plurality of multiply-accumulate circuits includes: a multiplier, coupled to the corresponding channel and the input data matrix, configured to receive the first weight of the corresponding weight column and the first input data of the input data matrix at the first time, and apply the The first weight and the first input data are multiplied to generate a product value; a register configured to store the operand value at the first time; and an adder, coupled to the multiplier and the register, configured to receive the operation element value stored in the register and the operation element value from the multiplier at the first time The product value is added, the operation element value and the product value are added to generate a new operation element value, and the new operation element value is stored in the register. The matrix operation device according to claim 1, wherein the control circuit increases the dimension of the operation matrix to generate the output matrix. The matrix operation device according to claim 1, wherein the control circuit converts the weight matrix into a readout matrix according to the weight readout sequence, and stores the readout matrix into the storage unit. An operating method for a matrix operating device, wherein the matrix operating device includes a storage unit and an operating circuit, and the operating method includes: Reordering the arrangement order of the plurality of weights in the weight matrix of the storage unit according to the matrix shape of the output matrix to determine the weight readout order of the plurality of weights, wherein the weight readout order is different from The order of arrangement; The operation circuit receives the plurality of weights based on the weight reading order, and performs matrix operations on the plurality of weights and the input data matrix to generate an operation matrix; and Dimension conversion is performed on the operation matrix to generate the output matrix, and the output matrix is written to the storage unit. The operation method as claimed in claim 9, wherein the arrangement order of the plurality of weights in the weight matrix of the storage unit is reordered according to the matrix shape of the output matrix to determine the The steps of the weight reading sequence of the plurality of weights include: The weight reading order of the multiple weights is determined in an interleave manner according to the number of rows and columns of the output matrix. The operation method as described in claim 10, wherein the output matrix is a two-dimensional matrix with T columns and S rows, where S and T are positive integers greater than 1 respectively, wherein according to the The step of reordering the arrangement order of the plurality of weights in the weight matrix of the storage unit in a matrix shape to determine the weight reading order of the plurality of weights includes: Use the first weight column of the weight matrix as the first readout column; Take the (nT+1)th weight column of the weight matrix as the (n+1)th column, where n is less than S; Let the second weight column of the weight matrix be the (S+1)th column; and Let the (nT+2)th weight column of the weight matrix be the (S+n+1)th column. The operation method according to claim 10, wherein the operation circuit includes a plurality of multiply-accumulate circuits, and the operation method further includes: The multiple multiply-accumulate circuits respectively receive the weights of the corresponding weight columns of the weight matrix through different corresponding channels. The operating method as described in claim 12, wherein the output matrix is a two-dimensional matrix with T columns and S rows, where S and T are respectively positive integers greater than 1, wherein the multiple product accumulation circuits The steps of receiving the weights of the corresponding weight columns through different corresponding channels include: The first multiply-accumulate circuit among the plurality of multiply-accumulate circuits receives the first weight column through the first channel and receives the input data matrix; and The first multiply-accumulate circuit performs a multiply-accumulate operation on the first weight column and the input data matrix to generate a first operation element value of the operation matrix. The operating method of claim 12, wherein each of the plurality of multiply-accumulate circuits includes a multiplier, a register and an adder, wherein the plurality of multiply-accumulate circuits respectively receive the corresponding weight sequence through different corresponding channels. The weighting steps include: The multiplier receives the first weight of the corresponding weight column and the first input data of the input data matrix at the first time, and multiplies the first weight and the first input data to generate product value; The operation element value is stored by the temporary register at the first time; and The adder receives the operation element value stored in the temporary register and the product value from the multiplier at the first time, and adds the operation element value and the product value An addition operation is performed to generate a new operation element value, and the new operation element value is stored in the register. The operation method as described in claim 10, wherein the step of performing dimension transformation on the operation matrix to generate the output matrix includes: The dimensions of the operational matrix are increased to produce the output matrix. The operation method described in request item 9 also includes: The weight matrix is converted into a readout matrix according to the weight readout sequence, and the readout matrix is stored in the storage unit.

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